add node for sdmmc in dts and rk3229-evb.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/dts/rk3229-evb.dts | 12 +++++++++ arch/arm/dts/rk322x.dtsi | 62 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+)
diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts index 428c4a8..f1f3d15 100644 --- a/arch/arm/dts/rk3229-evb.dts +++ b/arch/arm/dts/rk3229-evb.dts @@ -73,6 +73,18 @@ status = "okay"; };
+&sdmmc { + status = "okay"; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + max-frequency = <50000000>; + num-slots = <1>; + supports-sd; +}; + &uart2 { status = "okay"; }; diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi index 4f2a1f6..ddbe113 100644 --- a/arch/arm/dts/rk322x.dtsi +++ b/arch/arm/dts/rk322x.dtsi @@ -21,6 +21,8 @@ serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; + mmc0 = &emmc; + mmc1 = &sdmmc; };
cpus { @@ -383,6 +385,32 @@ status = "disabled"; };
+ sdmmc: dwmmc@30000000 { + compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x30000000 0x4000>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, + <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "disabled"; + }; + + sdio: dwmmc@30010000 { + compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x30010000 0x4000>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, + <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; + clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + fifo-depth = <0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>; + status = "disabled"; + }; + emmc: dwmmc@30020000 { compatible = "rockchip,rk3288-dw-mshc"; reg = <0x30020000 0x4000>; @@ -520,6 +548,40 @@ drive-strength = <12>; };
+ sdmmc { + sdmmc_clk: sdmmc-clk { + rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_none_drv_12ma>, + <1 19 RK_FUNC_1 &pcfg_pull_none_drv_12ma>, + <1 20 RK_FUNC_1 &pcfg_pull_none_drv_12ma>, + <1 21 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + }; + + sdio { + sdio_clk: sdio-clk { + rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + + sdio_cmd: sdio-cmd { + rockchip,pins = <3 1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + + sdio_bus4: sdio-bus4 { + rockchip,pins = <3 2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>, + <3 3 RK_FUNC_1 &pcfg_pull_none_drv_12ma>, + <3 4 RK_FUNC_1 &pcfg_pull_none_drv_12ma>, + <3 5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>; + }; + }; + emmc { emmc_clk: emmc-clk { rockchip,pins = <2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;