On Thu, Apr 25, 2013 at 03:51:11PM +0800, Xie Xiaobo wrote:
TWR-P1025 Specification:
Memory subsystem: 512MB DDR3 (on board DDR) 64Mbyte 16bit NOR flash One microSD Card slot
Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC3: Connected to Atheros AR8035 GETH PHY
UART: Two UARTs are routed to the FDTI dual USB to RS232 convertor
USB: Two USB2.0 Type A ports
I2C: AT24C01B 1K Board EEPROM (8 bit address)
QUICC Engine: Connected to DP83849i PHY supply two 10/100M ethernet ports QE UART for RS485 or RS232
PCIE: One mini-PCIE slot
Signed-off-by: Michael Johnston michael.johnston@freescale.com Signed-off-by: Xie Xiaobo X.Xie@freescale.com
[...]
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h new file mode 100644 index 0000000..d18c8f4 --- /dev/null +++ b/include/configs/p1_twr.h
[...]
+#define CONFIG_MP
+#define CONFIG_FSL_ELBC +#define CONFIG_PCI +#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ +#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ +#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
Why is CONFIG_PCI_INDIRECT_BRIDGE not set? Without it, the PCI code is not building, which raises the question of how you build-tested this code...
Please rebase, build-test, and fix any errors before resubmitting.
Andy