- U-Boot - denx.biz

[PATCH] arm: kconfig should not display the STATIC_MACH_TYPE option when SUPPORT_PASSING_ATAGS is not selected
by 1425075683＠qq.com 28 Jan '25

28 Jan '25

From: Liya Huang <1425075683(a)qq.com> When I use arch armv7, menuconfig shows the STATIC_MACH_TYPE option causing me confusion. As we know, this should not occur when SUPPORT_PASSING_ATAGS is not selected Signed-off-by: Liya Huang <1425075683(a)qq.com> --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 314916527c9..349cfa1bdbc 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2184,6 +2184,7 @@ config SERIAL_TAG config STATIC_MACH_TYPE bool "Statically define the Machine ID number" default y if TARGET_DS109 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" + depends on SUPPORT_PASSING_ATAGS help When booting via ATAGs, enable this option if we know the correct machine ID number to use at compile time. Some systems will be -- 2.25.1

1 0

[PATCH] armv7m: kconfig adds the NVIC option and masks the GIC option when NVIC is selected
by 1425075683＠qq.com 28 Jan '25

28 Jan '25

From: Liya Huang <1425075683(a)qq.com> ARMv7-M architecture uses NVIC instead of GIC. NVIC is an interrupt controller specially designed for ARM Cortex-M series processors. Signed-off-by: Liya Huang <1425075683(a)qq.com> --- arch/arm/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 314916527c9..c88b3b2aa43 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -108,6 +108,9 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE The value subtracted from CONFIG_TEXT_BASE to calculate the TEXT_OFFSET value written to the Linux kernel image header. +config NVIC + bool + config GICV2 bool @@ -117,6 +120,7 @@ config GICV3 config DRIVER_GICV2 bool "ARM GICV2 driver" select IRQ + depends on !NVIC help ARM GICV2 driver. Basic support for parsing the GICV2 node and generate ACPI tables. @@ -124,6 +128,7 @@ config DRIVER_GICV2 config GIC_V3_ITS bool "ARM GICV3 ITS" select IRQ + depends on !NVIC help ARM GICV3 Interrupt translation service (ITS). Basic support for programming locality specific peripheral @@ -134,6 +139,7 @@ config GIC_V3_ITS config GICV3_SUPPORT_GIC600 bool "ARM GICV3 GIC600 SUPPORT" + depends on !NVIC help ARM GIC-600 IP complies with ARM GICv3 architecture, but among others, implements a power control register in the Redistributor frame.This @@ -193,6 +199,7 @@ config SPL_SYS_DCACHE_OFF config SYS_ARM_CACHE_CP15 bool "CP15 based cache enabling support" + depends on !CPU_V7M help Select this if your processor suports enabling caches by using CP15 registers. @@ -200,6 +207,7 @@ config SYS_ARM_CACHE_CP15 config SYS_ARM_MMU bool "MMU-based Paged Memory Management Support" select SYS_ARM_CACHE_CP15 + depends on !CPU_V7M help Select if you want MMU-based virtualised addressing space support via paged memory management. @@ -350,6 +358,7 @@ config CPU_V7M select SYS_CACHE_SHIFT_5 select SYS_THUMB_BUILD select THUMB2_KERNEL + select NVIC config CPU_V7R bool -- 2.25.1

1 0

[PATCH v3 0/3] Initial support for PXA1908 and samsung-coreprimevelte
by Duje Mihanović 28 Jan '25

28 Jan '25

Hello, This series adds initial support for Marvell's PXA1908 ARM64 SoC and Samsung's Galaxy Core Prime VE LTE, a smartphone based on said SoC. On this board, U-Boot is used as a secondary bootloader to work around certain quirks of the factory S-Boot. Signed-off-by: Duje Mihanović <duje.mihanovic(a)skole.hr> --- Changes in v3: - Rebase on WIP/24Jan2025 and fix board_fdt_blob_setup() compile error it introduces - Link to v2: https://lore.kernel.org/r/20241231-coreprimevelte-v2-0-6a5445d92d11@skole.hr Changes in v2: - Drop arm,armv8 compatible from CPU nodes to match upstream - Add intel,xscale-uart compatible to NS16550 and use it in serial nodes to match upstream - Add include guards to include/configs/pxa1908.h - Disable CONFIG_DISPLAY_CPUINFO and CONFIG_CPU - Rebase on v2025.01-rc5 - Link to v1: https://lore.kernel.org/r/20241227-coreprimevelte-v1-0-ac8243eee4e6@skole.hr --- Duje Mihanović (3): serial: ns16550: Add Intel XScale support arm: mmp: add initial support for PXA1908 SoC board: samsung: add initial support for coreprimevelte board MAINTAINERS | 8 ++ arch/arm/Kconfig | 11 +++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/pxa1908-samsung-coreprimevelte.dts | 74 +++++++++++++++++ arch/arm/dts/pxa1908.dtsi | 106 ++++++++++++++++++++++++ arch/arm/mach-mmp/Kconfig | 12 +++ arch/arm/mach-mmp/Makefile | 1 + arch/arm/mach-mmp/board.c | 84 +++++++++++++++++++ arch/arm/mach-mmp/mmu.c | 30 +++++++ board/samsung/coreprimevelte/Kconfig | 12 +++ board/samsung/coreprimevelte/MAINTAINERS | 6 ++ configs/coreprimevelte_defconfig | 18 ++++ drivers/serial/ns16550.c | 1 + include/configs/pxa1908.h | 18 ++++ 15 files changed, 384 insertions(+) --- base-commit: 8fcb7a883231ac573a2e3ee0a44dee07b463cbc3 change-id: 20241226-coreprimevelte-1c26acfb58db Best regards, -- Duje Mihanović <duje.mihanovic(a)skole.hr>

2 7

[PATCH] configs: mvebu_espressobin_ultra-88f3720_defconfig: enable full bootflow functionality
by bschnei＠gmail.com 28 Jan '25

28 Jan '25

From: Ben Schneider <ben(a)bens.haus> This appliance has multiple devices from which it can boot. Enable full bootflow functionality so users can choose a non-default boot device. Signed-off-by: Ben Schneider <ben(a)bens.haus> --- configs/mvebu_espressobin_ultra-88f3720_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig index aa9026acc3..6f1a66f5f1 100644 --- a/configs/mvebu_espressobin_ultra-88f3720_defconfig +++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_PCI=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_BOOTSTD_FULL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y -- 2.47.1

2 2

[PATCH] board: solidrun: clearfog: enable ddr odt0 on write for both chip-select
by Josua Mayer 28 Jan '25

28 Jan '25

Enabling ODT is required to suppress reflection of the data signal on DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even when both chip-select are used. Enable ODT[0] for both chip-select during write only. Original work by Baruch Siach [1] and Chris Packham [2]. [1] https://github.com/SolidRun/u-boot-armada38x/commit/aba763a611e69fbcc4e2296… [2] https://github.com/SolidRun/u-boot-armada38x/commit/dbaf09590df9add19e738d2… Signed-off-by: Josua Mayer <josua(a)solid-run.com> --- board/solidrun/clearfog/clearfog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 2dbd071abd9f29cee97fb813a67d0190a620bd32..67b60d2e7b43331383b6a01b13693b29b21129be 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -161,7 +161,7 @@ static struct mv_ddr_topology_map board_topology_map = { {0}, /* timing parameters */ { {0} }, /* electrical configuration */ {0,}, /* electrical parameters */ - 0, /* ODT configuration */ + 0x30000, /* ODT configuration */ 0x3, /* clock enable mask */ }; --- base-commit: 3881c6b90350b0b04085ad46ef64989b43967eef change-id: 20241127-a388-sr-som-odt-89f8dd6b6410 Best regards, -- Josua Mayer <josua(a)solid-run.com>

2 2

[PATCH] arm: kirkwood: Enable bootstd and other modernization for OpenRD boards
by Tony Dinh 28 Jan '25

28 Jan '25

Enable bootstd for OpenRD boards Update defconfigs to the latest u-boot requirements Remove JFFS2 support. See JFFS2 Vulnerability[1]. Move default envs to text-base environment [1] https://lore.kernel.org/u-boot/20241114233005.GN3600562@bill-the-cat/T/#m2f… Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- arch/arm/mach-kirkwood/Kconfig | 1 + board/Marvell/openrd/openrd.env | 20 ++++++++++++++++++++ configs/openrd_base_defconfig | 18 +++++------------- configs/openrd_client_defconfig | 18 +++++------------- configs/openrd_ultimate_defconfig | 18 +++++------------- include/configs/openrd.h | 18 ------------------ 6 files changed, 36 insertions(+), 57 deletions(-) create mode 100644 board/Marvell/openrd/openrd.env diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 031d4e5ecd..6761a9cb39 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -38,6 +38,7 @@ config TARGET_OPENRD bool "Marvell OpenRD Board" select KW88F6281 select SHEEVA_88SV131 + select KIRKWOOD_COMMON config TARGET_DREAMPLUG bool "DreamPlug Board" diff --git a/board/Marvell/openrd/openrd.env b/board/Marvell/openrd/openrd.env new file mode 100644 index 0000000000..70ca704b73 --- /dev/null +++ b/board/Marvell/openrd/openrd.env @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2024 Tony Dinh <mibodhi(a)gmail.com> + * + * Environment variables configurations + */ + +kernel_addr_r=0x800000 +fdt_addr_r=0x2c00000 +ramdisk_addr_r=0x01100000 +scriptaddr=0x200000 +fdtfile=CONFIG_DEFAULT_DEVICE_TREE.dtb +mtdparts=CONFIG_MTDPARTS_DEFAULT +console=ttyS0,115200 + +/* Standard Boot */ +bootcmd= + bootflow scan -lb +failed= + echo CONFIG_SYS_BOARD boot failed - please check your image diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 708bf5eefd..1ca0b45d93 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -4,22 +4,22 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-base" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_IDENT_STRING="\nOpenRD-Base" -# CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set @@ -30,23 +30,17 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 @@ -59,7 +53,5 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 82a9c77761..e0cc2e65db 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -4,10 +4,12 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_BOARD_IS_OPENRD_CLIENT=y CONFIG_ENV_SIZE=0x20000 @@ -15,12 +17,10 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-client" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_IDENT_STRING="\nOpenRD-Client" -# CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set @@ -31,23 +31,17 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 @@ -60,7 +54,5 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 10b46e2ec1..a115691daa 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -4,10 +4,12 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_BOARD_IS_OPENRD_ULTIMATE=y CONFIG_ENV_SIZE=0x20000 @@ -15,12 +17,10 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-ultimate" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_IDENT_STRING="\nOpenRD-Ultimate" -# CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set @@ -31,23 +31,17 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 @@ -60,7 +54,5 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 1e6b16b4e7..f91e62a2e4 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -15,22 +15,4 @@ #include "mv-common.h" -/* - * Environment variables configurations - */ -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* - * Default environment variables - */ - -#define CFG_EXTRA_ENV_SETTINGS "x_bootargs=console=ttyS0,115200 " \ - CONFIG_MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \ - "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \ - "x_bootcmd_usb=usb start\0" \ - "x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0" - #endif /* _CONFIG_OPENRD_BASE_H */ -- 2.39.5

2 2

[PATCH] Fix fastboot handling of partitions when no slots are supported
by Federico Fuga via B4 Relay 28 Jan '25

28 Jan '25

From: Federico Fuga <fuga(a)studiofuga.com> The fastboot module has a bug that prevents some command to work properly on devices that haven't an Android-like partition scheme, that is, just one spl and one kernel partition, instead of the redundant scheme with _a and _b slots. This is the schema of our NAND storage (board is based on an AllWinner A33 sunxi chip): => mtdparts device nand0 <1c03000.nand>, # parts = 4 #: name size net size offset mask_flags 0: spl 0x00020000 0x00020000 0x00000000 0 1: uboot 0x00100000 0x00100000 0x00020000 0 2: kernel_a 0x00400000 0x00400000 0x00120000 0 3: ubi 0x07ae0000 0x079e0000 (!) 0x00520000 0 active partition: nand0,0 - (spl) 0x00020000 @ 0x00000000 This happens when we try to erase the spl partition using fastboot: $ fastboot erase spl Erasing 'spl_a' FAILED (remote: 'invalid NAND device') fastboot: error: Command failed The error occurs because getvars fails to handle the error returned by nand layer when a partition cannot be found. Indeed, getvar_get_part_info returns what is returned by fastboot_nand_get_part_info (0 on success, 1 on failure) but it should return -ENODEV or -EINVAL instead. Since the cause of failure is not returned by the nand function, I decided to return -EINVAL to make it simple. Signed-off-by: Federico Fuga <fuga(a)studiofuga.com> --- drivers/fastboot/fb_getvar.c | 5 ++++- drivers/fastboot/fb_nand.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c index 9c2ce65a4e5bce0da6b18aa1b2818f7db556c528..816ed8a6213b5c1f0948a813c6f6a865a4b47ba8 100644 --- a/drivers/fastboot/fb_getvar.c +++ b/drivers/fastboot/fb_getvar.c @@ -121,8 +121,11 @@ static int getvar_get_part_info(const char *part_name, char *response, *size = disk_part.size * disk_part.blksz; } else if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) { r = fastboot_nand_get_part_info(part_name, &part_info, response); - if (r >= 0 && size) + if (r == 0 && size) { *size = part_info->size; + } else { + r = -EINVAL; + } } else { fastboot_fail("this storage is not supported in bootloader", response); r = -ENODEV; diff --git a/drivers/fastboot/fb_nand.c b/drivers/fastboot/fb_nand.c index afc64fd5280717ae4041ed70268ccc01cfbb0496..9e2f7c01895785a4409eb67ea48abd02a6a6da26 100644 --- a/drivers/fastboot/fb_nand.c +++ b/drivers/fastboot/fb_nand.c @@ -151,7 +151,7 @@ static lbaint_t fb_nand_sparse_reserve(struct sparse_storage *info, * * @part_name: Named device to lookup * @part_info: Pointer to returned part_info pointer - * @response: Pointer to fastboot response buffer + * @response: 0 on success, 1 otherwise */ int fastboot_nand_get_part_info(const char *part_name, struct part_info **part_info, char *response) --- base-commit: a517796cfa5d8f4ca2f0c11c78c24a08a102c047 change-id: 20250128-fastboot_slot_fix-69251576d9bb Best regards, -- Federico Fuga <fuga(a)studiofuga.com>

1 0

[PATCH 0/7] Align pio3 pinctrl node with Linux
by Manikandan Muralidharan 28 Jan '25

28 Jan '25

The series adds support in the pinctrl driver and additional changes in the at91 DT to align the pio3 based pinctrl nodes in the u-boot DT with that of Linux Balamanikandan Gunasundar (1): ARM: dts: at91: sam9x60: Define pinctrl node with its label Manikandan Muralidharan (6): ARM: dts: at91: sam9x60: Add AIC node ARM: dts: at91: sam9x60: Move pinmux node to board DTS ARM: dts: at91: sam9x60: Add missing pinctrl node properties pinctrl: at91: Bind GPIO driver to the pinctrl DT node pinctrl: at91: Add support to align with Linux Devicetree ARM: dts: at91: Align pinctrl node with Linux Devicetree arch/arm/dts/at91-sam9x60_curiosity.dts | 71 ++++++++ arch/arm/dts/at91sam9260.dtsi | 76 ++++----- arch/arm/dts/at91sam9261.dtsi | 77 +++++---- arch/arm/dts/at91sam9263.dtsi | 117 +++++++------ arch/arm/dts/at91sam9g45.dtsi | 106 ++++++------ arch/arm/dts/at91sam9n12.dtsi | 93 +++++------ arch/arm/dts/at91sam9rl.dtsi | 93 +++++------ arch/arm/dts/at91sam9x5.dtsi | 90 +++++----- arch/arm/dts/sam9x60.dtsi | 149 +++++++---------- arch/arm/dts/sam9x60ek.dts | 209 ++++++++++++++++-------- arch/arm/dts/sama5d3.dtsi | 116 +++++++------ arch/arm/dts/sama5d4.dtsi | 118 +++++++------ drivers/pinctrl/pinctrl-at91.c | 40 ++++- 13 files changed, 720 insertions(+), 635 deletions(-) -- 2.25.1

2 10

[PATCH v2] USB: Fix NULLPTR dereference when serial# is unset
by Michael Ferolito 28 Jan '25

28 Jan '25

The current behaviour of this function will dereference a null pointer if the serial# environment variable is unset. This was discovered on a board where U-Boot did not have access to the first 256MB of ram, resulting in a board crash. In the event that U-Boot has full access to memory, it will still read from address 0, which is probably not optimal. This simple check is enough to fix it Signed-off-by: Michael Ferolito <michaelsunn101(a)gmail.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Kyungmin Park <kyungmin.park(a)samsung.com> --- drivers/usb/gadget/g_dnl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c index 631969b340..f2540eb6de 100644 --- a/drivers/usb/gadget/g_dnl.c +++ b/drivers/usb/gadget/g_dnl.c @@ -207,7 +207,8 @@ void g_dnl_clear_detach(void) static int on_serialno(const char *name, const char *value, enum env_op op, int flags) { - g_dnl_set_serialnumber((char *)value); + if (value) + g_dnl_set_serialnumber((char *)value); return 0; } U_BOOT_ENV_CALLBACK(serialno, on_serialno); -- 2.48.1

4 5

[PATCH v2 1/2] board: phytec: common: Add product information to FTD
by Daniel Schultz 28 Jan '25

28 Jan '25

ft_board_setup inside the board code allows to alter device-tree during the boot process. Introduce a new function for the PHYTEC SOM detection to read the product name and part number from the EEPROM content and include both into the device-tree as * phytec,som-part-number * phytec,som-product-name This function can be called from the board code when those values should be exposed to Linux. Signed-off-by: Daniel Schultz <d.schultz(a)phytec.de> --- Changes in v2: * Removed 'struct bd_info' as argument in function phytec_ft_board_fixup board/phytec/common/phytec_som_detection.c | 202 ++++++++++++++++----- board/phytec/common/phytec_som_detection.h | 7 + 2 files changed, 166 insertions(+), 43 deletions(-) diff --git a/board/phytec/common/phytec_som_detection.c b/board/phytec/common/phytec_som_detection.c index 166c3eae565..a4a1d20e0ec 100644 --- a/board/phytec/common/phytec_som_detection.c +++ b/board/phytec/common/phytec_som_detection.c @@ -271,11 +271,126 @@ err: return ret; } +static int phytec_get_product_name(struct phytec_eeprom_data *data, + char *product) +{ + struct phytec_api2_data *api2; + unsigned int ksp_no, som_type; + int len; + + if (!data) + data = &eeprom_data; + + if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2) + return -EINVAL; + + api2 = &data->payload.data.data_api2; + + if (api2->som_type > 1 && api2->som_type <= 3) { + ksp_no = (api2->ksp_no << 8) | api2->som_no; + len = snprintf(product, PHYTEC_PRODUCT_NAME_LEN, "%s-%04u", + phytec_som_type_str[api2->som_type], ksp_no); + if (len != 8) + return -1; + return 0; + } + + switch (api2->som_type) { + case 0: + som_type = api2->som_type; + break; + case 4: + som_type = 0; + break; + case 5: + som_type = 0; + break; + case 6: + som_type = 1; + break; + case 7: + som_type = 1; + break; + default: + pr_err("%s: Invalid SOM type: %i", __func__, api2->som_type); + return -EINVAL; + }; + + len = snprintf(product, PHYTEC_PRODUCT_NAME_LEN, "%s-%03u", + phytec_som_type_str[som_type], api2->som_no); + if (len != 7) + return -1; + return 0; +} + +static int phytec_get_part_number(struct phytec_eeprom_data *data, + char *part) +{ + char product_name[PHYTEC_PRODUCT_NAME_LEN] = {'\0'}; + struct phytec_api2_data *api2; + unsigned int ksp_type; + int res, len; + + if (!data) + data = &eeprom_data; + + if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2) + return -EINVAL; + + api2 = &data->payload.data.data_api2; + + res = phytec_get_product_name(data, product_name); + if (res) + return res; + + if (api2->som_type <= 1) { + len = snprintf(part, PHYTEC_PART_NUMBER_LEN, "%s-%s.%s", + product_name, api2->opt, api2->bom_rev); + if (len < 11) + return -1; + return 0; + } + if (api2->som_type <= 3) { + snprintf(part, PHYTEC_PART_NUMBER_LEN, "%s.%s", product_name, + api2->bom_rev); + if (len != 11) + return -1; + return 0; + } + + switch (api2->som_type) { + case 4: + ksp_type = 3; + break; + case 5: + ksp_type = 2; + break; + case 6: + ksp_type = 3; + break; + case 7: + ksp_type = 2; + break; + default: + pr_err("%s: Invalid SOM type: %i", __func__, api2->som_type); + return -EINVAL; + }; + + len = snprintf(part, PHYTEC_PART_NUMBER_LEN, "%s-%s%02u.%s", + product_name, phytec_som_type_str[ksp_type], + api2->ksp_no, api2->bom_rev); + if (len < 16) + return -1; + + return 0; +} + void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data) { + char part_number[PHYTEC_PART_NUMBER_LEN] = {'\0'}; struct phytec_api2_data *api2; char pcb_sub_rev; - unsigned int ksp_no, sub_som_type1, sub_som_type2; + int res; if (!data) data = &eeprom_data; @@ -289,50 +404,14 @@ void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data) pcb_sub_rev = api2->pcb_sub_opt_rev & 0x0f; pcb_sub_rev = pcb_sub_rev ? ((pcb_sub_rev - 1) + 'a') : ' '; - /* print standard product string */ - if (api2->som_type <= 1) { - printf("SoM: %s-%03u-%s.%s PCB rev: %u%c\n", - phytec_som_type_str[api2->som_type], api2->som_no, - api2->opt, api2->bom_rev, api2->pcb_rev, pcb_sub_rev); + res = phytec_get_part_number(data, part_number); + if (res) return; - } - /* print KSP/KSM string */ - if (api2->som_type <= 3) { - ksp_no = (api2->ksp_no << 8) | api2->som_no; - printf("SoM: %s-%u ", - phytec_som_type_str[api2->som_type], ksp_no); - /* print standard product based KSP/KSM strings */ - } else { - switch (api2->som_type) { - case 4: - sub_som_type1 = 0; - sub_som_type2 = 3; - break; - case 5: - sub_som_type1 = 0; - sub_som_type2 = 2; - break; - case 6: - sub_som_type1 = 1; - sub_som_type2 = 3; - break; - case 7: - sub_som_type1 = 1; - sub_som_type2 = 2; - break; - default: - pr_err("%s: Invalid SoM type: %i", __func__, api2->som_type); - return; - }; - - printf("SoM: %s-%03u-%s-%03u ", - phytec_som_type_str[sub_som_type1], - api2->som_no, phytec_som_type_str[sub_som_type2], - api2->ksp_no); - } - printf("Option: %s BOM rev: %s PCB rev: %u%c\n", api2->opt, - api2->bom_rev, api2->pcb_rev, pcb_sub_rev); + printf("SOM: %s\n", part_number); + printf("PCB Rev.: %u%c\n", api2->pcb_rev, pcb_sub_rev); + if (api2->som_type > 1) + printf("Options: %s\n", api2->opt); } char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data) @@ -379,6 +458,37 @@ u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data) return data->payload.data.data_api2.som_type; } +#if IS_ENABLED(CONFIG_OF_LIBFDT) +int phytec_ft_board_fixup(struct phytec_eeprom_data *data, void *blob) +{ + char product_name[PHYTEC_PRODUCT_NAME_LEN] = {'\0'}; + char part_number[PHYTEC_PART_NUMBER_LEN] = {'\0'}; + int res; + + if (!data) + data = &eeprom_data; + + if (!data->valid || data->payload.api_rev < PHYTEC_API_REV2) + return -EINVAL; + + res = phytec_get_product_name(data, product_name); + if (res) + return res; + + fdt_setprop(blob, 0, "phytec,som-product-name", product_name, + strlen(product_name) + 1); + + res = phytec_get_part_number(data, part_number); + if (res) + return res; + + fdt_setprop(blob, 0, "phytec,som-part-number", part_number, + strlen(part_number) + 1); + + return 0; +} +#endif /* IS_ENABLED(CONFIG_OF_LIBFDT) */ + #if IS_ENABLED(CONFIG_CMD_EXTENSION) struct extension *phytec_add_extension(const char *name, const char *overlay, const char *other) @@ -458,6 +568,12 @@ inline struct phytec_api3_element * __maybe_unused return NULL; } +#if IS_ENABLED(CONFIG_OF_LIBFDT) +inline int phytec_ft_board_fixup(struct phytec_eeprom_data *data, void *blob) +{ + return 0; +} +#endif /* IS_ENABLED(CONFIG_OF_LIBFDT) */ #if IS_ENABLED(CONFIG_CMD_EXTENSION) inline struct extension *phytec_add_extension(const char *name, const char *overlay, diff --git a/board/phytec/common/phytec_som_detection.h b/board/phytec/common/phytec_som_detection.h index 5e35a13cb21..5b0ff9b0c89 100644 --- a/board/phytec/common/phytec_som_detection.h +++ b/board/phytec/common/phytec_som_detection.h @@ -8,6 +8,7 @@ #define _PHYTEC_SOM_DETECTION_H #include "phytec_som_detection_blocks.h" +#include <fdtdec.h> #define PHYTEC_MAX_OPTIONS 17 #define PHYTEC_EEPROM_INVAL 0xff @@ -17,6 +18,9 @@ #define PHYTEC_GET_OPTION(option) \ (((option) > '9') ? (option) - 'A' + 10 : (option) - '0') +#define PHYTEC_PRODUCT_NAME_LEN 8 + 1 +#define PHYTEC_PART_NUMBER_LEN PHYTEC_PRODUCT_NAME_LEN + 14 + 1 + enum { PHYTEC_API_REV0 = 0, PHYTEC_API_REV1, @@ -86,6 +90,9 @@ void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data *data); char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data); u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data); u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data); +#if IS_ENABLED(CONFIG_OF_LIBFDT) +int phytec_ft_board_fixup(struct phytec_eeprom_data *data, void *blob); +#endif /* IS_ENABLED(CONFIG_OF_LIBFDT) */ #if IS_ENABLED(CONFIG_CMD_EXTENSION) struct extension *phytec_add_extension(const char *name, const char *overlay, -- 2.25.1

3 4