April 2024 - U-Boot

[PATCH] configs: am335x_guardian: store boot count in AM3352 RTC block
by Gireesh.Hiremath＠in.bosch.com 19 Apr '24

19 Apr '24

From: Gireesh Hiremath <Gireesh.Hiremath(a)in.bosch.com> store bootcount in RTC block scratch register Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath(a)in.bosch.com> --- configs/am335x_guardian_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 75138542431..abbbb03d33d 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -16,6 +16,7 @@ CONFIG_AM335X_USB1=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SYS_BOOTCOUNT_ADDR=0x44E3E000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x540000 CONFIG_SPL_LIBDISK_SUPPORT=y -- 2.30.2

2 1

[PATCH] arm:suniv:complete the serial port configuration of Suniv
by lhdjply＠126.com 19 Apr '24

19 Apr '24

From: lhdjply <lhdjply(a)126.com> 111 Signed-off-by: lhdjply <lhdjply(a)126.com> --- arch/arm/mach-sunxi/board.c | 4 ++-- include/sunxi_gpio.h | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index f4dbb2a740..b91c9629e4 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -151,8 +151,8 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPE(3), 6); sunxi_gpio_set_pull(SUNXI_GPE(3), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV) - sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0); - sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPA_UART1); + sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPA_UART1); sunxi_gpio_set_pull(SUNXI_GPA(3), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h index db3742c039..51258e3dd9 100644 --- a/include/sunxi_gpio.h +++ b/include/sunxi_gpio.h @@ -108,6 +108,8 @@ enum sunxi_gpio_number { #define SUN8I_H3_GPA_UART0 2 #define SUN8I_H3_GPA_UART2 2 +#define SUNIV_GPA_UART1 5 + #define SUN4I_GPB_PWM 2 #define SUN4I_GPB_TWI0 2 #define SUN4I_GPB_TWI1 2 @@ -130,12 +132,16 @@ enum sunxi_gpio_number { #define SUNXI_GPD_LCD0 2 #define SUNXI_GPD_LVDS0 3 +#define SUNIV_GPD_UART1 3 +#define SUNIV_GPD_UART2 3 #define SUNIV_GPE_UART0 5 +#define SUNIV_GPE_UART2 3 #define SUNXI_GPF_SDC0 2 #define SUNXI_GPF_UART0 4 #define SUN8I_GPF_UART0 3 +#define SUNIV_GPF_UART0 3 #define SUN4I_GPG_SDC1 4 #define SUN5I_GPG_SDC1 2 -- 2.34.1

2 1

[PATCH] drivers: pinctrl-sunxi: add suniv spi1 function
by 路辉 19 Apr '24

19 Apr '24

>From 570b40e19de75511d9ce066e1a28333ada04baf2 Mon Sep 17 00:00:00 2001 From: Lu Hui <luhux76(a)gmail.com> Date: Mon, 29 May 2023 22:26:25 +0800 Subject: [PATCH] drivers: pinctrl-sunxi: add suniv spi1 function --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index e510218090..c448e40ab0 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -240,6 +240,7 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = { { "mmc0", 2 }, /* PF0-PF5 */ { "mmc1", 3 }, /* PC0-PC2 */ { "spi0", 2 }, /* PC0-PC3 */ + { "spi1", 6 }, /* PA0-PA3 */ #if IS_ENABLED(CONFIG_UART0_PORT_F) { "uart0", 3 }, /* PF2-PF4 */ #else -- 2.40.1

2 1

[PATCH v2 1/3] clk: imx8mm: Add support for PCIe clocks
by Tim Harvey 18 Apr '24

18 Apr '24

Add support for PCIe clocks required to enable PCIe support on iMX8MM SoC. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- v2: no changes --- drivers/clk/imx/clk-imx8mm.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index b5c253e49663..c2f01b385201 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -66,6 +66,15 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_ static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; +static const char *imx8mm_pcie1_ctrl_sels[] = {"clock-osc-24m", "sys_pll2_250m", "sys_pll2_200m", "sys_pll1_266m", + "sys_pll1_800m", "sys_pll2_500m", "sys_pll2_333m", "sys_pll3_out", }; + +static const char *imx8mm_pcie1_phy_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4", "sys_pll1_400m", }; + +static const char *imx8mm_pcie1_aux_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out", + "sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m", }; + #ifndef CONFIG_SPL_BUILD static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", }; @@ -256,6 +265,15 @@ static int imx8mm_clk_probe(struct udevice *dev) imx8m_clk_composite("usb_bus", imx8mm_usb_bus_sels, base + 0x8b80)); /* IP */ + clk_dm(IMX8MM_CLK_PCIE1_CTRL, + imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels, + base + 0xa300)); + clk_dm(IMX8MM_CLK_PCIE1_PHY, + imx8m_clk_composite("pcie1_phy", imx8mm_pcie1_phy_sels, + base + 0xa380)); + clk_dm(IMX8MM_CLK_PCIE1_AUX, + imx8m_clk_composite("pcie1_aux", imx8mm_pcie1_aux_sels, + base + 0xa400)); clk_dm(IMX8MM_CLK_USDHC1, imx8m_clk_composite("usdhc1", imx8mm_usdhc1_sels, base + 0xac00)); @@ -339,6 +357,9 @@ static int imx8mm_clk_probe(struct udevice *dev) imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0)); #endif + clk_dm(IMX8MM_CLK_PCIE1_ROOT, + imx_clk_gate4("pcie1_root_clk", "pcie1_ctrl", base + 0x4250, 0)); + #if CONFIG_IS_ENABLED(DM_SPI) clk_dm(IMX8MM_CLK_ECSPI1, imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280)); -- 2.25.1

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[GIT PULL] Please pull u-boot-mpc8xx
by Christophe Leroy 18 Apr '24

18 Apr '24

Hi Tom, This pull request adds support for temperature sensors et FPGA loading on boards from CS GROUP France. CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/20416 Thanks Christophe The following changes since commit 2c3fa4b8add3cb6a440184ab67debc6867d383c0: sandbox: don't call os_close with invalid file descriptor (2024-04-17 17:06:16 -0600) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-mpc8xx.git for-2024.07 for you to fetch changes up to 741e30e8c2b837dc92ee2eedec5478afdd83a316: board: cssi: Read and display MCR board address (2024-04-18 15:47:46 +0200) ---------------------------------------------------------------- Christophe Leroy (13): board: cssi: Fix SPI nodes in DTS spi: mpc8xx: Add GPIO dependency spi: mpc8xx: Fix transfert when input or output buffer is NULL thermal: Add support for TI LM74 board: cssi: Add support for SPI bus on MCR3000 board board: cssi: add support for reading temperature powerpc: 8xx: Set SDMA configuration register correcly spi: mpc8xx: Allow transfer of more than MAX_BUFFER len spi: mpc8xx: Use 16 bit mode for large transfers with even size spi: mpc8xx: Set up speed as requested board: cssi: Use HAVE_VENDOR_COMMON_LIB logic board: cssi: Load FPGA on MCR3000 board board: cssi: Read and display MCR board address Hugo Dubois (2): board: cssi: Initialise port F on MIAE board: cssi: Properly initialise MAC address for fibre on CMPC885 board Jean-Michel CASAUBON (2): board: cssi: Fix MCR3000 board environment board: cssi: Allow use without HUSH shell arch/powerpc/cpu/mpc8xx/cpu_init.c | 6 + arch/powerpc/dts/cmpc885.dts | 18 +- arch/powerpc/dts/cmpcpro.dts | 16 +- arch/powerpc/dts/mcr3000.dts | 41 + board/cssi/cmpc885/Makefile | 2 +- board/cssi/cmpc885/cmpc885.c | 4 +- board/cssi/cmpc885/cmpc885.env | 4 +- board/cssi/cmpcpro/Makefile | 2 +- board/cssi/cmpcpro/cmpcpro.env | 4 +- board/cssi/common/Makefile | 8 + board/cssi/common/common.c | 42 +- board/cssi/mcr3000/Makefile | 1 + board/cssi/mcr3000/fpga_code.h | 9778 ++++++++++++++++++++++++++++++++++++ board/cssi/mcr3000/mcr3000.c | 58 + board/cssi/mcr3000/mcr3000.env | 2 +- board/cssi/mcr3000/mcr3000_gpio.c | 109 + configs/CMPC885_defconfig | 3 + configs/CMPCPRO_defconfig | 3 + configs/MCR3000_defconfig | 8 + drivers/spi/Kconfig | 2 +- drivers/spi/mpc8xx_spi.c | 113 +- drivers/thermal/Kconfig | 6 + drivers/thermal/Makefile | 1 + drivers/thermal/ti-lm74.c | 52 + 24 files changed, 10244 insertions(+), 39 deletions(-) create mode 100644 board/cssi/common/Makefile create mode 100644 board/cssi/mcr3000/fpga_code.h create mode 100644 board/cssi/mcr3000/mcr3000_gpio.c create mode 100644 drivers/thermal/ti-lm74.c

2 1

[PATCH] rockchip: nanopi-r4s: Fix ehci usb error
by Justin Klaassen 18 Apr '24

18 Apr '24

The ehci_generic driver always failed with the error: Bus usb@fe380000: ehci_generic usb@fe380000: ... Failed to get clocks (ret=-19) Port not available. Bus usb@fe3c0000: ehci_generic usb@fe3c0000: ... Failed to get clocks (ret=-19) Port not available. This error is resolved by enabling the CONFIG_PHY_ROCKCHIP_INNO_USB2 and CONFIG_PHY_ROCKCHIP_TYPEC driver options. The CONFIG_DM_RESET option must also be enabled, otherwise the ehci_generic driver will fail with the error: Bus usb@fe380000: ehci_generic usb@fe380000: ... Failed to get resets (err=-524) probe failed, error -524 Bus usb@fe3c0000: ehci_generic usb@fe3c0000: ... Failed to get resets (err=-524) probe failed, error -524 Additionally the u2phy1_host device was previously disabled in the nanopi-r4s device tree and must be enabled to avoid a crash in the ehci_generic driver: Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: "Synchronous Abort" handler, esr 0x96000010, far 0x0 With these changes the usb ports can now be initialized correctly by both the ehci_generic and xhci_generic drivers: Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus usb@fe800000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus usb@fe900000: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found scanning bus usb@fe800000 for devices... 1 USB Device(s) found scanning bus usb@fe900000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Signed-off-by: Justin Klaassen <justin(a)tidylabs.app> Cc: Simon Glass <sjg(a)chromium.org> Cc: Philipp Tomsich <philipp.tomsich(a)vrull.eu> Cc: Kever Yang <kever.yang(a)rock-chips.com> --- arch/arm/dts/rk3399-nanopi-r4s.dts | 2 +- configs/nanopi-r4s-rk3399_defconfig | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts b/arch/arm/dts/rk3399-nanopi-r4s.dts index cef4d18b599..a992a6ac5e9 100644 --- a/arch/arm/dts/rk3399-nanopi-r4s.dts +++ b/arch/arm/dts/rk3399-nanopi-r4s.dts @@ -117,7 +117,7 @@ }; &u2phy1_host { - status = "disabled"; + phy-supply = <&vdd_5v>; }; &uart0 { diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index ea01d323541..d8c34dc48cb 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 @@ -36,6 +37,8 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y -- 2.43.0

2 2

[PATCH 1/3] clk: imx8mm: Add support for PCIe clocks
by Tim Harvey 18 Apr '24

18 Apr '24

Add support for PCIe clocks required to enable PCIe support on iMX8MM SoC. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- drivers/clk/imx/clk-imx8mm.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index b5c253e49663..c2f01b385201 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -66,6 +66,15 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_ static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", }; +static const char *imx8mm_pcie1_ctrl_sels[] = {"clock-osc-24m", "sys_pll2_250m", "sys_pll2_200m", "sys_pll1_266m", + "sys_pll1_800m", "sys_pll2_500m", "sys_pll2_333m", "sys_pll3_out", }; + +static const char *imx8mm_pcie1_phy_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4", "sys_pll1_400m", }; + +static const char *imx8mm_pcie1_aux_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out", + "sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m", }; + #ifndef CONFIG_SPL_BUILD static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", }; @@ -256,6 +265,15 @@ static int imx8mm_clk_probe(struct udevice *dev) imx8m_clk_composite("usb_bus", imx8mm_usb_bus_sels, base + 0x8b80)); /* IP */ + clk_dm(IMX8MM_CLK_PCIE1_CTRL, + imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels, + base + 0xa300)); + clk_dm(IMX8MM_CLK_PCIE1_PHY, + imx8m_clk_composite("pcie1_phy", imx8mm_pcie1_phy_sels, + base + 0xa380)); + clk_dm(IMX8MM_CLK_PCIE1_AUX, + imx8m_clk_composite("pcie1_aux", imx8mm_pcie1_aux_sels, + base + 0xa400)); clk_dm(IMX8MM_CLK_USDHC1, imx8m_clk_composite("usdhc1", imx8mm_usdhc1_sels, base + 0xac00)); @@ -339,6 +357,9 @@ static int imx8mm_clk_probe(struct udevice *dev) imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0)); #endif + clk_dm(IMX8MM_CLK_PCIE1_ROOT, + imx_clk_gate4("pcie1_root_clk", "pcie1_ctrl", base + 0x4250, 0)); + #if CONFIG_IS_ENABLED(DM_SPI) clk_dm(IMX8MM_CLK_ECSPI1, imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280)); -- 2.25.1

2 4

[PATCH 0/5] Fix MMC tuning algorithm
by Judith Mendez 18 Apr '24

18 Apr '24

The following patch series includes a MMC tuning algorithm fix according to the following published paper [0]. This seris also includes fixes for OTAP/ITAP delay values in j721e_4bit_sdhci_set_ios_post and for HS400 mode. For DDR52 mode, also set ENDLL=1 and call am654_sdhci_setup_dll() instead of am654_sdhci_setup_delay_chain() according to device datasheet[1]. [0] https://www.ti.com/lit/an/spract9/spract9.pdf [1] https://www.ti.com/lit/ds/symlink/am62p.pdf Judith Mendez (4): mmc: am654_sdhci: Add tuning algorithm for delay chain mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit mmc: am654_sdhci: Set ENDLL=1 for DDR52 mode mmc: am654_sdhci: Fix ITAPDLY for HS400 timing Nitin Yadav (1): mmc: am654_sdhci: Fix OTAP/ITAP delay values drivers/mmc/am654_sdhci.c | 170 +++++++++++++++++++++++++++++++------- 1 file changed, 138 insertions(+), 32 deletions(-) base-commit: 27795dd717dadc73091e1b4d6c50952b93aaa819 -- 2.43.2

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[PULL] u-boot-sh/master-fdt
by Marek Vasut 18 Apr '24

18 Apr '24

The following changes since commit a712a54dc427708195e6405af4b072d869d0dd8f: Merge patch series "configs: ti: Enable basic settings for SystemReady ACS" (2024-04-17 13:16:12 -0600) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-sh.git master-fdt for you to fetch changes up to aad511a488c40393728156333d983c31001aac32: ARM: dts: renesas: Switch to using upstream DT (2024-04-18 05:21:26 +0200) ---------------------------------------------------------------- Marek Vasut (4): ARM: dts: renesas: Stop using the -u-boot DTs for build ARM: dts: renesas: Replace R8A77950 with R8A77951 ARM: dts: renesas: Switch to using upstream DT on 64bit Renesas SoCs ARM: dts: renesas: Switch to using upstream DT arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 58 +++++++++++----------- ...ch-u-boot.dts => r7s72100-gr-peach-u-boot.dtsi} | 1 - ...-boot.dts => r8a774a1-hihope-rzg2m-u-boot.dtsi} | 1 - ...-boot.dts => r8a774b1-hihope-rzg2n-u-boot.dtsi} | 1 - ...ek874-u-boot.dts => r8a774c0-ek874-u-boot.dtsi} | 1 - ...-boot.dts => r8a774e1-hihope-rzg2h-u-boot.dtsi} | 1 - ...-lager-u-boot.dts => r8a7790-lager-u-boot.dtsi} | 1 - ...-stout-u-boot.dts => r8a7790-stout-u-boot.dtsi} | 1 - ...lsch-u-boot.dts => r8a7791-koelsch-u-boot.dtsi} | 1 - ...orter-u-boot.dts => r8a7791-porter-u-boot.dtsi} | 1 - ...nche-u-boot.dts => r8a7792-blanche-u-boot.dtsi} | 1 - ...93-gose-u-boot.dts => r8a7793-gose-u-boot.dtsi} | 1 - ...7794-alt-u-boot.dts => r8a7794-alt-u-boot.dtsi} | 1 - ...94-silk-u-boot.dts => r8a7794-silk-u-boot.dtsi} | 1 - ...-u-boot.dts => r8a77951-salvator-x-u-boot.dtsi} | 3 +- .../{r8a77950-u-boot.dtsi => r8a77951-u-boot.dtsi} | 6 --- ...0-ulcb-u-boot.dts => r8a77951-ulcb-u-boot.dtsi} | 3 +- ...-u-boot.dts => r8a77960-salvator-x-u-boot.dtsi} | 1 - ...0-ulcb-u-boot.dts => r8a77960-ulcb-u-boot.dtsi} | 1 - ...-u-boot.dts => r8a77965-salvator-x-u-boot.dtsi} | 1 - ...5-ulcb-u-boot.dts => r8a77965-ulcb-u-boot.dtsi} | 1 - ...eagle-u-boot.dts => r8a77970-eagle-u-boot.dtsi} | 1 - ...v3msk-u-boot.dts => r8a77970-v3msk-u-boot.dtsi} | 1 - ...ndor-u-boot.dts => r8a77980-condor-u-boot.dtsi} | 1 - ...v3hsk-u-boot.dts => r8a77980-v3hsk-u-boot.dtsi} | 1 - ...ebisu-u-boot.dts => r8a77990-ebisu-u-boot.dtsi} | 1 - ...draak-u-boot.dts => r8a77995-draak-u-boot.dtsi} | 1 - ...lcon-u-boot.dts => r8a779a0-falcon-u-boot.dtsi} | 1 - ...ider-u-boot.dts => r8a779f0-spider-u-boot.dtsi} | 1 - ...-u-boot.dts => r8a779g0-white-hawk-u-boot.dtsi} | 1 - ...k-u-boot.dts => r8a779h0-gray-hawk-u-boot.dtsi} | 1 - arch/arm/mach-renesas/Kconfig | 1 + board/renesas/salvator-x/salvator-x.c | 6 +-- board/renesas/ulcb/ulcb.c | 6 +-- configs/alt_defconfig | 2 +- configs/blanche_defconfig | 2 +- configs/gose_defconfig | 2 +- configs/grpeach_defconfig | 2 +- configs/hihope_rzg2_defconfig | 4 +- configs/koelsch_defconfig | 2 +- configs/lager_defconfig | 2 +- configs/porter_defconfig | 2 +- configs/r8a77970_eagle_defconfig | 2 +- configs/r8a77970_v3msk_defconfig | 2 +- configs/r8a77980_condor_defconfig | 2 +- configs/r8a77980_v3hsk_defconfig | 2 +- configs/r8a77990_ebisu_defconfig | 2 +- configs/r8a77995_draak_defconfig | 2 +- configs/r8a779a0_falcon_defconfig | 2 +- configs/r8a779f0_spider_defconfig | 2 +- configs/r8a779g0_whitehawk_defconfig | 2 +- configs/r8a779h0_grayhawk_defconfig | 3 +- configs/rcar3_salvator-x_defconfig | 8 +-- configs/rcar3_ulcb_defconfig | 8 +-- configs/renesas_rzg2l_smarc_defconfig | 2 +- configs/rzg2_beacon_defconfig | 4 +- configs/rzn1_snarc_defconfig | 1 + configs/silinux_ek874_defconfig | 2 +- configs/silk_defconfig | 2 +- configs/stout_defconfig | 2 +- 61 files changed, 74 insertions(+), 105 deletions(-) rename arch/arm/dts/{r7s72100-gr-peach-u-boot.dts => r7s72100-gr-peach-u-boot.dtsi} (97%) rename arch/arm/dts/{r8a774a1-hihope-rzg2m-u-boot.dts => r8a774a1-hihope-rzg2m-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a774b1-hihope-rzg2n-u-boot.dts => r8a774b1-hihope-rzg2n-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a774c0-ek874-u-boot.dts => r8a774c0-ek874-u-boot.dtsi} (95%) rename arch/arm/dts/{r8a774e1-hihope-rzg2h-u-boot.dts => r8a774e1-hihope-rzg2h-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a7790-lager-u-boot.dts => r8a7790-lager-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a7790-stout-u-boot.dts => r8a7790-stout-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a7791-koelsch-u-boot.dts => r8a7791-koelsch-u-boot.dtsi} (90%) rename arch/arm/dts/{r8a7791-porter-u-boot.dts => r8a7791-porter-u-boot.dtsi} (92%) rename arch/arm/dts/{r8a7792-blanche-u-boot.dts => r8a7792-blanche-u-boot.dtsi} (89%) rename arch/arm/dts/{r8a7793-gose-u-boot.dts => r8a7793-gose-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a7794-alt-u-boot.dts => r8a7794-alt-u-boot.dtsi} (96%) rename arch/arm/dts/{r8a7794-silk-u-boot.dts => r8a7794-silk-u-boot.dtsi} (91%) rename arch/arm/dts/{r8a77950-salvator-x-u-boot.dts => r8a77951-salvator-x-u-boot.dtsi} (92%) rename arch/arm/dts/{r8a77950-u-boot.dtsi => r8a77951-u-boot.dtsi} (93%) rename arch/arm/dts/{r8a77950-ulcb-u-boot.dts => r8a77951-ulcb-u-boot.dtsi} (94%) rename arch/arm/dts/{r8a77960-salvator-x-u-boot.dts => r8a77960-salvator-x-u-boot.dtsi} (96%) rename arch/arm/dts/{r8a77960-ulcb-u-boot.dts => r8a77960-ulcb-u-boot.dtsi} (97%) rename arch/arm/dts/{r8a77965-salvator-x-u-boot.dts => r8a77965-salvator-x-u-boot.dtsi} (96%) rename arch/arm/dts/{r8a77965-ulcb-u-boot.dts => r8a77965-ulcb-u-boot.dtsi} (97%) rename arch/arm/dts/{r8a77970-eagle-u-boot.dts => r8a77970-eagle-u-boot.dtsi} (96%) rename arch/arm/dts/{r8a77970-v3msk-u-boot.dts => r8a77970-v3msk-u-boot.dtsi} (97%) rename arch/arm/dts/{r8a77980-condor-u-boot.dts => r8a77980-condor-u-boot.dtsi} (96%) rename arch/arm/dts/{r8a77980-v3hsk-u-boot.dts => r8a77980-v3hsk-u-boot.dtsi} (95%) rename arch/arm/dts/{r8a77990-ebisu-u-boot.dts => r8a77990-ebisu-u-boot.dtsi} (97%) rename arch/arm/dts/{r8a77995-draak-u-boot.dts => r8a77995-draak-u-boot.dtsi} (94%) rename arch/arm/dts/{r8a779a0-falcon-u-boot.dts => r8a779a0-falcon-u-boot.dtsi} (94%) rename arch/arm/dts/{r8a779f0-spider-u-boot.dts => r8a779f0-spider-u-boot.dtsi} (95%) rename arch/arm/dts/{r8a779g0-white-hawk-u-boot.dts => r8a779g0-white-hawk-u-boot.dtsi} (95%) rename arch/arm/dts/{r8a779h0-gray-hawk-u-boot.dts => r8a779h0-gray-hawk-u-boot.dtsi} (95%)

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[PATCH v5 0/1] Introduce fastboot oem board command
by Alexey Romanov 18 Apr '24

18 Apr '24

Changes V1 -> V2 [1]: - Added an example of using the command as requested by Sean Anderson [2]. Changes V2 -> V3 [3]: - Rebase over uboot/master. - Add documentation. - Remove example added in V2 [1]. Changes V3 -> V4 [4]: - Corrected documentation accroding to Quentin Schulz comments [5]. Changes V4 -> V5 [6]: - Fix compiler warning reported by CI [7]. Links: [1] https://lore.kernel.org/all/20231228152522.83291-1-avromanov@salutedevices.… [2] https://lore.kernel.org/all/72ac233d-c18d-4f57-bc66-451fe0bd2997@seco.com/ [3] https://lore.kernel.org/all/20240201092027.6258-1-avromanov@salutedevices.c… [4] https://lore.kernel.org/all/20240408101552.539037-1-avromanov@salutedevices… [5] https://lore.kernel.org/all/9efdf140-8da3-4b5e-b1c4-2f106067afd3@theobroma-… [6] https://lore.kernel.org/all/20240410105804.22757-1-avromanov@salutedevices.… [7] https://lore.kernel.org/all/877cgv3ur6.fsf@baylibre.com/ Alexey Romanov (1): fastboot: introduce 'oem board' subcommand doc/android/fastboot.rst | 18 ++++++++++++++++++ drivers/fastboot/Kconfig | 7 +++++++ drivers/fastboot/fb_command.c | 30 ++++++++++++++++++++++++++++++ include/fastboot.h | 1 + 4 files changed, 56 insertions(+) -- 2.34.1

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