April 2024 - U-Boot

[PATCH 01/19] ARM: dts: stm32: Add alternate pinmux for MP13 ADC pins
by Marek Vasut 26 Apr '24

26 Apr '24

Add another mux option for ADC pins, this is used on DH electronics STM32MP13xx DHCOR DHSBC board. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: u-boot(a)dh-electronics.com Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- arch/arm/dts/stm32mp13-pinctrl.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi b/arch/arm/dts/stm32mp13-pinctrl.dtsi index 27e0c382678..03ded415390 100644 --- a/arch/arm/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi @@ -6,6 +6,12 @@ #include <dt-bindings/pinctrl/stm32-pinfunc.h> &pinctrl { + adc1_pins_a: adc1-pins-0 { + pins { + pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */ + }; + }; + adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 { pins { pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ -- 2.43.0

2 38

[PATCH v1] arm: dts: meson-axg: add NAND controller node for AXG
by Arseniy Krasnov 26 Apr '24

26 Apr '24

nfc: Synced from Linux commit 7ca2ef33179f ("Linux 6.6-rc1") nand_all_pins: Synced from Linux commit be18d53c32b2 ("Linux 6.7-rc3") Signed-off-by: Arseniy Krasnov <avkrasnov(a)salutedevices.com> --- arch/arm/dts/meson-axg.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi index 3f5254eeb4..4f6fdd5523 100644 --- a/arch/arm/dts/meson-axg.dtsi +++ b/arch/arm/dts/meson-axg.dtsi @@ -430,6 +430,27 @@ }; }; + nand_all_pins: nand_all_pins { + mux { + groups = "emmc_nand_d0", + "emmc_nand_d1", + "emmc_nand_d2", + "emmc_nand_d3", + "emmc_nand_d4", + "emmc_nand_d5", + "emmc_nand_d6", + "emmc_nand_d7", + "nand_ce0", + "nand_ale", + "nand_cle", + "nand_wen_clk", + "nand_ren_wr"; + function = "nand"; + input-enable; + bias-pull-up; + }; + }; + emmc_ds_pins: emmc_ds { mux { groups = "emmc_ds"; @@ -1906,6 +1927,21 @@ resets = <&reset RESET_SD_EMMC_C>; }; + nfc: nand-controller@7800 { + compatible = "amlogic,meson-axg-nfc"; + reg = <0x0 0x7800 0x0 0x100>, + <0x0 0x7000 0x0 0x800>; + reg-names = "nfc", "emmc"; + pinctrl-0 = <&nand_all_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>; + clocks = <&clkc CLKID_SD_EMMC_C>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "device"; + }; + usb2_phy1: phy@9020 { compatible = "amlogic,meson-gxl-usb2-phy"; #phy-cells = <0>; -- 2.35.0

3 4

[PATCH] efi_loader: fix description efi_dp_shorten
by Heinrich Schuchardt 26 Apr '24

26 Apr '24

Use Sphinx style for return value. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- lib/efi_loader/efi_device_path.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 46aa59b9e40..aec224d8466 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -102,7 +102,7 @@ int efi_dp_match(const struct efi_device_path *a, * See UEFI spec, section 3.1.2 for "short-form device path". * * @dp: original device-path - * @Return: shortened device-path or NULL + * Return: shortened device-path or NULL */ struct efi_device_path *efi_dp_shorten(struct efi_device_path *dp) { -- 2.43.0

2 1

[PATCH v4 00/11] rockchip: Support getting DRAM banks from TPL for rk3568 and rk3588
by Quentin Schulz 26 Apr '24

26 Apr '24

This is a new version of the patch series started by Chris Morgan here: https://lore.kernel.org/u-boot/20240401181435.553351-1-macroalpha82@gmail.c… Thanks Chris for starting this effort and allowing me to take over the development. Allow RK3568 and RK3588 based boards to get the RAM bank configuration from the ROCKCHIP_TPL stage instead of the current logic. This fixes both an issue where 256MB of RAM is blocked for devices with >= 4GB of RAM and where memory holes need to be defined for devices with more than 16GB of RAM. In the event that neither SoC is used or the ROCKCHIP_TPL stage is not used, fall back to existing logic. The logic handles creating memory holes from reserved memory areas defined in mem_map data struct in SoC C files, but only if the DRAM area overlaps with one reserved memory area. Since mem_map data struct is used, it should be rather straightforward to add support for other SoCs if needed. The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1 (e08e32143dd). Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as well, but the DDR_MEM tag seems to be pretty much stable (though BL31 seems to be reserving only 1MB for itself at the moment). u32 for ATAGS is used because it simplifies the pointer arithmetic and it's expected that ATAGS are always below the 4GB limit allowed by u32. The default number of DRAM banks is increased to 10 if ROCKCHIP_EXTERNAL_TPL is used, making it almost guaranteed that the new logic will be used for new devices, provided the ATAGS are valid. This was tested on Rock5B 16GB, Rock5B 8G and Jaguar 4G. U-Boot reports the appropriate DRAM size and the kernel passes the memtest. Boot the kernel with the following params: setenv bootargs 'memtest=1 console=uart,mmio32,0xfeb50000 earlyprintk' Jaguar 4GB: """ [ 0.000000] early_memtest: # of tests: 1 [ 0.000000] 0x0000000000200000 - 0x0000000002010000 pattern 0000000000000000 [ 0.000000] 0x0000000003b80000 - 0x00000000eced1000 pattern 0000000000000000 [ 0.000000] 0x00000000ecee4000 - 0x00000000f0000000 pattern 0000000000000000 [ 0.000000] 0x00000001f0000000 - 0x00000001ff790d38 pattern 0000000000000000 [ 0.000000] 0x00000001ff790d64 - 0x00000001ff790d68 pattern 0000000000000000 [ 0.000000] 0x00000001ff790d94 - 0x00000001ff790d98 pattern 0000000000000000 [ 0.000000] 0x00000001ff790dc4 - 0x00000001ff790dc8 pattern 0000000000000000 [ 0.000000] 0x00000001ff790df9 - 0x00000001ff790e00 pattern 0000000000000000 [ 0.000000] 0x00000001ff790e2c - 0x00000001ff790e30 pattern 0000000000000000 [ 0.000000] 0x00000001ff790e5c - 0x00000001ff790e60 pattern 0000000000000000 [ 0.000000] 0x00000001ff790e8c - 0x00000001ff790e90 pattern 0000000000000000 [ 0.000000] 0x00000001ff790ebc - 0x00000001ff790ec0 pattern 0000000000000000 [ 0.000000] 0x00000001ff790eec - 0x00000001ff790ef0 pattern 0000000000000000 [ 0.000000] 0x00000001ff790f1f - 0x00000001ff790f20 pattern 0000000000000000 [ 0.000000] 0x00000001ff790f4f - 0x00000001ff790f50 pattern 0000000000000000 [ 0.000000] 0x00000001ff790f7f - 0x00000001ff790f80 pattern 0000000000000000 [ 0.000000] 0x00000001ff790faf - 0x00000001ff790fb0 pattern 0000000000000000 [ 0.000000] 0x00000001ff790fdf - 0x00000001ff790fe0 pattern 0000000000000000 [ 0.000000] 0x00000001ff79100f - 0x00000001ff791010 pattern 0000000000000000 [ 0.000000] 0x00000001ff79103f - 0x00000001ff791040 pattern 0000000000000000 [ 0.000000] 0x00000001ff79106f - 0x00000001ff791070 pattern 0000000000000000 [ 0.000000] 0x00000001ff79109f - 0x00000001ff7910a0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7910cf - 0x00000001ff7910d0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7910fc - 0x00000001ff791100 pattern 0000000000000000 [ 0.000000] 0x00000001ff79112c - 0x00000001ff791130 pattern 0000000000000000 [ 0.000000] 0x00000001ff79115c - 0x00000001ff791160 pattern 0000000000000000 [ 0.000000] 0x00000001ff79118c - 0x00000001ff791190 pattern 0000000000000000 [ 0.000000] 0x00000001ff7911bc - 0x00000001ff7911c0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7911ec - 0x00000001ff7911f0 pattern 0000000000000000 [ 0.000000] 0x00000001ff79121c - 0x00000001ff791220 pattern 0000000000000000 [ 0.000000] 0x00000001ff79124c - 0x00000001ff791250 pattern 0000000000000000 [ 0.000000] 0x00000001ff79127c - 0x00000001ff791280 pattern 0000000000000000 [ 0.000000] 0x00000001ff7912ad - 0x00000001ff7912b0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7912dd - 0x00000001ff7912e0 pattern 0000000000000000 [ 0.000000] 0x00000001ff79130d - 0x00000001ff791310 pattern 0000000000000000 [ 0.000000] 0x00000001ff79133d - 0x00000001ff791340 pattern 0000000000000000 [ 0.000000] 0x00000001ff79136d - 0x00000001ff791370 pattern 0000000000000000 [ 0.000000] 0x00000001ff803ffc - 0x00000001ff804000 pattern 0000000000000000 $ lsmem --output SIZE --bytes --json | jq '[.memory[].size] | add / 1024 / 1024 / 1024' 4 """ Rock5B 8G: """ [ 0.000000] early_memtest: # of tests: 1 [ 0.000000] 0x0000000000200000 - 0x0000000002010000 pattern 0000000000000000 [ 0.000000] 0x0000000003b80000 - 0x00000000ecbc6000 pattern 0000000000000000 [ 0.000000] 0x00000000ecbd8000 - 0x00000000f0000000 pattern 0000000000000000 [ 0.000000] 0x0000000100000000 - 0x0000000200000000 pattern 0000000000000000 [ 0.000000] 0x00000002f0000000 - 0x00000002fef8e090 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e0bc - 0x00000002fef8e0c0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e0ec - 0x00000002fef8e0f0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e11c - 0x00000002fef8e120 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e14c - 0x00000002fef8e150 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e17c - 0x00000002fef8e180 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e1ac - 0x00000002fef8e1b0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e1dc - 0x00000002fef8e1e0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e20c - 0x00000002fef8e210 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e23f - 0x00000002fef8e240 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e26f - 0x00000002fef8e270 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e29f - 0x00000002fef8e2a0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e2cf - 0x00000002fef8e2d0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e2ff - 0x00000002fef8e300 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e32f - 0x00000002fef8e330 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e35f - 0x00000002fef8e360 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e38f - 0x00000002fef8e390 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e3bf - 0x00000002fef8e3c0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e3ef - 0x00000002fef8e3f0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e41c - 0x00000002fef8e420 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e44c - 0x00000002fef8e450 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e47c - 0x00000002fef8e480 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e4ac - 0x00000002fef8e4b0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e4dc - 0x00000002fef8e4e0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e50c - 0x00000002fef8e510 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e53c - 0x00000002fef8e540 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e56c - 0x00000002fef8e570 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e59c - 0x00000002fef8e5a0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e5cd - 0x00000002fef8e5d0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e5fd - 0x00000002fef8e600 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e62d - 0x00000002fef8e630 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e65d - 0x00000002fef8e660 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e68d - 0x00000002fef8e690 pattern 0000000000000000 $ lsmem --output SIZE --bytes --json | jq '[.memory[].size] | add / 1024 / 1024 / 1024' 8 """ Rock5B 16GB: """ [ 0.000000] early_memtest: # of tests: 1 [ 0.000000] 0x0000000000200000 - 0x0000000002010000 pattern 0000000000000000 [ 0.000000] 0x0000000003b80000 - 0x00000000ecbc6000 pattern 0000000000000000 [ 0.000000] 0x00000000ecbd8000 - 0x00000000f0000000 pattern 0000000000000000 [ 0.000000] 0x0000000100000000 - 0x00000003fc000000 pattern 0000000000000000 [ 0.000000] 0x00000003fc500000 - 0x00000003fff00000 pattern 0000000000000000 [ 0.000000] 0x00000004f0000000 - 0x00000004fdf88090 pattern 0000000000000000 [ 0.000000] 0x00000004fdf880bc - 0x00000004fdf880c0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf880ec - 0x00000004fdf880f0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8811c - 0x00000004fdf88120 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8814c - 0x00000004fdf88150 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8817c - 0x00000004fdf88180 pattern 0000000000000000 [ 0.000000] 0x00000004fdf881ac - 0x00000004fdf881b0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf881dc - 0x00000004fdf881e0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8820c - 0x00000004fdf88210 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8823f - 0x00000004fdf88240 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8826f - 0x00000004fdf88270 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8829f - 0x00000004fdf882a0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf882cf - 0x00000004fdf882d0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf882ff - 0x00000004fdf88300 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8832f - 0x00000004fdf88330 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8835f - 0x00000004fdf88360 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8838f - 0x00000004fdf88390 pattern 0000000000000000 [ 0.000000] 0x00000004fdf883bf - 0x00000004fdf883c0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf883ef - 0x00000004fdf883f0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8841c - 0x00000004fdf88420 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8844c - 0x00000004fdf88450 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8847c - 0x00000004fdf88480 pattern 0000000000000000 [ 0.000000] 0x00000004fdf884ac - 0x00000004fdf884b0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf884dc - 0x00000004fdf884e0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8850c - 0x00000004fdf88510 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8853c - 0x00000004fdf88540 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8856c - 0x00000004fdf88570 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8859c - 0x00000004fdf885a0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf885cd - 0x00000004fdf885d0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf885fd - 0x00000004fdf88600 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8862d - 0x00000004fdf88630 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8865d - 0x00000004fdf88660 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8868d - 0x00000004fdf88690 pattern 0000000000000000 $ lsmem --output SIZE --bytes --json | jq '[.memory[].size] | add / 1024 / 1024 / 1024' 16 """ I tested on Rock5B 16GB that without the memory holes and without using this new logic, the kernel fails this memtest, so this test seems valid. This has NOT been tested on RK356x as I don't own any. Note that the logic for excluding DRAM memory areas from the memory areas to consider for putting holes in DRAM banks based on mem_map struct may conflict with SDRAM, ROM or flashes if we ever add those to the SoC's mem_map... Something we can tackle the day we do it, it's good enough for now. Co-Developed-by: Chris Morgan <macromorgan(a)hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- Changes in v4: - fix infinite while loop if there's no hole to create by incrementing the pointer in the no-match path, - fix identification of non-DRAM memory areas in mem_map by checking for PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE instead of looking for ! PTE_BLOCK_NON_SHARE since PTE_BLOCK_NON_SHARE is 0 so using it as a mask always makes the result the same value, regardless of the other operand, - Link to v3: https://lore.kernel.org/r/20240415-rk35xx-dram-atags-v3-0-5bc5475b3c0d@theo… Changes in v3: - Split board migration to new DRAM ATAGS mechanism into separate commits, - Use mem_map instead of hardcoded values for reserved memory area for MMIO, - Add tag hash check to match Rockchip's downstream implementation, - Bail from while loop as soon as a tag with no size is encountered to match Rockchip's downstream implementation, - Use enum instead of constants for ATAG magic, - Add debug messages and comments, - Fix atags traversal by using tag size instead of checking every 16B, - Migrate Jaguar to new mechanism, - Default NR_DRAM_BANKS to 10 when ROCKCHIP_EXTERNAL_TPL is used so the default allows to use this new logic, - Define tag_header data struct to parse the first two bytes of a tag more easily, - Do not stop at CORE magic, directly look for DDR_MEM, - Bail from while loop as soon as an unknown tag is used to match Rockchip's downstream implementation, - Use phys_size_t and phys_addr_t wherever possible, Link to v2: https://lore.kernel.org/u-boot/20240401181435.553351-1-macroalpha82@gmail.c… Link to v1: https://lore.kernel.org/u-boot/20240330050515.470025-1-macroalpha82@gmail.c… --- Quentin Schulz (11): rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588 rockchip: NR_DRAM_BANKS now defaults to 10 when Rockchip TPL blob is used rockchip: nanopc-t6-rk3588: use DRAM banks from ATAGS rockchip: quartzpro64-rk3588: use DRAM banks from ATAGS rockchip: rock5a-rk3588s: use DRAM banks from ATAGS rockchip: rock5b-rk3588: use DRAM banks from ATAGS rockchip: evb_rk3588 et al.: use DRAM banks from ATAGS rockchip: toybrick_rk3588: use DRAM banks from ATAGS rockchip: turing-rk1-rk3588: use DRAM banks from ATAGS rockchip: rk3588: use DRAM banks from ATAGS rockchip: rk356x: use DRAM banks from ATAGS arch/arm/mach-rockchip/Kconfig | 3 + arch/arm/mach-rockchip/sdram.c | 258 +++++++++++++++++++++ board/friendlyelec/nanopc-t6-rk3588/Makefile | 6 - .../nanopc-t6-rk3588/nanopc-t6-rk3588.c | 39 ---- board/pine64/quartzpro64-rk3588/Makefile | 3 - .../pine64/quartzpro64-rk3588/quartzpro64-rk3588.c | 39 ---- board/radxa/rock5a-rk3588s/Makefile | 6 - board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 ---- board/radxa/rock5b-rk3588/Makefile | 6 - board/radxa/rock5b-rk3588/rock5b-rk3588.c | 39 ---- board/rockchip/evb_rk3588/Makefile | 6 - board/rockchip/evb_rk3588/evb-rk3588.c | 39 ---- board/rockchip/toybrick_rk3588/Makefile | 6 - board/rockchip/toybrick_rk3588/toybrick-rk3588.c | 39 ---- board/turing/turing-rk1-rk3588/Makefile | 6 - board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c | 39 ---- configs/anbernic-rgxx3-rk3566_defconfig | 1 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/coolpi-4b-rk3588s_defconfig | 2 - configs/coolpi-cm5-evb-rk3588_defconfig | 2 - configs/evb-rk3568_defconfig | 1 - configs/evb-rk3588_defconfig | 2 - configs/generic-rk3568_defconfig | 1 - configs/generic-rk3588_defconfig | 2 - configs/jaguar-rk3588_defconfig | 1 - configs/lubancat-2-rk3568_defconfig | 1 - configs/nanopc-t6-rk3588_defconfig | 2 - configs/nanopi-r5c-rk3568_defconfig | 1 - configs/nanopi-r5s-rk3568_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - configs/odroid-m1-rk3568_defconfig | 1 - configs/orangepi-5-plus-rk3588_defconfig | 2 - configs/orangepi-5-rk3588s_defconfig | 2 - configs/pinetab2-rk3566_defconfig | 1 - configs/quartz64-a-rk3566_defconfig | 1 - configs/quartz64-b-rk3566_defconfig | 1 - configs/quartzpro64-rk3588_defconfig | 2 - configs/radxa-cm3-io-rk3566_defconfig | 1 - configs/radxa-e25-rk3568_defconfig | 1 - configs/rock-3a-rk3568_defconfig | 1 - configs/rock5a-rk3588s_defconfig | 2 - configs/rock5b-rk3588_defconfig | 2 - configs/soquartz-blade-rk3566_defconfig | 1 - configs/soquartz-cm4-rk3566_defconfig | 1 - configs/soquartz-model-a-rk3566_defconfig | 1 - configs/toybrick-rk3588_defconfig | 2 - configs/turing-rk1-rk3588_defconfig | 2 - 48 files changed, 261 insertions(+), 356 deletions(-) --- base-commit: d097f9e1299a3bdb7de468f0d9bbc63932f461cd change-id: 20240415-rk35xx-dram-atags-35c9f19f4c38 Best regards, -- Quentin Schulz <quentin.schulz(a)theobroma-systems.com>

3 23

[PATCH] ARM: dts: stm32: add eth1 and eth2 support on stm32mp13
by Marek Vasut 26 Apr '24

26 Apr '24

From: Christophe Roullier <christophe.roullier(a)st.com> Add both ethernet MACs based on GMAC SNPS IP on stm32mp13. Signed-off-by: Christophe Roullier <christophe.roullier(a)st.com> --- Cc: Christophe Roullier <christophe.roullier(a)st.com> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Patrice Chotard <patrice.chotard(a)foss.st.com> Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Cc: Ramon Fried <rfried.dev(a)gmail.com> Cc: u-boot(a)dh-electronics.com Cc: uboot-stm32(a)st-md-mailman.stormreply.com --- arch/arm/dts/stm32mp131.dtsi | 37 ++++++++++++++++++++++++++++++++++++ arch/arm/dts/stm32mp133.dtsi | 30 +++++++++++++++++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 159ba8f8c9c..ad331b73d18 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -1328,6 +1328,37 @@ status = "disabled"; }; + eth1: eth1@5800a000 { + compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac"; + reg = <0x5800a000 0x2000>; + reg-names = "stmmaceth"; + interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <&exti 68 1>; + interrupt-names = "macirq", "eth_wake_irq"; + clock-names = "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", + "ethstp", + "eth-ck"; + clocks = <&rcc ETH1MAC>, + <&rcc ETH1TX>, + <&rcc ETH1RX>, + <&rcc ETH1STP>, + <&rcc ETH1CK_K>; + st,syscon = <&syscfg 0x4 0xff0000>; + snps,mixed-burst; + snps,pbl = <2>; + snps,axi-config = <&stmmac_axi_config_1>; + snps,tso; + status = "disabled"; + + stmmac_axi_config_1: stmmac-axi-config { + snps,wr_osr_lmt = <0x7>; + snps,rd_osr_lmt = <0x7>; + snps,blen = <0 0 0 0 16 8 4>; + }; + }; + usbh_ohci: usb@5800c000 { compatible = "generic-ohci"; reg = <0x5800c000 0x1000>; @@ -1404,6 +1435,12 @@ ts_cal2: calib@5e { reg = <0x5e 0x2>; }; + ethernet_mac1_address: mac1@e4 { + reg = <0xe4 0x6>; + }; + ethernet_mac2_address: mac2@ea { + reg = <0xea 0x6>; + }; }; /* diff --git a/arch/arm/dts/stm32mp133.dtsi b/arch/arm/dts/stm32mp133.dtsi index df451c3c2a2..5cd5bde9535 100644 --- a/arch/arm/dts/stm32mp133.dtsi +++ b/arch/arm/dts/stm32mp133.dtsi @@ -64,5 +64,35 @@ }; }; }; + + eth2: eth2@5800e000 { + compatible = "snps,dwmac-4.20a", "st,stm32mp13-dwmac"; + reg = <0x5800e000 0x2000>; + reg-names = "stmmaceth"; + interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clock-names = "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", + "ethstp", + "eth-ck"; + clocks = <&rcc ETH2MAC>, + <&rcc ETH2TX>, + <&rcc ETH2RX>, + <&rcc ETH2STP>, + <&rcc ETH2CK_K>; + st,syscon = <&syscfg 0x4 0xff000000>; + snps,mixed-burst; + snps,pbl = <2>; + snps,axi-config = <&stmmac_axi_config_2>; + snps,tso; + status = "disabled"; + + stmmac_axi_config_2: stmmac-axi-config { + snps,wr_osr_lmt = <0x7>; + snps,rd_osr_lmt = <0x7>; + snps,blen = <0 0 0 0 16 8 4>; + }; + }; }; }; -- 2.43.0

2 1

[PATCH] power: pmic: tps65941: Update compatible to aling with kernel DT
by Udit Kumar 26 Apr '24

26 Apr '24

Linux kernel driver drivers/mfd/tps6594-i2c.c is using different name for compatible for tps6594 family PMIC. After sync of Linux kernel DT to u-boot for TI platforms J7200, J721S2 and J784S4 PMIC is no longer getting probed. So updating compatible field to align with Linux driver and DT. Signed-off-by: Udit Kumar <u-kumar1(a)ti.com> --- drivers/power/pmic/tps65941.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c index 727b42747a..bf762deb29 100644 --- a/drivers/power/pmic/tps65941.c +++ b/drivers/power/pmic/tps65941.c @@ -75,6 +75,9 @@ static const struct udevice_id tps65941_ids[] = { { .compatible = "ti,tps659412", .data = TPS659411 }, { .compatible = "ti,tps659413", .data = TPS659413 }, { .compatible = "ti,lp876441", .data = LP876441 }, + { .compatible = "ti,tps6594-q1", .data = TPS659411 }, + { .compatible = "ti,tps6593-q1", .data = TPS659413 }, + { .compatible = "ti,lp8764-q1", .data = LP876441 }, { } }; -- 2.34.1

2 1

[PATCH v4 0/5] Add support for TI TPS65224 PMIC
by Bhargav Raviprakash 26 Apr '24

26 Apr '24

TPS65224 is a Power Management IC which provides regulators and others features like GPIOs, RTC, watchdog, ADC, ESMs (Error Signal Monitor), and PFSM (Pre-configurable Finite State Machine). The SoC and the PMIC can communicate through the I2C. Data Sheet for TPS65224: https://www.ti.com/product/TPS65224-Q1 Reusing the TPS65941 PMIC driver to add support for TPS65224 PMIC in U-boot. This includes driver for PMIC and regulator. The driver was tested on Ti's custom AM62P EVM using U-boot's pmic list, regulator list, regulator status and regulator value commands. Since, support for Ti's AM62P is absent in u-boot next, the patches were applied on ti-u-boot ti-u-boot-2023.04-next and tested. Changelog v3 -> v4: - refactoring ldo probe function: removed a redundant branch Bhargav Raviprakash (5): power: tps65941: Add macros of TPS65224 PMIC power: pmic: tps65941: Add TI TPS65224 PMIC power: regulator: tps65941: Added macros for BUCK ID power: regulator: tps65941: use function callbacks for conversion ops power: regulator: tps65941: Add TPS65224 PMIC regulator support drivers/power/pmic/tps65941.c | 1 + drivers/power/regulator/tps65941_regulator.c | 381 +++++++++++++++++-- include/power/tps65941.h | 30 ++ 3 files changed, 381 insertions(+), 31 deletions(-) -- 2.25.1

2 6

Capsule GUIDs and LVFS
by Ilias Apalodimas 26 Apr '24

26 Apr '24

Hi, Richard maintains LVFS & fwupd, commonly used for firmware upgrades. We recently discussed the U-Boot status and supported devices since fwupd supports capsule updates. In order to be able to support capsule updates via LVFS manufacturers should bind their GUIDs to their devices. Any ODM/OEM creating a board based on the original device must use his own GUIID to avoid confusion. If not we would end up with different devices reusing the same GUIDs and upgrading their firmware with a different one. Looking at the defined GUIDS for capsule updates defined in board support files I found the following Richard, the following GUIDs should at least issue a warning in LVFS since they only work for QEMU & Sandbox internally. Sandbox SANDBOX_UBOOT_IMAGE_GUID 09d7cf52-0720-4710-91d1-08469b7fe9c8 Sandbox SANDBOX_UBOOT_ENV_IMAGE 5a7021f5-fef2-48b4-aaba-832e777418c0 Sandbox SANDBOX_FIT_IMAGE_GUID 3673b45d-6a7c-46f3-9e60-adabb03f7937 QEMU QEMU_ARM_UBOOT_IMAGE_GUID f885b085-99f8-45af-847d-d514107a4a2c QEMU QEMU_ARM64_UBOOT_IMAGE 058b7d83-50d5-4c47-a195-60d86ad341c4 I've cc'ed all the people I could find in board specific MAINTAINER files. Can you respond to Richard with the proper company name & board name so we can bind the following GUIDs to a vendor properly? Richard any guidance on how this should be done properly is appreciated, since I am not too aware of LVFS internals. Advantech IMX8MP_RSB3720A1 b1251e89-384a-4635-a806-3aa0b0e9f965 Advantech IMX8MP_RSB3720A1_6G b5fb6f08-e142-4db1-97ea-5fd36b9be5b9 Compulab IMX8MM_CL_IOT_GATE 7a32a939-ab92-467b-9152-74771b95e646 Compulab MX8MM_CL_IOT_GATE_OPTEE_FIT 0bf1165c-1831-4864-945e-ac3d3848f499 Kontron KONTRON_PITX_IMX8M_FIT_IMAGE_GUID c898e959-5b1f-4e6d-88e0-40d45cca1399 Kontron KONTRON_SL_MX8MM_FIT_IMAGE_GUID d488e45a-4929-4b55-8c14-86cea2cd6629 Kontron KONTRON_SL28_FIT_IMAGE_GUID 86ebd44f-feb8-466f-8bb8-890618456d8b Radxa ROCKPI_4B_IDBLOADER_IMAGE_GUID 02f4d760-cfd5-43bd-8e2d-a42acb33c660 Radxa ROCKPI_4B_UBOOT_IMAGE_GUID 4ce292da-1dd8-428d-a1c2-77743ef8b96e Radxa ROCKPI_4C_IDBLOADER_IMAGE_GUID fd68510c-12d3-4f0a-b8d3-d879e1d3a540 Radxa ROCKPI_4C_UBOOT_IMAGE_GUID b81fb4ae-e4f3-471b-99b4-0b3da549ce13 Socionext DEVELOPERBOX_FIP_IMAGE_GUID 7d6dc310-52ca-43b8-b7b9-f9d6c501d108 Socionext DEVELOPERBOX_FIP_IMAGE_GUID2 880866e9-84ba-4793-a908-33e0b916f398 STMicroelectronics STM32MP_FIP_IMAGE_GUID 19d5df83-11b0-457b-be2c-7559c13142a5 This seems to use the same GUID for multiple device variants. This needs to be fixed AMD/Xilinx XILINX_BOOT_IMAGE_GUID 20c5fba5-0171-457f-b9cd-f5129cd07228 AMD/Xilinx XILINX_UBOOT_IMAGE_GUID cf9ecfd4-938b-41c5-8551-1f883ab7dc18 ditto Regards /Ilias

6 10

[PATCH v1] tee: sandbox: check for buffer size
by Igor Opaniuk 26 Apr '24

26 Apr '24

Add additional check for buffer size when reading out persistent storage value and provide back actual value size. Signed-off-by: Igor Opaniuk <igor.opaniuk(a)gmail.com> --- drivers/tee/sandbox.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c index 8ad7c09efdd..86b16a3bb8d 100644 --- a/drivers/tee/sandbox.c +++ b/drivers/tee/sandbox.c @@ -174,7 +174,7 @@ static u32 ta_avb_invoke_func(struct udevice *dev, u32 func, uint num_params, uint slot; u64 val; char *value; - u32 value_sz; + u32 value_sz, tmp_sz; switch (func) { case TA_AVB_CMD_READ_ROLLBACK_INDEX: @@ -267,8 +267,12 @@ static u32 ta_avb_invoke_func(struct udevice *dev, u32 func, uint num_params, if (!ep) return TEE_ERROR_ITEM_NOT_FOUND; - value_sz = strlen(ep->data) + 1; - memcpy(value, ep->data, value_sz); + tmp_sz = strlen(ep->data) + 1; + if (value_sz < tmp_sz) + return TEE_ERROR_SHORT_BUFFER; + + memcpy(value, ep->data, tmp_sz); + params[1].u.memref.size = tmp_sz; return TEE_SUCCESS; case TA_AVB_CMD_WRITE_PERSIST_VALUE: -- 2.34.1

3 2

[PATCH v2 0/2] i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller
by Neil Armstrong 25 Apr '24

25 Apr '24

Add Support for the Qualcomm Generic Interface (GENI) I2C interface found on newer Qualcomm SoCs. The Generic Interface (GENI) is a firmware based Qualcomm Universal Peripherals (QUP) Serial Engine (SE) Wrapper which can support multiple bus protocols depending on the firmware type loaded at early boot time based on system configuration. It also supports the "I2C Master Hub" which is a single function Wrapper that only FIFO mode I2C. It replaces the fixed-function QUP Wrapper found on older SoCs. The geni-se.h containing the generic GENI Serial Engine registers defines is imported from Linux. Only FIFO mode is implemented, neither SE DMA nor GPI DMA are implemented. Finally enable the driver in the default Qualcomm defconfig. Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Changes in v2: - Fixed commit msg, removed useless debug, switched to dev_err() in probe - Fixed some possible issues & typos and W=1 build warning - Link to v1: https://lore.kernel.org/r/20240419-topic-sm8x50-i2c-v1-0-67651e27f23a@linar… --- Neil Armstrong (2): i2c: Add support for Qualcomm Generic Interface (GENI) I2C controller configs: qcom_defconfig: enable GENI I2C Driver configs/qcom_defconfig | 1 + drivers/i2c/Kconfig | 10 + drivers/i2c/Makefile | 1 + drivers/i2c/geni_i2c.c | 575 +++++++++++++++++++++++++++++++++++++++++++++ include/soc/qcom/geni-se.h | 265 +++++++++++++++++++++ 5 files changed, 852 insertions(+) --- base-commit: b2511143fba4c0631446c968fb4c0d962b01d850 change-id: 20240419-topic-sm8x50-i2c-b51e576d5f57 Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

3 6