April 2024 - U-Boot

[PATCH 0/3] spi: sophgo: milkv_duo: Add spi nor flash support for Milk-V Duo board
by Kongyang Liu 01 May '24

01 May '24

This series add spi nor flash controller driver for cv1800b SoC and enable it for Sophgo Milk-V Duo board. Kongyang Liu (3): spi: cv1800b: Add spi nor flash controller driver for cv1800b SoC riscv: dts: sophgo: Add spi nor flash controller node configs: milkv_duo: Add spi nor configs arch/riscv/dts/cv1800b-milkv-duo.dts | 13 ++ arch/riscv/dts/cv18xx.dtsi | 17 ++ configs/milkv_duo_defconfig | 3 + drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/cv1800b_spif.c | 321 +++++++++++++++++++++++++++ 6 files changed, 363 insertions(+) create mode 100644 drivers/spi/cv1800b_spif.c -- 2.41.0

2 6

[PATCH 1/2] cmd: sbi: add Supervisor Software Events extension
by Heinrich Schuchardt 01 May '24

01 May '24

OpenSBI has implemented the Supervisor Software Events Extension. Allow detecting it in the sbi command. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- arch/riscv/include/asm/sbi.h | 1 + cmd/riscv/sbi.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index d1113f3d703..ad32dedb589 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -34,6 +34,7 @@ enum sbi_ext_id { SBI_EXT_NACL = 0x4E41434C, SBI_EXT_STA = 0x535441, SBI_EXT_DBTR = 0x44425452, + SBI_EXT_SSE = 0x535345, }; enum sbi_ext_base_fid { diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index bd9d9c4765d..55507b0aa63 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -54,6 +54,7 @@ static struct sbi_ext extensions[] = { { SBI_EXT_NACL, "Nested Acceleration Extension" }, { SBI_EXT_STA, "Steal-time Accounting Extension" }, { SBI_EXT_DBTR, "Debug Trigger Extension" }, + { SBI_EXT_SSE, "Supervisor Software Events" }, }; static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc, -- 2.43.0

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[PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs
by Jonas Karlman 01 May '24

01 May '24

This series adds support for new clocks used in linux v6.8 device trees, enables use of FIT signature check for checksum validation and fixes loading FIT from SD-card when loading FIT from eMMC fails. After this series it should be possible to move RK3399 boards to use OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag. I have runtime tested this series on following devices: - 96boards Rock960 - Khadas Edge Captain - Pine64 PineBook Pro - Pine64 RockPro64 - Radxa ROCK 4C+ - Radxa ROCK 4SE - Radxa ROCK Pi 4A - Radxa ROCK Pi 4B+ This series depends on the following series: - Enable booting from SPI flash on ROCK Pi 4 [1] - rockchip: spl: Cache boot source id for later use [2] A copy of this series and all its depends can be found at [3] [1] https://patchwork.ozlabs.org/cover/1912469/ [2] https://patchwork.ozlabs.org/cover/1915071/ [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-dt-sync-v1 Jonas Karlman (31): rockchip: rk3399-gru: Fix max SPL size on bob and kevin rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr rockchip: rk3399: Sort imply statements alphabetically rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation rockchip: rk3399: Enable random generator on all boards rockchip: rk3399: Imply support for GbE PHY rockchip: rk3399: Enable DT overlay support on all boards rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options rockchip: rk3399: Add a default spl-boot-order prop rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock clk: rockchip: rk3399: Add dummy support for SCLK_PCIEPHY_REF clock clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support rockchip: rk3399: Sync soc device tree from linux v6.8 rockchip: rk3399-gru: Sync device tree from linux v6.8 rockchip: rk3399-puma: Sync DT from linux v6.8 rockchip: rk3399-rock-pi-n10: Sync device tree from linux v6.8 rockchip: rk3399-eaidk-610: Sync device tree from linux v6.8 rockchip: rk3399-leez: Sync device tree from linux v6.8 rockchip: rk3399-evb: Sync device tree from linux v6.8 rockchip: rk3399-firefly: Sync device tree from linux v6.8 rockchip: rk3399-orangepi: Sync device tree from linux v6.8 rockchip: rk3399-roc-pc: Sync device tree from linux v6.8 rockchip: rk3399-nanopi-4: Sync device tree from linux v6.8 rockchip: rk3399-rock960: Sync device tree from linux v6.8 rockchip: rk3399-khadas: Sync device tree from linux v6.8 rockchip: rk3399-rock-pi-4: Sync device tree from linux v6.8 rockchip: rk3399-rockpro64: Sync device tree from linux v6.8 rockchip: rk3399-pinebook-pro: Sync device tree from linux v6.8 rockchip: rk3399-pinephone-pro: Sync device tree from linux v6.8 arch/arm/dts/rk3288-vmarc-som.dtsi | 48 +++ arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi | 1 - arch/arm/dts/rk3399-eaidk-610.dts | 3 +- arch/arm/dts/rk3399-evb-u-boot.dtsi | 13 +- arch/arm/dts/rk3399-evb.dts | 3 +- arch/arm/dts/rk3399-ficus-u-boot.dtsi | 10 +- arch/arm/dts/rk3399-ficus.dts | 4 + arch/arm/dts/rk3399-firefly-u-boot.dtsi | 6 - arch/arm/dts/rk3399-firefly.dts | 17 +- arch/arm/dts/rk3399-gru-bob.dts | 8 +- arch/arm/dts/rk3399-gru-chromebook.dtsi | 200 +++++++++++- arch/arm/dts/rk3399-gru-kevin.dts | 3 +- arch/arm/dts/rk3399-gru-u-boot.dtsi | 34 ++- arch/arm/dts/rk3399-gru.dtsi | 52 +++- arch/arm/dts/rk3399-khadas-edge-captain.dts | 4 + arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi | 7 +- arch/arm/dts/rk3399-khadas-edge-v.dts | 4 + arch/arm/dts/rk3399-khadas-edge.dtsi | 10 +- arch/arm/dts/rk3399-leez-p710-u-boot.dtsi | 6 - arch/arm/dts/rk3399-leez-p710.dts | 8 +- arch/arm/dts/rk3399-nanopc-t4.dts | 2 +- arch/arm/dts/rk3399-nanopi-m4-2gb.dts | 55 +--- arch/arm/dts/rk3399-nanopi-m4b.dts | 2 +- arch/arm/dts/rk3399-nanopi-r4s.dts | 4 +- arch/arm/dts/rk3399-nanopi4-u-boot.dtsi | 18 +- arch/arm/dts/rk3399-nanopi4.dtsi | 7 +- arch/arm/dts/rk3399-op1-opp.dtsi | 31 +- arch/arm/dts/rk3399-opp.dtsi | 6 +- arch/arm/dts/rk3399-orangepi-u-boot.dtsi | 12 + arch/arm/dts/rk3399-orangepi.dts | 12 +- arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 23 +- arch/arm/dts/rk3399-pinebook-pro.dts | 24 +- arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi | 24 +- arch/arm/dts/rk3399-pinephone-pro.dts | 147 +++++++++ arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 27 +- arch/arm/dts/rk3399-puma-haikou.dts | 42 ++- arch/arm/dts/rk3399-puma.dtsi | 17 +- arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 45 +-- arch/arm/dts/rk3399-roc-pc.dtsi | 15 +- arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi | 20 ++ arch/arm/dts/rk3399-rock-4c-plus.dts | 1 + arch/arm/dts/rk3399-rock-4se-u-boot.dtsi | 12 + arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 6 - arch/arm/dts/rk3399-rock-pi-4.dtsi | 4 +- arch/arm/dts/rk3399-rock-pi-4c-u-boot.dtsi | 7 + arch/arm/dts/rk3399-rock-pi-4c.dts | 10 + arch/arm/dts/rk3399-rock960-u-boot.dtsi | 11 +- arch/arm/dts/rk3399-rock960.dtsi | 5 +- arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 22 +- arch/arm/dts/rk3399-rockpro64.dtsi | 98 +++++- arch/arm/dts/rk3399-u-boot.dtsi | 129 +++++--- arch/arm/dts/rk3399.dtsi | 289 ++++++++++++++++-- .../arm/dts/rk3399pro-rock-pi-n10-u-boot.dtsi | 6 - arch/arm/dts/rk3399pro-vmarc-som.dtsi | 20 +- .../dts/rockchip-radxa-dalang-carrier.dtsi | 21 ++ arch/arm/mach-rockchip/Kconfig | 38 ++- configs/chromebook_bob_defconfig | 6 +- configs/chromebook_kevin_defconfig | 6 +- configs/eaidk-610-rk3399_defconfig | 13 +- configs/evb-rk3399_defconfig | 10 +- configs/ficus-rk3399_defconfig | 38 +-- configs/firefly-rk3399_defconfig | 17 +- configs/khadas-edge-captain-rk3399_defconfig | 35 ++- configs/khadas-edge-rk3399_defconfig | 29 +- configs/khadas-edge-v-rk3399_defconfig | 35 ++- configs/leez-rk3399_defconfig | 13 +- configs/nanopc-t4-rk3399_defconfig | 18 +- configs/nanopi-m4-2gb-rk3399_defconfig | 22 +- configs/nanopi-m4-rk3399_defconfig | 22 +- configs/nanopi-m4b-rk3399_defconfig | 22 +- configs/nanopi-neo4-rk3399_defconfig | 22 +- configs/nanopi-r4s-rk3399_defconfig | 16 +- configs/orangepi-rk3399_defconfig | 14 +- configs/pinebook-pro-rk3399_defconfig | 13 +- configs/pinephone-pro-rk3399_defconfig | 13 +- configs/puma-rk3399_defconfig | 5 +- configs/roc-pc-mezzanine-rk3399_defconfig | 15 +- configs/roc-pc-rk3399_defconfig | 13 +- configs/rock-4c-plus-rk3399_defconfig | 27 +- configs/rock-4se-rk3399_defconfig | 28 +- configs/rock-pi-4-rk3399_defconfig | 13 +- configs/rock-pi-4c-rk3399_defconfig | 27 +- configs/rock-pi-n10-rk3399pro_defconfig | 10 +- configs/rock960-rk3399_defconfig | 18 +- configs/rockpro64-rk3399_defconfig | 16 +- drivers/clk/rockchip/clk_rk3399.c | 12 +- include/dt-bindings/clock/rk3399-cru.h | 30 +- 87 files changed, 1700 insertions(+), 531 deletions(-) -- 2.43.2

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[PATCH] ARM: dts: renesas: Drop DTs with OF_UPSTREAM counterparts
by Marek Vasut 01 May '24

01 May '24

Remove DTs which are now replaced by OF_UPSTREAM counterparts. No functional change expected. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: "Cogent Embedded, Inc." <source(a)cogentembedded.com> Cc: Adam Ford <aford173(a)gmail.com> Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Masakazu Mochizuki <masakazu.mochizuki.wd(a)hitachi.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj(a)renesas.com> Cc: Tam Nguyen <tam.nguyen.xa(a)renesas.com> Cc: Tom Rini <trini(a)konsulko.com> --- arch/arm/dts/Makefile | 34 - arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts | 60 - arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts | 21 - arch/arm/dts/r8a774a1-hihope-rzg2m.dts | 37 - arch/arm/dts/r8a774a1.dtsi | 2865 -------------- arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts | 56 - arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts | 21 - arch/arm/dts/r8a774b1-hihope-rzg2n.dts | 41 - arch/arm/dts/r8a774b1.dtsi | 2716 ------------- arch/arm/dts/r8a774c0-cat874.dts | 455 --- arch/arm/dts/r8a774c0-ek874.dts | 14 - arch/arm/dts/r8a774c0.dtsi | 2000 ---------- arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts | 61 - arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts | 20 - arch/arm/dts/r8a774e1-hihope-rzg2h.dts | 41 - arch/arm/dts/r8a774e1.dtsi | 2997 -------------- arch/arm/dts/r8a7790-lager.dts | 947 ----- arch/arm/dts/r8a7790-stout.dts | 382 -- arch/arm/dts/r8a7790.dtsi | 1965 ---------- arch/arm/dts/r8a7791-koelsch.dts | 912 ----- arch/arm/dts/r8a7791-porter.dts | 523 --- arch/arm/dts/r8a7791.dtsi | 1891 --------- arch/arm/dts/r8a7792-blanche.dts | 364 -- arch/arm/dts/r8a7792.dtsi | 928 ----- arch/arm/dts/r8a7793-gose.dts | 818 ---- arch/arm/dts/r8a7793.dtsi | 1470 ------- arch/arm/dts/r8a7794-alt.dts | 533 --- arch/arm/dts/r8a7794-silk.dts | 578 --- arch/arm/dts/r8a7794.dtsi | 1437 ------- arch/arm/dts/r8a77950-salvator-x.dts | 49 - arch/arm/dts/r8a77950-ulcb.dts | 37 - arch/arm/dts/r8a77950.dtsi | 330 -- arch/arm/dts/r8a77951.dtsi | 3485 ----------------- arch/arm/dts/r8a77960-salvator-x.dts | 37 - arch/arm/dts/r8a77960-ulcb.dts | 38 - arch/arm/dts/r8a77960.dtsi | 3080 --------------- arch/arm/dts/r8a77965-salvator-x.dts | 32 - arch/arm/dts/r8a77965-ulcb.dts | 33 - arch/arm/dts/r8a77965.dtsi | 2889 -------------- arch/arm/dts/r8a77970-eagle.dts | 405 -- arch/arm/dts/r8a77970-v3msk.dts | 303 -- arch/arm/dts/r8a77970.dtsi | 1220 ------ arch/arm/dts/r8a77980-condor.dts | 24 - arch/arm/dts/r8a77980-v3hsk.dts | 293 -- arch/arm/dts/r8a77980.dtsi | 1625 -------- arch/arm/dts/r8a77990-ebisu.dts | 15 - arch/arm/dts/r8a77990.dtsi | 2154 ---------- arch/arm/dts/r8a77995-draak.dts | 16 - arch/arm/dts/r8a77995.dtsi | 1473 ------- arch/arm/dts/r8a779a0-falcon-cpu.dtsi | 359 -- arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi | 270 -- arch/arm/dts/r8a779a0-falcon-ethernet.dtsi | 15 - arch/arm/dts/r8a779a0-falcon.dts | 101 - arch/arm/dts/r8a779a0.dtsi | 2915 -------------- arch/arm/dts/r8a779f0-spider-cpu.dtsi | 210 - arch/arm/dts/r8a779f0-spider-ethernet.dtsi | 105 - arch/arm/dts/r8a779f0-spider.dts | 24 - arch/arm/dts/r8a779f0.dtsi | 1193 ------ arch/arm/dts/r8a779g0-white-hawk-cpu.dtsi | 375 -- arch/arm/dts/r8a779g0-white-hawk-csi-dsi.dtsi | 187 - .../arm/dts/r8a779g0-white-hawk-ethernet.dtsi | 16 - arch/arm/dts/r8a779g0-white-hawk.dts | 69 - arch/arm/dts/r8a779g0.dtsi | 2349 ----------- 63 files changed, 49913 deletions(-) delete mode 100644 arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts delete mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts delete mode 100644 arch/arm/dts/r8a774a1-hihope-rzg2m.dts delete mode 100644 arch/arm/dts/r8a774a1.dtsi delete mode 100644 arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts delete mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts delete mode 100644 arch/arm/dts/r8a774b1-hihope-rzg2n.dts delete mode 100644 arch/arm/dts/r8a774b1.dtsi delete mode 100644 arch/arm/dts/r8a774c0-cat874.dts delete mode 100644 arch/arm/dts/r8a774c0-ek874.dts delete mode 100644 arch/arm/dts/r8a774c0.dtsi delete mode 100644 arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts delete mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts delete mode 100644 arch/arm/dts/r8a774e1-hihope-rzg2h.dts delete mode 100644 arch/arm/dts/r8a774e1.dtsi delete mode 100644 arch/arm/dts/r8a7790-lager.dts delete mode 100644 arch/arm/dts/r8a7790-stout.dts delete mode 100644 arch/arm/dts/r8a7790.dtsi delete mode 100644 arch/arm/dts/r8a7791-koelsch.dts delete mode 100644 arch/arm/dts/r8a7791-porter.dts delete mode 100644 arch/arm/dts/r8a7791.dtsi delete mode 100644 arch/arm/dts/r8a7792-blanche.dts delete mode 100644 arch/arm/dts/r8a7792.dtsi delete mode 100644 arch/arm/dts/r8a7793-gose.dts delete mode 100644 arch/arm/dts/r8a7793.dtsi delete mode 100644 arch/arm/dts/r8a7794-alt.dts delete mode 100644 arch/arm/dts/r8a7794-silk.dts delete mode 100644 arch/arm/dts/r8a7794.dtsi delete mode 100644 arch/arm/dts/r8a77950-salvator-x.dts delete mode 100644 arch/arm/dts/r8a77950-ulcb.dts delete mode 100644 arch/arm/dts/r8a77950.dtsi delete mode 100644 arch/arm/dts/r8a77951.dtsi delete mode 100644 arch/arm/dts/r8a77960-salvator-x.dts delete mode 100644 arch/arm/dts/r8a77960-ulcb.dts delete mode 100644 arch/arm/dts/r8a77960.dtsi delete mode 100644 arch/arm/dts/r8a77965-salvator-x.dts delete mode 100644 arch/arm/dts/r8a77965-ulcb.dts delete mode 100644 arch/arm/dts/r8a77965.dtsi delete mode 100644 arch/arm/dts/r8a77970-eagle.dts delete mode 100644 arch/arm/dts/r8a77970-v3msk.dts delete mode 100644 arch/arm/dts/r8a77970.dtsi delete mode 100644 arch/arm/dts/r8a77980-condor.dts delete mode 100644 arch/arm/dts/r8a77980-v3hsk.dts delete mode 100644 arch/arm/dts/r8a77980.dtsi delete mode 100644 arch/arm/dts/r8a77990-ebisu.dts delete mode 100644 arch/arm/dts/r8a77990.dtsi delete mode 100644 arch/arm/dts/r8a77995-draak.dts delete mode 100644 arch/arm/dts/r8a77995.dtsi delete mode 100644 arch/arm/dts/r8a779a0-falcon-cpu.dtsi delete mode 100644 arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi delete mode 100644 arch/arm/dts/r8a779a0-falcon-ethernet.dtsi delete mode 100644 arch/arm/dts/r8a779a0-falcon.dts delete mode 100644 arch/arm/dts/r8a779a0.dtsi delete mode 100644 arch/arm/dts/r8a779f0-spider-cpu.dtsi delete mode 100644 arch/arm/dts/r8a779f0-spider-ethernet.dtsi delete mode 100644 arch/arm/dts/r8a779f0-spider.dts delete mode 100644 arch/arm/dts/r8a779f0.dtsi delete mode 100644 arch/arm/dts/r8a779g0-white-hawk-cpu.dtsi delete mode 100644 arch/arm/dts/r8a779g0-white-hawk-csi-dsi.dtsi delete mode 100644 arch/arm/dts/r8a779g0-white-hawk-ethernet.dtsi delete mode 100644 arch/arm/dts/r8a779g0-white-hawk.dts delete mode 100644 arch/arm/dts/r8a779g0.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0c6f0221b77..f1d22ee7cf2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1050,41 +1050,7 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ imxrt1020-evk.dtb \ imxrt1170-evk.dtb \ -dtb-$(CONFIG_RCAR_GEN2) += \ - r8a7790-lager.dtb \ - r8a7790-stout.dtb \ - r8a7791-koelsch.dtb \ - r8a7791-porter.dtb \ - r8a7792-blanche.dtb \ - r8a7793-gose.dtb \ - r8a7794-alt.dtb \ - r8a7794-silk.dtb - -dtb-$(CONFIG_RCAR_GEN3) += \ - r8a774a1-beacon-rzg2m-kit.dtb \ - r8a774b1-beacon-rzg2n-kit.dtb \ - r8a774e1-beacon-rzg2h-kit.dtb \ - r8a774a1-hihope-rzg2m.dtb \ - r8a774b1-hihope-rzg2n.dtb \ - r8a774c0-ek874.dtb \ - r8a774e1-hihope-rzg2h.dtb \ - r8a77951-ulcb.dtb \ - r8a77951-salvator-x.dtb \ - r8a77960-ulcb.dtb \ - r8a77960-salvator-x.dtb \ - r8a77965-ulcb.dtb \ - r8a77965-salvator-x.dtb \ - r8a77970-eagle.dtb \ - r8a77970-v3msk.dtb \ - r8a77980-condor.dtb \ - r8a77980-v3hsk.dtb \ - r8a77990-ebisu.dtb \ - r8a77995-draak.dtb - dtb-$(CONFIG_RCAR_GEN4) += \ - r8a779a0-falcon.dtb \ - r8a779f0-spider.dtb \ - r8a779g0-white-hawk.dtb \ r8a779h0-gray-hawk.dtb dtb-$(CONFIG_TARGET_RZG2L) += \ diff --git a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts b/arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts deleted file mode 100644 index 24da6ee6ecc..00000000000 --- a/arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts +++ /dev/null @@ -1,60 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2020, Compass Electronics Group, LLC - */ - -/dts-v1/; - -#include "r8a774a1.dtsi" -#include "beacon-renesom-som.dtsi" -#include "beacon-renesom-baseboard.dtsi" - -/ { - model = "Beacon EmbeddedWorks RZ/G2M Development Kit"; - compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &iic_pmic; - serial0 = &scif2; - serial1 = &hscif0; - serial2 = &hscif1; - serial3 = &scif0; - serial4 = &hscif2; - serial5 = &scif5; - ethernet0 = &avb; - mmc0 = &sdhi3; - mmc1 = &sdhi0; - mmc2 = &sdhi2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x80000000>; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", - "dclkin.0", "dclkin.1", "dclkin.2"; -}; diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts deleted file mode 100644 index a5ca86196a7..00000000000 --- a/arch/arm/dts/r8a774a1-hihope-rzg2m-ex.dts +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 connected to - * sub board - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -#include "r8a774a1-hihope-rzg2m.dts" -#include "hihope-rzg2-ex.dtsi" - -/ { - model = "HopeRun HiHope RZ/G2M with sub board"; - compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2m", - "renesas,r8a774a1"; -}; - -/* SW43 should be OFF, if in ON state SATA port will be activated */ -&pciec1 { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a774a1-hihope-rzg2m.dts b/arch/arm/dts/r8a774a1-hihope-rzg2m.dts deleted file mode 100644 index 25ae255de0f..00000000000 --- a/arch/arm/dts/r8a774a1-hihope-rzg2m.dts +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the HiHope RZ/G2M Rev.3.0/4.0 main board - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a774a1.dtsi" -#include "hihope-rev4.dtsi" - -/ { - model = "HopeRun HiHope RZ/G2M main board based on r8a774a1"; - compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x80000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", - "dclkin.0", "dclkin.1", "dclkin.2"; -}; diff --git a/arch/arm/dts/r8a774a1.dtsi b/arch/arm/dts/r8a774a1.dtsi deleted file mode 100644 index 9065dc24342..00000000000 --- a/arch/arm/dts/r8a774a1.dtsi +++ /dev/null @@ -1,2865 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the r8a774a1 SoC - * - * Copyright (C) 2018 Renesas Electronics Corp. - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/clock/r8a774a1-cpg-mssr.h> -#include <dt-bindings/power/r8a774a1-sysc.h> - -#define CPG_AUDIO_CLK_I R8A774A1_CLK_S0D4 - -/ { - compatible = "renesas,r8a774a1"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&a57_0>; - }; - core1 { - cpu = <&a57_1>; - }; - }; - - cluster1 { - core0 { - cpu = <&a53_0>; - }; - core1 { - cpu = <&a53_1>; - }; - core2 { - cpu = <&a53_2>; - }; - core3 { - cpu = <&a53_3>; - }; - }; - }; - - a57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A774A1_PD_CA57_CPU0>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - dynamic-power-coefficient = <854>; - clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x1>; - device_type = "cpu"; - power-domains = <&sysc R8A774A1_PD_CA57_CPU1>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a53_0: cpu@100 { - compatible = "arm,cortex-a53"; - reg = <0x100>; - device_type = "cpu"; - power-domains = <&sysc R8A774A1_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - #cooling-cells = <2>; - dynamic-power-coefficient = <277>; - clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <560>; - }; - - a53_1: cpu@101 { - compatible = "arm,cortex-a53"; - reg = <0x101>; - device_type = "cpu"; - power-domains = <&sysc R8A774A1_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <560>; - }; - - a53_2: cpu@102 { - compatible = "arm,cortex-a53"; - reg = <0x102>; - device_type = "cpu"; - power-domains = <&sysc R8A774A1_PD_CA53_CPU2>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <560>; - }; - - a53_3: cpu@103 { - compatible = "arm,cortex-a53"; - reg = <0x103>; - device_type = "cpu"; - power-domains = <&sysc R8A774A1_PD_CA53_CPU3>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <560>; - }; - - L2_CA57: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A774A1_PD_CA57_SCU>; - cache-unified; - cache-level = <2>; - }; - - L2_CA53: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A774A1_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; - }; - - pmu_a57 { - compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a57_0>, <&a57_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a774a1-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a774a1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 4>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a774a1"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a774a1-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a774a1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a774a1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a774a1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a774a1-cpg-mssr"; - reg = <0 0xe6150000 0 0x0bb0>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a774a1-rst"; - reg = <0 0xe6160000 0 0x018c>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a774a1-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a774a1-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>, - <0 0xe61a8000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a774a1", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a774a1", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a774a1", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a774a1", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a774a1", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a774a1", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774a1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - iic_pmic: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a774a1", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a774a1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a774a1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a774a1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a774a1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a774a1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a774a1", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb2_clksel: clock-controller@e6590630 { - compatible = "renesas,r8a774a1-rcar-usb2-clock-sel", - "renesas,rcar-gen3-usb2-clock-sel"; - reg = <0 0xe6590630 0 0x02>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, - <&usb_extal_clk>, <&usb3s0_clk>; - clock-names = "ehci_ohci", "hs-usb-if", - "usb_extal", "usb_xtal"; - #clock-cells = <0>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - reset-names = "ehci_ohci", "hs-usb-if"; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a774a1-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a774a1-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb3_phy0: usb-phy@e65ee000 { - compatible = "renesas,r8a774a1-usb3-phy", - "renesas,rcar-gen3-usb3-phy"; - reg = <0 0xe65ee000 0 0x90>; - clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, - <&usb_extal_clk>; - clock-names = "usb3-if", "usb3s_clk", "usb_extal"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - #phy-cells = <0>; - status = "disabled"; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a774a1", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a774a1", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a774a1", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 5>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv1: iommu@fd950000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xfd950000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 8>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a774a1"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 9>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a774a1", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a774a1", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A774A1_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a774a1", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A774A1_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a774a1-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A774A1_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774A1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a774a1", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a774a1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 0x40>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a774a1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 0x40>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a774a1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 0x40>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a774a1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 0x40>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a774a1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 0x40>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a774a1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 0x40>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A774A1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a774a1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a774a1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a774a1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a774a1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin1>; - }; - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin2>; - }; - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin3>; - }; - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin4>; - }; - vin4csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin5>; - }; - vin5csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin6>; - }; - vin6csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a774a1"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin7>; - }; - vin7csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin7>; - }; - }; - }; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a774a1", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774A1_CLK_S0D4>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx"; - }; - ssiu01: ssiu-1 { - dmas = <&audma0 0x35>, <&audma1 0x36>; - dma-names = "rx", "tx"; - }; - ssiu02: ssiu-2 { - dmas = <&audma0 0x37>, <&audma1 0x38>; - dma-names = "rx", "tx"; - }; - ssiu03: ssiu-3 { - dmas = <&audma0 0x47>, <&audma1 0x48>; - dma-names = "rx", "tx"; - }; - ssiu04: ssiu-4 { - dmas = <&audma0 0x3F>, <&audma1 0x40>; - dma-names = "rx", "tx"; - }; - ssiu05: ssiu-5 { - dmas = <&audma0 0x43>, <&audma1 0x44>; - dma-names = "rx", "tx"; - }; - ssiu06: ssiu-6 { - dmas = <&audma0 0x4F>, <&audma1 0x50>; - dma-names = "rx", "tx"; - }; - ssiu07: ssiu-7 { - dmas = <&audma0 0x53>, <&audma1 0x54>; - dma-names = "rx", "tx"; - }; - ssiu10: ssiu-8 { - dmas = <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx"; - }; - ssiu11: ssiu-9 { - dmas = <&audma0 0x4B>, <&audma1 0x4C>; - dma-names = "rx", "tx"; - }; - ssiu12: ssiu-10 { - dmas = <&audma0 0x57>, <&audma1 0x58>; - dma-names = "rx", "tx"; - }; - ssiu13: ssiu-11 { - dmas = <&audma0 0x59>, <&audma1 0x5A>; - dma-names = "rx", "tx"; - }; - ssiu14: ssiu-12 { - dmas = <&audma0 0x5F>, <&audma1 0x60>; - dma-names = "rx", "tx"; - }; - ssiu15: ssiu-13 { - dmas = <&audma0 0xC3>, <&audma1 0xC4>; - dma-names = "rx", "tx"; - }; - ssiu16: ssiu-14 { - dmas = <&audma0 0xC7>, <&audma1 0xC8>; - dma-names = "rx", "tx"; - }; - ssiu17: ssiu-15 { - dmas = <&audma0 0xCB>, <&audma1 0xCC>; - dma-names = "rx", "tx"; - }; - ssiu20: ssiu-16 { - dmas = <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx"; - }; - ssiu21: ssiu-17 { - dmas = <&audma0 0x67>, <&audma1 0x68>; - dma-names = "rx", "tx"; - }; - ssiu22: ssiu-18 { - dmas = <&audma0 0x6B>, <&audma1 0x6C>; - dma-names = "rx", "tx"; - }; - ssiu23: ssiu-19 { - dmas = <&audma0 0x6D>, <&audma1 0x6E>; - dma-names = "rx", "tx"; - }; - ssiu24: ssiu-20 { - dmas = <&audma0 0xCF>, <&audma1 0xCE>; - dma-names = "rx", "tx"; - }; - ssiu25: ssiu-21 { - dmas = <&audma0 0xEB>, <&audma1 0xEC>; - dma-names = "rx", "tx"; - }; - ssiu26: ssiu-22 { - dmas = <&audma0 0xED>, <&audma1 0xEE>; - dma-names = "rx", "tx"; - }; - ssiu27: ssiu-23 { - dmas = <&audma0 0xEF>, <&audma1 0xF0>; - dma-names = "rx", "tx"; - }; - ssiu30: ssiu-24 { - dmas = <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx"; - }; - ssiu31: ssiu-25 { - dmas = <&audma0 0x21>, <&audma1 0x22>; - dma-names = "rx", "tx"; - }; - ssiu32: ssiu-26 { - dmas = <&audma0 0x23>, <&audma1 0x24>; - dma-names = "rx", "tx"; - }; - ssiu33: ssiu-27 { - dmas = <&audma0 0x25>, <&audma1 0x26>; - dma-names = "rx", "tx"; - }; - ssiu34: ssiu-28 { - dmas = <&audma0 0x27>, <&audma1 0x28>; - dma-names = "rx", "tx"; - }; - ssiu35: ssiu-29 { - dmas = <&audma0 0x29>, <&audma1 0x2A>; - dma-names = "rx", "tx"; - }; - ssiu36: ssiu-30 { - dmas = <&audma0 0x2B>, <&audma1 0x2C>; - dma-names = "rx", "tx"; - }; - ssiu37: ssiu-31 { - dmas = <&audma0 0x2D>, <&audma1 0x2E>; - dma-names = "rx", "tx"; - }; - ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx"; - }; - ssiu41: ssiu-33 { - dmas = <&audma0 0x17>, <&audma1 0x18>; - dma-names = "rx", "tx"; - }; - ssiu42: ssiu-34 { - dmas = <&audma0 0x19>, <&audma1 0x1A>; - dma-names = "rx", "tx"; - }; - ssiu43: ssiu-35 { - dmas = <&audma0 0x1B>, <&audma1 0x1C>; - dma-names = "rx", "tx"; - }; - ssiu44: ssiu-36 { - dmas = <&audma0 0x1D>, <&audma1 0x1E>; - dma-names = "rx", "tx"; - }; - ssiu45: ssiu-37 { - dmas = <&audma0 0x1F>, <&audma1 0x20>; - dma-names = "rx", "tx"; - }; - ssiu46: ssiu-38 { - dmas = <&audma0 0x31>, <&audma1 0x32>; - dma-names = "rx", "tx"; - }; - ssiu47: ssiu-39 { - dmas = <&audma0 0x33>, <&audma1 0x34>; - dma-names = "rx", "tx"; - }; - ssiu50: ssiu-40 { - dmas = <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx"; - }; - ssiu60: ssiu-41 { - dmas = <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx"; - }; - ssiu70: ssiu-42 { - dmas = <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx"; - }; - ssiu80: ssiu-43 { - dmas = <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx"; - }; - ssiu90: ssiu-44 { - dmas = <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx"; - }; - ssiu91: ssiu-45 { - dmas = <&audma0 0x7F>, <&audma1 0x80>; - dma-names = "rx", "tx"; - }; - ssiu92: ssiu-46 { - dmas = <&audma0 0x81>, <&audma1 0x82>; - dma-names = "rx", "tx"; - }; - ssiu93: ssiu-47 { - dmas = <&audma0 0x83>, <&audma1 0x84>; - dma-names = "rx", "tx"; - }; - ssiu94: ssiu-48 { - dmas = <&audma0 0xA3>, <&audma1 0xA4>; - dma-names = "rx", "tx"; - }; - ssiu95: ssiu-49 { - dmas = <&audma0 0xA5>, <&audma1 0xA6>; - dma-names = "rx", "tx"; - }; - ssiu96: ssiu-50 { - dmas = <&audma0 0xA7>, <&audma1 0xA8>; - dma-names = "rx", "tx"; - }; - ssiu97: ssiu-51 { - dmas = <&audma0 0xA9>, <&audma1 0xAA>; - dma-names = "rx", "tx"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a774a1", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, - <&ipmmu_mp 2>, <&ipmmu_mp 3>, - <&ipmmu_mp 4>, <&ipmmu_mp 5>, - <&ipmmu_mp 6>, <&ipmmu_mp 7>, - <&ipmmu_mp 8>, <&ipmmu_mp 9>, - <&ipmmu_mp 10>, <&ipmmu_mp 11>, - <&ipmmu_mp 12>, <&ipmmu_mp 13>, - <&ipmmu_mp 14>, <&ipmmu_mp 15>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a774a1", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, - <&ipmmu_mp 18>, <&ipmmu_mp 19>, - <&ipmmu_mp 20>, <&ipmmu_mp 21>, - <&ipmmu_mp 22>, <&ipmmu_mp 23>, - <&ipmmu_mp 24>, <&ipmmu_mp 25>, - <&ipmmu_mp 26>, <&ipmmu_mp 27>, - <&ipmmu_mp 28>, <&ipmmu_mp 29>, - <&ipmmu_mp 30>, <&ipmmu_mp 31>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a774a1", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a774a1-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ohci1: usb@ee0a0000 { - compatible = "generic-ohci"; - reg = <0 0xee0a0000 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 2>; - phy-names = "usb"; - companion = <&ohci1>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a774a1", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a774a1", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a774a1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774A1_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a774a1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774A1_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 313>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a774a1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774A1_CLK_SD2H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a774a1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774A1_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a774a1-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x4000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a774a1", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec1: pcie@ee800000 { - compatible = "renesas,pcie-r8a774a1", - "renesas,pcie-rcar-gen3"; - reg = <0 0xee800000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, - <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, - <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, - <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 318>; - iommu-map = <0 &ipmmu_hc 1 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec0_ep: pcie-ep@fe000000 { - compatible = "renesas,r8a774a1-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xfe000000 0 0x80000>, - <0x0 0xfe100000 0 0x100000>, - <0x0 0xfe200000 0 0x200000>, - <0x0 0x30000000 0 0x8000000>, - <0x0 0x38000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>; - clock-names = "pcie"; - resets = <&cpg 319>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pciec1_ep: pcie-ep@ee800000 { - compatible = "renesas,r8a774a1-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xee800000 0 0x80000>, - <0x0 0xee900000 0 0x100000>, - <0x0 0xeea00000 0 0x200000>, - <0x0 0xc0000000 0 0x8000000>, - <0x0 0xc8000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - clock-names = "pcie"; - resets = <&cpg 318>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - resets = <&cpg 119>; - renesas,fcp = <&fcpf0>; - }; - - fcpf0: fcp@fe950000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe950000 0 0x200>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - resets = <&cpg 615>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - resets = <&cpg 607>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 602>; - iommus = <&ipmmu_vi0 9>; - }; - - fcpvd2: fcp@fea37000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea37000 0 0x200>; - clocks = <&cpg CPG_MOD 601>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 601>; - iommus = <&ipmmu_vi0 10>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - resets = <&cpg 611>; - iommus = <&ipmmu_vc0 19>; - }; - - vspb: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; - }; - - vspd2: vsp@fea30000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea30000 0 0x5000>; - interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 621>; - - renesas,fcp = <&fcpvd2>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A774A1_PD_A3VC>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a774a1-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - csi20vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi20>; - }; - csi20vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi20>; - }; - csi20vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi20>; - }; - csi20vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi20>; - }; - csi20vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi20>; - }; - csi20vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi20>; - }; - csi20vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi20>; - }; - }; - }; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a774a1-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - csi40vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi40>; - }; - csi40vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi40>; - }; - csi40vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi40>; - }; - csi40vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi40>; - }; - }; - - }; - }; - - hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a774a1-hdmi", - "renesas,rcar-gen3-hdmi"; - reg = <0 0xfead0000 0 0x10000>; - interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 729>, - <&cpg CPG_CORE R8A774A1_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 729>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - dw_hdmi0_in: endpoint { - remote-endpoint = <&du_out_hdmi0>; - }; - }; - port@1 { - reg = <1>; - }; - port@2 { - /* HDMI sound */ - reg = <2>; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a774a1"; - reg = <0 0xfeb00000 0 0x70000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>; - clock-names = "du.0", "du.1", "du.2"; - resets = <&cpg 724>, <&cpg 722>; - reset-names = "du.0", "du.2"; - status = "disabled"; - - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - port@1 { - reg = <1>; - du_out_hdmi0: endpoint { - remote-endpoint = <&dw_hdmi0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a774a1-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - sustainable-power = <3874>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - sustainable-power = <3874>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - sustainable-power = <3874>; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a57_0 0 2>; - contribution = <1024>; - }; - map1 { - trip = <&target>; - cooling-device = <&a53_0 0 2>; - contribution = <1024>; - }; - }; - trips { - target: trip-point1 { - temperature = <100000>; - hysteresis = <1000>; - type = "passive"; - }; - - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts b/arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts deleted file mode 100644 index 8b9df6afffd..00000000000 --- a/arch/arm/dts/r8a774b1-beacon-rzg2n-kit.dts +++ /dev/null @@ -1,56 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2020, Compass Electronics Group, LLC - */ - -/dts-v1/; - -#include "r8a774b1.dtsi" -#include "beacon-renesom-som.dtsi" -#include "beacon-renesom-baseboard.dtsi" - -/ { - model = "Beacon Embedded Works RZ/G2N Development Kit"; - compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &iic_pmic; - serial0 = &scif2; - serial1 = &hscif0; - serial2 = &hscif1; - serial3 = &scif0; - serial4 = &hscif2; - serial5 = &scif5; - serial6 = &scif4; - ethernet0 = &avb; - mmc0 = &sdhi3; - mmc1 = &sdhi0; - mmc2 = &sdhi2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.3", - "dclkin.0", "dclkin.1", "dclkin.3"; -}; diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts b/arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts deleted file mode 100644 index 60d7c8adea0..00000000000 --- a/arch/arm/dts/r8a774b1-hihope-rzg2n-ex.dts +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the HiHope RZ/G2N Rev.3.0/4.0 connected to - * sub board - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -#include "r8a774b1-hihope-rzg2n.dts" -#include "hihope-rzg2-ex.dtsi" - -/ { - model = "HopeRun HiHope RZ/G2N with sub board"; - compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2n", - "renesas,r8a774b1"; -}; - -/* Set SW43 = ON and SW1001[7] = OFF for SATA port to be activated */ -&sata { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a774b1-hihope-rzg2n.dts b/arch/arm/dts/r8a774b1-hihope-rzg2n.dts deleted file mode 100644 index f1883cbd1a8..00000000000 --- a/arch/arm/dts/r8a774b1-hihope-rzg2n.dts +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the HiHope RZ/G2N main board Rev.3.0/4.0 - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a774b1.dtsi" -#include "hihope-rev4.dtsi" - -/ { - model = "HopeRun HiHope RZ/G2N main board based on r8a774b1"; - compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@480000000 { - device_type = "memory"; - reg = <0x4 0x80000000 0x0 0x80000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.3", - "dclkin.0", "dclkin.1", "dclkin.3"; -}; - -&sdhi3 { - mmc-hs400-1_8v; -}; diff --git a/arch/arm/dts/r8a774b1.dtsi b/arch/arm/dts/r8a774b1.dtsi deleted file mode 100644 index 75776decd21..00000000000 --- a/arch/arm/dts/r8a774b1.dtsi +++ /dev/null @@ -1,2716 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the r8a774b1 SoC - * - * Copyright (C) 2019 Renesas Electronics Corp. - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/clock/r8a774b1-cpg-mssr.h> -#include <dt-bindings/power/r8a774b1-sysc.h> - -#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4 - -/ { - compatible = "renesas,r8a774b1"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - #cooling-cells = <2>; - dynamic-power-coefficient = <854>; - clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - }; - - a57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x1>; - device_type = "cpu"; - power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - }; - - L2_CA57: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A774B1_PD_CA57_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a57 { - compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a57_0>, <&a57_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a774b1-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a774b1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 4>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a774b1"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a774b1-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a774b1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a774b1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a774b1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a774b1-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a774b1-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a774b1-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a774b1-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>, - <0 0xe61a8000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774b1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - iic_pmic: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a774b1", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a774b1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a774b1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a774b1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a774b1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a774b1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a774b1", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb2_clksel: clock-controller@e6590630 { - compatible = "renesas,r8a774b1-rcar-usb2-clock-sel", - "renesas,rcar-gen3-usb2-clock-sel"; - reg = <0 0xe6590630 0 0x02>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, - <&usb_extal_clk>, <&usb3s0_clk>; - clock-names = "ehci_ohci", "hs-usb-if", - "usb_extal", "usb_xtal"; - #clock-cells = <0>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - reset-names = "ehci_ohci", "hs-usb-if"; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a774b1-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a774b1-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb3_phy0: usb-phy@e65ee000 { - compatible = "renesas,r8a774b1-usb3-phy", - "renesas,rcar-gen3-usb3-phy"; - reg = <0 0xe65ee000 0 0x90>; - clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, - <&usb_extal_clk>; - clock-names = "usb3-if", "usb3s_clk", "usb_extal"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - #phy-cells = <0>; - status = "disabled"; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a774b1", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a774b1", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a774b1", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A774B1_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a774b1"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a774b1", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a774b1", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A774B1_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a774b1", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A774B1_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a774b1-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A774B1_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a774b1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 0x40>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a774b1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 0x40>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a774b1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 0x40>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a774b1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 0x40>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a774b1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 0x40>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a774b1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 0x40>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A774B1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a774b1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a774b1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a774b1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a774b1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin1>; - }; - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin2>; - }; - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin3>; - }; - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin4>; - }; - vin4csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin5>; - }; - vin5csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin6>; - }; - vin6csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a774b1"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin7>; - }; - vin7csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin7>; - }; - }; - }; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774B1_CLK_S0D4>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx"; - }; - ssiu01: ssiu-1 { - dmas = <&audma0 0x35>, <&audma1 0x36>; - dma-names = "rx", "tx"; - }; - ssiu02: ssiu-2 { - dmas = <&audma0 0x37>, <&audma1 0x38>; - dma-names = "rx", "tx"; - }; - ssiu03: ssiu-3 { - dmas = <&audma0 0x47>, <&audma1 0x48>; - dma-names = "rx", "tx"; - }; - ssiu04: ssiu-4 { - dmas = <&audma0 0x3F>, <&audma1 0x40>; - dma-names = "rx", "tx"; - }; - ssiu05: ssiu-5 { - dmas = <&audma0 0x43>, <&audma1 0x44>; - dma-names = "rx", "tx"; - }; - ssiu06: ssiu-6 { - dmas = <&audma0 0x4F>, <&audma1 0x50>; - dma-names = "rx", "tx"; - }; - ssiu07: ssiu-7 { - dmas = <&audma0 0x53>, <&audma1 0x54>; - dma-names = "rx", "tx"; - }; - ssiu10: ssiu-8 { - dmas = <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx"; - }; - ssiu11: ssiu-9 { - dmas = <&audma0 0x4B>, <&audma1 0x4C>; - dma-names = "rx", "tx"; - }; - ssiu12: ssiu-10 { - dmas = <&audma0 0x57>, <&audma1 0x58>; - dma-names = "rx", "tx"; - }; - ssiu13: ssiu-11 { - dmas = <&audma0 0x59>, <&audma1 0x5A>; - dma-names = "rx", "tx"; - }; - ssiu14: ssiu-12 { - dmas = <&audma0 0x5F>, <&audma1 0x60>; - dma-names = "rx", "tx"; - }; - ssiu15: ssiu-13 { - dmas = <&audma0 0xC3>, <&audma1 0xC4>; - dma-names = "rx", "tx"; - }; - ssiu16: ssiu-14 { - dmas = <&audma0 0xC7>, <&audma1 0xC8>; - dma-names = "rx", "tx"; - }; - ssiu17: ssiu-15 { - dmas = <&audma0 0xCB>, <&audma1 0xCC>; - dma-names = "rx", "tx"; - }; - ssiu20: ssiu-16 { - dmas = <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx"; - }; - ssiu21: ssiu-17 { - dmas = <&audma0 0x67>, <&audma1 0x68>; - dma-names = "rx", "tx"; - }; - ssiu22: ssiu-18 { - dmas = <&audma0 0x6B>, <&audma1 0x6C>; - dma-names = "rx", "tx"; - }; - ssiu23: ssiu-19 { - dmas = <&audma0 0x6D>, <&audma1 0x6E>; - dma-names = "rx", "tx"; - }; - ssiu24: ssiu-20 { - dmas = <&audma0 0xCF>, <&audma1 0xCE>; - dma-names = "rx", "tx"; - }; - ssiu25: ssiu-21 { - dmas = <&audma0 0xEB>, <&audma1 0xEC>; - dma-names = "rx", "tx"; - }; - ssiu26: ssiu-22 { - dmas = <&audma0 0xED>, <&audma1 0xEE>; - dma-names = "rx", "tx"; - }; - ssiu27: ssiu-23 { - dmas = <&audma0 0xEF>, <&audma1 0xF0>; - dma-names = "rx", "tx"; - }; - ssiu30: ssiu-24 { - dmas = <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx"; - }; - ssiu31: ssiu-25 { - dmas = <&audma0 0x21>, <&audma1 0x22>; - dma-names = "rx", "tx"; - }; - ssiu32: ssiu-26 { - dmas = <&audma0 0x23>, <&audma1 0x24>; - dma-names = "rx", "tx"; - }; - ssiu33: ssiu-27 { - dmas = <&audma0 0x25>, <&audma1 0x26>; - dma-names = "rx", "tx"; - }; - ssiu34: ssiu-28 { - dmas = <&audma0 0x27>, <&audma1 0x28>; - dma-names = "rx", "tx"; - }; - ssiu35: ssiu-29 { - dmas = <&audma0 0x29>, <&audma1 0x2A>; - dma-names = "rx", "tx"; - }; - ssiu36: ssiu-30 { - dmas = <&audma0 0x2B>, <&audma1 0x2C>; - dma-names = "rx", "tx"; - }; - ssiu37: ssiu-31 { - dmas = <&audma0 0x2D>, <&audma1 0x2E>; - dma-names = "rx", "tx"; - }; - ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx"; - }; - ssiu41: ssiu-33 { - dmas = <&audma0 0x17>, <&audma1 0x18>; - dma-names = "rx", "tx"; - }; - ssiu42: ssiu-34 { - dmas = <&audma0 0x19>, <&audma1 0x1A>; - dma-names = "rx", "tx"; - }; - ssiu43: ssiu-35 { - dmas = <&audma0 0x1B>, <&audma1 0x1C>; - dma-names = "rx", "tx"; - }; - ssiu44: ssiu-36 { - dmas = <&audma0 0x1D>, <&audma1 0x1E>; - dma-names = "rx", "tx"; - }; - ssiu45: ssiu-37 { - dmas = <&audma0 0x1F>, <&audma1 0x20>; - dma-names = "rx", "tx"; - }; - ssiu46: ssiu-38 { - dmas = <&audma0 0x31>, <&audma1 0x32>; - dma-names = "rx", "tx"; - }; - ssiu47: ssiu-39 { - dmas = <&audma0 0x33>, <&audma1 0x34>; - dma-names = "rx", "tx"; - }; - ssiu50: ssiu-40 { - dmas = <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx"; - }; - ssiu60: ssiu-41 { - dmas = <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx"; - }; - ssiu70: ssiu-42 { - dmas = <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx"; - }; - ssiu80: ssiu-43 { - dmas = <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx"; - }; - ssiu90: ssiu-44 { - dmas = <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx"; - }; - ssiu91: ssiu-45 { - dmas = <&audma0 0x7F>, <&audma1 0x80>; - dma-names = "rx", "tx"; - }; - ssiu92: ssiu-46 { - dmas = <&audma0 0x81>, <&audma1 0x82>; - dma-names = "rx", "tx"; - }; - ssiu93: ssiu-47 { - dmas = <&audma0 0x83>, <&audma1 0x84>; - dma-names = "rx", "tx"; - }; - ssiu94: ssiu-48 { - dmas = <&audma0 0xA3>, <&audma1 0xA4>; - dma-names = "rx", "tx"; - }; - ssiu95: ssiu-49 { - dmas = <&audma0 0xA5>, <&audma1 0xA6>; - dma-names = "rx", "tx"; - }; - ssiu96: ssiu-50 { - dmas = <&audma0 0xA7>, <&audma1 0xA8>; - dma-names = "rx", "tx"; - }; - ssiu97: ssiu-51 { - dmas = <&audma0 0xA9>, <&audma1 0xAA>; - dma-names = "rx", "tx"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a774b1", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a774b1", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <16>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a774b1", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a774b1-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ohci1: usb@ee0a0000 { - compatible = "generic-ohci"; - reg = <0 0xee0a0000 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 2>; - phy-names = "usb"; - companion = <&ohci1>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a774b1", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a774b1", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a774b1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a774b1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 313>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a774b1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a774b1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a774b1-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x4000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sata: sata@ee300000 { - compatible = "renesas,sata-r8a774b1", - "renesas,rcar-gen3-sata"; - reg = <0 0xee300000 0 0x200000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 815>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a774b1", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec1: pcie@ee800000 { - compatible = "renesas,pcie-r8a774b1", - "renesas,pcie-rcar-gen3"; - reg = <0 0xee800000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, - <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, - <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, - <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 318>; - iommu-map = <0 &ipmmu_hc 1 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec0_ep: pcie-ep@fe000000 { - compatible = "renesas,r8a774b1-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xfe000000 0 0x80000>, - <0x0 0xfe100000 0 0x100000>, - <0x0 0xfe200000 0 0x200000>, - <0x0 0x30000000 0 0x8000000>, - <0x0 0x38000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>; - clock-names = "pcie"; - resets = <&cpg 319>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pciec1_ep: pcie-ep@ee800000 { - compatible = "renesas,r8a774b1-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xee800000 0 0x80000>, - <0x0 0xee900000 0 0x100000>, - <0x0 0xeea00000 0 0x200000>, - <0x0 0xc0000000 0 0x8000000>, - <0x0 0xc8000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - clock-names = "pcie"; - resets = <&cpg 318>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - resets = <&cpg 119>; - renesas,fcp = <&fcpf0>; - }; - - fcpf0: fcp@fe950000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe950000 0 0x200>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - resets = <&cpg 615>; - }; - - vspb: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - resets = <&cpg 607>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 603>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 602>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A774B1_PD_A3VP>; - resets = <&cpg 611>; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a774b1-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - csi20vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi20>; - }; - csi20vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi20>; - }; - csi20vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi20>; - }; - csi20vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi20>; - }; - csi20vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi20>; - }; - csi20vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi20>; - }; - csi20vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi20>; - }; - }; - }; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a774b1-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - csi40vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi40>; - }; - csi40vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi40>; - }; - csi40vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi40>; - }; - csi40vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi40>; - }; - }; - }; - }; - - hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a774b1-hdmi", - "renesas,rcar-gen3-hdmi"; - reg = <0 0xfead0000 0 0x10000>; - interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 729>, - <&cpg CPG_CORE R8A774B1_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 729>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dw_hdmi0_in: endpoint { - remote-endpoint = <&du_out_hdmi0>; - }; - }; - port@1 { - reg = <1>; - }; - port@2 { - /* HDMI sound */ - reg = <2>; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a774b1"; - reg = <0 0xfeb00000 0 0x80000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>; - clock-names = "du.0", "du.1", "du.3"; - resets = <&cpg 724>, <&cpg 722>; - reset-names = "du.0", "du.3"; - status = "disabled"; - - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - port@1 { - reg = <1>; - du_out_hdmi0: endpoint { - remote-endpoint = <&dw_hdmi0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a774b1-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - sustainable-power = <2439>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - sustainable-power = <2439>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - sustainable-power = <2439>; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a57_0 0 2>; - contribution = <1024>; - }; - }; - trips { - target: trip-point1 { - temperature = <100000>; - hysteresis = <1000>; - type = "passive"; - }; - - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a774c0-cat874.dts b/arch/arm/dts/r8a774c0-cat874.dts deleted file mode 100644 index 5a6ea08ffd2..00000000000 --- a/arch/arm/dts/r8a774c0-cat874.dts +++ /dev/null @@ -1,455 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874) - * - * Copyright (C) 2019 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a774c0.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/display/tda998x.h> - -/ { - model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; - compatible = "si-linux,cat874", "renesas,r8a774c0"; - - aliases { - serial0 = &scif2; - serial1 = &hscif2; - mmc0 = &sdhi0; - mmc1 = &sdhi3; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_out: endpoint { - remote-endpoint = <&tda19988_out>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led0 { - gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; - label = "LED0"; - }; - - led1 { - gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; - label = "LED1"; - }; - - led2 { - gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; - label = "LED2"; - }; - - led3 { - gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; - label = "LED3"; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - reg_12p0v: regulator-12p0v { - compatible = "regulator-fixed"; - regulator-name = "D12.0V"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-boot-on; - regulator-always-on; - }; - - sound: sound { - compatible = "simple-audio-card"; - - simple-audio-card,name = "CAT874 HDMI sound"; - simple-audio-card,format = "i2s"; - simple-audio-card,bitclock-master = <&sndcpu>; - simple-audio-card,frame-master = <&sndcpu>; - - sndcodec: simple-audio-card,codec { - sound-dai = <&tda19988>; - }; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - wlan_en_reg: fixedregulator { - compatible = "regulator-fixed"; - regulator-name = "wlan-en-regulator"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - startup-delay-us = <70000>; - - gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - x13_clk: x13 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - hs_ep: endpoint { - remote-endpoint = <&usb3_hs_ep>; - }; - }; - port@1 { - reg = <1>; - ss_ep: endpoint { - remote-endpoint = <&hd3ss3220_in_ep>; - }; - }; - }; - }; -}; - -&audio_clk_a { - clock-frequency = <22579200>; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&x13_clk>; - clock-names = "du.0", "du.1", "dclkin.0"; - - ports { - port@0 { - du_out_rgb: endpoint { - remote-endpoint = <&tda19988_in>; - }; - }; - }; -}; - -&ehci0 { - dr_mode = "host"; - status = "okay"; -}; - -&extal_clk { - clock-frequency = <48000000>; -}; - -&hscif2 { - pinctrl-0 = <&hscif2_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; - - bluetooth { - compatible = "ti,wl1837-st"; - enable-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; - }; -}; - -&i2c0 { - status = "okay"; - clock-frequency = <100000>; - - hd3ss3220@47 { - compatible = "ti,hd3ss3220"; - reg = <0x47>; - interrupt-parent = <&gpio6>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - hd3ss3220_in_ep: endpoint { - remote-endpoint = <&ss_ep>; - }; - }; - port@1 { - reg = <1>; - hd3ss3220_out_ep: endpoint { - remote-endpoint = <&usb3_role_switch>; - }; - }; - }; - }; - - tda19988: tda19988@70 { - compatible = "nxp,tda998x"; - reg = <0x70>; - interrupt-parent = <&gpio1>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - - video-ports = <0x234501>; - - #sound-dai-cells = <0>; - audio-ports = <TDA998x_I2S 0x03>; - clocks = <&rcar_sound 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - tda19988_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - - port@1 { - reg = <1>; - tda19988_out: endpoint { - remote-endpoint = <&hdmi_con_out>; - }; - }; - }; - }; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - rtc@32 { - compatible = "epson,rx8571"; - reg = <0x32>; - }; -}; - -&lvds0 { - status = "okay"; - - clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>; - clock-names = "fck", "dclkin.0", "extal"; -}; - -&ohci0 { - dr_mode = "host"; - status = "okay"; -}; - -&pcie_bus_clk { - clock-frequency = <100000000>; -}; - -&pciec0 { - /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; -}; - -&pfc { - du_pins: du { - groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp", - "du_clk_in_0"; - function = "du"; - }; - - hscif2_pins: hscif2 { - groups = "hscif2_data_a", "hscif2_ctrl_a"; - function = "hscif2"; - }; - - i2c1_pins: i2c1 { - groups = "i2c1_b"; - function = "i2c1"; - }; - - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi3_pins: sd3 { - groups = "sdhi3_data4", "sdhi3_ctrl"; - function = "sdhi3"; - power-source = <1800>; - }; - - sound_clk_pins: sound_clk { - groups = "audio_clkout1_a"; - function = "audio_clk"; - }; - - sound_pins: sound { - groups = "ssi01239_ctrl", "ssi0_data"; - function = "ssi"; - }; - - usb30_pins: usb30 { - groups = "usb30", "usb30_id"; - function = "usb30"; - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - /* audio_clkout0/1/2/3 */ - #clock-cells = <1>; - clock-frequency = <11289600>; - - status = "okay"; - - rcar_sound,dai { - dai0 { - playback = <&ssi0>, <&src0>, <&dvc0>; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - bus-width = <4>; - sd-uhs-sdr50; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdhi3 { - status = "okay"; - pinctrl-0 = <&sdhi3_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&wlan_en_reg>; - bus-width = <4>; - non-removable; - cap-power-off-card; - keep-power-in-suspend; - - #address-cells = <1>; - #size-cells = <0>; - wlcore: wlcore@2 { - compatible = "ti,wl1837"; - reg = <2>; - interrupt-parent = <&gpio1>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; -}; - -&usb2_phy0 { - renesas,no-otg-pins; - status = "okay"; -}; - -&usb3_peri0 { - companion = <&xhci0>; - status = "okay"; - usb-role-switch; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - usb3_hs_ep: endpoint { - remote-endpoint = <&hs_ep>; - }; - }; - port@1 { - reg = <1>; - usb3_role_switch: endpoint { - remote-endpoint = <&hd3ss3220_out_ep>; - }; - }; - }; -}; - -&xhci0 { - pinctrl-0 = <&usb30_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; diff --git a/arch/arm/dts/r8a774c0-ek874.dts b/arch/arm/dts/r8a774c0-ek874.dts deleted file mode 100644 index e7b6619ab22..00000000000 --- a/arch/arm/dts/r8a774c0-ek874.dts +++ /dev/null @@ -1,14 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Silicon Linux RZ/G2E evaluation kit (EK874) - * - * Copyright (C) 2019 Renesas Electronics Corp. - */ - -#include "r8a774c0-cat874.dts" -#include "cat875.dtsi" - -/ { - model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875)"; - compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0"; -}; diff --git a/arch/arm/dts/r8a774c0.dtsi b/arch/arm/dts/r8a774c0.dtsi deleted file mode 100644 index ad2e87b039a..00000000000 --- a/arch/arm/dts/r8a774c0.dtsi +++ /dev/null @@ -1,2000 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the RZ/G2E (R8A774C0) SoC - * - * Copyright (C) 2018-2019 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a774c0-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a774c0-sysc.h> - -/ { - compatible = "renesas,r8a774c0"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - clock-latency-ns = <300000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a53_0: cpu@0 { - compatible = "arm,cortex-a53"; - reg = <0>; - device_type = "cpu"; - #cooling-cells = <2>; - power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - dynamic-power-coefficient = <277>; - clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - }; - - a53_1: cpu@1 { - compatible = "arm,cortex-a53"; - reg = <1>; - device_type = "cpu"; - power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - }; - - L2_CA53: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A774C0_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc: soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a774c0-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 23>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 11>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 20>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a774c0", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a774c0"; - reg = <0 0xe6060000 0 0x508>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a774c0-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a774c0-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a774c0-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a774c0-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a774c0-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; - clock-names = "extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a774c0-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a774c0-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - thermal: thermal@e6190000 { - compatible = "renesas,thermal-r8a774c0"; - reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a774c0", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c7: i2c@e6690000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774c0", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6690000 0 0x40>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1003>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 1003>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - iic_pmic: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a774c0", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a774c0", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a774c0", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a774c0", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a774c0", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a774c0", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a774c0", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a774c0-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a774c0-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a774c0", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a774c0", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a774c0", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A774C0_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a774c0"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a774c0", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a774c0", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A774C0_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a774c0", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A774C0_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a774c0-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A774C0_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a774c0", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a774c0", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a774c0", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a774c0", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a774c0", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a774c0", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 64>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A774C0_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a774c0", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a774c0", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac0 0x43>, <&dmac0 0x42>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a774c0", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a774c0", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a774c0"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a774c0"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin5>; - }; - }; - }; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a774c0", - "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774C0_CLK_ZA2>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma0 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma0 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma0 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma0 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma0 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma0 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma0 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma0 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma0 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma0 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma0 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma0 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma0 0x02>, - <&audma0 0x15>, <&audma0 0x16>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma0 0x04>, - <&audma0 0x49>, <&audma0 0x4a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma0 0x06>, - <&audma0 0x63>, <&audma0 0x64>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma0 0x08>, - <&audma0 0x6f>, <&audma0 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma0 0x0a>, - <&audma0 0x71>, <&audma0 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma0 0x0c>, - <&audma0 0x73>, <&audma0 0x74>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma0 0x0e>, - <&audma0 0x75>, <&audma0 0x76>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma0 0x10>, - <&audma0 0x79>, <&audma0 0x7a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma0 0x12>, - <&audma0 0x7b>, <&audma0 0x7c>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma0 0x14>, - <&audma0 0x7d>, <&audma0 0x7e>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a774c0", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, - <&ipmmu_mp 2>, <&ipmmu_mp 3>, - <&ipmmu_mp 4>, <&ipmmu_mp 5>, - <&ipmmu_mp 6>, <&ipmmu_mp 7>, - <&ipmmu_mp 8>, <&ipmmu_mp 9>, - <&ipmmu_mp 10>, <&ipmmu_mp 11>, - <&ipmmu_mp 12>, <&ipmmu_mp 13>, - <&ipmmu_mp 14>, <&ipmmu_mp 15>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a774c0", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a774c0-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a774c0", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a774c0", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a774c0", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 313>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a774c0", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a774c0-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x4000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a774c0", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec0_ep: pcie-ep@fe000000 { - compatible = "renesas,r8a774c0-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xfe000000 0 0x80000>, - <0x0 0xfe100000 0 0x100000>, - <0x0 0xfe200000 0 0x200000>, - <0x0 0x30000000 0 0x8000000>, - <0x0 0x38000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>; - clock-names = "pcie"; - resets = <&cpg 319>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - status = "disabled"; - }; - - vspb0: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 626>; - renesas,fcp = <&fcpvb0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x7000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 623>; - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x7000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 622>; - renesas,fcp = <&fcpvd1>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 631>; - renesas,fcp = <&fcpvi0>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 607>; - iommus = <&ipmmu_vp0 5>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 602>; - iommus = <&ipmmu_vi0 9>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 611>; - iommus = <&ipmmu_vp0 8>; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a774c0-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin4: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin4csi40>; - }; - csi40vin5: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin5csi40>; - }; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a774c0"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - renesas,vsps = <&vspd0 0>, <&vspd1 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - - port@2 { - reg = <2>; - du_out_lvds1: endpoint { - remote-endpoint = <&lvds1_in>; - }; - }; - }; - }; - - lvds0: lvds-encoder@feb90000 { - compatible = "renesas,r8a774c0-lvds"; - reg = <0 0xfeb90000 0 0x20>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - renesas,companion = <&lvds1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - lvds1: lvds-encoder@feb90100 { - compatible = "renesas,r8a774c0-lvds"; - reg = <0 0xfeb90100 0 0x20>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; - resets = <&cpg 726>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds1_in: endpoint { - remote-endpoint = <&du_out_lvds1>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - cpu-thermal { - polling-delay-passive = <250>; - polling-delay = <0>; - thermal-sensors = <&thermal>; - sustainable-power = <717>; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a53_0 0 2>; - contribution = <1024>; - }; - }; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - - target: trip-point1 { - temperature = <100000>; - hysteresis = <2000>; - type = "passive"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts b/arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts deleted file mode 100644 index 146f78cb6f1..00000000000 --- a/arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts +++ /dev/null @@ -1,61 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2020, Compass Electronics Group, LLC - */ - -/dts-v1/; - -#include "r8a774e1.dtsi" -#include "beacon-renesom-som.dtsi" -#include "beacon-renesom-baseboard.dtsi" - -/ { - model = "Beacon Embedded Works RZ/G2H Development Kit"; - compatible = "beacon,beacon-rzg2h", "renesas,r8a774e1"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &iic_pmic; - serial0 = &scif2; - serial1 = &hscif0; - serial2 = &hscif1; - serial3 = &scif0; - serial4 = &hscif2; - serial5 = &scif5; - serial6 = &scif4; - ethernet0 = &avb; - mmc0 = &sdhi3; - mmc1 = &sdhi0; - mmc2 = &sdhi2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@500000000 { - device_type = "memory"; - reg = <0x5 0x00000000 0x0 0x80000000>; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.3", - "dclkin.0", "dclkin.1", "dclkin.3"; -}; diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts b/arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts deleted file mode 100644 index 81299593984..00000000000 --- a/arch/arm/dts/r8a774e1-hihope-rzg2h-ex.dts +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the HiHope RZ/G2H sub board - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -#include "r8a774e1-hihope-rzg2h.dts" -#include "hihope-rzg2-ex.dtsi" - -/ { - model = "HopeRun HiHope RZ/G2H with sub board"; - compatible = "hoperun,hihope-rzg2-ex", "hoperun,hihope-rzg2h", - "renesas,r8a774e1"; -}; - -/* Set SW43 = ON and SW1001[7] = OFF for SATA port to be activated */ -&sata { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a774e1-hihope-rzg2h.dts b/arch/arm/dts/r8a774e1-hihope-rzg2h.dts deleted file mode 100644 index 9525d5ed6fc..00000000000 --- a/arch/arm/dts/r8a774e1-hihope-rzg2h.dts +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the HiHope RZ/G2H main board - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a774e1.dtsi" -#include "hihope-rev4.dtsi" - -/ { - model = "HopeRun HiHope RZ/G2H main board based on r8a774e1"; - compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@500000000 { - device_type = "memory"; - reg = <0x5 0x00000000 0x0 0x80000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&x302_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.3", - "dclkin.0", "dclkin.1", "dclkin.3"; -}; - -&sdhi3 { - mmc-hs400-1_8v; -}; diff --git a/arch/arm/dts/r8a774e1.dtsi b/arch/arm/dts/r8a774e1.dtsi deleted file mode 100644 index 2acf4067ab2..00000000000 --- a/arch/arm/dts/r8a774e1.dtsi +++ /dev/null @@ -1,2997 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the r8a774e1 SoC - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/clock/r8a774e1-cpg-mssr.h> -#include <dt-bindings/power/r8a774e1-sysc.h> - -#define CPG_AUDIO_CLK_I R8A774E1_CLK_S0D4 - -/ { - compatible = "renesas,r8a774e1"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&a57_0>; - }; - core1 { - cpu = <&a57_1>; - }; - core2 { - cpu = <&a57_2>; - }; - core3 { - cpu = <&a57_3>; - }; - }; - - cluster1 { - core0 { - cpu = <&a53_0>; - }; - core1 { - cpu = <&a53_1>; - }; - core2 { - cpu = <&a53_2>; - }; - core3 { - cpu = <&a53_3>; - }; - }; - }; - - a57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA57_CPU0>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - dynamic-power-coefficient = <854>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x1>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA57_CPU1>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_2: cpu@2 { - compatible = "arm,cortex-a57"; - reg = <0x2>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA57_CPU2>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_3: cpu@3 { - compatible = "arm,cortex-a57"; - reg = <0x3>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA57_CPU3>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a53_0: cpu@100 { - compatible = "arm,cortex-a53"; - reg = <0x100>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - #cooling-cells = <2>; - dynamic-power-coefficient = <277>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_1: cpu@101 { - compatible = "arm,cortex-a53"; - reg = <0x101>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_2: cpu@102 { - compatible = "arm,cortex-a53"; - reg = <0x102>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA53_CPU2>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_3: cpu@103 { - compatible = "arm,cortex-a53"; - reg = <0x103>; - device_type = "cpu"; - power-domains = <&sysc R8A774E1_PD_CA53_CPU3>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - L2_CA57: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A774E1_PD_CA57_SCU>; - cache-unified; - cache-level = <2>; - }; - - L2_CA53: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A774E1_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <4000>; - }; - - CPU_SLEEP_1: cpu-sleep-1 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <700>; - exit-latency-us = <700>; - min-residency-us = <5000>; - }; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; - }; - - pmu_a57 { - compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a57_0>, <&a57_1>, <&a57_2>, <&a57_3>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a774e1-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a774e1", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 4>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a774e1"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a774e1-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a774e1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a774e1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a774e1-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a774e1-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a774e1-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a774e1-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a774e1-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>, - <0 0xe61a8000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a774e1", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a774e1", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a774e1", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - iic_pmic: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a774e1", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a774e1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a774e1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a774e1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a774e1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a774e1", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a774e1", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb2_clksel: clock-controller@e6590630 { - compatible = "renesas,r8a774e1-rcar-usb2-clock-sel", - "renesas,rcar-gen3-usb2-clock-sel"; - reg = <0 0xe6590630 0 0x02>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, - <&usb_extal_clk>, <&usb3s0_clk>; - clock-names = "ehci_ohci", "hs-usb-if", - "usb_extal", "usb_xtal"; - #clock-cells = <0>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - reset-names = "ehci_ohci", "hs-usb-if"; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a774e1-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a774e1-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb3_phy0: usb-phy@e65ee000 { - compatible = "renesas,r8a774e1-usb3-phy", - "renesas,rcar-gen3-usb3-phy"; - reg = <0 0xe65ee000 0 0x90>; - clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, - <&usb_extal_clk>; - clock-names = "usb3-if", "usb3s_clk", "usb_extal"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - #phy-cells = <0>; - status = "disabled"; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a774e1", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a774e1", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a774e1", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp0: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv1: iommu@fd950000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfd950000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 7>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv2: iommu@fd960000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfd960000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 8>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv3: iommu@fd970000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfd970000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 9>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A774E1_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vc1: iommu@fe6f0000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfe6f0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 13>; - power-domains = <&sysc R8A774E1_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi1: iommu@febe0000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfebe0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 15>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - #iommu-cells = <1>; - }; - - ipmmu_vp1: iommu@fe980000 { - compatible = "renesas,ipmmu-r8a774e1"; - reg = <0 0xfe980000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 17>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a774e1", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a774e1", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A774E1_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a774e1", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A774E1_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a774e1-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A774E1_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a774e1", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a774e1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 0x40>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a774e1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 0x40>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a774e1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 0x40>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a774e1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 0x40>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a774e1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 0x40>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a774e1", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 0x40>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A774E1_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a774e1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a774e1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a774e1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a774e1", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin1>; - }; - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin2>; - }; - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin3>; - }; - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a774e1"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin7>; - }; - }; - }; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a774e1", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A774E1_CLK_S0D4>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx"; - }; - ssiu01: ssiu-1 { - dmas = <&audma0 0x35>, <&audma1 0x36>; - dma-names = "rx", "tx"; - }; - ssiu02: ssiu-2 { - dmas = <&audma0 0x37>, <&audma1 0x38>; - dma-names = "rx", "tx"; - }; - ssiu03: ssiu-3 { - dmas = <&audma0 0x47>, <&audma1 0x48>; - dma-names = "rx", "tx"; - }; - ssiu04: ssiu-4 { - dmas = <&audma0 0x3F>, <&audma1 0x40>; - dma-names = "rx", "tx"; - }; - ssiu05: ssiu-5 { - dmas = <&audma0 0x43>, <&audma1 0x44>; - dma-names = "rx", "tx"; - }; - ssiu06: ssiu-6 { - dmas = <&audma0 0x4F>, <&audma1 0x50>; - dma-names = "rx", "tx"; - }; - ssiu07: ssiu-7 { - dmas = <&audma0 0x53>, <&audma1 0x54>; - dma-names = "rx", "tx"; - }; - ssiu10: ssiu-8 { - dmas = <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx"; - }; - ssiu11: ssiu-9 { - dmas = <&audma0 0x4B>, <&audma1 0x4C>; - dma-names = "rx", "tx"; - }; - ssiu12: ssiu-10 { - dmas = <&audma0 0x57>, <&audma1 0x58>; - dma-names = "rx", "tx"; - }; - ssiu13: ssiu-11 { - dmas = <&audma0 0x59>, <&audma1 0x5A>; - dma-names = "rx", "tx"; - }; - ssiu14: ssiu-12 { - dmas = <&audma0 0x5F>, <&audma1 0x60>; - dma-names = "rx", "tx"; - }; - ssiu15: ssiu-13 { - dmas = <&audma0 0xC3>, <&audma1 0xC4>; - dma-names = "rx", "tx"; - }; - ssiu16: ssiu-14 { - dmas = <&audma0 0xC7>, <&audma1 0xC8>; - dma-names = "rx", "tx"; - }; - ssiu17: ssiu-15 { - dmas = <&audma0 0xCB>, <&audma1 0xCC>; - dma-names = "rx", "tx"; - }; - ssiu20: ssiu-16 { - dmas = <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx"; - }; - ssiu21: ssiu-17 { - dmas = <&audma0 0x67>, <&audma1 0x68>; - dma-names = "rx", "tx"; - }; - ssiu22: ssiu-18 { - dmas = <&audma0 0x6B>, <&audma1 0x6C>; - dma-names = "rx", "tx"; - }; - ssiu23: ssiu-19 { - dmas = <&audma0 0x6D>, <&audma1 0x6E>; - dma-names = "rx", "tx"; - }; - ssiu24: ssiu-20 { - dmas = <&audma0 0xCF>, <&audma1 0xCE>; - dma-names = "rx", "tx"; - }; - ssiu25: ssiu-21 { - dmas = <&audma0 0xEB>, <&audma1 0xEC>; - dma-names = "rx", "tx"; - }; - ssiu26: ssiu-22 { - dmas = <&audma0 0xED>, <&audma1 0xEE>; - dma-names = "rx", "tx"; - }; - ssiu27: ssiu-23 { - dmas = <&audma0 0xEF>, <&audma1 0xF0>; - dma-names = "rx", "tx"; - }; - ssiu30: ssiu-24 { - dmas = <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx"; - }; - ssiu31: ssiu-25 { - dmas = <&audma0 0x21>, <&audma1 0x22>; - dma-names = "rx", "tx"; - }; - ssiu32: ssiu-26 { - dmas = <&audma0 0x23>, <&audma1 0x24>; - dma-names = "rx", "tx"; - }; - ssiu33: ssiu-27 { - dmas = <&audma0 0x25>, <&audma1 0x26>; - dma-names = "rx", "tx"; - }; - ssiu34: ssiu-28 { - dmas = <&audma0 0x27>, <&audma1 0x28>; - dma-names = "rx", "tx"; - }; - ssiu35: ssiu-29 { - dmas = <&audma0 0x29>, <&audma1 0x2A>; - dma-names = "rx", "tx"; - }; - ssiu36: ssiu-30 { - dmas = <&audma0 0x2B>, <&audma1 0x2C>; - dma-names = "rx", "tx"; - }; - ssiu37: ssiu-31 { - dmas = <&audma0 0x2D>, <&audma1 0x2E>; - dma-names = "rx", "tx"; - }; - ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx"; - }; - ssiu41: ssiu-33 { - dmas = <&audma0 0x17>, <&audma1 0x18>; - dma-names = "rx", "tx"; - }; - ssiu42: ssiu-34 { - dmas = <&audma0 0x19>, <&audma1 0x1A>; - dma-names = "rx", "tx"; - }; - ssiu43: ssiu-35 { - dmas = <&audma0 0x1B>, <&audma1 0x1C>; - dma-names = "rx", "tx"; - }; - ssiu44: ssiu-36 { - dmas = <&audma0 0x1D>, <&audma1 0x1E>; - dma-names = "rx", "tx"; - }; - ssiu45: ssiu-37 { - dmas = <&audma0 0x1F>, <&audma1 0x20>; - dma-names = "rx", "tx"; - }; - ssiu46: ssiu-38 { - dmas = <&audma0 0x31>, <&audma1 0x32>; - dma-names = "rx", "tx"; - }; - ssiu47: ssiu-39 { - dmas = <&audma0 0x33>, <&audma1 0x34>; - dma-names = "rx", "tx"; - }; - ssiu50: ssiu-40 { - dmas = <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx"; - }; - ssiu60: ssiu-41 { - dmas = <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx"; - }; - ssiu70: ssiu-42 { - dmas = <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx"; - }; - ssiu80: ssiu-43 { - dmas = <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx"; - }; - ssiu90: ssiu-44 { - dmas = <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx"; - }; - ssiu91: ssiu-45 { - dmas = <&audma0 0x7F>, <&audma1 0x80>; - dma-names = "rx", "tx"; - }; - ssiu92: ssiu-46 { - dmas = <&audma0 0x81>, <&audma1 0x82>; - dma-names = "rx", "tx"; - }; - ssiu93: ssiu-47 { - dmas = <&audma0 0x83>, <&audma1 0x84>; - dma-names = "rx", "tx"; - }; - ssiu94: ssiu-48 { - dmas = <&audma0 0xA3>, <&audma1 0xA4>; - dma-names = "rx", "tx"; - }; - ssiu95: ssiu-49 { - dmas = <&audma0 0xA5>, <&audma1 0xA6>; - dma-names = "rx", "tx"; - }; - ssiu96: ssiu-50 { - dmas = <&audma0 0xA7>, <&audma1 0xA8>; - dma-names = "rx", "tx"; - }; - ssiu97: ssiu-51 { - dmas = <&audma0 0xA9>, <&audma1 0xAA>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a774e1", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, - <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, - <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, - <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, - <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, - <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, - <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, - <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a774e1", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, - <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, - <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, - <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, - <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, - <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, - <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, - <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a774e1", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a774e1-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ohci1: usb@ee0a0000 { - compatible = "generic-ohci"; - reg = <0 0xee0a0000 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 1>; - phy-names = "usb"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 2>; - phy-names = "usb"; - companion = <&ohci1>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a774e1", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a774e1", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 702>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a774e1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774E1_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 314>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a774e1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774E1_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 313>; - iommus = <&ipmmu_ds1 33>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a774e1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774E1_CLK_SD2H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 312>; - iommus = <&ipmmu_ds1 34>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a774e1", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774E1_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 311>; - iommus = <&ipmmu_ds1 35>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a774e1-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x4000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sata: sata@ee300000 { - compatible = "renesas,sata-r8a774e1", - "renesas,rcar-gen3-sata"; - reg = <0 0xee300000 0 0x200000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 815>; - iommus = <&ipmmu_hc 2>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a774e1", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec1: pcie@ee800000 { - compatible = "renesas,pcie-r8a774e1", - "renesas,pcie-rcar-gen3"; - reg = <0 0xee800000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, - <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, - <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, - <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 318>; - iommu-map = <0 &ipmmu_hc 1 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec0_ep: pcie-ep@fe000000 { - compatible = "renesas,r8a774e1-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xfe000000 0 0x80000>, - <0x0 0xfe100000 0 0x100000>, - <0x0 0xfe200000 0 0x200000>, - <0x0 0x30000000 0 0x8000000>, - <0x0 0x38000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>; - clock-names = "pcie"; - resets = <&cpg 319>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pciec1_ep: pcie-ep@ee800000 { - compatible = "renesas,r8a774e1-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xee800000 0 0x80000>, - <0x0 0xee900000 0 0x100000>, - <0x0 0xeea00000 0 0x200000>, - <0x0 0xc0000000 0 0x8000000>, - <0x0 0xc8000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - clock-names = "pcie"; - resets = <&cpg 318>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - status = "disabled"; - }; - - vspbc: vsp@fe920000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe920000 0 0x8000>; - interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 624>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 624>; - - renesas,fcp = <&fcpvb1>; - }; - - vspbd: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - vspi1: vsp@fe9b0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9b0000 0 0x8000>; - interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 630>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 630>; - - renesas,fcp = <&fcpvi1>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 119>; - renesas,fcp = <&fcpf0>; - }; - - fdp1@fe944000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe944000 0 0x2400>; - interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 118>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 118>; - renesas,fcp = <&fcpf1>; - }; - - fcpf0: fcp@fe950000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe950000 0 0x200>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 615>; - }; - - fcpf1: fcp@fe951000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe951000 0 0x200>; - clocks = <&cpg CPG_MOD 614>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 614>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 607>; - }; - - fcpvb1: fcp@fe92f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe92f000 0 0x200>; - clocks = <&cpg CPG_MOD 606>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 606>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 611>; - }; - - fcpvi1: fcp@fe9bf000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9bf000 0 0x200>; - clocks = <&cpg CPG_MOD 610>; - power-domains = <&sysc R8A774E1_PD_A3VP>; - resets = <&cpg 610>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 603>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 602>; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a774e1-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - csi20vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi20>; - }; - csi20vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi20>; - }; - csi20vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi20>; - }; - csi20vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi20>; - }; - csi20vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi20>; - }; - csi20vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi20>; - }; - csi20vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi20>; - }; - }; - }; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a774e1-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - }; - }; - }; - - hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a774e1-hdmi", - "renesas,rcar-gen3-hdmi"; - reg = <0 0xfead0000 0 0x10000>; - interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 729>, - <&cpg CPG_CORE R8A774E1_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 729>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dw_hdmi0_in: endpoint { - remote-endpoint = <&du_out_hdmi0>; - }; - }; - port@1 { - reg = <1>; - }; - port@2 { - /* HDMI sound */ - reg = <2>; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a774e1"; - reg = <0 0xfeb00000 0 0x80000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>; - clock-names = "du.0", "du.1", "du.3"; - resets = <&cpg 724>, <&cpg 722>; - reset-names = "du.0", "du.3"; - status = "disabled"; - - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - port@1 { - reg = <1>; - du_out_hdmi0: endpoint { - remote-endpoint = <&dw_hdmi0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a774e1-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - sustainable-power = <6313>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - sustainable-power = <6313>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - sustainable-power = <6313>; - - trips { - target: trip-point1 { - temperature = <100000>; - hysteresis = <1000>; - type = "passive"; - }; - - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a57_0 0 2>; - contribution = <1024>; - }; - - map1 { - trip = <&target>; - cooling-device = <&a53_0 0 2>; - contribution = <1024>; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a7790-lager.dts b/arch/arm/dts/r8a7790-lager.dts deleted file mode 100644 index 5ad5349a50d..00000000000 --- a/arch/arm/dts/r8a7790-lager.dts +++ /dev/null @@ -1,947 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Lager board - * - * Copyright (C) 2013-2014 Renesas Solutions Corp. - * Copyright (C) 2014 Cogent Embedded, Inc. - * Copyright (C) 2015-2016 Renesas Electronics Corporation - */ - -/* - * SSI-AK4643 - * - * SW1: 1: AK4643 - * 2: CN22 - * 3: ADV7511 - * - * This command is required when Playback/Capture - * - * amixer set "LINEOUT Mixer DACL" on - * amixer set "DVC Out" 100% - * amixer set "DVC In" 100% - * - * You can use Mute - * - * amixer set "DVC Out Mute" on - * amixer set "DVC In Mute" on - * - * You can use Volume Ramp - * - * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" - * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" - * amixer set "DVC Out Ramp" on - * aplay xxx.wav & - * amixer set "DVC Out" 80% // Volume Down - * amixer set "DVC Out" 100% // Volume Up - */ - -/dts-v1/; -#include "r8a7790.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Lager"; - compatible = "renesas,lager", "renesas,r8a7790"; - - aliases { - serial0 = &scif0; - serial1 = &scifa1; - i2c8 = &gpioi2c1; - i2c9 = &gpioi2c2; - i2c10 = &i2cexio0; - i2c11 = &i2cexio1; - i2c12 = &i2chdmi; - i2c13 = &i2cpwr; - mmc0 = &mmcif1; - mmc1 = &sdhi0; - mmc2 = &sdhi2; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - memory@140000000 { - device_type = "memory"; - reg = <1 0x40000000 0 0xc0000000>; - }; - - lbsc { - #address-cells = <1>; - #size-cells = <1>; - }; - - keyboard { - compatible = "gpio-keys"; - - pinctrl-0 = <&keyboard_pins>; - pinctrl-names = "default"; - - one { - linux,code = <KEY_1>; - label = "SW2-1"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; - }; - two { - linux,code = <KEY_2>; - label = "SW2-2"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; - }; - three { - linux,code = <KEY_3>; - label = "SW2-3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; - }; - four { - linux,code = <KEY_4>; - label = "SW2-4"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; - }; - }; - - leds { - compatible = "gpio-leds"; - led6 { - gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; - }; - led7 { - gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>; - }; - led8 { - gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; - }; - }; - - fixedregulator3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi2: regulator-vcc-sdhi2 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI2 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 25 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi2: regulator-vccq-sdhi2 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI2 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - audio_clock: audio_clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - rsnd_ak4643: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcodec>; - simple-audio-card,frame-master = <&sndcodec>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4643>; - clocks = <&audio_clock>; - }; - }; - - vga-encoder { - compatible = "adi,adv7123"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; - }; - }; - }; - - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; - }; - - hdmi-in { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&adv7612_in>; - }; - }; - }; - - cec_clock: cec-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <12000000>; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_out: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - x2_clk: x2-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - x13_clk: x13-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - gpioi2c1: i2c-8 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - gpioi2c2: i2c-9 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - /* - * IIC0/I2C0 is routed to EXIO connector A, pins 114 (SCL) + 116 (SDA) only. - * We use the I2C demuxer, so the desired IP core can be selected at runtime - * depending on the use case (e.g. DMA with IIC0 or slave support with I2C0). - * Note: For testing the I2C slave feature, it is convenient to connect this - * bus with IIC3 on pins 110 (SCL) + 112 (SDA), select I2C0 at runtime, and - * instantiate the slave device at runtime according to the documentation. - * You can then communicate with the slave via IIC3. - * - * IIC0/I2C0 does not appear to support fallback to GPIO. - */ - i2cexio0: i2c-10 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&iic0>, <&i2c0>; - i2c-bus-name = "i2c-exio0"; - #address-cells = <1>; - #size-cells = <0>; - }; - - /* - * IIC1/I2C1 is routed to EXIO connector A, pins 78 (SCL) + 80 (SDA). - * This is similar to the arangement described for i2cexio0 (above) - * with a fallback to GPIO also provided. - */ - i2cexio1: i2c-11 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&iic1>, <&i2c1>, <&gpioi2c1>; - i2c-bus-name = "i2c-exio1"; - #address-cells = <1>; - #size-cells = <0>; - }; - - /* - * IIC2 and I2C2 may be switched using pinmux. - * A fallback to GPIO is also provided. - */ - i2chdmi: i2c-12 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>; - i2c-bus-name = "i2c-hdmi"; - #address-cells = <1>; - #size-cells = <0>; - - ak4643: codec@12 { - compatible = "asahi-kasei,ak4643"; - #sound-dai-cells = <0>; - reg = <0x12>; - }; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin1ep0>; - }; - }; - }; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio1>; - interrupts = <15 IRQ_TYPE_LEVEL_LOW>; - clocks = <&cec_clock>; - clock-names = "cec"; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con_out>; - }; - }; - }; - }; - - hdmi-in@4c { - compatible = "adi,adv7612"; - reg = <0x4c>; - interrupt-parent = <&gpio1>; - interrupts = <20 IRQ_TYPE_LEVEL_LOW>; - default-input = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7612_in: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; - }; - - port@2 { - reg = <2>; - adv7612_out: endpoint { - remote-endpoint = <&vin0ep2>; - }; - }; - }; - }; - }; - - /* - * IIC3 and I2C3 may be switched using pinmux. - * IIC3/I2C3 does not appear to support fallback to GPIO. - */ - i2cpwr: i2c-13 { - compatible = "i2c-demux-pinctrl"; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq_pins>; - i2c-parent = <&iic3>, <&i2c3>; - i2c-bus-name = "i2c-pwr"; - #address-cells = <1>; - #size-cells = <0>; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; - - vdd_dvfs: regulator@68 { - compatible = "dlg,da9210"; - reg = <0x68>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, - <&x13_clk>, <&x2_clk>; - clock-names = "du.0", "du.1", "du.2", "dclkin.0", "dclkin.1"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7123_in>; - }; - }; - }; -}; - -&lvds0 { - status = "okay"; - - ports { - port@1 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; -}; - -&lvds1 { - ports { - port@1 { - lvds_connector: endpoint { - }; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - du_pins: du { - groups = "du_rgb666", "du_sync_1", "du_clk_out_0"; - function = "du"; - }; - - scif0_pins: scif0 { - groups = "scif0_data"; - function = "scif0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq0"; - function = "intc"; - }; - - scifa1_pins: scifa1 { - groups = "scifa1_data"; - function = "scifa1"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - mmc1_pins: mmc1 { - groups = "mmc1_data8", "mmc1_ctrl"; - function = "mmc1"; - }; - - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; - - msiof1_pins: msiof1 { - groups = "msiof1_clk", "msiof1_sync", "msiof1_rx", - "msiof1_tx"; - function = "msiof1"; - }; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - iic0_pins: iic0 { - groups = "iic0"; - function = "iic0"; - }; - - i2c1_pins: i2c1 { - groups = "i2c1"; - function = "i2c1"; - }; - - iic1_pins: iic1 { - groups = "iic1"; - function = "iic1"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2"; - function = "i2c2"; - }; - - iic2_pins: iic2 { - groups = "iic2"; - function = "iic2"; - }; - - i2c3_pins: i2c3 { - groups = "i2c3"; - function = "i2c3"; - }; - - iic3_pins: iic3 { - groups = "iic3"; - function = "iic3"; - }; - - pmic_irq_pins: pmicirq { - groups = "intc_irq2"; - function = "intc"; - }; - - hsusb_pins: hsusb { - groups = "usb0_ovc_vbus"; - function = "usb0"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; - - usb2_pins: usb2 { - groups = "usb2"; - function = "usb2"; - }; - - vin0_pins: vin0 { - groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk"; - function = "vin0"; - }; - - vin1_pins: vin1 { - groups = "vin1_data8", "vin1_clk"; - function = "vin1"; - }; - - sound_pins: sound { - groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; - function = "ssi"; - }; - - sound_clk_pins: sound_clk { - groups = "audio_clk_a"; - function = "audio_clk"; - }; - - keyboard_pins: keyboard { - pins = "GP_1_14", "GP_1_24", "GP_1_26", "GP_1_28"; - bias-pull-up; - }; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>; - }; -}; - -&cmt0 { - status = "okay"; -}; - -&mmcif1 { - pinctrl-0 = <&mmc1_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&fixedregulator3v3>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sata1 { - status = "okay"; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash: flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-cpha; - spi-cpol; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition@40000 { - label = "user"; - reg = <0x00040000 0x00400000>; - read-only; - }; - partition@440000 { - label = "flash"; - reg = <0x00440000 0x03bc0000>; - }; - }; - }; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scifa1 { - pinctrl-0 = <&scifa1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&msiof1 { - pinctrl-0 = <&msiof1_pins>; - pinctrl-names = "default"; - - status = "okay"; - - pmic: pmic@0 { - compatible = "renesas,r2a11302ft"; - reg = <0>; - spi-max-frequency = <6000000>; - spi-cpol; - spi-cpha; - }; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; - sd-uhs-sdr50; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdhi2 { - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi2>; - vqmmc-supply = <&vccq_sdhi2>; - cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; - sd-uhs-sdr50; - status = "okay"; -}; - -&cpu0 { - cpu0-supply = <&vdd_dvfs>; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "i2c-exio0"; -}; - -&iic0 { - pinctrl-0 = <&iic0_pins>; - pinctrl-names = "i2c-exio0"; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "i2c-exio1"; -}; - -&iic1 { - pinctrl-0 = <&iic1_pins>; - pinctrl-names = "i2c-exio1"; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "i2c-hdmi"; - - clock-frequency = <100000>; -}; - -&iic2 { - pinctrl-0 = <&iic2_pins>; - pinctrl-names = "i2c-hdmi"; - - clock-frequency = <100000>; -}; - -&i2c3 { - pinctrl-0 = <&i2c3_pins>; - pinctrl-names = "i2c-pwr"; -}; - -&iic3 { - pinctrl-0 = <&iic3_pins>; - pinctrl-names = "i2c-pwr"; -}; - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; - -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - -&xhci { - status = "okay"; - pinctrl-0 = <&usb2_pins>; - pinctrl-names = "default"; -}; - -&pci2 { - status = "okay"; - pinctrl-0 = <&usb2_pins>; - pinctrl-names = "default"; -}; - -&hsusb { - status = "okay"; - pinctrl-0 = <&hsusb_pins>; - pinctrl-names = "default"; - renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>; -}; - -&usbphy { - status = "okay"; -}; - -/* HDMI video input */ -&vin0 { - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - port { - vin0ep2: endpoint { - remote-endpoint = <&adv7612_out>; - bus-width = <24>; - hsync-active = <0>; - vsync-active = <0>; - pclk-sample = <1>; - data-active = <1>; - }; - }; -}; - -/* composite video input */ -&vin1 { - pinctrl-0 = <&vin1_pins>; - pinctrl-names = "default"; - - status = "okay"; - - port { - vin1ep0: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - status = "okay"; - - rcar_sound,dai { - dai0 { - playback = <&ssi0>, <&src2>, <&dvc0>; - capture = <&ssi1>, <&src3>, <&dvc1>; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; diff --git a/arch/arm/dts/r8a7790-stout.dts b/arch/arm/dts/r8a7790-stout.dts deleted file mode 100644 index fe14727eefe..00000000000 --- a/arch/arm/dts/r8a7790-stout.dts +++ /dev/null @@ -1,382 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Stout board - * - * Copyright (C) 2018 Marek Vasut <marek.vasut(a)gmail.com> - */ - -/dts-v1/; -#include "r8a7790.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Stout"; - compatible = "renesas,stout", "renesas,r8a7790"; - - aliases { - serial0 = &scifa0; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - leds { - compatible = "gpio-leds"; - led1 { - gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; - }; - led2 { - gpios = <&gpio4 23 GPIO_ACTIVE_LOW>; - }; - led3 { - gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; - }; - led5 { - gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; - }; - }; - - fixedregulator3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_out: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - osc1_clk: osc1-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - osc4_clk: osc4-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <12000000>; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>, - <&osc1_clk>; - clock-names = "du.0", "du.1", "du.2", "dclkin.0"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; -}; - -&lvds0 { - ports { - port@1 { - lvds_connector0: endpoint { - }; - }; - }; -}; - -&lvds1 { - ports { - port@1 { - lvds_connector1: endpoint { - }; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - du_pins: du { - groups = "du_rgb888", "du_sync_1", "du_clk_out_0"; - function = "du"; - }; - - scifa0_pins: scifa0 { - groups = "scifa0_data_b"; - function = "scifa0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq1"; - function = "intc"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; - - iic2_pins: iic2 { - groups = "iic2_b"; - function = "iic2"; - }; - - iic3_pins: iic3 { - groups = "iic3"; - function = "iic3"; - }; - - pmic_irq_pins: pmicirq { - groups = "intc_irq2"; - function = "intc"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; - }; -}; - -&cmt0 { - status = "okay"; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash: flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-cpha; - spi-cpol; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@80000 { - label = "uboot"; - reg = <0x00080000 0x00040000>; - read-only; - }; - partition@c0000 { - label = "uboot-env"; - reg = <0x000c0000 0x00040000>; - read-only; - }; - partition@100000 { - label = "flash"; - reg = <0x00100000 0x03f00000>; - }; - }; - }; -}; - -&scifa0 { - pinctrl-0 = <&scifa0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi0>; - cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&cpu0 { - cpu0-supply = <&vdd_dvfs>; -}; - -&iic2 { - status = "okay"; - pinctrl-0 = <&iic2_pins>; - pinctrl-names = "default"; - - clock-frequency = <100000>; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio1>; - interrupts = <15 IRQ_TYPE_LEVEL_LOW>; - clocks = <&osc4_clk>; - clock-names = "cec"; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con_out>; - }; - }; - }; - }; -}; - -&iic3 { - pinctrl-names = "default"; - pinctrl-0 = <&iic3_pins>, <&pmic_irq_pins>; - status = "okay"; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - onkey { - compatible = "dlg,da9063-onkey"; - }; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; - - vdd_dvfs: regulator@68 { - compatible = "dlg,da9210"; - reg = <0x68>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; - - vdd: regulator@70 { - compatible = "dlg,da9210"; - reg = <0x70>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; - -&usbphy { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a7790.dtsi b/arch/arm/dts/r8a7790.dtsi deleted file mode 100644 index 46fb81f5062..00000000000 --- a/arch/arm/dts/r8a7790.dtsi +++ /dev/null @@ -1,1965 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car H2 (R8A77900) SoC - * - * Copyright (C) 2015 Renesas Electronics Corporation - * Copyright (C) 2013-2014 Renesas Solutions Corp. - * Copyright (C) 2014 Cogent Embedded Inc. - */ - -#include <dt-bindings/clock/r8a7790-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/power/r8a7790-sysc.h> - -/ { - compatible = "renesas,r8a7790"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &iic0; - i2c5 = &iic1; - i2c6 = &iic2; - i2c7 = &iic3; - spi0 = &qspi; - spi1 = &msiof0; - spi2 = &msiof1; - spi3 = &msiof2; - spi4 = &msiof3; - vin0 = &vin0; - vin1 = &vin1; - vin2 = &vin2; - vin3 = &vin3; - }; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - clock-frequency = <1300000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; - power-domains = <&sysc R8A7790_PD_CA15_CPU0>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - capacity-dmips-mhz = <1024>; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1400000 1000000>, - <1225000 1000000>, - <1050000 1000000>, - < 875000 1000000>, - < 700000 1000000>, - < 350000 1000000>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - clock-frequency = <1300000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; - power-domains = <&sysc R8A7790_PD_CA15_CPU1>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - capacity-dmips-mhz = <1024>; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1400000 1000000>, - <1225000 1000000>, - <1050000 1000000>, - < 875000 1000000>, - < 700000 1000000>, - < 350000 1000000>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - clock-frequency = <1300000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; - power-domains = <&sysc R8A7790_PD_CA15_CPU2>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - capacity-dmips-mhz = <1024>; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1400000 1000000>, - <1225000 1000000>, - <1050000 1000000>, - < 875000 1000000>, - < 700000 1000000>, - < 350000 1000000>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - clock-frequency = <1300000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z>; - power-domains = <&sysc R8A7790_PD_CA15_CPU3>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - capacity-dmips-mhz = <1024>; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1400000 1000000>, - <1225000 1000000>, - <1050000 1000000>, - < 875000 1000000>, - < 700000 1000000>, - < 350000 1000000>; - }; - - cpu4: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - clock-frequency = <780000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; - power-domains = <&sysc R8A7790_PD_CA7_CPU0>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA7>; - capacity-dmips-mhz = <539>; - }; - - cpu5: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x101>; - clock-frequency = <780000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; - power-domains = <&sysc R8A7790_PD_CA7_CPU1>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA7>; - capacity-dmips-mhz = <539>; - }; - - cpu6: cpu@102 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x102>; - clock-frequency = <780000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; - power-domains = <&sysc R8A7790_PD_CA7_CPU2>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA7>; - capacity-dmips-mhz = <539>; - }; - - cpu7: cpu@103 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x103>; - clock-frequency = <780000000>; - clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>; - power-domains = <&sysc R8A7790_PD_CA7_CPU3>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA7>; - capacity-dmips-mhz = <539>; - }; - - L2_CA15: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A7790_PD_CA15_SCU>; - cache-unified; - cache-level = <2>; - }; - - L2_CA7: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A7790_PD_CA7_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - /* External root clock */ - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu-0 { - compatible = "arm,cortex-a15-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - pmu-1 { - compatible = "arm,cortex-a7-pmu"; - interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; - }; - - /* External SCIF clock */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7790-wdt", - "renesas,rcar-gen2-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7790", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7790", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 30>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7790", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 30>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7790", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7790", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7790", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7790"; - reg = <0 0xe6060000 0 0x250>; - }; - - tpu: pwm@e60f0000 { - compatible = "renesas,tpu-r8a7790", "renesas,tpu"; - reg = <0 0xe60f0000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7790-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&usb_extal_clk>; - clock-names = "extal", "usb_extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - apmu@e6151000 { - compatible = "renesas,r8a7790-apmu", "renesas,apmu"; - reg = <0 0xe6151000 0 0x188>; - cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; - }; - - apmu@e6152000 { - compatible = "renesas,r8a7790-apmu", "renesas,apmu"; - reg = <0 0xe6152000 0 0x188>; - cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7790-rst"; - reg = <0 0xe6160000 0 0x0100>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7790-sysc"; - reg = <0 0xe6180000 0 0x0200>; - #power-domain-cells = <1>; - }; - - irqc0: interrupt-controller@e61c0000 { - compatible = "renesas,irqc-r8a7790", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - thermal: thermal@e61f0000 { - compatible = "renesas,thermal-r8a7790", - "renesas,rcar-gen2-thermal", - "renesas,rcar-thermal"; - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - ipmmu_sy0: iommu@e6280000 { - compatible = "renesas,ipmmu-r8a7790", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6280000 0 0x1000>; - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_sy1: iommu@e6290000 { - compatible = "renesas,ipmmu-r8a7790", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6290000 0 0x1000>; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_ds: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a7790", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6740000 0 0x1000>; - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mp: iommu@ec680000 { - compatible = "renesas,ipmmu-r8a7790", - "renesas,ipmmu-vmsa"; - reg = <0 0xec680000 0 0x1000>; - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mx: iommu@fe951000 { - compatible = "renesas,ipmmu-r8a7790", - "renesas,ipmmu-vmsa"; - reg = <0 0xfe951000 0 0x1000>; - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a7790", - "renesas,ipmmu-vmsa"; - reg = <0 0xffc80000 0 0x1000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - icram0: sram@e63a0000 { - compatible = "mmio-sram"; - reg = <0 0xe63a0000 0 0x12000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63a0000 0x12000>; - }; - - icram1: sram@e63c0000 { - compatible = "mmio-sram"; - reg = <0 0xe63c0000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63c0000 0x1000>; - - smp-sram@0 { - compatible = "renesas,smp-sram"; - reg = <0 0x100>; - }; - }; - - i2c0: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 931>; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6518000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6518000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 930>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6530000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6530000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 929>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e6540000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7790", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6540000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 928>; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - iic0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7790", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6500000 0 0x425>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - dmas = <&dmac0 0x61>, <&dmac0 0x62>, - <&dmac1 0x61>, <&dmac1 0x62>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 318>; - status = "disabled"; - }; - - iic1: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7790", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6510000 0 0x425>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 323>; - dmas = <&dmac0 0x65>, <&dmac0 0x66>, - <&dmac1 0x65>, <&dmac1 0x66>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 323>; - status = "disabled"; - }; - - iic2: i2c@e6520000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7790", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6520000 0 0x425>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - dmas = <&dmac0 0x69>, <&dmac0 0x6a>, - <&dmac1 0x69>, <&dmac1 0x6a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - iic3: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7790", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - dmas = <&dmac0 0x77>, <&dmac0 0x78>, - <&dmac1 0x77>, <&dmac1 0x78>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 926>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7790", - "renesas,rcar-gen2-usbhs"; - reg = <0 0xe6590000 0 0x100>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 704>; - renesas,buswait = <4>; - phys = <&usb0 1>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: usb-phy-controller@e6590100 { - compatible = "renesas,usb-phy-r8a7790", - "renesas,rcar-gen2-usb-phy"; - reg = <0 0xe6590100 0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cpg CPG_MOD 704>; - clock-names = "usbhs"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 704>; - status = "disabled"; - - usb0: usb-phy@0 { - reg = <0>; - #phy-cells = <1>; - }; - usb2: usb-phy@2 { - reg = <2>; - #phy-cells = <1>; - }; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a7790-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a7790-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7790", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - dmac1: dma-controller@e6720000 { - compatible = "renesas,dmac-r8a7790", - "renesas,rcar-dmac"; - reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7790", - "renesas,etheravb-rcar-gen2"; - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 812>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - qspi: spi@e6b10000 { - compatible = "renesas,qspi-r8a7790", "renesas,qspi"; - reg = <0 0xe6b10000 0 0x2c>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - dmas = <&dmac0 0x17>, <&dmac0 0x18>, - <&dmac1 0x17>, <&dmac1 0x18>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 917>; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7790", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>; - clock-names = "fck"; - dmas = <&dmac0 0x21>, <&dmac0 0x22>, - <&dmac1 0x21>, <&dmac1 0x22>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7790", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>; - clock-names = "fck"; - dmas = <&dmac0 0x25>, <&dmac0 0x26>, - <&dmac1 0x25>, <&dmac1 0x26>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7790", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c60000 0 64>; - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>; - clock-names = "fck"; - dmas = <&dmac0 0x27>, <&dmac0 0x28>, - <&dmac1 0x27>, <&dmac1 0x28>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7790", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c20000 0 0x100>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>; - clock-names = "fck"; - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, - <&dmac1 0x3d>, <&dmac1 0x3e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7790", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c30000 0 0x100>; - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>; - clock-names = "fck"; - dmas = <&dmac0 0x19>, <&dmac0 0x1a>, - <&dmac1 0x19>, <&dmac1 0x1a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7790", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6ce0000 0 0x100>; - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 216>; - clock-names = "fck"; - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, - <&dmac1 0x1d>, <&dmac1 0x1e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 216>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7790", - "renesas,rcar-gen2-scif", - "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 721>, - <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x29>, <&dmac0 0x2a>, - <&dmac1 0x29>, <&dmac1 0x2a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 721>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7790", - "renesas,rcar-gen2-scif", - "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 720>, - <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, - <&dmac1 0x2d>, <&dmac1 0x2e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 720>; - status = "disabled"; - }; - - scif2: serial@e6e56000 { - compatible = "renesas,scif-r8a7790", - "renesas,rcar-gen2-scif", - "renesas,scif"; - reg = <0 0xe6e56000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, - <&dmac1 0x2b>, <&dmac1 0x2c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7790", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c0000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>, - <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x3a>, - <&dmac1 0x39>, <&dmac1 0x3a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7790", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c8000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>, - <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, - <&dmac1 0x4d>, <&dmac1 0x4e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - msiof0: spi@e6e20000 { - compatible = "renesas,msiof-r8a7790", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e20000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 0>; - dmas = <&dmac0 0x51>, <&dmac0 0x52>, - <&dmac1 0x51>, <&dmac1 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6e10000 { - compatible = "renesas,msiof-r8a7790", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e10000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x55>, <&dmac0 0x56>, - <&dmac1 0x55>, <&dmac1 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6e00000 { - compatible = "renesas,msiof-r8a7790", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 205>; - dmas = <&dmac0 0x41>, <&dmac0 0x42>, - <&dmac1 0x41>, <&dmac1 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 205>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c90000 { - compatible = "renesas,msiof-r8a7790", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6c90000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 215>; - dmas = <&dmac0 0x45>, <&dmac0 0x46>, - <&dmac1 0x45>, <&dmac1 0x46>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 215>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - can0: can@e6e80000 { - compatible = "renesas,can-r8a7790", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e80000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6e88000 { - compatible = "renesas,can-r8a7790", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e88000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7790", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 811>; - status = "disabled"; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7790", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 810>; - status = "disabled"; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a7790", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 809>; - status = "disabled"; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a7790", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 808>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a7790", - "renesas,rcar_sound-gen2"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A7790_CLK_M2>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "ctu.0", "ctu.1", - "mix.0", "mix.1", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>, - <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>, - <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>, - <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>, - <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>, - <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>, - <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>, - <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>, - <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>, - <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>, - <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a7790", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a7790", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - xhci: usb@ee000000 { - compatible = "renesas,xhci-r8a7790", - "renesas,rcar-gen2-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 328>; - phys = <&usb2 1>; - phy-names = "usb"; - status = "disabled"; - }; - - pci0: pci@ee090000 { - compatible = "renesas,pci-r8a7790", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - reg = <0 0xee090000 0 0xc00>, - <0 0xee080000 0 0x1100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - - bus-range = <0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x800 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x1000 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - }; - - pci1: pci@ee0b0000 { - compatible = "renesas,pci-r8a7790", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - reg = <0 0xee0b0000 0 0xc00>, - <0 0xee0a0000 0 0x1100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - - bus-range = <1 1>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - }; - - pci2: pci@ee0d0000 { - compatible = "renesas,pci-r8a7790", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 703>; - reg = <0 0xee0d0000 0 0xc00>, - <0 0xee0c0000 0 0x1100>; - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - - bus-range = <2 2>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x20800 0 0 0 0>; - phys = <&usb2 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x21000 0 0 0 0>; - phys = <&usb2 0>; - phy-names = "usb"; - }; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7790", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee100000 0 0x328>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; - dmas = <&dmac0 0xcd>, <&dmac0 0xce>, - <&dmac1 0xcd>, <&dmac1 0xce>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <195000000>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a7790", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee120000 0 0x328>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>; - dmas = <&dmac0 0xc9>, <&dmac0 0xca>, - <&dmac1 0xc9>, <&dmac1 0xca>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <195000000>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 313>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a7790", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee140000 0 0x100>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, - <&dmac1 0xc1>, <&dmac1 0xc2>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a7790", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee160000 0 0x100>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, - <&dmac1 0xd3>, <&dmac1 0xd4>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - mmcif0: mmc@ee200000 { - compatible = "renesas,mmcif-r8a7790", - "renesas,sh-mmcif"; - reg = <0 0xee200000 0 0x80>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 315>; - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, - <&dmac1 0xd1>, <&dmac1 0xd2>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 315>; - reg-io-width = <4>; - status = "disabled"; - max-frequency = <97500000>; - }; - - mmcif1: mmc@ee220000 { - compatible = "renesas,mmcif-r8a7790", - "renesas,sh-mmcif"; - reg = <0 0xee220000 0 0x80>; - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 305>; - dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, - <&dmac1 0xe1>, <&dmac1 0xe2>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 305>; - reg-io-width = <4>; - status = "disabled"; - max-frequency = <97500000>; - }; - - sata0: sata@ee300000 { - compatible = "renesas,sata-r8a7790", - "renesas,rcar-gen2-sata"; - reg = <0 0xee300000 0 0x200000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 815>; - status = "disabled"; - }; - - sata1: sata@ee500000 { - compatible = "renesas,sata-r8a7790", - "renesas,rcar-gen2-sata"; - reg = <0 0xee500000 0 0x200000>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 814>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 814>; - status = "disabled"; - }; - - ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7790", - "renesas,rcar-gen2-ether"; - reg = <0 0xee700000 0 0x400>; - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 813>; - phy-mode = "rmii"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1001000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, - <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec: pcie@fe000000 { - compatible = "renesas,pcie-r8a7790", - "renesas,pcie-rcar-gen2"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, - <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 319>; - status = "disabled"; - }; - - vsp@fe920000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe920000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 130>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 130>; - }; - - vsp@fe928000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe928000 0 0x8000>; - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 131>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 131>; - }; - - vsp@fe930000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe930000 0 0x8000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 128>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 128>; - }; - - vsp@fe938000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe938000 0 0x8000>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 127>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 127>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 119>; - }; - - fdp1@fe944000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe944000 0 0x2400>; - interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 118>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 118>; - }; - - fdp1@fe948000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe948000 0 0x2400>; - interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 117>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 117>; - }; - - jpu: jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7790", - "renesas,rcar-gen2-jpu"; - reg = <0 0xfe980000 0 0x10300>; - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 106>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 106>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7790"; - reg = <0 0xfeb00000 0 0x70000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>; - clock-names = "du.0", "du.1", "du.2"; - resets = <&cpg 724>; - reset-names = "du.0"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_rgb: endpoint { - }; - }; - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_lvds1: endpoint { - remote-endpoint = <&lvds1_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a7790-lvds"; - reg = <0 0xfeb90000 0 0x1c>; - clocks = <&cpg CPG_MOD 726>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 726>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - lvds0_out: endpoint { - }; - }; - }; - }; - - lvds1: lvds@feb94000 { - compatible = "renesas,r8a7790-lvds"; - reg = <0 0xfeb94000 0 0x1c>; - clocks = <&cpg CPG_MOD 725>; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 725>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds1_in: endpoint { - remote-endpoint = <&du_out_lvds1>; - }; - }; - port@1 { - reg = <1>; - lvds1_out: endpoint { - }; - }; - }; - }; - - prr: chipid@ff000044 { - compatible = "renesas,prr"; - reg = <0 0xff000044 0 4>; - }; - - cmt0: timer@ffca0000 { - compatible = "renesas,r8a7790-cmt0", - "renesas,rcar-gen2-cmt0"; - reg = <0 0xffca0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 124>; - - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7790-cmt1", - "renesas,rcar-gen2-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 329>; - clock-names = "fck"; - power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; - resets = <&cpg 329>; - - status = "disabled"; - }; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - - thermal-sensors = <&thermal>; - - trips { - cpu-crit { - temperature = <95000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - }; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clock - can be overridden by the board */ - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <48000000>; - }; -}; diff --git a/arch/arm/dts/r8a7791-koelsch.dts b/arch/arm/dts/r8a7791-koelsch.dts deleted file mode 100644 index 26a40782cc8..00000000000 --- a/arch/arm/dts/r8a7791-koelsch.dts +++ /dev/null @@ -1,912 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Koelsch board - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013-2014 Renesas Solutions Corp. - * Copyright (C) 2014 Cogent Embedded, Inc. - */ - -/* - * SSI-AK4643 - * - * SW1: 1: AK4643 - * 2: CN22 - * 3: ADV7511 - * - * This command is required when Playback/Capture - * - * amixer set "LINEOUT Mixer DACL" on - * amixer set "DVC Out" 100% - * amixer set "DVC In" 100% - * - * You can use Mute - * - * amixer set "DVC Out Mute" on - * amixer set "DVC In Mute" on - * - * You can use Volume Ramp - * - * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" - * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" - * amixer set "DVC Out Ramp" on - * aplay xxx.wav & - * amixer set "DVC Out" 80% // Volume Down - * amixer set "DVC Out" 100% // Volume Up - */ - -/dts-v1/; -#include "r8a7791.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Koelsch"; - compatible = "renesas,koelsch", "renesas,r8a7791"; - - aliases { - serial0 = &scif0; - serial1 = &scif1; - i2c9 = &gpioi2c1; - i2c10 = &gpioi2c2; - i2c11 = &gpioi2c4; - i2c12 = &i2cexio1; - i2c13 = &i2chdmi; - i2c14 = &i2cexio4; - mmc0 = &sdhi0; - mmc1 = &sdhi1; - mmc2 = &sdhi2; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - memory@200000000 { - device_type = "memory"; - reg = <2 0x00000000 0 0x40000000>; - }; - - lbsc { - #address-cells = <1>; - #size-cells = <1>; - }; - - keyboard { - compatible = "gpio-keys"; - - pinctrl-0 = <&keyboard_pins>; - pinctrl-names = "default"; - - key-1 { - gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_1>; - label = "SW2-1"; - wakeup-source; - debounce-interval = <20>; - }; - key-2 { - gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_2>; - label = "SW2-2"; - wakeup-source; - debounce-interval = <20>; - }; - key-3 { - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_3>; - label = "SW2-3"; - wakeup-source; - debounce-interval = <20>; - }; - key-4 { - gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; - linux,code = <KEY_4>; - label = "SW2-4"; - wakeup-source; - debounce-interval = <20>; - }; - key-a { - gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_A>; - label = "SW30"; - wakeup-source; - debounce-interval = <20>; - }; - key-b { - gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_B>; - label = "SW31"; - wakeup-source; - debounce-interval = <20>; - }; - key-c { - gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_C>; - label = "SW32"; - wakeup-source; - debounce-interval = <20>; - }; - key-d { - gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; - linux,code = <KEY_D>; - label = "SW33"; - wakeup-source; - debounce-interval = <20>; - }; - key-e { - gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; - linux,code = <KEY_E>; - label = "SW34"; - wakeup-source; - debounce-interval = <20>; - }; - key-f { - gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; - linux,code = <KEY_F>; - label = "SW35"; - wakeup-source; - debounce-interval = <20>; - }; - key-g { - gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; - linux,code = <KEY_G>; - label = "SW36"; - wakeup-source; - debounce-interval = <20>; - }; - }; - - leds { - compatible = "gpio-leds"; - led6 { - gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; - label = "LED6"; - }; - led7 { - gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; - label = "LED7"; - }; - led8 { - gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; - label = "LED8"; - }; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio7 17 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi1: regulator-vcc-sdhi1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI1 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio7 18 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi1: regulator-vccq-sdhi1 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI1 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi2: regulator-vcc-sdhi2 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI2 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio7 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi2: regulator-vccq-sdhi2 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI2 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - audio_clock: audio_clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - rsnd_ak4643: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcodec>; - simple-audio-card,frame-master = <&sndcodec>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4643>; - clocks = <&audio_clock>; - }; - }; - - hdmi-in { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&adv7612_in>; - }; - }; - }; - - cec_clock: cec-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <12000000>; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_out: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - x2_clk: x2-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - x13_clk: x13-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - gpioi2c1: i2c-9 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio7 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio7 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - gpioi2c2: i2c-10 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - gpioi2c4: i2c-11 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio7 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio7 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - /* - * I2C1 is routed to EXIO connector B, pins 64 (SCL) + 66 (SDA). - * A fallback to GPIO is provided. - */ - i2cexio1: i2c-12 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c1>, <&gpioi2c1>; - i2c-bus-name = "i2c-exio1"; - #address-cells = <1>; - #size-cells = <0>; - }; - - /* - * A fallback to GPIO is provided for I2C2. - */ - i2chdmi: i2c-13 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c2>, <&gpioi2c2>; - i2c-bus-name = "i2c-hdmi"; - #address-cells = <1>; - #size-cells = <0>; - - ak4643: codec@12 { - compatible = "asahi-kasei,ak4643"; - #sound-dai-cells = <0>; - reg = <0x12>; - }; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin1ep>; - }; - }; - }; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio3>; - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - clocks = <&cec_clock>; - clock-names = "cec"; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con_out>; - }; - }; - }; - }; - - hdmi-in@4c { - compatible = "adi,adv7612"; - reg = <0x4c>; - interrupt-parent = <&gpio4>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - default-input = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7612_in: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; - }; - - port@2 { - reg = <2>; - adv7612_out: endpoint { - remote-endpoint = <&vin0ep2>; - }; - }; - }; - }; - - eeprom@50 { - compatible = "renesas,r1ex24002", "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - }; - - /* - * I2C4 is routed to EXIO connector E, pins 37 (SCL) + 39 (SDA). - * A fallback to GPIO is provided. - */ - i2cexio4: i2c-14 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c4>, <&gpioi2c4>; - i2c-bus-name = "i2c-exio4"; - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&x13_clk>, <&x2_clk>; - clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; -}; - -&lvds0 { - ports { - port@1 { - lvds_connector: endpoint { - }; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - i2c1_pins: i2c1 { - groups = "i2c1"; - function = "i2c1"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2"; - function = "i2c2"; - }; - - i2c4_pins: i2c4 { - groups = "i2c4_c"; - function = "i2c4"; - }; - - du_pins: du { - groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; - function = "du"; - }; - - scif0_pins: scif0 { - groups = "scif0_data_d"; - function = "scif0"; - }; - - scif1_pins: scif1 { - groups = "scif1_data_d"; - function = "scif1"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq0"; - function = "intc"; - }; - - pmic_irq_pins: pmicirq { - groups = "intc_irq2"; - function = "intc"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi1_pins: sd1 { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - power-source = <3300>; - }; - - sdhi1_pins_uhs: sd1_uhs { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; - - msiof0_pins: msiof0 { - groups = "msiof0_clk", "msiof0_sync", "msiof0_rx", - "msiof0_tx"; - function = "msiof0"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; - - vin0_pins: vin0 { - groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk"; - function = "vin0"; - }; - - vin1_pins: vin1 { - groups = "vin1_data8", "vin1_clk"; - function = "vin1"; - }; - - sound_pins: sound { - groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; - function = "ssi"; - }; - - sound_clk_pins: sound_clk { - groups = "audio_clk_a"; - function = "audio_clk"; - }; - - keyboard_pins: keyboard { - pins = "GP_5_0", "GP_5_1", "GP_5_2", "GP_5_3"; - bias-pull-up; - }; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; - }; -}; - -&cmt0 { - status = "okay"; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&sata0 { - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif1 { - pinctrl-0 = <&scif1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - sd-uhs-sdr50; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdhi1 { - pinctrl-0 = <&sdhi1_pins>; - pinctrl-1 = <&sdhi1_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi1>; - vqmmc-supply = <&vccq_sdhi1>; - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi2>; - vqmmc-supply = <&vccq_sdhi2>; - cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; - sd-uhs-sdr50; - status = "okay"; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash: flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-cpha; - spi-cpol; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@80000 { - label = "user"; - reg = <0x00080000 0x00580000>; - read-only; - }; - partition@600000 { - label = "flash"; - reg = <0x00600000 0x03a00000>; - }; - }; - }; -}; - -&msiof0 { - pinctrl-0 = <&msiof0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - pmic: pmic@0 { - compatible = "renesas,r2a11302ft"; - reg = <0>; - spi-max-frequency = <6000000>; - spi-cpol; - spi-cpha; - }; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "i2c-exio1"; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "i2c-hdmi"; - - clock-frequency = <100000>; -}; - -&i2c4 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "i2c-exio4"; -}; - -&i2c6 { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq_pins>; - status = "okay"; - clock-frequency = <100000>; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; - - vdd_dvfs: regulator@68 { - compatible = "dlg,da9210"; - reg = <0x68>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; - -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - -&hsusb { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>; -}; - -&usbphy { - status = "okay"; -}; - -&pcie_bus_clk { - clock-frequency = <100000000>; -}; - -&pciec { - status = "okay"; -}; - -&cpu0 { - cpu0-supply = <&vdd_dvfs>; -}; - -/* HDMI video input */ -&vin0 { - status = "okay"; - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - port { - vin0ep2: endpoint { - remote-endpoint = <&adv7612_out>; - bus-width = <24>; - hsync-active = <0>; - vsync-active = <0>; - pclk-sample = <1>; - data-active = <1>; - }; - }; -}; - -/* composite video input */ -&vin1 { - status = "okay"; - pinctrl-0 = <&vin1_pins>; - pinctrl-names = "default"; - - port { - vin1ep: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - status = "okay"; - - rcar_sound,dai { - dai0 { - playback = <&ssi0>, <&src2>, <&dvc0>; - capture = <&ssi1>, <&src3>, <&dvc1>; - }; - }; -}; - -&ssi1 { - shared-pin; -}; diff --git a/arch/arm/dts/r8a7791-porter.dts b/arch/arm/dts/r8a7791-porter.dts deleted file mode 100644 index ec0a20d5130..00000000000 --- a/arch/arm/dts/r8a7791-porter.dts +++ /dev/null @@ -1,523 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Porter board - * - * Copyright (C) 2015 Cogent Embedded, Inc. - */ - -/* - * SSI-AK4642 - * - * JP3: 2-1: AK4642 - * 2-3: ADV7511 - * - * This command is required before playback/capture: - * - * amixer set "LINEOUT Mixer DACL" on - */ - -/dts-v1/; -#include "r8a7791.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Porter"; - compatible = "renesas,porter", "renesas,r8a7791"; - - aliases { - serial0 = &scif0; - i2c9 = &gpioi2c2; - i2c10 = &i2chdmi; - mmc0 = &sdhi0; - mmc1 = &sdhi2; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - memory@200000000 { - device_type = "memory"; - reg = <2 0x00000000 0 0x40000000>; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi2: regulator-vcc-sdhi2 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI2 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vccq_sdhi2: regulator-vccq-sdhi2 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI2 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - x3_clk: x3-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - x16_clk: x16-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - x14_clk: audio_clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&soundcodec>; - simple-audio-card,frame-master = <&soundcodec>; - - simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - soundcodec: simple-audio-card,codec { - sound-dai = <&ak4642>; - clocks = <&x14_clk>; - }; - }; - - gpioi2c2: i2c-9 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - /* - * A fallback to GPIO is provided for I2C2. - */ - i2chdmi: i2c-10 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c2>, <&gpioi2c2>; - i2c-bus-name = "i2c-hdmi"; - #address-cells = <1>; - #size-cells = <0>; - - ak4642: codec@12 { - compatible = "asahi-kasei,ak4642"; - #sound-dai-cells = <0>; - reg = <0x12>; - }; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin0ep>; - }; - }; - }; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio3>; - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - scif0_pins: scif0 { - groups = "scif0_data_d"; - function = "scif0"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq0"; - function = "intc"; - }; - - pmic_irq_pins: pmicirq { - groups = "intc_irq2"; - function = "intc"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - }; - - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; - - i2c2_pins: i2c2 { - groups = "i2c2"; - function = "i2c2"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; - - vin0_pins: vin0 { - groups = "vin0_data8", "vin0_clk"; - function = "vin0"; - }; - - can0_pins: can0 { - groups = "can0_data"; - function = "can0"; - }; - - du_pins: du { - groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; - function = "du"; - }; - - ssi_pins: sound { - groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; - function = "ssi"; - }; - - audio_clk_pins: audio_clk { - groups = "audio_clk_a"; - function = "audio_clk"; - }; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; - }; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&sdhi2 { - pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi2>; - vqmmc-supply = <&vccq_sdhi2>; - cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader_prg"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition@40000 { - label = "user_prg"; - reg = <0x00040000 0x00400000>; - read-only; - }; - partition@440000 { - label = "flash_fs"; - reg = <0x00440000 0x03bc0000>; - }; - }; - }; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "i2c-hdmi"; - - clock-frequency = <400000>; -}; - -&i2c6 { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq_pins>; - status = "okay"; - clock-frequency = <100000>; - - pmic@5a { - compatible = "dlg,da9063l"; - reg = <0x5a>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; - - vdd_dvfs: regulator@68 { - compatible = "dlg,da9210"; - reg = <0x68>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&sata0 { - status = "okay"; -}; - -&cpu0 { - cpu0-supply = <&vdd_dvfs>; -}; - -/* composite video input */ -&vin0 { - status = "okay"; - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - port { - vin0ep: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -&pci0 { - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&pci1 { - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&hsusb { - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; - -&pcie_bus_clk { - clock-frequency = <100000000>; -}; - -&pciec { - status = "okay"; -}; - -&can0 { - pinctrl-0 = <&can0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&x3_clk>, <&x16_clk>; - clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; -}; - -&lvds0 { - ports { - port@1 { - lvds_connector: endpoint { - }; - }; - }; -}; - -&rcar_sound { - pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>; - pinctrl-names = "default"; - status = "okay"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - rcar_sound,dai { - dai0 { - playback = <&ssi0>; - capture = <&ssi1>; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; diff --git a/arch/arm/dts/r8a7791.dtsi b/arch/arm/dts/r8a7791.dtsi deleted file mode 100644 index b9d34147628..00000000000 --- a/arch/arm/dts/r8a7791.dtsi +++ /dev/null @@ -1,1891 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car M2-W (R8A77910) SoC - * - * Copyright (C) 2013-2015 Renesas Electronics Corporation - * Copyright (C) 2013-2014 Renesas Solutions Corp. - * Copyright (C) 2014 Cogent Embedded Inc. - */ - -#include <dt-bindings/clock/r8a7791-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/power/r8a7791-sysc.h> - -/ { - compatible = "renesas,r8a7791"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - i2c8 = &i2c8; - spi0 = &qspi; - spi1 = &msiof0; - spi2 = &msiof1; - spi3 = &msiof2; - vin0 = &vin0; - vin1 = &vin1; - vin2 = &vin2; - }; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - clock-frequency = <1500000000>; - clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; - power-domains = <&sysc R8A7791_PD_CA15_CPU0>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1500000 1000000>, - <1312500 1000000>, - <1125000 1000000>, - < 937500 1000000>, - < 750000 1000000>, - < 375000 1000000>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - clock-frequency = <1500000000>; - clocks = <&cpg CPG_CORE R8A7791_CLK_Z>; - power-domains = <&sysc R8A7791_PD_CA15_CPU1>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1500000 1000000>, - <1312500 1000000>, - <1125000 1000000>, - < 937500 1000000>, - < 750000 1000000>, - < 375000 1000000>; - }; - - L2_CA15: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A7791_PD_CA15_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - /* External root clock */ - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; - - /* External SCIF clock */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7791-wdt", - "renesas,rcar-gen2-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a7791", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 904>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 904>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7791"; - reg = <0 0xe6060000 0 0x250>; - }; - - tpu: pwm@e60f0000 { - compatible = "renesas,tpu-r8a7791", "renesas,tpu"; - reg = <0 0xe60f0000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7791-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&usb_extal_clk>; - clock-names = "extal", "usb_extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - apmu@e6152000 { - compatible = "renesas,r8a7791-apmu", "renesas,apmu"; - reg = <0 0xe6152000 0 0x188>; - cpus = <&cpu0>, <&cpu1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7791-rst"; - reg = <0 0xe6160000 0 0x0100>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7791-sysc"; - reg = <0 0xe6180000 0 0x0200>; - #power-domain-cells = <1>; - }; - - irqc0: interrupt-controller@e61c0000 { - compatible = "renesas,irqc-r8a7791", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - thermal: thermal@e61f0000 { - compatible = "renesas,thermal-r8a7791", - "renesas,rcar-gen2-thermal", - "renesas,rcar-thermal"; - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - ipmmu_sy0: iommu@e6280000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6280000 0 0x1000>; - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_sy1: iommu@e6290000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6290000 0 0x1000>; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_ds: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6740000 0 0x1000>; - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mp: iommu@ec680000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xec680000 0 0x1000>; - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mx: iommu@fe951000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xfe951000 0 0x1000>; - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xffc80000 0 0x1000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_gp: iommu@e62a0000 { - compatible = "renesas,ipmmu-r8a7791", - "renesas,ipmmu-vmsa"; - reg = <0 0xe62a0000 0 0x1000>; - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - icram0: sram@e63a0000 { - compatible = "mmio-sram"; - reg = <0 0xe63a0000 0 0x12000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63a0000 0x12000>; - }; - - icram1: sram@e63c0000 { - compatible = "mmio-sram"; - reg = <0 0xe63c0000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63c0000 0x1000>; - - smp-sram@0 { - compatible = "renesas,smp-sram"; - reg = <0 0x100>; - }; - }; - - /* The memory map in the User's Manual maps the cores to - * bus numbers - */ - i2c0: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7791", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 931>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c1: i2c@e6518000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7791", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6518000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 930>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6530000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7791", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6530000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 929>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e6540000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7791", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6540000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 928>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c4: i2c@e6520000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7791", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6520000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 927>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c5: i2c@e6528000 { - /* doesn't need pinmux */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7791", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6528000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 925>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 925>; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e60b0000 { - /* doesn't need pinmux */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7791", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - dmas = <&dmac0 0x77>, <&dmac0 0x78>, - <&dmac1 0x77>, <&dmac1 0x78>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 926>; - status = "disabled"; - }; - - i2c7: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7791", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6500000 0 0x425>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - dmas = <&dmac0 0x61>, <&dmac0 0x62>, - <&dmac1 0x61>, <&dmac1 0x62>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 318>; - status = "disabled"; - }; - - i2c8: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7791", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6510000 0 0x425>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 323>; - dmas = <&dmac0 0x65>, <&dmac0 0x66>, - <&dmac1 0x65>, <&dmac1 0x66>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 323>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7791", - "renesas,rcar-gen2-usbhs"; - reg = <0 0xe6590000 0 0x100>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 704>; - renesas,buswait = <4>; - phys = <&usb0 1>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: usb-phy-controller@e6590100 { - compatible = "renesas,usb-phy-r8a7791", - "renesas,rcar-gen2-usb-phy"; - reg = <0 0xe6590100 0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cpg CPG_MOD 704>; - clock-names = "usbhs"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 704>; - status = "disabled"; - - usb0: usb-phy@0 { - reg = <0>; - #phy-cells = <1>; - }; - usb2: usb-phy@2 { - reg = <2>; - #phy-cells = <1>; - }; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a7791-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a7791-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7791", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - dmac1: dma-controller@e6720000 { - compatible = "renesas,dmac-r8a7791", - "renesas,rcar-dmac"; - reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7791", - "renesas,etheravb-rcar-gen2"; - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 812>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - qspi: spi@e6b10000 { - compatible = "renesas,qspi-r8a7791", "renesas,qspi"; - reg = <0 0xe6b10000 0 0x2c>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - dmas = <&dmac0 0x17>, <&dmac0 0x18>, - <&dmac1 0x17>, <&dmac1 0x18>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 917>; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7791", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>; - clock-names = "fck"; - dmas = <&dmac0 0x21>, <&dmac0 0x22>, - <&dmac1 0x21>, <&dmac1 0x22>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7791", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>; - clock-names = "fck"; - dmas = <&dmac0 0x25>, <&dmac0 0x26>, - <&dmac1 0x25>, <&dmac1 0x26>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7791", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c60000 0 64>; - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>; - clock-names = "fck"; - dmas = <&dmac0 0x27>, <&dmac0 0x28>, - <&dmac1 0x27>, <&dmac1 0x28>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - scifa3: serial@e6c70000 { - compatible = "renesas,scifa-r8a7791", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c70000 0 64>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1106>; - clock-names = "fck"; - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, - <&dmac1 0x1b>, <&dmac1 0x1c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 1106>; - status = "disabled"; - }; - - scifa4: serial@e6c78000 { - compatible = "renesas,scifa-r8a7791", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c78000 0 64>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1107>; - clock-names = "fck"; - dmas = <&dmac0 0x1f>, <&dmac0 0x20>, - <&dmac1 0x1f>, <&dmac1 0x20>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 1107>; - status = "disabled"; - }; - - scifa5: serial@e6c80000 { - compatible = "renesas,scifa-r8a7791", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c80000 0 64>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1108>; - clock-names = "fck"; - dmas = <&dmac0 0x23>, <&dmac0 0x24>, - <&dmac1 0x23>, <&dmac1 0x24>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 1108>; - status = "disabled"; - }; - - scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7791", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c20000 0 0x100>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>; - clock-names = "fck"; - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, - <&dmac1 0x3d>, <&dmac1 0x3e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7791", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c30000 0 0x100>; - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>; - clock-names = "fck"; - dmas = <&dmac0 0x19>, <&dmac0 0x1a>, - <&dmac1 0x19>, <&dmac1 0x1a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7791", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6ce0000 0 0x100>; - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 216>; - clock-names = "fck"; - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, - <&dmac1 0x1d>, <&dmac1 0x1e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 216>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7791", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x29>, <&dmac0 0x2a>, - <&dmac1 0x29>, <&dmac1 0x2a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 721>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7791", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, - <&dmac1 0x2d>, <&dmac1 0x2e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 720>; - status = "disabled"; - }; - - scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7791", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e58000 0 64>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, - <&dmac1 0x2b>, <&dmac1 0x2c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 719>; - status = "disabled"; - }; - - scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7791", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ea8000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2f>, <&dmac0 0x30>, - <&dmac1 0x2f>, <&dmac1 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 718>; - status = "disabled"; - }; - - scif4: serial@e6ee0000 { - compatible = "renesas,scif-r8a7791", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ee0000 0 64>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, - <&dmac1 0xfb>, <&dmac1 0xfc>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - }; - - scif5: serial@e6ee8000 { - compatible = "renesas,scif-r8a7791", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ee8000 0 64>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, - <&dmac1 0xfd>, <&dmac1 0xfe>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - }; - - hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7791", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c0000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x3a>, - <&dmac1 0x39>, <&dmac1 0x3a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7791", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c8000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, - <&dmac1 0x4d>, <&dmac1 0x4e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - hscif2: serial@e62d0000 { - compatible = "renesas,hscif-r8a7791", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62d0000 0 96>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, - <&dmac1 0x3b>, <&dmac1 0x3c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - }; - - msiof0: spi@e6e20000 { - compatible = "renesas,msiof-r8a7791", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e20000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 000>; - dmas = <&dmac0 0x51>, <&dmac0 0x52>, - <&dmac1 0x51>, <&dmac1 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6e10000 { - compatible = "renesas,msiof-r8a7791", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e10000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x55>, <&dmac0 0x56>, - <&dmac1 0x55>, <&dmac1 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6e00000 { - compatible = "renesas,msiof-r8a7791", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 205>; - dmas = <&dmac0 0x41>, <&dmac0 0x42>, - <&dmac1 0x41>, <&dmac1 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 205>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - adc: adc@e6e54000 { - compatible = "renesas,r8a7791-gyroadc", - "renesas,rcar-gyroadc"; - reg = <0 0xe6e54000 0 64>; - clocks = <&cpg CPG_MOD 901>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 901>; - status = "disabled"; - }; - - can0: can@e6e80000 { - compatible = "renesas,can-r8a7791", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e80000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6e88000 { - compatible = "renesas,can-r8a7791", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e88000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7791", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 811>; - status = "disabled"; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7791", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 810>; - status = "disabled"; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a7791", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 809>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a7791", - "renesas,rcar_sound-gen2"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A7791_CLK_M2>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", "src.9", "src.8", - "src.7", "src.6", "src.5", "src.4", - "src.3", "src.2", "src.1", "src.0", - "ctu.0", "ctu.1", - "mix.0", "mix.1", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>, - <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>, - <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>, - <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>, - <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>, - <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>, - <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>, - <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>, - <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>, - <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>, - <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a7791", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a7791", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - xhci: usb@ee000000 { - compatible = "renesas,xhci-r8a7791", - "renesas,rcar-gen2-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 328>; - phys = <&usb2 1>; - phy-names = "usb"; - status = "disabled"; - }; - - pci0: pci@ee090000 { - compatible = "renesas,pci-r8a7791", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - reg = <0 0xee090000 0 0xc00>, - <0 0xee080000 0 0x1100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - - bus-range = <0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x800 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x1000 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - }; - - pci1: pci@ee0d0000 { - compatible = "renesas,pci-r8a7791", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - reg = <0 0xee0d0000 0 0xc00>, - <0 0xee0c0000 0 0x1100>; - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - - bus-range = <1 1>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x10800 0 0 0 0>; - phys = <&usb2 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x11000 0 0 0 0>; - phys = <&usb2 0>; - phy-names = "usb"; - }; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7791", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee100000 0 0x328>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; - dmas = <&dmac0 0xcd>, <&dmac0 0xce>, - <&dmac1 0xcd>, <&dmac1 0xce>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <195000000>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee140000 { - compatible = "renesas,sdhi-r8a7791", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee140000 0 0x100>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, - <&dmac1 0xc1>, <&dmac1 0xc2>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi2: mmc@ee160000 { - compatible = "renesas,sdhi-r8a7791", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee160000 0 0x100>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, - <&dmac1 0xd3>, <&dmac1 0xd4>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - mmcif0: mmc@ee200000 { - compatible = "renesas,mmcif-r8a7791", - "renesas,sh-mmcif"; - reg = <0 0xee200000 0 0x80>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 315>; - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, - <&dmac1 0xd1>, <&dmac1 0xd2>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 315>; - reg-io-width = <4>; - status = "disabled"; - max-frequency = <97500000>; - }; - - sata0: sata@ee300000 { - compatible = "renesas,sata-r8a7791", - "renesas,rcar-gen2-sata"; - reg = <0 0xee300000 0 0x200000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 815>; - status = "disabled"; - }; - - sata1: sata@ee500000 { - compatible = "renesas,sata-r8a7791", - "renesas,rcar-gen2-sata"; - reg = <0 0xee500000 0 0x200000>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 814>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 814>; - status = "disabled"; - }; - - ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7791", - "renesas,rcar-gen2-ether"; - reg = <0 0xee700000 0 0x400>; - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 813>; - phy-mode = "rmii"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1001000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, - <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec: pcie@fe000000 { - compatible = "renesas,pcie-r8a7791", - "renesas,pcie-rcar-gen2"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, - <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 319>; - status = "disabled"; - }; - - vsp@fe928000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe928000 0 0x8000>; - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 131>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 131>; - }; - - vsp@fe930000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe930000 0 0x8000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 128>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 128>; - }; - - vsp@fe938000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe938000 0 0x8000>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 127>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 127>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 119>; - }; - - fdp1@fe944000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe944000 0 0x2400>; - interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 118>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 118>; - }; - - jpu: jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7791", - "renesas,rcar-gen2-jpu"; - reg = <0 0xfe980000 0 0x10300>; - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 106>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 106>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7791"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_rgb: endpoint { - }; - }; - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a7791-lvds"; - reg = <0 0xfeb90000 0 0x1c>; - clocks = <&cpg CPG_MOD 726>; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 726>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - lvds0_out: endpoint { - }; - }; - }; - }; - - prr: chipid@ff000044 { - compatible = "renesas,prr"; - reg = <0 0xff000044 0 4>; - }; - - cmt0: timer@ffca0000 { - compatible = "renesas,r8a7791-cmt0", - "renesas,rcar-gen2-cmt0"; - reg = <0 0xffca0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 124>; - - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7791-cmt1", - "renesas,rcar-gen2-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 329>; - clock-names = "fck"; - power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; - resets = <&cpg 329>; - - status = "disabled"; - }; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - - thermal-sensors = <&thermal>; - - trips { - cpu-crit { - temperature = <95000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - }; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clock - can be overridden by the board */ - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <48000000>; - }; -}; diff --git a/arch/arm/dts/r8a7792-blanche.dts b/arch/arm/dts/r8a7792-blanche.dts deleted file mode 100644 index 6a83923aa46..00000000000 --- a/arch/arm/dts/r8a7792-blanche.dts +++ /dev/null @@ -1,364 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Blanche board - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2016 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a7792.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Blanche"; - compatible = "renesas,blanche", "renesas,r8a7792"; - - aliases { - serial0 = &scif0; - serial1 = &scif3; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - d3_3v: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "D3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ethernet@18000000 { - compatible = "smsc,lan89218", "smsc,lan9115"; - reg = <0 0x18000000 0 0x100>; - phy-mode = "mii"; - interrupt-parent = <&irqc>; - interrupts = <0 IRQ_TYPE_EDGE_FALLING>; - smsc,irq-push-pull; - reg-io-width = <4>; - vddvario-supply = <&d3_3v>; - vdd33a-supply = <&d3_3v>; - - pinctrl-0 = <&lan89218_pins>; - pinctrl-names = "default"; - }; - - vga-encoder { - compatible = "adi,adv7123"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb1>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; - }; - }; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; - }; - - x1_clk: x1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - x2_clk: x2 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <65000000>; - }; - - keyboard { - compatible = "gpio-keys"; - - pinctrl-0 = <&keyboard_pins>; - pinctrl-names = "default"; - - key-1 { - linux,code = <KEY_1>; - label = "SW2-1"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; - }; - key-2 { - linux,code = <KEY_2>; - label = "SW2-2"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; - }; - key-3 { - linux,code = <KEY_3>; - label = "SW2-3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - }; - key-4 { - linux,code = <KEY_4>; - label = "SW2-4"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; - }; - key-a { - linux,code = <KEY_A>; - label = "SW24"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; - }; - key-b { - linux,code = <KEY_B>; - label = "SW25"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio11 2 GPIO_ACTIVE_LOW>; - }; - }; - - leds { - compatible = "gpio-leds"; - - led17 { - gpios = <&gpio10 10 GPIO_ACTIVE_HIGH>; - }; - led18 { - gpios = <&gpio10 11 GPIO_ACTIVE_HIGH>; - }; - led19 { - gpios = <&gpio10 12 GPIO_ACTIVE_HIGH>; - }; - led20 { - gpios = <&gpio10 23 GPIO_ACTIVE_HIGH>; - }; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&can_clk { - clock-frequency = <48000000>; -}; - -&pfc { - scif0_pins: scif0 { - groups = "scif0_data"; - function = "scif0"; - }; - - scif3_pins: scif3 { - groups = "scif3_data"; - function = "scif3"; - }; - - lan89218_pins: lan89218 { - intc { - groups = "intc_irq0"; - function = "intc"; - }; - lbsc { - groups = "lbsc_ex_cs0"; - function = "lbsc"; - }; - }; - - can0_pins: can0 { - groups = "can0_data", "can_clk"; - function = "can0"; - }; - - sdhi0_pins: sdhi0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - }; - - du0_pins: du0 { - groups = "du0_rgb888", "du0_sync", "du0_disp"; - function = "du0"; - }; - - du1_pins: du1 { - groups = "du1_rgb666", "du1_sync", "du1_disp"; - function = "du1"; - }; - - keyboard_pins: keyboard { - pins = "GP_3_10", "GP_3_11", "GP_3_12", "GP_3_15", "GP_11_2"; - bias-pull-up; - }; - - pmic_irq_pins: pmicirq { - groups = "intc_irq2"; - function = "intc"; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif3 { - pinctrl-0 = <&scif3_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&can0 { - pinctrl-0 = <&can0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi0>; - cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <400000>; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&irqc>; - interrupts = <3 IRQ_TYPE_EDGE_FALLING>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&du_out_rgb0>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; -}; - -&iic3 { - status = "okay"; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq_pins>; - interrupt-parent = <&irqc>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; -}; - -&du { - pinctrl-0 = <&du0_pins>, <&du1_pins>; - pinctrl-names = "default"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x1_clk>, <&x2_clk>; - clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; - status = "okay"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - port@1 { - endpoint { - remote-endpoint = <&adv7123_in>; - }; - }; - }; -}; diff --git a/arch/arm/dts/r8a7792.dtsi b/arch/arm/dts/r8a7792.dtsi deleted file mode 100644 index a6d9367f8fa..00000000000 --- a/arch/arm/dts/r8a7792.dtsi +++ /dev/null @@ -1,928 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car V2H (R8A77920) SoC - * - * Copyright (C) 2016 Cogent Embedded Inc. - */ - -#include <dt-bindings/clock/r8a7792-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a7792-sysc.h> - -/ { - compatible = "renesas,r8a7792"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &iic3; - spi0 = &qspi; - spi1 = &msiof0; - spi2 = &msiof1; - vin0 = &vin0; - vin1 = &vin1; - vin2 = &vin2; - vin3 = &vin3; - vin4 = &vin4; - vin5 = &vin5; - }; - - /* External CAN clock */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - clock-frequency = <1000000000>; - clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; - power-domains = <&sysc R8A7792_PD_CA15_CPU0>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - clock-frequency = <1000000000>; - clocks = <&cpg CPG_CORE R8A7792_CLK_Z>; - power-domains = <&sysc R8A7792_PD_CA15_CPU1>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA15>; - }; - - L2_CA15: cache-controller-0 { - compatible = "cache"; - cache-unified; - cache-level = <2>; - power-domains = <&sysc R8A7792_PD_CA15_SCU>; - }; - }; - - /* External root clock */ - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; - - /* External SCIF clock */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7792-wdt", - "renesas,rcar-gen2-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 23>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 28>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055100 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055100 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - gpio7: gpio@e6055200 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055200 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 904>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 904>; - }; - - gpio8: gpio@e6055300 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055300 0 0x50>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 256 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 921>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 921>; - }; - - gpio9: gpio@e6055400 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 288 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 919>; - }; - - gpio10: gpio@e6055500 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055500 0 0x50>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 320 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 914>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 914>; - }; - - gpio11: gpio@e6055600 { - compatible = "renesas,gpio-r8a7792", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055600 0 0x50>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 352 30>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 913>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 913>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7792"; - reg = <0 0xe6060000 0 0x144>; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7792-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; - clock-names = "extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - apmu@e6152000 { - compatible = "renesas,r8a7792-apmu", "renesas,apmu"; - reg = <0 0xe6152000 0 0x188>; - cpus = <&cpu0>, <&cpu1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7792-rst"; - reg = <0 0xe6160000 0 0x0100>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7792-sysc"; - reg = <0 0xe6180000 0 0x0200>; - #power-domain-cells = <1>; - }; - - irqc: interrupt-controller@e61c0000 { - compatible = "renesas,irqc-r8a7792", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - icram0: sram@e63a0000 { - compatible = "mmio-sram"; - reg = <0 0xe63a0000 0 0x12000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63a0000 0x12000>; - }; - - icram1: sram@e63c0000 { - compatible = "mmio-sram"; - reg = <0 0xe63c0000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63c0000 0x1000>; - - smp-sram@0 { - compatible = "renesas,smp-sram"; - reg = <0 0x100>; - }; - }; - - /* I2C doesn't need pinmux */ - i2c0: i2c@e6508000 { - compatible = "renesas,i2c-r8a7792", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 931>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@e6518000 { - compatible = "renesas,i2c-r8a7792", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6518000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 930>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@e6530000 { - compatible = "renesas,i2c-r8a7792", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6530000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 929>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@e6540000 { - compatible = "renesas,i2c-r8a7792", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6540000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 928>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@e6520000 { - compatible = "renesas,i2c-r8a7792", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6520000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 927>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@e6528000 { - compatible = "renesas,i2c-r8a7792", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6528000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 925>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 925>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - iic3: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7792", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - dmas = <&dmac0 0x77>, <&dmac0 0x78>, - <&dmac1 0x77>, <&dmac1 0x78>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 926>; - status = "disabled"; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7792", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - dmac1: dma-controller@e6720000 { - compatible = "renesas,dmac-r8a7792", - "renesas,rcar-dmac"; - reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7792", - "renesas,etheravb-rcar-gen2"; - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 812>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - qspi: spi@e6b10000 { - compatible = "renesas,qspi-r8a7792", "renesas,qspi"; - reg = <0 0xe6b10000 0 0x2c>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - dmas = <&dmac0 0x17>, <&dmac0 0x18>, - <&dmac1 0x17>, <&dmac1 0x18>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 917>; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7792", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 721>, - <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x29>, <&dmac0 0x2a>, - <&dmac1 0x29>, <&dmac1 0x2a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 721>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7792", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 720>, - <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, - <&dmac1 0x2d>, <&dmac1 0x2e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 720>; - status = "disabled"; - }; - - scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7792", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e58000 0 64>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 719>, - <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, - <&dmac1 0x2b>, <&dmac1 0x2c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 719>; - status = "disabled"; - }; - - scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7792", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ea8000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 718>, - <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2f>, <&dmac0 0x30>, - <&dmac1 0x2f>, <&dmac1 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 718>; - status = "disabled"; - }; - - hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7792", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c0000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>, - <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x3a>, - <&dmac1 0x39>, <&dmac1 0x3a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7792", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c8000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>, - <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, - <&dmac1 0x4d>, <&dmac1 0x4e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - msiof0: spi@e6e20000 { - compatible = "renesas,msiof-r8a7792", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e20000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 000>; - dmas = <&dmac0 0x51>, <&dmac0 0x52>, - <&dmac1 0x51>, <&dmac1 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 000>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6e10000 { - compatible = "renesas,msiof-r8a7792", - "renesas,rcar-gen2-msiof"; - reg = <0 0xe6e10000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x55>, <&dmac0 0x56>, - <&dmac1 0x55>, <&dmac1 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6e80000 { - compatible = "renesas,can-r8a7792", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e80000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6e88000 { - compatible = "renesas,can-r8a7792", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e88000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7792", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 811>; - status = "disabled"; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7792", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 810>; - status = "disabled"; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a7792", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 809>; - status = "disabled"; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a7792", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 808>; - status = "disabled"; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a7792", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 805>; - status = "disabled"; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a7792", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 804>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7792", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee100000 0 0x328>; - interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&dmac0 0xcd>, <&dmac0 0xce>, - <&dmac1 0xcd>, <&dmac1 0xce>; - dma-names = "tx", "rx", "tx", "rx"; - clocks = <&cpg CPG_MOD 314>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - gic: interrupt-controller@f1001000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0 0xf1001000 0 0x1000>, - <0 0xf1002000 0 0x2000>, - <0 0xf1004000 0 0x2000>, - <0 0xf1006000 0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | - IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - vsp@fe928000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe928000 0 0x8000>; - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 131>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 131>; - }; - - vsp@fe930000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe930000 0 0x8000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 128>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 128>; - }; - - vsp@fe938000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe938000 0 0x8000>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 127>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 127>; - }; - - jpu: jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7792", - "renesas,rcar-gen2-jpu"; - reg = <0 0xfe980000 0 0x10300>; - interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 106>; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 106>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7792"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_rgb0: endpoint { - }; - }; - port@1 { - reg = <1>; - du_out_rgb1: endpoint { - }; - }; - }; - }; - - prr: chipid@ff000044 { - compatible = "renesas,prr"; - reg = <0 0xff000044 0 4>; - }; - - cmt0: timer@ffca0000 { - compatible = "renesas,r8a7792-cmt0", - "renesas,rcar-gen2-cmt0"; - reg = <0 0xffca0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 124>; - - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7792-cmt1", - "renesas,rcar-gen2-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 329>; - clock-names = "fck"; - power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; - resets = <&cpg 329>; - - status = "disabled"; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/dts/r8a7793-gose.dts b/arch/arm/dts/r8a7793-gose.dts deleted file mode 100644 index 79b537b2464..00000000000 --- a/arch/arm/dts/r8a7793-gose.dts +++ /dev/null @@ -1,818 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Gose board - * - * Copyright (C) 2014-2015 Renesas Electronics Corporation - */ - -/* - * SSI-AK4643 - * - * SW1: 1: AK4643 - * 2: CN22 - * 3: ADV7511 - * - * This command is required when Playback/Capture - * - * amixer set "LINEOUT Mixer DACL" on - * amixer set "DVC Out" 100% - * amixer set "DVC In" 100% - * - * You can use Mute - * - * amixer set "DVC Out Mute" on - * amixer set "DVC In Mute" on - * - * You can use Volume Ramp - * - * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" - * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" - * amixer set "DVC Out Ramp" on - * aplay xxx.wav & - * amixer set "DVC Out" 80% // Volume Down - * amixer set "DVC Out" 100% // Volume Up - */ - -/dts-v1/; -#include "r8a7793.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Gose"; - compatible = "renesas,gose", "renesas,r8a7793"; - - aliases { - serial0 = &scif0; - serial1 = &scif1; - i2c9 = &gpioi2c2; - i2c10 = &gpioi2c4; - i2c11 = &i2chdmi; - i2c12 = &i2cexio4; - mmc0 = &sdhi0; - mmc1 = &sdhi1; - mmc2 = &sdhi2; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - keyboard { - compatible = "gpio-keys"; - - pinctrl-0 = <&keyboard_pins>; - pinctrl-names = "default"; - - key-1 { - gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_1>; - label = "SW2-1"; - wakeup-source; - debounce-interval = <20>; - }; - key-2 { - gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_2>; - label = "SW2-2"; - wakeup-source; - debounce-interval = <20>; - }; - key-3 { - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_3>; - label = "SW2-3"; - wakeup-source; - debounce-interval = <20>; - }; - key-4 { - gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; - linux,code = <KEY_4>; - label = "SW2-4"; - wakeup-source; - debounce-interval = <20>; - }; - key-a { - gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_A>; - label = "SW30"; - wakeup-source; - debounce-interval = <20>; - }; - key-b { - gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_B>; - label = "SW31"; - wakeup-source; - debounce-interval = <20>; - }; - key-c { - gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_C>; - label = "SW32"; - wakeup-source; - debounce-interval = <20>; - }; - key-d { - gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; - linux,code = <KEY_D>; - label = "SW33"; - wakeup-source; - debounce-interval = <20>; - }; - key-e { - gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; - linux,code = <KEY_E>; - label = "SW34"; - wakeup-source; - debounce-interval = <20>; - }; - key-f { - gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; - linux,code = <KEY_F>; - label = "SW35"; - wakeup-source; - debounce-interval = <20>; - }; - key-g { - gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; - linux,code = <KEY_G>; - label = "SW36"; - wakeup-source; - debounce-interval = <20>; - }; - }; - - leds { - compatible = "gpio-leds"; - led6 { - gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; - label = "LED6"; - }; - led7 { - gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; - label = "LED7"; - }; - led8 { - gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; - label = "LED8"; - }; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio7 17 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi1: regulator-vcc-sdhi1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI1 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio7 18 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi1: regulator-vccq-sdhi1 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI1 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi2: regulator-vcc-sdhi2 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI2 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio7 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi2: regulator-vccq-sdhi2 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI2 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - audio_clock: audio_clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <11289600>; - }; - - rsnd_ak4643: sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&sndcodec>; - simple-audio-card,frame-master = <&sndcodec>; - - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - sndcodec: simple-audio-card,codec { - sound-dai = <&ak4643>; - clocks = <&audio_clock>; - }; - }; - - hdmi-in { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&adv7612_in>; - }; - }; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_out: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - composite-in { - compatible = "composite-video-connector"; - - port { - composite_con_in: endpoint { - remote-endpoint = <&adv7180_in>; - }; - }; - }; - - x2_clk: x2-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - x13_clk: x13-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - gpioi2c2: i2c-9 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - gpioi2c4: i2c-10 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio7 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio7 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - /* - * A fallback to GPIO is provided for I2C2. - */ - i2chdmi: i2c-11 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c2>, <&gpioi2c2>; - i2c-bus-name = "i2c-hdmi"; - #address-cells = <1>; - #size-cells = <0>; - - ak4643: codec@12 { - compatible = "asahi-kasei,ak4643"; - #sound-dai-cells = <0>; - reg = <0x12>; - }; - - composite-in@20 { - compatible = "adi,adv7180cp"; - reg = <0x20>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7180_in: endpoint { - remote-endpoint = <&composite_con_in>; - }; - }; - - port@3 { - reg = <3>; - adv7180_out: endpoint { - bus-width = <8>; - remote-endpoint = <&vin1ep>; - }; - }; - }; - }; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio3>; - interrupts = <29 IRQ_TYPE_LEVEL_LOW>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con_out>; - }; - }; - }; - }; - - hdmi-in@4c { - compatible = "adi,adv7612"; - reg = <0x4c>; - interrupt-parent = <&gpio4>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - default-input = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7612_in: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; - }; - - port@2 { - reg = <2>; - adv7612_out: endpoint { - remote-endpoint = <&vin0ep2>; - }; - }; - }; - }; - - eeprom@50 { - compatible = "renesas,r1ex24002", "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - }; - - /* - * I2C4 is routed to EXIO connector E, pins 37 (SCL) + 39 (SDA). - * A fallback to GPIO is provided. - */ - i2cexio4: i2c-12 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c4>, <&gpioi2c4>; - i2c-bus-name = "i2c-exio4"; - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&x13_clk>, <&x2_clk>; - clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; -}; - -&lvds0 { - ports { - port@1 { - lvds_connector: endpoint { - }; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - i2c2_pins: i2c2 { - groups = "i2c2"; - function = "i2c2"; - }; - - i2c4_pins: i2c4 { - groups = "i2c4_c"; - function = "i2c4"; - }; - - du_pins: du { - groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; - function = "du"; - }; - - scif0_pins: scif0 { - groups = "scif0_data_d"; - function = "scif0"; - }; - - scif1_pins: scif1 { - groups = "scif1_data_d"; - function = "scif1"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq0"; - function = "intc"; - }; - - pmic_irq_pins: pmicirq { - groups = "intc_irq2"; - function = "intc"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi1_pins: sd1 { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - power-source = <3300>; - }; - - sdhi1_pins_uhs: sd1_uhs { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - power-source = <1800>; - }; - - sdhi2_pins: sd2 { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <3300>; - }; - - sdhi2_pins_uhs: sd2_uhs { - groups = "sdhi2_data4", "sdhi2_ctrl"; - function = "sdhi2"; - power-source = <1800>; - }; - - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; - - sound_pins: sound { - groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; - function = "ssi"; - }; - - sound_clk_pins: sound_clk { - groups = "audio_clk_a"; - function = "audio_clk"; - }; - - keyboard_pins: keyboard { - pins = "GP_5_0", "GP_5_1", "GP_5_2", "GP_5_3"; - bias-pull-up; - }; - - vin0_pins: vin0 { - groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk"; - function = "vin0"; - }; - - vin1_pins: vin1 { - groups = "vin1_data8", "vin1_clk"; - function = "vin1"; - }; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; - }; -}; - -&cmt0 { - status = "okay"; -}; - -&cpu0 { - cpu0-supply = <&vdd_dvfs>; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif1 { - pinctrl-0 = <&scif1_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - sd-uhs-sdr50; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdhi1 { - pinctrl-0 = <&sdhi1_pins>; - pinctrl-1 = <&sdhi1_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi1>; - vqmmc-supply = <&vccq_sdhi1>; - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; - sd-uhs-sdr50; - status = "okay"; -}; - -&sdhi2 { - pinctrl-0 = <&sdhi2_pins>; - pinctrl-1 = <&sdhi2_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi2>; - vqmmc-supply = <&vccq_sdhi2>; - cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; - sd-uhs-sdr50; - status = "okay"; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition@40000 { - label = "user"; - reg = <0x00040000 0x00400000>; - read-only; - }; - partition@440000 { - label = "flash"; - reg = <0x00440000 0x03bc0000>; - }; - }; - }; -}; - -&i2c2 { - pinctrl-0 = <&i2c2_pins>; - pinctrl-names = "i2c-hdmi"; - - status = "okay"; - clock-frequency = <100000>; - -}; - -&i2c6 { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_irq_pins>; - status = "okay"; - clock-frequency = <100000>; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; - - vdd_dvfs: regulator@68 { - compatible = "dlg,da9210"; - reg = <0x68>; - interrupt-parent = <&irqc0>; - interrupts = <2 IRQ_TYPE_LEVEL_LOW>; - - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&i2c4 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "i2c-exio4"; -}; - -&rcar_sound { - pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; - pinctrl-names = "default"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - status = "okay"; - - rcar_sound,dai { - dai0 { - playback = <&ssi0>, <&src2>, <&dvc0>; - capture = <&ssi1>, <&src3>, <&dvc1>; - }; - }; -}; - -&ssi1 { - shared-pin; -}; - -/* HDMI video input */ -&vin0 { - status = "okay"; - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - port { - vin0ep2: endpoint { - remote-endpoint = <&adv7612_out>; - bus-width = <24>; - hsync-active = <0>; - vsync-active = <0>; - pclk-sample = <1>; - data-active = <1>; - }; - }; -}; - -/* composite video input */ -&vin1 { - pinctrl-0 = <&vin1_pins>; - pinctrl-names = "default"; - - status = "okay"; - - port { - vin1ep: endpoint { - remote-endpoint = <&adv7180_out>; - bus-width = <8>; - }; - }; -}; diff --git a/arch/arm/dts/r8a7793.dtsi b/arch/arm/dts/r8a7793.dtsi deleted file mode 100644 index f51bf687f4b..00000000000 --- a/arch/arm/dts/r8a7793.dtsi +++ /dev/null @@ -1,1470 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car M2-N (R8A77930) SoC - * - * Copyright (C) 2014-2015 Renesas Electronics Corporation - */ - -#include <dt-bindings/clock/r8a7793-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/power/r8a7793-sysc.h> - -/ { - compatible = "renesas,r8a7793"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - i2c8 = &i2c8; - spi0 = &qspi; - }; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - clock-frequency = <1500000000>; - clocks = <&cpg CPG_CORE R8A7793_CLK_Z>; - power-domains = <&sysc R8A7793_PD_CA15_CPU0>; - enable-method = "renesas,apmu"; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1500000 1000000>, - <1312500 1000000>, - <1125000 1000000>, - < 937500 1000000>, - < 750000 1000000>, - < 375000 1000000>; - next-level-cache = <&L2_CA15>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - clock-frequency = <1500000000>; - clocks = <&cpg CPG_CORE R8A7793_CLK_Z>; - power-domains = <&sysc R8A7793_PD_CA15_CPU1>; - enable-method = "renesas,apmu"; - voltage-tolerance = <1>; /* 1% */ - clock-latency = <300000>; /* 300 us */ - - /* kHz - uV - OPPs unknown yet */ - operating-points = <1500000 1000000>, - <1312500 1000000>, - <1125000 1000000>, - < 937500 1000000>, - < 750000 1000000>, - < 375000 1000000>; - next-level-cache = <&L2_CA15>; - }; - - L2_CA15: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A7793_PD_CA15_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - /* External root clock */ - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; - - /* External SCIF clock */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7793-wdt", - "renesas,rcar-gen2-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a7793", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 904>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 904>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7793"; - reg = <0 0xe6060000 0 0x250>; - }; - - /* Special CPG clocks */ - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7793-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&usb_extal_clk>; - clock-names = "extal", "usb_extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - apmu@e6152000 { - compatible = "renesas,r8a7793-apmu", "renesas,apmu"; - reg = <0 0xe6152000 0 0x188>; - cpus = <&cpu0>, <&cpu1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7793-rst"; - reg = <0 0xe6160000 0 0x0100>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7793-sysc"; - reg = <0 0xe6180000 0 0x0200>; - #power-domain-cells = <1>; - }; - - irqc0: interrupt-controller@e61c0000 { - compatible = "renesas,irqc-r8a7793", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - thermal: thermal@e61f0000 { - compatible = "renesas,thermal-r8a7793", - "renesas,rcar-gen2-thermal", - "renesas,rcar-thermal"; - reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - ipmmu_sy0: iommu@e6280000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6280000 0 0x1000>; - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_sy1: iommu@e6290000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6290000 0 0x1000>; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_ds: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6740000 0 0x1000>; - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mp: iommu@ec680000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xec680000 0 0x1000>; - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mx: iommu@fe951000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xfe951000 0 0x1000>; - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xffc80000 0 0x1000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_gp: iommu@e62a0000 { - compatible = "renesas,ipmmu-r8a7793", - "renesas,ipmmu-vmsa"; - reg = <0 0xe62a0000 0 0x1000>; - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - icram0: sram@e63a0000 { - compatible = "mmio-sram"; - reg = <0 0xe63a0000 0 0x12000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63a0000 0x12000>; - }; - - icram1: sram@e63c0000 { - compatible = "mmio-sram"; - reg = <0 0xe63c0000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63c0000 0x1000>; - - smp-sram@0 { - compatible = "renesas,smp-sram"; - reg = <0 0x100>; - }; - }; - - /* The memory map in the User's Manual maps the cores to - * bus numbers - */ - i2c0: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7793", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 931>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c1: i2c@e6518000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7793", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6518000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 930>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6530000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7793", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6530000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 929>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e6540000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7793", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6540000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 928>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c4: i2c@e6520000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7793", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6520000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 927>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c5: i2c@e6528000 { - /* doesn't need pinmux */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7793", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6528000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 925>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 925>; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e60b0000 { - /* doesn't need pinmux */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7793", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - dmas = <&dmac0 0x77>, <&dmac0 0x78>, - <&dmac1 0x77>, <&dmac1 0x78>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 926>; - status = "disabled"; - }; - - i2c7: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7793", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6500000 0 0x425>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - dmas = <&dmac0 0x61>, <&dmac0 0x62>, - <&dmac1 0x61>, <&dmac1 0x62>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 318>; - status = "disabled"; - }; - - i2c8: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7793", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6510000 0 0x425>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 323>; - dmas = <&dmac0 0x65>, <&dmac0 0x66>, - <&dmac1 0x65>, <&dmac1 0x66>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 323>; - status = "disabled"; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7793", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - dmac1: dma-controller@e6720000 { - compatible = "renesas,dmac-r8a7793", - "renesas,rcar-dmac"; - reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - qspi: spi@e6b10000 { - compatible = "renesas,qspi-r8a7793", "renesas,qspi"; - reg = <0 0xe6b10000 0 0x2c>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - dmas = <&dmac0 0x17>, <&dmac0 0x18>, - <&dmac1 0x17>, <&dmac1 0x18>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 917>; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7793", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>; - clock-names = "fck"; - dmas = <&dmac0 0x21>, <&dmac0 0x22>, - <&dmac1 0x21>, <&dmac1 0x22>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7793", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>; - clock-names = "fck"; - dmas = <&dmac0 0x25>, <&dmac0 0x26>, - <&dmac1 0x25>, <&dmac1 0x26>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7793", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c60000 0 64>; - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>; - clock-names = "fck"; - dmas = <&dmac0 0x27>, <&dmac0 0x28>, - <&dmac1 0x27>, <&dmac1 0x28>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - scifa3: serial@e6c70000 { - compatible = "renesas,scifa-r8a7793", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c70000 0 64>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1106>; - clock-names = "fck"; - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, - <&dmac1 0x1b>, <&dmac1 0x1c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 1106>; - status = "disabled"; - }; - - scifa4: serial@e6c78000 { - compatible = "renesas,scifa-r8a7793", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c78000 0 64>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1107>; - clock-names = "fck"; - dmas = <&dmac0 0x1f>, <&dmac0 0x20>, - <&dmac1 0x1f>, <&dmac1 0x20>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 1107>; - status = "disabled"; - }; - - scifa5: serial@e6c80000 { - compatible = "renesas,scifa-r8a7793", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c80000 0 64>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1108>; - clock-names = "fck"; - dmas = <&dmac0 0x23>, <&dmac0 0x24>, - <&dmac1 0x23>, <&dmac1 0x24>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 1108>; - status = "disabled"; - }; - - scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7793", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c20000 0 0x100>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>; - clock-names = "fck"; - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, - <&dmac1 0x3d>, <&dmac1 0x3e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7793", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c30000 0 0x100>; - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>; - clock-names = "fck"; - dmas = <&dmac0 0x19>, <&dmac0 0x1a>, - <&dmac1 0x19>, <&dmac1 0x1a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7793", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6ce0000 0 0x100>; - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 216>; - clock-names = "fck"; - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, - <&dmac1 0x1d>, <&dmac1 0x1e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 216>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7793", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x29>, <&dmac0 0x2a>, - <&dmac1 0x29>, <&dmac1 0x2a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 721>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7793", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, - <&dmac1 0x2d>, <&dmac1 0x2e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 720>; - status = "disabled"; - }; - - scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7793", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e58000 0 64>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, - <&dmac1 0x2b>, <&dmac1 0x2c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 719>; - status = "disabled"; - }; - - scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7793", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ea8000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2f>, <&dmac0 0x30>, - <&dmac1 0x2f>, <&dmac1 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 718>; - status = "disabled"; - }; - - scif4: serial@e6ee0000 { - compatible = "renesas,scif-r8a7793", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ee0000 0 64>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, - <&dmac1 0xfb>, <&dmac1 0xfc>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - }; - - scif5: serial@e6ee8000 { - compatible = "renesas,scif-r8a7793", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ee8000 0 64>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, - <&dmac1 0xfd>, <&dmac1 0xfe>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - }; - - hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7793", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c0000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x3a>, - <&dmac1 0x39>, <&dmac1 0x3a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7793", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c8000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, - <&dmac1 0x4d>, <&dmac1 0x4e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - hscif2: serial@e62d0000 { - compatible = "renesas,hscif-r8a7793", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62d0000 0 96>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, - <&dmac1 0x3b>, <&dmac1 0x3c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - }; - - can0: can@e6e80000 { - compatible = "renesas,can-r8a7793", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e80000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6e88000 { - compatible = "renesas,can-r8a7793", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e88000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7793", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 811>; - status = "disabled"; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7793", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 810>; - status = "disabled"; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a7793", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 809>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a7793", - "renesas,rcar_sound-gen2"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A7793_CLK_M2>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>, - <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>, - <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>, - <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>, - <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>, - <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>, - <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>, - <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>, - <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>, - <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>, - <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a7793", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a7793", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7793", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee100000 0 0x328>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; - dmas = <&dmac0 0xcd>, <&dmac0 0xce>, - <&dmac1 0xcd>, <&dmac1 0xce>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <195000000>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee140000 { - compatible = "renesas,sdhi-r8a7793", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee140000 0 0x100>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, - <&dmac1 0xc1>, <&dmac1 0xc2>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi2: mmc@ee160000 { - compatible = "renesas,sdhi-r8a7793", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee160000 0 0x100>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, - <&dmac1 0xd3>, <&dmac1 0xd4>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - mmcif0: mmc@ee200000 { - compatible = "renesas,mmcif-r8a7793", - "renesas,sh-mmcif"; - reg = <0 0xee200000 0 0x80>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 315>; - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, - <&dmac1 0xd1>, <&dmac1 0xd2>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 315>; - reg-io-width = <4>; - status = "disabled"; - max-frequency = <97500000>; - }; - - ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7793", - "renesas,rcar-gen2-ether"; - reg = <0 0xee700000 0 0x400>; - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 813>; - phy-mode = "rmii"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1001000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0xf1001000 0 0x1000>, - <0 0xf1002000 0 0x2000>, - <0 0xf1004000 0 0x2000>, - <0 0xf1006000 0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 119>; - }; - - fdp1@fe944000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe944000 0 0x2400>; - interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 118>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 118>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7793"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_rgb: endpoint { - }; - }; - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a7793-lvds"; - reg = <0 0xfeb90000 0 0x1c>; - clocks = <&cpg CPG_MOD 726>; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 726>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - lvds0_out: endpoint { - }; - }; - }; - }; - - prr: chipid@ff000044 { - compatible = "renesas,prr"; - reg = <0 0xff000044 0 4>; - }; - - cmt0: timer@ffca0000 { - compatible = "renesas,r8a7793-cmt0", - "renesas,rcar-gen2-cmt0"; - reg = <0 0xffca0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 124>; - - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7793-cmt1", - "renesas,rcar-gen2-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 329>; - clock-names = "fck"; - power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; - resets = <&cpg 329>; - - status = "disabled"; - }; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <0>; - polling-delay = <0>; - - thermal-sensors = <&thermal>; - - trips { - cpu-crit { - temperature = <95000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - }; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clock - can be overridden by the board */ - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <48000000>; - }; -}; diff --git a/arch/arm/dts/r8a7794-alt.dts b/arch/arm/dts/r8a7794-alt.dts deleted file mode 100644 index 4d93319674c..00000000000 --- a/arch/arm/dts/r8a7794-alt.dts +++ /dev/null @@ -1,533 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Alt board - * - * Copyright (C) 2014 Renesas Electronics Corporation - */ - -/dts-v1/; -#include "r8a7794.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Alt"; - compatible = "renesas,alt", "renesas,r8a7794"; - - aliases { - serial0 = &scif2; - i2c9 = &gpioi2c1; - i2c10 = &gpioi2c4; - i2c11 = &i2chdmi; - i2c12 = &i2cexio4; - mmc0 = &mmcif0; - mmc1 = &sdhi0; - mmc2 = &sdhi1; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - d3_3v: regulator-d3-3v { - compatible = "regulator-fixed"; - regulator-name = "D3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi0: regulator-vcc-sdhi0 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI0 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi0: regulator-vccq-sdhi0 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI0 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vcc_sdhi1: regulator-vcc-sdhi1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI1 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi1: regulator-vccq-sdhi1 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI1 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - lbsc { - #address-cells = <1>; - #size-cells = <1>; - }; - - keyboard { - compatible = "gpio-keys"; - - pinctrl-0 = <&keyboard_pins>; - pinctrl-names = "default"; - - one { - linux,code = <KEY_1>; - label = "SW2-1"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; - }; - two { - linux,code = <KEY_2>; - label = "SW2-2"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; - }; - three { - linux,code = <KEY_3>; - label = "SW2-3"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; - }; - four { - linux,code = <KEY_4>; - label = "SW2-4"; - wakeup-source; - debounce-interval = <20>; - gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - }; - }; - - vga-encoder { - compatible = "adi,adv7123"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb1>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; - }; - }; - }; - - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; - }; - - x2_clk: x2-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - x13_clk: x13-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - gpioi2c1: i2c-9 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - }; - - gpioi2c4: i2c-10 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - /* - * A fallback to GPIO is provided for I2C1. - */ - i2chdmi: i2c-11 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c1>, <&gpioi2c1>; - i2c-bus-name = "i2c-hdmi"; - #address-cells = <1>; - #size-cells = <0>; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin0ep>; - }; - }; - }; - - eeprom@50 { - compatible = "renesas,r1ex24002", "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - }; - - /* - * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA). - * A fallback to GPIO is provided. - */ - i2cexio4: i2c-14 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c4>, <&gpioi2c4>; - i2c-bus-name = "i2c-exio4"; - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; - -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - -&usbphy { - status = "okay"; -}; - -&du { - pinctrl-0 = <&du_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&x13_clk>, <&x2_clk>; - clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; - - ports { - port@1 { - endpoint { - remote-endpoint = <&adv7123_in>; - }; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - du_pins: du { - groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; - function = "du1"; - }; - - scif2_pins: scif2 { - groups = "scif2_data"; - function = "scif2"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq8"; - function = "intc"; - }; - - i2c1_pins: i2c1 { - groups = "i2c1"; - function = "i2c1"; - }; - - i2c4_pins: i2c4 { - groups = "i2c4"; - function = "i2c4"; - }; - - vin0_pins: vin0 { - groups = "vin0_data8", "vin0_clk"; - function = "vin0"; - }; - - mmcif0_pins: mmcif0 { - groups = "mmc_data8", "mmc_ctrl"; - function = "mmc"; - }; - - sdhi0_pins: sd0 { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <3300>; - }; - - sdhi0_pins_uhs: sd0_uhs { - groups = "sdhi0_data4", "sdhi0_ctrl"; - function = "sdhi0"; - power-source = <1800>; - }; - - sdhi1_pins: sd1 { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - power-source = <3300>; - }; - - sdhi1_pins_uhs: sd1_uhs { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - power-source = <1800>; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; - - keyboard_pins: keyboard { - pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12"; - bias-pull-up; - }; -}; - -&cmt0 { - status = "okay"; -}; - -&pfc { - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <8 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; - }; -}; - -&mmcif0 { - pinctrl-0 = <&mmcif0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&d3_3v>; - vqmmc-supply = <&d3_3v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&sdhi0 { - pinctrl-0 = <&sdhi0_pins>; - pinctrl-1 = <&sdhi0_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi0>; - vqmmc-supply = <&vccq_sdhi0>; - cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; - sd-uhs-sdr50; - sd-uhs-sdr104; - status = "okay"; -}; - -&sdhi1 { - pinctrl-0 = <&sdhi1_pins>; - pinctrl-1 = <&sdhi1_pins_uhs>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&vcc_sdhi1>; - vqmmc-supply = <&vccq_sdhi1>; - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; - sd-uhs-sdr50; - status = "okay"; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "i2c-hdmi"; - - clock-frequency = <400000>; -}; - -&i2c4 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "i2c-exio4"; -}; - -&i2c7 { - status = "okay"; - clock-frequency = <100000>; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - interrupt-parent = <&gpio3>; - interrupts = <31 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; -}; - -&vin0 { - status = "okay"; - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - port { - vin0ep: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition@40000 { - label = "system"; - reg = <0x00040000 0x00040000>; - read-only; - }; - partition@80000 { - label = "user"; - reg = <0x00080000 0x03f80000>; - }; - }; - }; -}; diff --git a/arch/arm/dts/r8a7794-silk.dts b/arch/arm/dts/r8a7794-silk.dts deleted file mode 100644 index b7af1befa12..00000000000 --- a/arch/arm/dts/r8a7794-silk.dts +++ /dev/null @@ -1,578 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the SILK board - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2014-2015 Renesas Solutions Corp. - * Copyright (C) 2014-2015 Cogent Embedded, Inc. - */ - -/* - * SSI-AK4643 - * - * SW1: 2-1: AK4643 - * 2-3: ADV7511 - * - * This command is required before playback/capture: - * - * amixer set "LINEOUT Mixer DACL" on - */ - -/dts-v1/; -#include "r8a7794.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "SILK"; - compatible = "renesas,silk", "renesas,r8a7794"; - - aliases { - serial0 = &scif2; - i2c9 = &gpioi2c1; - i2c10 = &i2chdmi; - mmc0 = &mmcif0; - mmc1 = &sdhi1; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0 0x40000000 0 0x40000000>; - }; - - keyboard { - compatible = "gpio-keys"; - - pinctrl-0 = <&keyboard_pins>; - pinctrl-names = "default"; - - key-3 { - gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; - linux,code = <KEY_3>; - label = "SW3"; - wakeup-source; - debounce-interval = <20>; - }; - key-4 { - gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; - linux,code = <KEY_4>; - label = "SW4"; - wakeup-source; - debounce-interval = <20>; - }; - key-6 { - gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; - linux,code = <KEY_6>; - label = "SW6"; - wakeup-source; - debounce-interval = <20>; - }; - key-a { - gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; - linux,code = <KEY_A>; - label = "SW12-1"; - wakeup-source; - debounce-interval = <20>; - }; - key-b { - gpios = <&gpio3 10 GPIO_ACTIVE_LOW>; - linux,code = <KEY_B>; - label = "SW12-2"; - wakeup-source; - debounce-interval = <20>; - }; - key-c { - gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; - linux,code = <KEY_C>; - label = "SW12-3"; - wakeup-source; - debounce-interval = <20>; - }; - key-d { - gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; - linux,code = <KEY_D>; - label = "SW12-4"; - wakeup-source; - debounce-interval = <20>; - }; - }; - - d3_3v: regulator-d3-3v { - compatible = "regulator-fixed"; - regulator-name = "D3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_sdhi1: regulator-vcc-sdhi1 { - compatible = "regulator-fixed"; - - regulator-name = "SDHI1 Vcc"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - vccq_sdhi1: regulator-vccq-sdhi1 { - compatible = "regulator-gpio"; - - regulator-name = "SDHI1 VccQ"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; - gpios-states = <1>; - states = <3300000 1>, <1800000 0>; - }; - - vga-encoder { - compatible = "adi,adv7123"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb1>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; - }; - }; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; - }; - - x2_clk: x2-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - x3_clk: x3-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; - }; - - x9_clk: audio_clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <12288000>; - }; - - sound { - compatible = "simple-audio-card"; - - simple-audio-card,format = "left_j"; - simple-audio-card,bitclock-master = <&soundcodec>; - simple-audio-card,frame-master = <&soundcodec>; - - simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - - soundcodec: simple-audio-card,codec { - sound-dai = <&ak4643>; - clocks = <&x9_clk>; - }; - }; - - gpioi2c1: i2c-9 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - status = "disabled"; - scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - i2c-gpio,delay-us = <5>; - }; - - /* - * A fallback to GPIO is provided for I2C1. - */ - i2chdmi: i2c-10 { - compatible = "i2c-demux-pinctrl"; - i2c-parent = <&i2c1>, <&gpioi2c1>; - i2c-bus-name = "i2c-hdmi"; - #address-cells = <1>; - #size-cells = <0>; - - ak4643: codec@12 { - compatible = "asahi-kasei,ak4643"; - #sound-dai-cells = <0>; - reg = <0x12>; - }; - - composite-in@20 { - compatible = "adi,adv7180"; - reg = <0x20>; - - port { - adv7180: endpoint { - bus-width = <8>; - remote-endpoint = <&vin0ep>; - }; - }; - }; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio5>; - interrupts = <23 IRQ_TYPE_LEVEL_LOW>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&du_out_rgb0>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; - - eeprom@50 { - compatible = "renesas,r1ex24002", "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - scif2_pins: scif2 { - groups = "scif2_data"; - function = "scif2"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; - - ether_pins: ether { - groups = "eth_link", "eth_mdio", "eth_rmii"; - function = "eth"; - }; - - phy1_pins: phy1 { - groups = "intc_irq8"; - function = "intc"; - }; - - i2c1_pins: i2c1 { - groups = "i2c1"; - function = "i2c1"; - }; - - mmcif0_pins: mmcif0 { - groups = "mmc_data8", "mmc_ctrl"; - function = "mmc"; - }; - - sdhi1_pins: sd1 { - groups = "sdhi1_data4", "sdhi1_ctrl"; - function = "sdhi1"; - }; - - qspi_pins: qspi { - groups = "qspi_ctrl", "qspi_data4"; - function = "qspi"; - }; - - vin0_pins: vin0 { - groups = "vin0_data8", "vin0_clk"; - function = "vin0"; - }; - - usb0_pins: usb0 { - groups = "usb0"; - function = "usb0"; - }; - - usb1_pins: usb1 { - groups = "usb1"; - function = "usb1"; - }; - - du0_pins: du0 { - groups = "du0_rgb888", "du0_sync", "du0_disp", "du0_clk0_out"; - function = "du0"; - }; - - du1_pins: du1 { - groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out"; - function = "du1"; - }; - - keyboard_pins: keyboard { - pins = "GP_3_9", "GP_3_10", "GP_3_11", "GP_3_12"; - bias-pull-up; - }; - - ssi_pins: sound { - groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data"; - function = "ssi"; - }; - - audio_clk_pins: audio_clk { - groups = "audio_clkc"; - function = "audio_clk"; - }; -}; - -&scif2 { - pinctrl-0 = <&scif2_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; - -&ether { - pinctrl-0 = <&ether_pins>, <&phy1_pins>; - pinctrl-names = "default"; - - phy-handle = <&phy1>; - renesas,ether-link-active-low; - status = "okay"; - - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id0022.1537", - "ethernet-phy-ieee802.3-c22"; - reg = <1>; - interrupt-parent = <&irqc0>; - interrupts = <8 IRQ_TYPE_LEVEL_LOW>; - micrel,led-mode = <1>; - reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; - }; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "i2c-hdmi"; - - clock-frequency = <400000>; -}; - -&i2c7 { - status = "okay"; - clock-frequency = <100000>; - - pmic@58 { - compatible = "dlg,da9063"; - reg = <0x58>; - interrupt-parent = <&gpio3>; - interrupts = <31 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - - onkey { - compatible = "dlg,da9063-onkey"; - }; - - rtc { - compatible = "dlg,da9063-rtc"; - }; - - watchdog { - compatible = "dlg,da9063-watchdog"; - }; - }; -}; - -&mmcif0 { - pinctrl-0 = <&mmcif0_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&d3_3v>; - vqmmc-supply = <&d3_3v>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&sdhi1 { - pinctrl-0 = <&sdhi1_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_sdhi1>; - vqmmc-supply = <&vccq_sdhi1>; - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&qspi { - pinctrl-0 = <&qspi_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "loader"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition@40000 { - label = "user"; - reg = <0x00040000 0x00400000>; - read-only; - }; - partition@440000 { - label = "flash"; - reg = <0x00440000 0x03bc0000>; - }; - }; - }; -}; - -/* composite video input */ -&vin0 { - status = "okay"; - pinctrl-0 = <&vin0_pins>; - pinctrl-names = "default"; - - port { - vin0ep: endpoint { - remote-endpoint = <&adv7180>; - bus-width = <8>; - }; - }; -}; - -&pci0 { - status = "okay"; - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; -}; - -&pci1 { - status = "okay"; - pinctrl-0 = <&usb1_pins>; - pinctrl-names = "default"; -}; - -&usbphy { - status = "okay"; -}; - -&du { - pinctrl-0 = <&du0_pins>, <&du1_pins>; - pinctrl-names = "default"; - status = "okay"; - - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&x2_clk>, <&x3_clk>; - clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; - - ports { - port@0 { - endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - port@1 { - endpoint { - remote-endpoint = <&adv7123_in>; - }; - }; - }; -}; - -&rcar_sound { - pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>; - pinctrl-names = "default"; - status = "okay"; - - /* Single DAI */ - #sound-dai-cells = <0>; - - rcar_sound,dai { - dai0 { - playback = <&ssi0>; - capture = <&ssi1>; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&ssi1 { - shared-pin; -}; diff --git a/arch/arm/dts/r8a7794.dtsi b/arch/arm/dts/r8a7794.dtsi deleted file mode 100644 index 371dd4715dd..00000000000 --- a/arch/arm/dts/r8a7794.dtsi +++ /dev/null @@ -1,1437 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car E2 (R8A77940) SoC - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2014 Ulrich Hecht - */ - -#include <dt-bindings/clock/r8a7794-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/power/r8a7794-sysc.h> - -/ { - compatible = "renesas,r8a7794"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - spi0 = &qspi; - vin0 = &vin0; - vin1 = &vin1; - }; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clka: audio_clka { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clkb: audio_clkb { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - audio_clkc: audio_clkc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0>; - clock-frequency = <1000000000>; - clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; - power-domains = <&sysc R8A7794_PD_CA7_CPU0>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA7>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <1>; - clock-frequency = <1000000000>; - clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>; - power-domains = <&sysc R8A7794_PD_CA7_CPU1>; - enable-method = "renesas,apmu"; - next-level-cache = <&L2_CA7>; - }; - - L2_CA7: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A7794_PD_CA7_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - /* External root clock */ - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - pmu { - compatible = "arm,cortex-a7-pmu"; - interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; - - /* External SCIF clock */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board. */ - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7794-wdt", - "renesas,rcar-gen2-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 28>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a7794", - "renesas,rcar-gen2-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7794"; - reg = <0 0xe6060000 0 0x11c>; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7794-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&usb_extal_clk>; - clock-names = "extal", "usb_extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - apmu@e6151000 { - compatible = "renesas,r8a7794-apmu", "renesas,apmu"; - reg = <0 0xe6151000 0 0x188>; - cpus = <&cpu0>, <&cpu1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7794-rst"; - reg = <0 0xe6160000 0 0x0100>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7794-sysc"; - reg = <0 0xe6180000 0 0x0200>; - #power-domain-cells = <1>; - }; - - irqc0: interrupt-controller@e61c0000 { - compatible = "renesas,irqc-r8a7794", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - ipmmu_sy0: iommu@e6280000 { - compatible = "renesas,ipmmu-r8a7794", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6280000 0 0x1000>; - interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_sy1: iommu@e6290000 { - compatible = "renesas,ipmmu-r8a7794", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6290000 0 0x1000>; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_ds: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a7794", - "renesas,ipmmu-vmsa"; - reg = <0 0xe6740000 0 0x1000>; - interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mp: iommu@ec680000 { - compatible = "renesas,ipmmu-r8a7794", - "renesas,ipmmu-vmsa"; - reg = <0 0xec680000 0 0x1000>; - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_mx: iommu@fe951000 { - compatible = "renesas,ipmmu-r8a7794", - "renesas,ipmmu-vmsa"; - reg = <0 0xfe951000 0 0x1000>; - interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - ipmmu_gp: iommu@e62a0000 { - compatible = "renesas,ipmmu-r8a7794", - "renesas,ipmmu-vmsa"; - reg = <0 0xe62a0000 0 0x1000>; - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; - #iommu-cells = <1>; - status = "disabled"; - }; - - icram0: sram@e63a0000 { - compatible = "mmio-sram"; - reg = <0 0xe63a0000 0 0x12000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63a0000 0x12000>; - }; - - icram1: sram@e63c0000 { - compatible = "mmio-sram"; - reg = <0 0xe63c0000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0xe63c0000 0x1000>; - - smp-sram@0 { - compatible = "renesas,smp-sram"; - reg = <0 0x100>; - }; - }; - - /* The memory map in the User's Manual maps the cores to - * bus numbers - */ - i2c0: i2c@e6508000 { - compatible = "renesas,i2c-r8a7794", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 931>; - #address-cells = <1>; - #size-cells = <0>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c1: i2c@e6518000 { - compatible = "renesas,i2c-r8a7794", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6518000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 930>; - #address-cells = <1>; - #size-cells = <0>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6530000 { - compatible = "renesas,i2c-r8a7794", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6530000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 929>; - #address-cells = <1>; - #size-cells = <0>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e6540000 { - compatible = "renesas,i2c-r8a7794", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6540000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 928>; - #address-cells = <1>; - #size-cells = <0>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c4: i2c@e6520000 { - compatible = "renesas,i2c-r8a7794", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6520000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 927>; - #address-cells = <1>; - #size-cells = <0>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c5: i2c@e6528000 { - compatible = "renesas,i2c-r8a7794", - "renesas,rcar-gen2-i2c"; - reg = <0 0xe6528000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 925>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 925>; - #address-cells = <1>; - #size-cells = <0>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c6: i2c@e6500000 { - compatible = "renesas,iic-r8a7794", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6500000 0 0x425>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - dmas = <&dmac0 0x61>, <&dmac0 0x62>, - <&dmac1 0x61>, <&dmac1 0x62>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 318>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c7: i2c@e6510000 { - compatible = "renesas,iic-r8a7794", - "renesas,rcar-gen2-iic", - "renesas,rmobile-iic"; - reg = <0 0xe6510000 0 0x425>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 323>; - dmas = <&dmac0 0x65>, <&dmac0 0x66>, - <&dmac1 0x65>, <&dmac1 0x66>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 323>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7794", - "renesas,rcar-gen2-usbhs"; - reg = <0 0xe6590000 0 0x100>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 704>; - renesas,buswait = <4>; - phys = <&usb0 1>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: usb-phy-controller@e6590100 { - compatible = "renesas,usb-phy-r8a7794", - "renesas,rcar-gen2-usb-phy"; - reg = <0 0xe6590100 0 0x100>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cpg CPG_MOD 704>; - clock-names = "usbhs"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 704>; - status = "disabled"; - - usb0: usb-phy@0 { - reg = <0>; - #phy-cells = <1>; - }; - usb2: usb-phy@2 { - reg = <2>; - #phy-cells = <1>; - }; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7794", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - dmac1: dma-controller@e6720000 { - compatible = "renesas,dmac-r8a7794", - "renesas,rcar-dmac"; - reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <15>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7794", - "renesas,etheravb-rcar-gen2"; - reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 812>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - qspi: spi@e6b10000 { - compatible = "renesas,qspi-r8a7794", "renesas,qspi"; - reg = <0 0xe6b10000 0 0x2c>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - dmas = <&dmac0 0x17>, <&dmac0 0x18>, - <&dmac1 0x17>, <&dmac1 0x18>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 917>; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - scifa0: serial@e6c40000 { - compatible = "renesas,scifa-r8a7794", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>; - clock-names = "fck"; - dmas = <&dmac0 0x21>, <&dmac0 0x22>, - <&dmac1 0x21>, <&dmac1 0x22>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scifa1: serial@e6c50000 { - compatible = "renesas,scifa-r8a7794", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>; - clock-names = "fck"; - dmas = <&dmac0 0x25>, <&dmac0 0x26>, - <&dmac1 0x25>, <&dmac1 0x26>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scifa2: serial@e6c60000 { - compatible = "renesas,scifa-r8a7794", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c60000 0 64>; - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>; - clock-names = "fck"; - dmas = <&dmac0 0x27>, <&dmac0 0x28>, - <&dmac1 0x27>, <&dmac1 0x28>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - scifa3: serial@e6c70000 { - compatible = "renesas,scifa-r8a7794", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c70000 0 64>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1106>; - clock-names = "fck"; - dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, - <&dmac1 0x1b>, <&dmac1 0x1c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 1106>; - status = "disabled"; - }; - - scifa4: serial@e6c78000 { - compatible = "renesas,scifa-r8a7794", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c78000 0 64>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1107>; - clock-names = "fck"; - dmas = <&dmac0 0x1f>, <&dmac0 0x20>, - <&dmac1 0x1f>, <&dmac1 0x20>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 1107>; - status = "disabled"; - }; - - scifa5: serial@e6c80000 { - compatible = "renesas,scifa-r8a7794", - "renesas,rcar-gen2-scifa", "renesas,scifa"; - reg = <0 0xe6c80000 0 64>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1108>; - clock-names = "fck"; - dmas = <&dmac0 0x23>, <&dmac0 0x24>, - <&dmac1 0x23>, <&dmac1 0x24>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 1108>; - status = "disabled"; - }; - - scifb0: serial@e6c20000 { - compatible = "renesas,scifb-r8a7794", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c20000 0 0x100>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>; - clock-names = "fck"; - dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, - <&dmac1 0x3d>, <&dmac1 0x3e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scifb1: serial@e6c30000 { - compatible = "renesas,scifb-r8a7794", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6c30000 0 0x100>; - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>; - clock-names = "fck"; - dmas = <&dmac0 0x19>, <&dmac0 0x1a>, - <&dmac1 0x19>, <&dmac1 0x1a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scifb2: serial@e6ce0000 { - compatible = "renesas,scifb-r8a7794", - "renesas,rcar-gen2-scifb", "renesas,scifb"; - reg = <0 0xe6ce0000 0 0x100>; - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 216>; - clock-names = "fck"; - dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, - <&dmac1 0x1d>, <&dmac1 0x1e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 216>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7794", - "renesas,rcar-gen2-scif", - "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x29>, <&dmac0 0x2a>, - <&dmac1 0x29>, <&dmac1 0x2a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 721>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7794", - "renesas,rcar-gen2-scif", - "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, - <&dmac1 0x2d>, <&dmac1 0x2e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 720>; - status = "disabled"; - }; - - scif2: serial@e6e58000 { - compatible = "renesas,scif-r8a7794", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6e58000 0 64>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, - <&dmac1 0x2b>, <&dmac1 0x2c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 719>; - status = "disabled"; - }; - - scif3: serial@e6ea8000 { - compatible = "renesas,scif-r8a7794", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ea8000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x2f>, <&dmac0 0x30>, - <&dmac1 0x2f>, <&dmac1 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 718>; - status = "disabled"; - }; - - scif4: serial@e6ee0000 { - compatible = "renesas,scif-r8a7794", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ee0000 0 64>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, - <&dmac1 0xfb>, <&dmac1 0xfc>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - }; - - scif5: serial@e6ee8000 { - compatible = "renesas,scif-r8a7794", - "renesas,rcar-gen2-scif", "renesas,scif"; - reg = <0 0xe6ee8000 0 64>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, - <&dmac1 0xfd>, <&dmac1 0xfe>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - }; - - hscif0: serial@e62c0000 { - compatible = "renesas,hscif-r8a7794", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c0000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>, - <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x3a>, - <&dmac1 0x39>, <&dmac1 0x3a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - hscif1: serial@e62c8000 { - compatible = "renesas,hscif-r8a7794", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62c8000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>, - <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, - <&dmac1 0x4d>, <&dmac1 0x4e>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - hscif2: serial@e62d0000 { - compatible = "renesas,hscif-r8a7794", - "renesas,rcar-gen2-hscif", "renesas,hscif"; - reg = <0 0xe62d0000 0 96>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, - <&dmac1 0x3b>, <&dmac1 0x3c>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - }; - - can0: can@e6e80000 { - compatible = "renesas,can-r8a7794", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e80000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6e88000 { - compatible = "renesas,can-r8a7794", - "renesas,rcar-gen2-can"; - reg = <0 0xe6e88000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7794", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 811>; - status = "disabled"; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7794", - "renesas,rcar-gen2-vin"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 810>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a7794", - "renesas,rcar_sound-gen2"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, - <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, - <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, - <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clka>, <&audio_clkb>, <&audio_clkc>, - <&cpg CPG_CORE R8A7794_CLK_M2>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.6", "src.5", "src.4", "src.3", - "src.2", "src.1", - "ctu.0", "ctu.1", - "mix.0", "mix.1", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma0 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma0 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,src { - src-0 { - status = "disabled"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma0 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma0 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma0 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma0 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma0 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma0 0xb4>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma0 0x02>, - <&audma0 0x15>, <&audma0 0x16>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma0 0x04>, - <&audma0 0x49>, <&audma0 0x4a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma0 0x06>, - <&audma0 0x63>, <&audma0 0x64>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma0 0x08>, - <&audma0 0x6f>, <&audma0 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma0 0x0a>, - <&audma0 0x71>, <&audma0 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma0 0x0c>, - <&audma0 0x73>, <&audma0 0x74>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma0 0x0e>, - <&audma0 0x75>, <&audma0 0x76>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma0 0x10>, - <&audma0 0x79>, <&audma0 0x7a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma0 0x12>, - <&audma0 0x7b>, <&audma0 0x7c>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma0 0x14>, - <&audma0 0x7d>, <&audma0 0x7e>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a7794", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", - "ch12"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <13>; - }; - - pci0: pci@ee090000 { - compatible = "renesas,pci-r8a7794", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - reg = <0 0xee090000 0 0xc00>, - <0 0xee080000 0 0x1100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - - bus-range = <0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x800 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x1000 0 0 0 0>; - phys = <&usb0 0>; - phy-names = "usb"; - }; - }; - - pci1: pci@ee0d0000 { - compatible = "renesas,pci-r8a7794", - "renesas,pci-rcar-gen2"; - device_type = "pci"; - reg = <0 0xee0d0000 0 0xc00>, - <0 0xee0c0000 0 0x1100>; - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - - bus-range = <1 1>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; - interrupt-map-mask = <0xf800 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - - usb@1,0 { - reg = <0x10800 0 0 0 0>; - phys = <&usb2 0>; - phy-names = "usb"; - }; - - usb@2,0 { - reg = <0x11000 0 0 0 0>; - phys = <&usb2 0>; - phy-names = "usb"; - }; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7794", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee100000 0 0x328>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; - dmas = <&dmac0 0xcd>, <&dmac0 0xce>, - <&dmac1 0xcd>, <&dmac1 0xce>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <195000000>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: mmc@ee140000 { - compatible = "renesas,sdhi-r8a7794", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee140000 0 0x100>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; - dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, - <&dmac1 0xc1>, <&dmac1 0xc2>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi2: mmc@ee160000 { - compatible = "renesas,sdhi-r8a7794", - "renesas,rcar-gen2-sdhi"; - reg = <0 0xee160000 0 0x100>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; - dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, - <&dmac1 0xd3>, <&dmac1 0xd4>; - dma-names = "tx", "rx", "tx", "rx"; - max-frequency = <97500000>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 311>; - status = "disabled"; - }; - - mmcif0: mmc@ee200000 { - compatible = "renesas,mmcif-r8a7794", - "renesas,sh-mmcif"; - reg = <0 0xee200000 0 0x80>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 315>; - dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, - <&dmac1 0xd1>, <&dmac1 0xd2>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 315>; - reg-io-width = <4>; - status = "disabled"; - }; - - ether: ethernet@ee700000 { - compatible = "renesas,ether-r8a7794", - "renesas,rcar-gen2-ether"; - reg = <0 0xee700000 0 0x400>; - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 813>; - phy-mode = "rmii"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1001000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0xf1001000 0 0x1000>, - <0 0xf1002000 0 0x2000>, - <0 0xf1004000 0 0x2000>, - <0 0xf1006000 0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - vsp@fe928000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe928000 0 0x8000>; - interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 131>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 131>; - }; - - vsp@fe930000 { - compatible = "renesas,vsp1"; - reg = <0 0xfe930000 0 0x8000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 128>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 128>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 119>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7794"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_rgb0: endpoint { - }; - }; - port@1 { - reg = <1>; - du_out_rgb1: endpoint { - }; - }; - }; - }; - - prr: chipid@ff000044 { - compatible = "renesas,prr"; - reg = <0 0xff000044 0 4>; - }; - - cmt0: timer@ffca0000 { - compatible = "renesas,r8a7794-cmt0", - "renesas,rcar-gen2-cmt0"; - reg = <0 0xffca0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 124>; - - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7794-cmt1", - "renesas,rcar-gen2-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 329>; - clock-names = "fck"; - power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; - resets = <&cpg 329>; - - status = "disabled"; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clock - can be overridden by the board */ - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <48000000>; - }; -}; diff --git a/arch/arm/dts/r8a77950-salvator-x.dts b/arch/arm/dts/r8a77950-salvator-x.dts deleted file mode 100644 index c6ca61a8ed4..00000000000 --- a/arch/arm/dts/r8a77950-salvator-x.dts +++ /dev/null @@ -1,49 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Salvator-X board with R-Car H3 ES1.x - * - * Copyright (C) 2015 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a77950.dtsi" -#include "salvator-x.dtsi" - -/ { - model = "Renesas Salvator-X board based on r8a77950"; - compatible = "renesas,salvator-x", "renesas,r8a7795"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x38000000>; - }; - - memory@500000000 { - device_type = "memory"; - reg = <0x5 0x00000000 0x0 0x40000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x40000000>; - }; - - memory@700000000 { - device_type = "memory"; - reg = <0x7 0x00000000 0x0 0x40000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&x21_clk>, - <&x22_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", "du.3", - "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; -}; diff --git a/arch/arm/dts/r8a77950-ulcb.dts b/arch/arm/dts/r8a77950-ulcb.dts deleted file mode 100644 index 5340579931e..00000000000 --- a/arch/arm/dts/r8a77950-ulcb.dts +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES1.x - * - * Copyright (C) 2016 Renesas Electronics Corp. - * Copyright (C) 2016 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77950.dtsi" -#include "ulcb.dtsi" - -/ { - model = "Renesas H3ULCB board based on r8a77950"; - compatible = "renesas,h3ulcb", "renesas,r8a7795"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x38000000>; - }; - - memory@500000000 { - device_type = "memory"; - reg = <0x5 0x00000000 0x0 0x40000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x40000000>; - }; - - memory@700000000 { - device_type = "memory"; - reg = <0x7 0x00000000 0x0 0x40000000>; - }; -}; diff --git a/arch/arm/dts/r8a77950.dtsi b/arch/arm/dts/r8a77950.dtsi deleted file mode 100644 index 57eb88177e9..00000000000 --- a/arch/arm/dts/r8a77950.dtsi +++ /dev/null @@ -1,330 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car H3 (R8A77950) SoC - * - * Copyright (C) 2015 Renesas Electronics Corp. - */ - -#include "r8a77951.dtsi" - -#undef SOC_HAS_USB2_CH3 - -&audma0 { - iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>, - <&ipmmu_mp1 2>, <&ipmmu_mp1 3>, - <&ipmmu_mp1 4>, <&ipmmu_mp1 5>, - <&ipmmu_mp1 6>, <&ipmmu_mp1 7>, - <&ipmmu_mp1 8>, <&ipmmu_mp1 9>, - <&ipmmu_mp1 10>, <&ipmmu_mp1 11>, - <&ipmmu_mp1 12>, <&ipmmu_mp1 13>, - <&ipmmu_mp1 14>, <&ipmmu_mp1 15>; -}; - -&audma1 { - iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>, - <&ipmmu_mp1 18>, <&ipmmu_mp1 19>, - <&ipmmu_mp1 20>, <&ipmmu_mp1 21>, - <&ipmmu_mp1 22>, <&ipmmu_mp1 23>, - <&ipmmu_mp1 24>, <&ipmmu_mp1 25>, - <&ipmmu_mp1 26>, <&ipmmu_mp1 27>, - <&ipmmu_mp1 28>, <&ipmmu_mp1 29>, - <&ipmmu_mp1 30>, <&ipmmu_mp1 31>; -}; - -&cluster0_opp { - /delete-node/ opp-1600000000; - /delete-node/ opp-1700000000; -}; - -&du { - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>; -}; - -&fcpvb1 { - iommus = <&ipmmu_vp0 7>; -}; - -&fcpf1 { - iommus = <&ipmmu_vp0 1>; -}; - -&fcpvi1 { - iommus = <&ipmmu_vp0 9>; -}; - -&fcpvd2 { - iommus = <&ipmmu_vi0 10>; -}; - -&gpio1 { - gpio-ranges = <&pfc 0 32 28>; -}; - -&ipmmu_vi0 { - renesas,ipmmu-main = <&ipmmu_mm 11>; -}; - -&ipmmu_vp0 { - renesas,ipmmu-main = <&ipmmu_mm 12>; -}; - -&ipmmu_vc0 { - renesas,ipmmu-main = <&ipmmu_mm 9>; -}; - -&ipmmu_vc1 { - renesas,ipmmu-main = <&ipmmu_mm 10>; -}; - -&ipmmu_rt { - renesas,ipmmu-main = <&ipmmu_mm 7>; -}; - -&soc { - /delete-node/ dma-controller@e6460000; - /delete-node/ dma-controller@e6470000; - - ipmmu_mp1: iommu@ec680000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xec680000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 5>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_sy: iommu@e7730000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xe7730000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 8>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - /delete-node/ iommu@fd950000; - /delete-node/ iommu@fd960000; - /delete-node/ iommu@fd970000; - /delete-node/ iommu@febe0000; - /delete-node/ iommu@fe980000; - - xhci1: usb@ee040000 { - compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; - reg = <0 0xee040000 0 0xc00>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 327>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 327>; - status = "disabled"; - }; - - /delete-node/ usb@e659c000; - /delete-node/ usb@ee0e0000; - /delete-node/ usb@ee0e0100; - - /delete-node/ usb-phy@ee0e0200; - - fdp1@fe948000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe948000 0 0x2400>; - interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 117>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 117>; - renesas,fcp = <&fcpf2>; - }; - - fcpf2: fcp@fe952000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe952000 0 0x200>; - clocks = <&cpg CPG_MOD 613>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 613>; - iommus = <&ipmmu_vp0 2>; - }; - - fcpvd3: fcp@fea3f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea3f000 0 0x200>; - clocks = <&cpg CPG_MOD 600>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 600>; - iommus = <&ipmmu_vi0 11>; - }; - - fcpvi2: fcp@fe9cf000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9cf000 0 0x200>; - clocks = <&cpg CPG_MOD 609>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 609>; - iommus = <&ipmmu_vp0 10>; - }; - - vspd3: vsp@fea38000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea38000 0 0x5000>; - interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 620>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 620>; - - renesas,fcp = <&fcpvd3>; - }; - - vspi2: vsp@fe9c0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9c0000 0 0x8000>; - interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 629>; - - renesas,fcp = <&fcpvi2>; - }; - - csi21: csi2@fea90000 { - compatible = "renesas,r8a7795-csi2"; - reg = <0 0xfea90000 0 0x10000>; - interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi21vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi21>; - }; - csi21vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi21>; - }; - csi21vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi21>; - }; - csi21vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi21>; - }; - csi21vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi21>; - }; - csi21vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi21>; - }; - csi21vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi21>; - }; - csi21vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi21>; - }; - }; - }; - }; -}; - -&vin0 { - ports { - port@1 { - vin0csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin0>; - }; - }; - }; -}; - -&vin1 { - ports { - port@1 { - vin1csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin1>; - }; - }; - }; -}; - -&vin2 { - ports { - port@1 { - vin2csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin2>; - }; - }; - }; -}; - -&vin3 { - ports { - port@1 { - vin3csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin3>; - }; - }; - }; -}; - -&vin4 { - ports { - port@1 { - vin4csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin4>; - }; - }; - }; -}; - -&vin5 { - ports { - port@1 { - vin5csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin5>; - }; - }; - }; -}; - -&vin6 { - ports { - port@1 { - vin6csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin6>; - }; - }; - }; -}; - -&vin7 { - ports { - port@1 { - vin7csi21: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi21vin7>; - }; - }; - }; -}; diff --git a/arch/arm/dts/r8a77951.dtsi b/arch/arm/dts/r8a77951.dtsi deleted file mode 100644 index 6d15229d25a..00000000000 --- a/arch/arm/dts/r8a77951.dtsi +++ /dev/null @@ -1,3485 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car H3 (R8A77951) SoC - * - * Copyright (C) 2015 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a7795-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a7795-sysc.h> - -#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 - -#define SOC_HAS_HDMI1 -#define SOC_HAS_SATA -#define SOC_HAS_USB2_CH2 -#define SOC_HAS_USB2_CH3 - -/ { - compatible = "renesas,r8a7795"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - opp-1600000000 { - opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <900000>; - clock-latency-ns = <300000>; - }; - opp-1700000000 { - opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <960000>; - clock-latency-ns = <300000>; - turbo-mode; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&a57_0>; - }; - core1 { - cpu = <&a57_1>; - }; - core2 { - cpu = <&a57_2>; - }; - core3 { - cpu = <&a57_3>; - }; - }; - - cluster1 { - core0 { - cpu = <&a53_0>; - }; - core1 { - cpu = <&a53_1>; - }; - core2 { - cpu = <&a53_2>; - }; - core3 { - cpu = <&a53_3>; - }; - }; - }; - - a57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA57_CPU0>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - dynamic-power-coefficient = <854>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x1>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA57_CPU1>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_2: cpu@2 { - compatible = "arm,cortex-a57"; - reg = <0x2>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA57_CPU2>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_3: cpu@3 { - compatible = "arm,cortex-a57"; - reg = <0x3>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA57_CPU3>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a53_0: cpu@100 { - compatible = "arm,cortex-a53"; - reg = <0x100>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - #cooling-cells = <2>; - dynamic-power-coefficient = <277>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_1: cpu@101 { - compatible = "arm,cortex-a53"; - reg = <0x101>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_2: cpu@102 { - compatible = "arm,cortex-a53"; - reg = <0x102>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA53_CPU2>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_3: cpu@103 { - compatible = "arm,cortex-a53"; - reg = <0x103>; - device_type = "cpu"; - power-domains = <&sysc R8A7795_PD_CA53_CPU3>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - L2_CA57: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A7795_PD_CA57_SCU>; - cache-unified; - cache-level = <2>; - }; - - L2_CA53: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A7795_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <4000>; - }; - - CPU_SLEEP_1: cpu-sleep-1 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <700>; - exit-latency-us = <700>; - min-residency-us = <5000>; - }; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, - <&a53_1>, - <&a53_2>, - <&a53_3>; - }; - - pmu_a57 { - compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a57_0>, - <&a57_1>, - <&a57_2>, - <&a57_3>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc: soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a7795", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 4>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7795"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a7795-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7795-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a7795-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a7795-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7795-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7795-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7795-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a7795-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>, - <0 0xe61a8000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a7795", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a7795", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a7795", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a7795", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a7795", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7795", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c_dvfs: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7795", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a7795", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a7795", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a7795", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 96>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a7795", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 96>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a7795", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 96>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7795", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - hsusb3: usb@e659c000 { - compatible = "renesas,usbhs-r8a7795", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe659c000 0 0x200>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>; - dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, - <&usb_dmac3 0>, <&usb_dmac3 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy3 3>; - phy-names = "usb"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 705>, <&cpg 700>; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a7795-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a7795-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac2: dma-controller@e6460000 { - compatible = "renesas,r8a7795-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe6460000 0 0x100>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 326>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 326>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac3: dma-controller@e6470000 { - compatible = "renesas,r8a7795-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe6470000 0 0x100>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 329>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 329>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb3_phy0: usb-phy@e65ee000 { - compatible = "renesas,r8a7795-usb3-phy", - "renesas,rcar-gen3-usb3-phy"; - reg = <0 0xe65ee000 0 0x90>; - clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, - <&usb_extal_clk>; - clock-names = "usb3-if", "usb3s_clk", "usb_extal"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 328>; - #phy-cells = <0>; - status = "disabled"; - }; - - arm_cc630p: crypto@e6601000 { - compatible = "arm,cryptocell-630p-ree"; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xe6601000 0 0x1000>; - clocks = <&cpg CPG_MOD 229>; - resets = <&cpg 229>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7795", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a7795", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a7795", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ir: iommu@ff8b0000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xff8b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 3>; - power-domains = <&sysc R8A7795_PD_A3IR>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp0: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv1: iommu@fd950000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfd950000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 7>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv2: iommu@fd960000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfd960000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 8>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv3: iommu@fd970000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfd970000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 9>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 10>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A7795_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vc1: iommu@fe6f0000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfe6f0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 13>; - power-domains = <&sysc R8A7795_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi1: iommu@febe0000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfebe0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 15>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A7795_PD_A3VP>; - #iommu-cells = <1>; - }; - - ipmmu_vp1: iommu@fe980000 { - compatible = "renesas,ipmmu-r8a7795"; - reg = <0 0xfe980000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 17>; - power-domains = <&sysc R8A7795_PD_A3VP>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7795", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a7795", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A7795_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a7795", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A7795_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a7795-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A7795_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7795", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7795", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a7795", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a7795", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a7795", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a7795", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 64>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A7795_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a7795", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a7795", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a7795", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a7795", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a7795", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin1>; - }; - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin2>; - }; - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin3>; - }; - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin4>; - }; - vin4csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin5>; - }; - vin5csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin6>; - }; - vin6csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a7795"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin7>; - }; - vin7csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin7>; - }; - }; - }; - }; - - drif00: rif@e6f40000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f40000 0 0x64>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>; - clock-names = "fck"; - dmas = <&dmac1 0x20>, <&dmac2 0x20>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 515>; - renesas,bonding = <&drif01>; - status = "disabled"; - }; - - drif01: rif@e6f50000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f50000 0 0x64>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>; - clock-names = "fck"; - dmas = <&dmac1 0x22>, <&dmac2 0x22>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 514>; - renesas,bonding = <&drif00>; - status = "disabled"; - }; - - drif10: rif@e6f60000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f60000 0 0x64>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 513>; - clock-names = "fck"; - dmas = <&dmac1 0x24>, <&dmac2 0x24>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 513>; - renesas,bonding = <&drif11>; - status = "disabled"; - }; - - drif11: rif@e6f70000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f70000 0 0x64>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 512>; - clock-names = "fck"; - dmas = <&dmac1 0x26>, <&dmac2 0x26>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 512>; - renesas,bonding = <&drif10>; - status = "disabled"; - }; - - drif20: rif@e6f80000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f80000 0 0x64>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 511>; - clock-names = "fck"; - dmas = <&dmac1 0x28>, <&dmac2 0x28>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 511>; - renesas,bonding = <&drif21>; - status = "disabled"; - }; - - drif21: rif@e6f90000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f90000 0 0x64>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 510>; - clock-names = "fck"; - dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 510>; - renesas,bonding = <&drif20>; - status = "disabled"; - }; - - drif30: rif@e6fa0000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fa0000 0 0x64>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 509>; - clock-names = "fck"; - dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 509>; - renesas,bonding = <&drif31>; - status = "disabled"; - }; - - drif31: rif@e6fb0000 { - compatible = "renesas,r8a7795-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fb0000 0 0x64>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 508>; - clock-names = "fck"; - dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 508>; - renesas,bonding = <&drif30>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A7795_CLK_S0D4>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx"; - }; - ssiu01: ssiu-1 { - dmas = <&audma0 0x35>, <&audma1 0x36>; - dma-names = "rx", "tx"; - }; - ssiu02: ssiu-2 { - dmas = <&audma0 0x37>, <&audma1 0x38>; - dma-names = "rx", "tx"; - }; - ssiu03: ssiu-3 { - dmas = <&audma0 0x47>, <&audma1 0x48>; - dma-names = "rx", "tx"; - }; - ssiu04: ssiu-4 { - dmas = <&audma0 0x3F>, <&audma1 0x40>; - dma-names = "rx", "tx"; - }; - ssiu05: ssiu-5 { - dmas = <&audma0 0x43>, <&audma1 0x44>; - dma-names = "rx", "tx"; - }; - ssiu06: ssiu-6 { - dmas = <&audma0 0x4F>, <&audma1 0x50>; - dma-names = "rx", "tx"; - }; - ssiu07: ssiu-7 { - dmas = <&audma0 0x53>, <&audma1 0x54>; - dma-names = "rx", "tx"; - }; - ssiu10: ssiu-8 { - dmas = <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx"; - }; - ssiu11: ssiu-9 { - dmas = <&audma0 0x4B>, <&audma1 0x4C>; - dma-names = "rx", "tx"; - }; - ssiu12: ssiu-10 { - dmas = <&audma0 0x57>, <&audma1 0x58>; - dma-names = "rx", "tx"; - }; - ssiu13: ssiu-11 { - dmas = <&audma0 0x59>, <&audma1 0x5A>; - dma-names = "rx", "tx"; - }; - ssiu14: ssiu-12 { - dmas = <&audma0 0x5F>, <&audma1 0x60>; - dma-names = "rx", "tx"; - }; - ssiu15: ssiu-13 { - dmas = <&audma0 0xC3>, <&audma1 0xC4>; - dma-names = "rx", "tx"; - }; - ssiu16: ssiu-14 { - dmas = <&audma0 0xC7>, <&audma1 0xC8>; - dma-names = "rx", "tx"; - }; - ssiu17: ssiu-15 { - dmas = <&audma0 0xCB>, <&audma1 0xCC>; - dma-names = "rx", "tx"; - }; - ssiu20: ssiu-16 { - dmas = <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx"; - }; - ssiu21: ssiu-17 { - dmas = <&audma0 0x67>, <&audma1 0x68>; - dma-names = "rx", "tx"; - }; - ssiu22: ssiu-18 { - dmas = <&audma0 0x6B>, <&audma1 0x6C>; - dma-names = "rx", "tx"; - }; - ssiu23: ssiu-19 { - dmas = <&audma0 0x6D>, <&audma1 0x6E>; - dma-names = "rx", "tx"; - }; - ssiu24: ssiu-20 { - dmas = <&audma0 0xCF>, <&audma1 0xCE>; - dma-names = "rx", "tx"; - }; - ssiu25: ssiu-21 { - dmas = <&audma0 0xEB>, <&audma1 0xEC>; - dma-names = "rx", "tx"; - }; - ssiu26: ssiu-22 { - dmas = <&audma0 0xED>, <&audma1 0xEE>; - dma-names = "rx", "tx"; - }; - ssiu27: ssiu-23 { - dmas = <&audma0 0xEF>, <&audma1 0xF0>; - dma-names = "rx", "tx"; - }; - ssiu30: ssiu-24 { - dmas = <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx"; - }; - ssiu31: ssiu-25 { - dmas = <&audma0 0x21>, <&audma1 0x22>; - dma-names = "rx", "tx"; - }; - ssiu32: ssiu-26 { - dmas = <&audma0 0x23>, <&audma1 0x24>; - dma-names = "rx", "tx"; - }; - ssiu33: ssiu-27 { - dmas = <&audma0 0x25>, <&audma1 0x26>; - dma-names = "rx", "tx"; - }; - ssiu34: ssiu-28 { - dmas = <&audma0 0x27>, <&audma1 0x28>; - dma-names = "rx", "tx"; - }; - ssiu35: ssiu-29 { - dmas = <&audma0 0x29>, <&audma1 0x2A>; - dma-names = "rx", "tx"; - }; - ssiu36: ssiu-30 { - dmas = <&audma0 0x2B>, <&audma1 0x2C>; - dma-names = "rx", "tx"; - }; - ssiu37: ssiu-31 { - dmas = <&audma0 0x2D>, <&audma1 0x2E>; - dma-names = "rx", "tx"; - }; - ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx"; - }; - ssiu41: ssiu-33 { - dmas = <&audma0 0x17>, <&audma1 0x18>; - dma-names = "rx", "tx"; - }; - ssiu42: ssiu-34 { - dmas = <&audma0 0x19>, <&audma1 0x1A>; - dma-names = "rx", "tx"; - }; - ssiu43: ssiu-35 { - dmas = <&audma0 0x1B>, <&audma1 0x1C>; - dma-names = "rx", "tx"; - }; - ssiu44: ssiu-36 { - dmas = <&audma0 0x1D>, <&audma1 0x1E>; - dma-names = "rx", "tx"; - }; - ssiu45: ssiu-37 { - dmas = <&audma0 0x1F>, <&audma1 0x20>; - dma-names = "rx", "tx"; - }; - ssiu46: ssiu-38 { - dmas = <&audma0 0x31>, <&audma1 0x32>; - dma-names = "rx", "tx"; - }; - ssiu47: ssiu-39 { - dmas = <&audma0 0x33>, <&audma1 0x34>; - dma-names = "rx", "tx"; - }; - ssiu50: ssiu-40 { - dmas = <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx"; - }; - ssiu60: ssiu-41 { - dmas = <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx"; - }; - ssiu70: ssiu-42 { - dmas = <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx"; - }; - ssiu80: ssiu-43 { - dmas = <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx"; - }; - ssiu90: ssiu-44 { - dmas = <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx"; - }; - ssiu91: ssiu-45 { - dmas = <&audma0 0x7F>, <&audma1 0x80>; - dma-names = "rx", "tx"; - }; - ssiu92: ssiu-46 { - dmas = <&audma0 0x81>, <&audma1 0x82>; - dma-names = "rx", "tx"; - }; - ssiu93: ssiu-47 { - dmas = <&audma0 0x83>, <&audma1 0x84>; - dma-names = "rx", "tx"; - }; - ssiu94: ssiu-48 { - dmas = <&audma0 0xA3>, <&audma1 0xA4>; - dma-names = "rx", "tx"; - }; - ssiu95: ssiu-49 { - dmas = <&audma0 0xA5>, <&audma1 0xA6>; - dma-names = "rx", "tx"; - }; - ssiu96: ssiu-50 { - dmas = <&audma0 0xA7>, <&audma1 0xA8>; - dma-names = "rx", "tx"; - }; - ssiu97: ssiu-51 { - dmas = <&audma0 0xA9>, <&audma1 0xAA>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; - }; - - mlp: mlp@ec520000 { - compatible = "renesas,r8a7795-mlp", - "renesas,rcar-gen3-mlp"; - reg = <0 0xec520000 0 0x800>; - interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 802>; - status = "disabled"; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a7795", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, - <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, - <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, - <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, - <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, - <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, - <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, - <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a7795", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, - <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, - <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, - <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, - <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, - <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, - <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, - <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a7795-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ohci1: usb@ee0a0000 { - compatible = "generic-ohci"; - reg = <0 0xee0a0000 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 1>; - phy-names = "usb"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ohci2: usb@ee0c0000 { - compatible = "generic-ohci"; - reg = <0 0xee0c0000 0 0x100>; - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 701>; - phys = <&usb2_phy2 1>; - phy-names = "usb"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 701>; - status = "disabled"; - }; - - ohci3: usb@ee0e0000 { - compatible = "generic-ohci"; - reg = <0 0xee0e0000 0 0x100>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; - phys = <&usb2_phy3 1>; - phy-names = "usb"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 700>, <&cpg 705>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 2>; - phy-names = "usb"; - companion = <&ohci1>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ehci2: usb@ee0c0100 { - compatible = "generic-ehci"; - reg = <0 0xee0c0100 0 0x100>; - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 701>; - phys = <&usb2_phy2 2>; - phy-names = "usb"; - companion = <&ohci2>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 701>; - status = "disabled"; - }; - - ehci3: usb@ee0e0100 { - compatible = "generic-ehci"; - reg = <0 0xee0e0100 0 0x100>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; - phys = <&usb2_phy3 2>; - phy-names = "usb"; - companion = <&ohci3>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 700>, <&cpg 705>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a7795", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a7795", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 702>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy2: usb-phy@ee0c0200 { - compatible = "renesas,usb2-phy-r8a7795", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0c0200 0 0x700>; - clocks = <&cpg CPG_MOD 701>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 701>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy3: usb-phy@ee0e0200 { - compatible = "renesas,usb2-phy-r8a7795", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0e0200 0 0x700>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 700>, <&cpg 705>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7795", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 314>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a7795", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 313>; - iommus = <&ipmmu_ds1 33>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a7795", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 312>; - iommus = <&ipmmu_ds1 34>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a7795", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 311>; - iommus = <&ipmmu_ds1 35>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a7795-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sata: sata@ee300000 { - compatible = "renesas,sata-r8a7795", - "renesas,rcar-gen3-sata"; - reg = <0 0xee300000 0 0x200000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 815>; - status = "disabled"; - iommus = <&ipmmu_hc 2>; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a7795", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec1: pcie@ee800000 { - compatible = "renesas,pcie-r8a7795", - "renesas,pcie-rcar-gen3"; - reg = <0 0xee800000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, - <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, - <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, - <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 318>; - iommu-map = <0 &ipmmu_hc 1 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec0_ep: pcie-ep@fe000000 { - compatible = "renesas,r8a7795-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xfe000000 0 0x80000>, - <0x0 0xfe100000 0 0x100000>, - <0x0 0xfe200000 0 0x200000>, - <0x0 0x30000000 0 0x8000000>, - <0x0 0x38000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>; - clock-names = "pcie"; - resets = <&cpg 319>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pciec1_ep: pcie-ep@ee800000 { - compatible = "renesas,r8a7795-pcie-ep", - "renesas,rcar-gen3-pcie-ep"; - reg = <0x0 0xee800000 0 0x80000>, - <0x0 0xee900000 0 0x100000>, - <0x0 0xeea00000 0 0x200000>, - <0x0 0xc0000000 0 0x8000000>, - <0x0 0xc8000000 0 0x8000000>; - reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>; - clock-names = "pcie"; - resets = <&cpg 318>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - status = "disabled"; - }; - - imr-lx4@fe860000 { - compatible = "renesas,r8a7795-imr-lx4", - "renesas,imr-lx4"; - reg = <0 0xfe860000 0 0x2000>; - interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 823>; - power-domains = <&sysc R8A7795_PD_A3VC>; - resets = <&cpg 823>; - }; - - imr-lx4@fe870000 { - compatible = "renesas,r8a7795-imr-lx4", - "renesas,imr-lx4"; - reg = <0 0xfe870000 0 0x2000>; - interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 822>; - power-domains = <&sysc R8A7795_PD_A3VC>; - resets = <&cpg 822>; - }; - - imr-lx4@fe880000 { - compatible = "renesas,r8a7795-imr-lx4", - "renesas,imr-lx4"; - reg = <0 0xfe880000 0 0x2000>; - interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 821>; - power-domains = <&sysc R8A7795_PD_A3VC>; - resets = <&cpg 821>; - }; - - imr-lx4@fe890000 { - compatible = "renesas,r8a7795-imr-lx4", - "renesas,imr-lx4"; - reg = <0 0xfe890000 0 0x2000>; - interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 820>; - power-domains = <&sysc R8A7795_PD_A3VC>; - resets = <&cpg 820>; - }; - - vspbc: vsp@fe920000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe920000 0 0x8000>; - interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 624>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 624>; - - renesas,fcp = <&fcpvb1>; - }; - - vspbd: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; - }; - - vspd2: vsp@fea30000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea30000 0 0x5000>; - interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 621>; - - renesas,fcp = <&fcpvd2>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - vspi1: vsp@fe9b0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9b0000 0 0x8000>; - interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 630>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 630>; - - renesas,fcp = <&fcpvi1>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 119>; - renesas,fcp = <&fcpf0>; - }; - - fdp1@fe944000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe944000 0 0x2400>; - interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 118>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 118>; - renesas,fcp = <&fcpf1>; - }; - - fcpf0: fcp@fe950000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe950000 0 0x200>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 615>; - iommus = <&ipmmu_vp0 0>; - }; - - fcpf1: fcp@fe951000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe951000 0 0x200>; - clocks = <&cpg CPG_MOD 614>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 614>; - iommus = <&ipmmu_vp1 1>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 607>; - iommus = <&ipmmu_vp0 5>; - }; - - fcpvb1: fcp@fe92f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe92f000 0 0x200>; - clocks = <&cpg CPG_MOD 606>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 606>; - iommus = <&ipmmu_vp1 7>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 611>; - iommus = <&ipmmu_vp0 8>; - }; - - fcpvi1: fcp@fe9bf000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9bf000 0 0x200>; - clocks = <&cpg CPG_MOD 610>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 610>; - iommus = <&ipmmu_vp1 9>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 602>; - iommus = <&ipmmu_vi0 9>; - }; - - fcpvd2: fcp@fea37000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea37000 0 0x200>; - clocks = <&cpg CPG_MOD 601>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 601>; - iommus = <&ipmmu_vi1 10>; - }; - - cmm0: cmm@fea40000 { - compatible = "renesas,r8a7795-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea40000 0 0x1000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 711>; - resets = <&cpg 711>; - }; - - cmm1: cmm@fea50000 { - compatible = "renesas,r8a7795-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea50000 0 0x1000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 710>; - resets = <&cpg 710>; - }; - - cmm2: cmm@fea60000 { - compatible = "renesas,r8a7795-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea60000 0 0x1000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 709>; - resets = <&cpg 709>; - }; - - cmm3: cmm@fea70000 { - compatible = "renesas,r8a7795-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea70000 0 0x1000>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 708>; - resets = <&cpg 708>; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a7795-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - csi20vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi20>; - }; - csi20vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi20>; - }; - csi20vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi20>; - }; - csi20vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi20>; - }; - csi20vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi20>; - }; - csi20vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi20>; - }; - csi20vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi20>; - }; - }; - }; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a7795-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - }; - }; - }; - - csi41: csi2@feab0000 { - compatible = "renesas,r8a7795-csi2"; - reg = <0 0xfeab0000 0 0x10000>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi41vin4: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin4csi41>; - }; - csi41vin5: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin5csi41>; - }; - csi41vin6: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin6csi41>; - }; - csi41vin7: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin7csi41>; - }; - }; - }; - }; - - hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; - reg = <0 0xfead0000 0 0x10000>; - interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 729>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - dw_hdmi0_in: endpoint { - remote-endpoint = <&du_out_hdmi0>; - }; - }; - port@1 { - reg = <1>; - }; - port@2 { - /* HDMI sound */ - reg = <2>; - }; - }; - }; - - hdmi1: hdmi@feae0000 { - compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; - reg = <0 0xfeae0000 0 0x10000>; - interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 728>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - dw_hdmi1_in: endpoint { - remote-endpoint = <&du_out_hdmi1>; - }; - }; - port@1 { - reg = <1>; - }; - port@2 { - /* HDMI sound */ - reg = <2>; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7795"; - reg = <0 0xfeb00000 0 0x80000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; - clock-names = "du.0", "du.1", "du.2", "du.3"; - resets = <&cpg 724>, <&cpg 722>; - reset-names = "du.0", "du.2"; - - renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>; - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, - <&vspd0 1>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - port@1 { - reg = <1>; - du_out_hdmi0: endpoint { - remote-endpoint = <&dw_hdmi0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_hdmi1: endpoint { - remote-endpoint = <&dw_hdmi1_in>; - }; - }; - port@3 { - reg = <3>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a7795-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - sustainable-power = <6313>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - sustainable-power = <6313>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - - trips { - target: trip-point1 { - temperature = <100000>; - hysteresis = <1000>; - type = "passive"; - }; - - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a57_0 2 4>; - contribution = <1024>; - }; - - map1 { - trip = <&target>; - cooling-device = <&a53_0 0 2>; - contribution = <1024>; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a77960-salvator-x.dts b/arch/arm/dts/r8a77960-salvator-x.dts deleted file mode 100644 index d5543f26c47..00000000000 --- a/arch/arm/dts/r8a77960-salvator-x.dts +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Salvator-X board with R-Car M3-W - * - * Copyright (C) 2016 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a77960.dtsi" -#include "salvator-x.dtsi" - -/ { - model = "Renesas Salvator-X board based on r8a77960"; - compatible = "renesas,salvator-x", "renesas,r8a7796"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x80000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&versaclock5 1>, - <&x21_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", - "dclkin.0", "dclkin.1", "dclkin.2"; -}; diff --git a/arch/arm/dts/r8a77960-ulcb.dts b/arch/arm/dts/r8a77960-ulcb.dts deleted file mode 100644 index 4bfeb1df048..00000000000 --- a/arch/arm/dts/r8a77960-ulcb.dts +++ /dev/null @@ -1,38 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car M3-W - * - * Copyright (C) 2016 Renesas Electronics Corp. - * Copyright (C) 2016 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77960.dtsi" -#include "ulcb.dtsi" - -/ { - model = "Renesas M3ULCB board based on r8a77960"; - compatible = "renesas,m3ulcb", "renesas,r8a7796"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x38000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x40000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&versaclock5 1>, - <&versaclock5 3>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", - "dclkin.0", "dclkin.1", "dclkin.2"; -}; diff --git a/arch/arm/dts/r8a77960.dtsi b/arch/arm/dts/r8a77960.dtsi deleted file mode 100644 index 17062ec506b..00000000000 --- a/arch/arm/dts/r8a77960.dtsi +++ /dev/null @@ -1,3080 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car M3-W (R8A77960) SoC - * - * Copyright (C) 2016-2017 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a7796-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a7796-sysc.h> - -#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 - -/ { - compatible = "renesas,r8a7796"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - opp-1600000000 { - opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <900000>; - clock-latency-ns = <300000>; - }; - opp-1700000000 { - opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <900000>; - clock-latency-ns = <300000>; - }; - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <960000>; - clock-latency-ns = <300000>; - turbo-mode; - }; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - }; - opp-1300000000 { - opp-hz = /bits/ 64 <1300000000>; - opp-microvolt = <820000>; - clock-latency-ns = <300000>; - turbo-mode; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&a57_0>; - }; - core1 { - cpu = <&a57_1>; - }; - }; - - cluster1 { - core0 { - cpu = <&a53_0>; - }; - core1 { - cpu = <&a53_1>; - }; - core2 { - cpu = <&a53_2>; - }; - core3 { - cpu = <&a53_3>; - }; - }; - }; - - a57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A7796_PD_CA57_CPU0>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - dynamic-power-coefficient = <854>; - clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x1>; - device_type = "cpu"; - power-domains = <&sysc R8A7796_PD_CA57_CPU1>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - capacity-dmips-mhz = <1024>; - #cooling-cells = <2>; - }; - - a53_0: cpu@100 { - compatible = "arm,cortex-a53"; - reg = <0x100>; - device_type = "cpu"; - power-domains = <&sysc R8A7796_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - #cooling-cells = <2>; - dynamic-power-coefficient = <277>; - clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_1: cpu@101 { - compatible = "arm,cortex-a53"; - reg = <0x101>; - device_type = "cpu"; - power-domains = <&sysc R8A7796_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_2: cpu@102 { - compatible = "arm,cortex-a53"; - reg = <0x102>; - device_type = "cpu"; - power-domains = <&sysc R8A7796_PD_CA53_CPU2>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - a53_3: cpu@103 { - compatible = "arm,cortex-a53"; - reg = <0x103>; - device_type = "cpu"; - power-domains = <&sysc R8A7796_PD_CA53_CPU3>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_1>; - clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - capacity-dmips-mhz = <535>; - }; - - L2_CA57: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A7796_PD_CA57_SCU>; - cache-unified; - cache-level = <2>; - }; - - L2_CA53: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A7796_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <4000>; - }; - - CPU_SLEEP_1: cpu-sleep-1 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <700>; - exit-latency-us = <700>; - min-residency-us = <5000>; - }; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; - }; - - pmu_a57 { - compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a57_0>, <&a57_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a7796-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a7796", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 4>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a7796"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a7796-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a7796-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a7796-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a7796-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a7796-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a7796-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a7796-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a7796-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>, - <0 0xe61a8000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a7796", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a7796", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a7796", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a7796", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a7796", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a7796", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c_dvfs: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a7796", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a7796", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a7796", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a7796", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a7796", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a7796", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a7796", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a7796-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a7796-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb3_phy0: usb-phy@e65ee000 { - compatible = "renesas,r8a7796-usb3-phy", - "renesas,rcar-gen3-usb3-phy"; - reg = <0 0xe65ee000 0 0x90>; - clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, - <&usb_extal_clk>; - clock-names = "usb3-if", "usb3s_clk", "usb_extal"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 328>; - #phy-cells = <0>; - status = "disabled"; - }; - - arm_cc630p: crypto@e6601000 { - compatible = "arm,cryptocell-630p-ree"; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xe6601000 0 0x1000>; - clocks = <&cpg CPG_MOD 229>; - resets = <&cpg 229>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a7796", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a7796", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a7796", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ir: iommu@ff8b0000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xff8b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 3>; - power-domains = <&sysc R8A7796_PD_A3IR>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 5>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv1: iommu@fd950000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xfd950000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 7>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 8>; - power-domains = <&sysc R8A7796_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a7796"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 9>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7796", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a7796", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A7796_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a7796", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A7796_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a7796-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A7796_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a7796", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a7796", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a7796", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a7796", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a7796", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a7796", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 64>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A7796_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a7796", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a7796", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a7796", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a7796", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a7796", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin1>; - }; - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin2>; - }; - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin3>; - }; - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin4>; - }; - vin4csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin5>; - }; - vin5csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin6>; - }; - vin6csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a7796"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin7>; - }; - vin7csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin7>; - }; - }; - }; - }; - - drif00: rif@e6f40000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f40000 0 0x64>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>; - clock-names = "fck"; - dmas = <&dmac1 0x20>, <&dmac2 0x20>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 515>; - renesas,bonding = <&drif01>; - status = "disabled"; - }; - - drif01: rif@e6f50000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f50000 0 0x64>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>; - clock-names = "fck"; - dmas = <&dmac1 0x22>, <&dmac2 0x22>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 514>; - renesas,bonding = <&drif00>; - status = "disabled"; - }; - - drif10: rif@e6f60000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f60000 0 0x64>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 513>; - clock-names = "fck"; - dmas = <&dmac1 0x24>, <&dmac2 0x24>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 513>; - renesas,bonding = <&drif11>; - status = "disabled"; - }; - - drif11: rif@e6f70000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f70000 0 0x64>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 512>; - clock-names = "fck"; - dmas = <&dmac1 0x26>, <&dmac2 0x26>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 512>; - renesas,bonding = <&drif10>; - status = "disabled"; - }; - - drif20: rif@e6f80000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f80000 0 0x64>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 511>; - clock-names = "fck"; - dmas = <&dmac1 0x28>, <&dmac2 0x28>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 511>; - renesas,bonding = <&drif21>; - status = "disabled"; - }; - - drif21: rif@e6f90000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f90000 0 0x64>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 510>; - clock-names = "fck"; - dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 510>; - renesas,bonding = <&drif20>; - status = "disabled"; - }; - - drif30: rif@e6fa0000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fa0000 0 0x64>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 509>; - clock-names = "fck"; - dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 509>; - renesas,bonding = <&drif31>; - status = "disabled"; - }; - - drif31: rif@e6fb0000 { - compatible = "renesas,r8a7796-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fb0000 0 0x64>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 508>; - clock-names = "fck"; - dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 508>; - renesas,bonding = <&drif30>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A7796_CLK_S0D4>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx"; - }; - ssiu01: ssiu-1 { - dmas = <&audma0 0x35>, <&audma1 0x36>; - dma-names = "rx", "tx"; - }; - ssiu02: ssiu-2 { - dmas = <&audma0 0x37>, <&audma1 0x38>; - dma-names = "rx", "tx"; - }; - ssiu03: ssiu-3 { - dmas = <&audma0 0x47>, <&audma1 0x48>; - dma-names = "rx", "tx"; - }; - ssiu04: ssiu-4 { - dmas = <&audma0 0x3F>, <&audma1 0x40>; - dma-names = "rx", "tx"; - }; - ssiu05: ssiu-5 { - dmas = <&audma0 0x43>, <&audma1 0x44>; - dma-names = "rx", "tx"; - }; - ssiu06: ssiu-6 { - dmas = <&audma0 0x4F>, <&audma1 0x50>; - dma-names = "rx", "tx"; - }; - ssiu07: ssiu-7 { - dmas = <&audma0 0x53>, <&audma1 0x54>; - dma-names = "rx", "tx"; - }; - ssiu10: ssiu-8 { - dmas = <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx"; - }; - ssiu11: ssiu-9 { - dmas = <&audma0 0x4B>, <&audma1 0x4C>; - dma-names = "rx", "tx"; - }; - ssiu12: ssiu-10 { - dmas = <&audma0 0x57>, <&audma1 0x58>; - dma-names = "rx", "tx"; - }; - ssiu13: ssiu-11 { - dmas = <&audma0 0x59>, <&audma1 0x5A>; - dma-names = "rx", "tx"; - }; - ssiu14: ssiu-12 { - dmas = <&audma0 0x5F>, <&audma1 0x60>; - dma-names = "rx", "tx"; - }; - ssiu15: ssiu-13 { - dmas = <&audma0 0xC3>, <&audma1 0xC4>; - dma-names = "rx", "tx"; - }; - ssiu16: ssiu-14 { - dmas = <&audma0 0xC7>, <&audma1 0xC8>; - dma-names = "rx", "tx"; - }; - ssiu17: ssiu-15 { - dmas = <&audma0 0xCB>, <&audma1 0xCC>; - dma-names = "rx", "tx"; - }; - ssiu20: ssiu-16 { - dmas = <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx"; - }; - ssiu21: ssiu-17 { - dmas = <&audma0 0x67>, <&audma1 0x68>; - dma-names = "rx", "tx"; - }; - ssiu22: ssiu-18 { - dmas = <&audma0 0x6B>, <&audma1 0x6C>; - dma-names = "rx", "tx"; - }; - ssiu23: ssiu-19 { - dmas = <&audma0 0x6D>, <&audma1 0x6E>; - dma-names = "rx", "tx"; - }; - ssiu24: ssiu-20 { - dmas = <&audma0 0xCF>, <&audma1 0xCE>; - dma-names = "rx", "tx"; - }; - ssiu25: ssiu-21 { - dmas = <&audma0 0xEB>, <&audma1 0xEC>; - dma-names = "rx", "tx"; - }; - ssiu26: ssiu-22 { - dmas = <&audma0 0xED>, <&audma1 0xEE>; - dma-names = "rx", "tx"; - }; - ssiu27: ssiu-23 { - dmas = <&audma0 0xEF>, <&audma1 0xF0>; - dma-names = "rx", "tx"; - }; - ssiu30: ssiu-24 { - dmas = <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx"; - }; - ssiu31: ssiu-25 { - dmas = <&audma0 0x21>, <&audma1 0x22>; - dma-names = "rx", "tx"; - }; - ssiu32: ssiu-26 { - dmas = <&audma0 0x23>, <&audma1 0x24>; - dma-names = "rx", "tx"; - }; - ssiu33: ssiu-27 { - dmas = <&audma0 0x25>, <&audma1 0x26>; - dma-names = "rx", "tx"; - }; - ssiu34: ssiu-28 { - dmas = <&audma0 0x27>, <&audma1 0x28>; - dma-names = "rx", "tx"; - }; - ssiu35: ssiu-29 { - dmas = <&audma0 0x29>, <&audma1 0x2A>; - dma-names = "rx", "tx"; - }; - ssiu36: ssiu-30 { - dmas = <&audma0 0x2B>, <&audma1 0x2C>; - dma-names = "rx", "tx"; - }; - ssiu37: ssiu-31 { - dmas = <&audma0 0x2D>, <&audma1 0x2E>; - dma-names = "rx", "tx"; - }; - ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx"; - }; - ssiu41: ssiu-33 { - dmas = <&audma0 0x17>, <&audma1 0x18>; - dma-names = "rx", "tx"; - }; - ssiu42: ssiu-34 { - dmas = <&audma0 0x19>, <&audma1 0x1A>; - dma-names = "rx", "tx"; - }; - ssiu43: ssiu-35 { - dmas = <&audma0 0x1B>, <&audma1 0x1C>; - dma-names = "rx", "tx"; - }; - ssiu44: ssiu-36 { - dmas = <&audma0 0x1D>, <&audma1 0x1E>; - dma-names = "rx", "tx"; - }; - ssiu45: ssiu-37 { - dmas = <&audma0 0x1F>, <&audma1 0x20>; - dma-names = "rx", "tx"; - }; - ssiu46: ssiu-38 { - dmas = <&audma0 0x31>, <&audma1 0x32>; - dma-names = "rx", "tx"; - }; - ssiu47: ssiu-39 { - dmas = <&audma0 0x33>, <&audma1 0x34>; - dma-names = "rx", "tx"; - }; - ssiu50: ssiu-40 { - dmas = <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx"; - }; - ssiu60: ssiu-41 { - dmas = <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx"; - }; - ssiu70: ssiu-42 { - dmas = <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx"; - }; - ssiu80: ssiu-43 { - dmas = <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx"; - }; - ssiu90: ssiu-44 { - dmas = <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx"; - }; - ssiu91: ssiu-45 { - dmas = <&audma0 0x7F>, <&audma1 0x80>; - dma-names = "rx", "tx"; - }; - ssiu92: ssiu-46 { - dmas = <&audma0 0x81>, <&audma1 0x82>; - dma-names = "rx", "tx"; - }; - ssiu93: ssiu-47 { - dmas = <&audma0 0x83>, <&audma1 0x84>; - dma-names = "rx", "tx"; - }; - ssiu94: ssiu-48 { - dmas = <&audma0 0xA3>, <&audma1 0xA4>; - dma-names = "rx", "tx"; - }; - ssiu95: ssiu-49 { - dmas = <&audma0 0xA5>, <&audma1 0xA6>; - dma-names = "rx", "tx"; - }; - ssiu96: ssiu-50 { - dmas = <&audma0 0xA7>, <&audma1 0xA8>; - dma-names = "rx", "tx"; - }; - ssiu97: ssiu-51 { - dmas = <&audma0 0xA9>, <&audma1 0xAA>; - dma-names = "rx", "tx"; - }; - }; - }; - - mlp: mlp@ec520000 { - compatible = "renesas,r8a7796-mlp", - "renesas,rcar-gen3-mlp"; - reg = <0 0xec520000 0 0x800>; - interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 802>; - status = "disabled"; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a7796", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, - <&ipmmu_mp 2>, <&ipmmu_mp 3>, - <&ipmmu_mp 4>, <&ipmmu_mp 5>, - <&ipmmu_mp 6>, <&ipmmu_mp 7>, - <&ipmmu_mp 8>, <&ipmmu_mp 9>, - <&ipmmu_mp 10>, <&ipmmu_mp 11>, - <&ipmmu_mp 12>, <&ipmmu_mp 13>, - <&ipmmu_mp 14>, <&ipmmu_mp 15>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a7796", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, - <&ipmmu_mp 18>, <&ipmmu_mp 19>, - <&ipmmu_mp 20>, <&ipmmu_mp 21>, - <&ipmmu_mp 22>, <&ipmmu_mp 23>, - <&ipmmu_mp 24>, <&ipmmu_mp 25>, - <&ipmmu_mp 26>, <&ipmmu_mp 27>, - <&ipmmu_mp 28>, <&ipmmu_mp 29>, - <&ipmmu_mp 30>, <&ipmmu_mp 31>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a7796", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a7796-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ohci1: usb@ee0a0000 { - compatible = "generic-ohci"; - reg = <0 0xee0a0000 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 1>; - phy-names = "usb"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 2>; - phy-names = "usb"; - companion = <&ohci1>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a7796", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a7796", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 702>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a7796", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 314>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a7796", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 313>; - iommus = <&ipmmu_ds1 33>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a7796", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 312>; - iommus = <&ipmmu_ds1 34>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a7796", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 311>; - iommus = <&ipmmu_ds1 35>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a7796-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a7796", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec1: pcie@ee800000 { - compatible = "renesas,pcie-r8a7796", - "renesas,pcie-rcar-gen3"; - reg = <0 0xee800000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, - <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, - <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, - <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 318>; - iommu-map = <0 &ipmmu_hc 1 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - imr-lx4@fe860000 { - compatible = "renesas,r8a7796-imr-lx4", - "renesas,imr-lx4"; - reg = <0 0xfe860000 0 0x2000>; - interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 823>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 823>; - }; - - imr-lx4@fe870000 { - compatible = "renesas,r8a7796-imr-lx4", - "renesas,imr-lx4"; - reg = <0 0xfe870000 0 0x2000>; - interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 822>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 822>; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 119>; - renesas,fcp = <&fcpf0>; - }; - - fcpf0: fcp@fe950000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe950000 0 0x200>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 615>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 607>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 611>; - iommus = <&ipmmu_vc0 19>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 602>; - iommus = <&ipmmu_vi0 9>; - }; - - fcpvd2: fcp@fea37000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea37000 0 0x200>; - clocks = <&cpg CPG_MOD 601>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 601>; - iommus = <&ipmmu_vi0 10>; - }; - - vspb: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; - }; - - vspd2: vsp@fea30000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea30000 0 0x5000>; - interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 621>; - - renesas,fcp = <&fcpvd2>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A7796_PD_A3VC>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - cmm0: cmm@fea40000 { - compatible = "renesas,r8a7796-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea40000 0 0x1000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 711>; - resets = <&cpg 711>; - }; - - cmm1: cmm@fea50000 { - compatible = "renesas,r8a7796-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea50000 0 0x1000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 710>; - resets = <&cpg 710>; - }; - - cmm2: cmm@fea60000 { - compatible = "renesas,r8a7796-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea60000 0 0x1000>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 709>; - resets = <&cpg 709>; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a7796-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - csi20vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi20>; - }; - csi20vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi20>; - }; - csi20vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi20>; - }; - csi20vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi20>; - }; - csi20vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi20>; - }; - csi20vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi20>; - }; - csi20vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi20>; - }; - }; - }; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a7796-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - csi40vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi40>; - }; - csi40vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi40>; - }; - csi40vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi40>; - }; - csi40vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi40>; - }; - }; - - }; - }; - - hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; - reg = <0 0xfead0000 0 0x10000>; - interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 729>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - dw_hdmi0_in: endpoint { - remote-endpoint = <&du_out_hdmi0>; - }; - }; - port@1 { - reg = <1>; - }; - port@2 { - /* HDMI sound */ - reg = <2>; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a7796"; - reg = <0 0xfeb00000 0 0x70000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>; - clock-names = "du.0", "du.1", "du.2"; - resets = <&cpg 724>, <&cpg 722>; - reset-names = "du.0", "du.2"; - - renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - port@1 { - reg = <1>; - du_out_hdmi0: endpoint { - remote-endpoint = <&dw_hdmi0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a7796-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - sustainable-power = <3874>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - sustainable-power = <3874>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - sustainable-power = <3874>; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a57_0 2 4>; - contribution = <1024>; - }; - map1 { - trip = <&target>; - cooling-device = <&a53_0 0 2>; - contribution = <1024>; - }; - }; - trips { - target: trip-point1 { - temperature = <100000>; - hysteresis = <1000>; - type = "passive"; - }; - - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a77965-salvator-x.dts b/arch/arm/dts/r8a77965-salvator-x.dts deleted file mode 100644 index f84c64ed4df..00000000000 --- a/arch/arm/dts/r8a77965-salvator-x.dts +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Salvator-X board with R-Car M3-N - * - * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas(a)jmondi.org> - */ - -/dts-v1/; -#include "r8a77965.dtsi" -#include "salvator-x.dtsi" - -/ { - model = "Renesas Salvator-X board based on r8a77965"; - compatible = "renesas,salvator-x", "renesas,r8a77965"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&x21_clk>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.3", - "dclkin.0", "dclkin.1", "dclkin.3"; -}; diff --git a/arch/arm/dts/r8a77965-ulcb.dts b/arch/arm/dts/r8a77965-ulcb.dts deleted file mode 100644 index 71704b67a20..00000000000 --- a/arch/arm/dts/r8a77965-ulcb.dts +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board with R-Car M3-N - * - * Copyright (C) 2018 Renesas Electronics Corp. - * Copyright (C) 2018 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77965.dtsi" -#include "ulcb.dtsi" - -/ { - model = "Renesas M3NULCB board based on r8a77965"; - compatible = "renesas,m3nulcb", "renesas,r8a77965"; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&versaclock5 3>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.3", - "dclkin.0", "dclkin.1", "dclkin.3"; -}; diff --git a/arch/arm/dts/r8a77965.dtsi b/arch/arm/dts/r8a77965.dtsi deleted file mode 100644 index c7582003849..00000000000 --- a/arch/arm/dts/r8a77965.dtsi +++ /dev/null @@ -1,2889 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car M3-N (R8A77965) SoC - * - * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas(a)jmondi.org> - * - * Based on r8a7796.dtsi - * Copyright (C) 2016 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a77965-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a77965-sysc.h> - -#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 - -#define SOC_HAS_SATA - -/ { - compatible = "renesas,r8a77965"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <830000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - opp-1600000000 { - opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <900000>; - clock-latency-ns = <300000>; - }; - opp-1700000000 { - opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <900000>; - clock-latency-ns = <300000>; - }; - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <960000>; - clock-latency-ns = <300000>; - turbo-mode; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a57_0: cpu@0 { - compatible = "arm,cortex-a57"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A77965_PD_CA57_CPU0>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - #cooling-cells = <2>; - dynamic-power-coefficient = <854>; - clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - }; - - a57_1: cpu@1 { - compatible = "arm,cortex-a57"; - reg = <0x1>; - device_type = "cpu"; - power-domains = <&sysc R8A77965_PD_CA57_CPU1>; - next-level-cache = <&L2_CA57>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; - operating-points-v2 = <&cluster0_opp>; - }; - - L2_CA57: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A77965_PD_CA57_SCU>; - cache-unified; - cache-level = <2>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <4000>; - }; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a57 { - compatible = "arm,cortex-a57-pmu"; - interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a57_0>, - <&a57_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a77965-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 29>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - gpio7: gpio@e6055800 { - compatible = "renesas,gpio-r8a77965", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055800 0 0x50>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 224 4>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 905>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 905>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a77965"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a77965-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a77965-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a77965-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a77965-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a77965-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a77965-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a77965-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a77965-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>, - <0 0xe61a8000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a77965", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a77965", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a77965", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a77965", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a77965", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77965", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c_dvfs: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a77965", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a77965", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a77965", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a77965", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a77965", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a77965", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a77965", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a77965-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a77965-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb3_phy0: usb-phy@e65ee000 { - compatible = "renesas,r8a77965-usb3-phy", - "renesas,rcar-gen3-usb3-phy"; - reg = <0 0xe65ee000 0 0x90>; - clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, - <&usb_extal_clk>; - clock-names = "usb3-if", "usb3s_clk", "usb_extal"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 328>; - #phy-cells = <0>; - status = "disabled"; - }; - - arm_cc630p: crypto@e6601000 { - compatible = "arm,cryptocell-630p-ree"; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xe6601000 0 0x1000>; - clocks = <&cpg CPG_MOD 229>; - resets = <&cpg 229>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a77965", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a77965", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a77965", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 10>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A77965_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a77965"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A77965_PD_A3VP>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a77965", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a77965", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A77965_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a77965", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A77965_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a77965-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A77965_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - resets = <&cpg 523>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a77965", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a77965", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a77965", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a77965", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a77965", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a77965", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 64>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A77965_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a77965", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a77965", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a77965", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a77965", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a77965", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin0>; - }; - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin1>; - }; - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin2>; - }; - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin3>; - }; - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin4>; - }; - vin4csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin5>; - }; - vin5csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin6>; - }; - vin6csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a77965"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi20: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi20vin7>; - }; - vin7csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin7>; - }; - }; - }; - }; - - drif00: rif@e6f40000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f40000 0 0x84>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>; - clock-names = "fck"; - dmas = <&dmac1 0x20>, <&dmac2 0x20>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 515>; - renesas,bonding = <&drif01>; - status = "disabled"; - }; - - drif01: rif@e6f50000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f50000 0 0x84>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>; - clock-names = "fck"; - dmas = <&dmac1 0x22>, <&dmac2 0x22>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 514>; - renesas,bonding = <&drif00>; - status = "disabled"; - }; - - drif10: rif@e6f60000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f60000 0 0x84>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 513>; - clock-names = "fck"; - dmas = <&dmac1 0x24>, <&dmac2 0x24>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 513>; - renesas,bonding = <&drif11>; - status = "disabled"; - }; - - drif11: rif@e6f70000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f70000 0 0x84>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 512>; - clock-names = "fck"; - dmas = <&dmac1 0x26>, <&dmac2 0x26>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 512>; - renesas,bonding = <&drif10>; - status = "disabled"; - }; - - drif20: rif@e6f80000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f80000 0 0x84>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 511>; - clock-names = "fck"; - dmas = <&dmac1 0x28>, <&dmac2 0x28>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 511>; - renesas,bonding = <&drif21>; - status = "disabled"; - }; - - drif21: rif@e6f90000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f90000 0 0x84>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 510>; - clock-names = "fck"; - dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 510>; - renesas,bonding = <&drif20>; - status = "disabled"; - }; - - drif30: rif@e6fa0000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fa0000 0 0x84>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 509>; - clock-names = "fck"; - dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 509>; - renesas,bonding = <&drif31>; - status = "disabled"; - }; - - drif31: rif@e6fb0000 { - compatible = "renesas,r8a77965-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fb0000 0 0x84>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 508>; - clock-names = "fck"; - dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 508>; - renesas,bonding = <&drif30>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A77965_CLK_S0D4>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma1 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma1 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma1 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma1 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma1 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma1 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma1 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma1 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma1 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma1 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma1 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma1 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&audma0 0x15>, <&audma1 0x16>; - dma-names = "rx", "tx"; - }; - ssiu01: ssiu-1 { - dmas = <&audma0 0x35>, <&audma1 0x36>; - dma-names = "rx", "tx"; - }; - ssiu02: ssiu-2 { - dmas = <&audma0 0x37>, <&audma1 0x38>; - dma-names = "rx", "tx"; - }; - ssiu03: ssiu-3 { - dmas = <&audma0 0x47>, <&audma1 0x48>; - dma-names = "rx", "tx"; - }; - ssiu04: ssiu-4 { - dmas = <&audma0 0x3F>, <&audma1 0x40>; - dma-names = "rx", "tx"; - }; - ssiu05: ssiu-5 { - dmas = <&audma0 0x43>, <&audma1 0x44>; - dma-names = "rx", "tx"; - }; - ssiu06: ssiu-6 { - dmas = <&audma0 0x4F>, <&audma1 0x50>; - dma-names = "rx", "tx"; - }; - ssiu07: ssiu-7 { - dmas = <&audma0 0x53>, <&audma1 0x54>; - dma-names = "rx", "tx"; - }; - ssiu10: ssiu-8 { - dmas = <&audma0 0x49>, <&audma1 0x4a>; - dma-names = "rx", "tx"; - }; - ssiu11: ssiu-9 { - dmas = <&audma0 0x4B>, <&audma1 0x4C>; - dma-names = "rx", "tx"; - }; - ssiu12: ssiu-10 { - dmas = <&audma0 0x57>, <&audma1 0x58>; - dma-names = "rx", "tx"; - }; - ssiu13: ssiu-11 { - dmas = <&audma0 0x59>, <&audma1 0x5A>; - dma-names = "rx", "tx"; - }; - ssiu14: ssiu-12 { - dmas = <&audma0 0x5F>, <&audma1 0x60>; - dma-names = "rx", "tx"; - }; - ssiu15: ssiu-13 { - dmas = <&audma0 0xC3>, <&audma1 0xC4>; - dma-names = "rx", "tx"; - }; - ssiu16: ssiu-14 { - dmas = <&audma0 0xC7>, <&audma1 0xC8>; - dma-names = "rx", "tx"; - }; - ssiu17: ssiu-15 { - dmas = <&audma0 0xCB>, <&audma1 0xCC>; - dma-names = "rx", "tx"; - }; - ssiu20: ssiu-16 { - dmas = <&audma0 0x63>, <&audma1 0x64>; - dma-names = "rx", "tx"; - }; - ssiu21: ssiu-17 { - dmas = <&audma0 0x67>, <&audma1 0x68>; - dma-names = "rx", "tx"; - }; - ssiu22: ssiu-18 { - dmas = <&audma0 0x6B>, <&audma1 0x6C>; - dma-names = "rx", "tx"; - }; - ssiu23: ssiu-19 { - dmas = <&audma0 0x6D>, <&audma1 0x6E>; - dma-names = "rx", "tx"; - }; - ssiu24: ssiu-20 { - dmas = <&audma0 0xCF>, <&audma1 0xCE>; - dma-names = "rx", "tx"; - }; - ssiu25: ssiu-21 { - dmas = <&audma0 0xEB>, <&audma1 0xEC>; - dma-names = "rx", "tx"; - }; - ssiu26: ssiu-22 { - dmas = <&audma0 0xED>, <&audma1 0xEE>; - dma-names = "rx", "tx"; - }; - ssiu27: ssiu-23 { - dmas = <&audma0 0xEF>, <&audma1 0xF0>; - dma-names = "rx", "tx"; - }; - ssiu30: ssiu-24 { - dmas = <&audma0 0x6f>, <&audma1 0x70>; - dma-names = "rx", "tx"; - }; - ssiu31: ssiu-25 { - dmas = <&audma0 0x21>, <&audma1 0x22>; - dma-names = "rx", "tx"; - }; - ssiu32: ssiu-26 { - dmas = <&audma0 0x23>, <&audma1 0x24>; - dma-names = "rx", "tx"; - }; - ssiu33: ssiu-27 { - dmas = <&audma0 0x25>, <&audma1 0x26>; - dma-names = "rx", "tx"; - }; - ssiu34: ssiu-28 { - dmas = <&audma0 0x27>, <&audma1 0x28>; - dma-names = "rx", "tx"; - }; - ssiu35: ssiu-29 { - dmas = <&audma0 0x29>, <&audma1 0x2A>; - dma-names = "rx", "tx"; - }; - ssiu36: ssiu-30 { - dmas = <&audma0 0x2B>, <&audma1 0x2C>; - dma-names = "rx", "tx"; - }; - ssiu37: ssiu-31 { - dmas = <&audma0 0x2D>, <&audma1 0x2E>; - dma-names = "rx", "tx"; - }; - ssiu40: ssiu-32 { - dmas = <&audma0 0x71>, <&audma1 0x72>; - dma-names = "rx", "tx"; - }; - ssiu41: ssiu-33 { - dmas = <&audma0 0x17>, <&audma1 0x18>; - dma-names = "rx", "tx"; - }; - ssiu42: ssiu-34 { - dmas = <&audma0 0x19>, <&audma1 0x1A>; - dma-names = "rx", "tx"; - }; - ssiu43: ssiu-35 { - dmas = <&audma0 0x1B>, <&audma1 0x1C>; - dma-names = "rx", "tx"; - }; - ssiu44: ssiu-36 { - dmas = <&audma0 0x1D>, <&audma1 0x1E>; - dma-names = "rx", "tx"; - }; - ssiu45: ssiu-37 { - dmas = <&audma0 0x1F>, <&audma1 0x20>; - dma-names = "rx", "tx"; - }; - ssiu46: ssiu-38 { - dmas = <&audma0 0x31>, <&audma1 0x32>; - dma-names = "rx", "tx"; - }; - ssiu47: ssiu-39 { - dmas = <&audma0 0x33>, <&audma1 0x34>; - dma-names = "rx", "tx"; - }; - ssiu50: ssiu-40 { - dmas = <&audma0 0x73>, <&audma1 0x74>; - dma-names = "rx", "tx"; - }; - ssiu60: ssiu-41 { - dmas = <&audma0 0x75>, <&audma1 0x76>; - dma-names = "rx", "tx"; - }; - ssiu70: ssiu-42 { - dmas = <&audma0 0x79>, <&audma1 0x7a>; - dma-names = "rx", "tx"; - }; - ssiu80: ssiu-43 { - dmas = <&audma0 0x7b>, <&audma1 0x7c>; - dma-names = "rx", "tx"; - }; - ssiu90: ssiu-44 { - dmas = <&audma0 0x7d>, <&audma1 0x7e>; - dma-names = "rx", "tx"; - }; - ssiu91: ssiu-45 { - dmas = <&audma0 0x7F>, <&audma1 0x80>; - dma-names = "rx", "tx"; - }; - ssiu92: ssiu-46 { - dmas = <&audma0 0x81>, <&audma1 0x82>; - dma-names = "rx", "tx"; - }; - ssiu93: ssiu-47 { - dmas = <&audma0 0x83>, <&audma1 0x84>; - dma-names = "rx", "tx"; - }; - ssiu94: ssiu-48 { - dmas = <&audma0 0xA3>, <&audma1 0xA4>; - dma-names = "rx", "tx"; - }; - ssiu95: ssiu-49 { - dmas = <&audma0 0xA5>, <&audma1 0xA6>; - dma-names = "rx", "tx"; - }; - ssiu96: ssiu-50 { - dmas = <&audma0 0xA7>, <&audma1 0xA8>; - dma-names = "rx", "tx"; - }; - ssiu97: ssiu-51 { - dmas = <&audma0 0xA9>, <&audma1 0xAA>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; - }; - - mlp: mlp@ec520000 { - compatible = "renesas,r8a77965-mlp", - "renesas,rcar-gen3-mlp"; - reg = <0 0xec520000 0 0x800>; - interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 802>; - status = "disabled"; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a77965", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - }; - - audma1: dma-controller@ec720000 { - compatible = "renesas,dmac-r8a77965", - "renesas,rcar-dmac"; - reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 501>; - clock-names = "fck"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 501>; - #dma-cells = <1>; - dma-channels = <16>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a77965", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a77965-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ohci1: usb@ee0a0000 { - compatible = "generic-ohci"; - reg = <0 0xee0a0000 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 1>; - phy-names = "usb"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1 2>; - phy-names = "usb"; - companion = <&ohci1>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a77965", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a77965", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 702>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a77965", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77965_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 314>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a77965", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77965_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 313>; - iommus = <&ipmmu_ds1 33>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a77965", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77965_CLK_SD2H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 312>; - iommus = <&ipmmu_ds1 34>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a77965", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77965_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 311>; - iommus = <&ipmmu_ds1 35>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a77965-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sata: sata@ee300000 { - compatible = "renesas,sata-r8a77965", - "renesas,rcar-gen3-sata"; - reg = <0 0xee300000 0 0x200000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 815>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a77965", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - pciec1: pcie@ee800000 { - compatible = "renesas,pcie-r8a77965", - "renesas,pcie-rcar-gen3"; - reg = <0 0xee800000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, - <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, - <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, - <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 318>; - iommu-map = <0 &ipmmu_hc 1 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 119>; - renesas,fcp = <&fcpf0>; - }; - - fcpf0: fcp@fe950000 { - compatible = "renesas,fcpf"; - reg = <0 0xfe950000 0 0x200>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 615>; - }; - - vspb: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 607>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 603>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 602>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 611>; - }; - - cmm0: cmm@fea40000 { - compatible = "renesas,r8a77965-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea40000 0 0x1000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 711>; - resets = <&cpg 711>; - }; - - cmm1: cmm@fea50000 { - compatible = "renesas,r8a77965-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea50000 0 0x1000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 710>; - resets = <&cpg 710>; - }; - - cmm3: cmm@fea70000 { - compatible = "renesas,r8a77965-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea70000 0 0x1000>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 708>; - resets = <&cpg 708>; - }; - - csi20: csi2@fea80000 { - compatible = "renesas,r8a77965-csi2"; - reg = <0 0xfea80000 0 0x10000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi20vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi20>; - }; - csi20vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi20>; - }; - csi20vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi20>; - }; - csi20vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi20>; - }; - csi20vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi20>; - }; - csi20vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi20>; - }; - csi20vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi20>; - }; - csi20vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi20>; - }; - }; - }; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a77965-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - csi40vin4: endpoint@4 { - reg = <4>; - remote-endpoint = <&vin4csi40>; - }; - csi40vin5: endpoint@5 { - reg = <5>; - remote-endpoint = <&vin5csi40>; - }; - csi40vin6: endpoint@6 { - reg = <6>; - remote-endpoint = <&vin6csi40>; - }; - csi40vin7: endpoint@7 { - reg = <7>; - remote-endpoint = <&vin7csi40>; - }; - }; - }; - }; - - hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a77965-hdmi", - "renesas,rcar-gen3-hdmi"; - reg = <0 0xfead0000 0 0x10000>; - interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 729>, - <&cpg CPG_CORE R8A77965_CLK_HDMI>; - clock-names = "iahb", "isfr"; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 729>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - dw_hdmi0_in: endpoint { - remote-endpoint = <&du_out_hdmi0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a77965"; - reg = <0 0xfeb00000 0 0x80000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 721>; - clock-names = "du.0", "du.1", "du.3"; - resets = <&cpg 724>, <&cpg 722>; - reset-names = "du.0", "du.3"; - - renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; - renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - port@1 { - reg = <1>; - du_out_hdmi0: endpoint { - remote-endpoint = <&dw_hdmi0_in>; - }; - }; - port@2 { - reg = <2>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds@feb90000 { - compatible = "renesas,r8a77965-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - sustainable-power = <2439>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - sustainable-power = <2439>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - sustainable-power = <2439>; - - trips { - target: trip-point1 { - /* miliCelsius */ - temperature = <100000>; - hysteresis = <1000>; - type = "passive"; - }; - - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a57_0 2 4>; - contribution = <1024>; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - /* External USB clocks - can be overridden by the board */ - usb3s0_clk: usb3s0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - usb_extal_clk: usb_extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts deleted file mode 100644 index 405404c0843..00000000000 --- a/arch/arm/dts/r8a77970-eagle.dts +++ /dev/null @@ -1,405 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Eagle board with R-Car V3M - * - * Copyright (C) 2016-2017 Renesas Electronics Corp. - * Copyright (C) 2017 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77970.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Renesas Eagle board based on r8a77970"; - compatible = "renesas,eagle", "renesas,r8a77970"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - serial0 = &scif0; - ethernet0 = &avb; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:115200n8"; - }; - - d3p3: regulator-fixed { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_out: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - lvds-decoder { - compatible = "thine,thc63lvd1024"; - - vcc-supply = <&d3p3>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - thc63lvd1024_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - - port@2 { - reg = <2>; - thc63lvd1024_out: endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x38000000>; - }; - - x1_clk: x1-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - - renesas,no-ether-link; - phy-handle = <&phy0>; - rx-internal-delay-ps = <1800>; - tx-internal-delay-ps = <2000>; - status = "okay"; - - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio1>; - interrupts = <17 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; - }; -}; - -&canfd { - pinctrl-0 = <&canfd0_pins>; - pinctrl-names = "default"; - status = "okay"; - - channel0 { - status = "okay"; - }; -}; - -&csi40 { - status = "okay"; - - ports { - port@0 { - csi40_in: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&max9286_out0>; - }; - }; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, <&x1_clk>; - clock-names = "du.0", "dclkin.0"; - status = "okay"; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - io_expander: gpio@20 { - compatible = "onnn,pca9654"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; - - hdmi@39 { - compatible = "adi,adv7511w"; - reg = <0x39>; - interrupt-parent = <&gpio1>; - interrupts = <20 IRQ_TYPE_LEVEL_LOW>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&thc63lvd1024_out>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con_out>; - }; - }; - }; - }; -}; - -&i2c3 { - pinctrl-0 = <&i2c3_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - gmsl0: gmsl-deserializer@48 { - compatible = "maxim,max9286"; - reg = <0x48>; - - maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>; - enable-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - }; - - port@2 { - reg = <2>; - }; - - port@3 { - reg = <3>; - }; - - port@4 { - reg = <4>; - max9286_out0: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&csi40_in>; - }; - }; - }; - - i2c-mux { - #address-cells = <1>; - #size-cells = <0>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - status = "disabled"; - }; - - i2c@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - status = "disabled"; - }; - - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - - status = "disabled"; - }; - - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - - status = "disabled"; - }; - }; - }; -}; - -&lvds0 { - status = "okay"; - - ports { - port@1 { - lvds0_out: endpoint { - remote-endpoint = <&thc63lvd1024_in>; - }; - }; - }; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - avb_pins: avb0 { - groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; - function = "avb0"; - }; - - canfd0_pins: canfd0 { - groups = "canfd0_data_a"; - function = "canfd0"; - }; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - i2c3_pins: i2c3 { - groups = "i2c3_a"; - function = "i2c3"; - }; - - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; - - scif0_pins: scif0 { - groups = "scif0_data"; - function = "scif0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk_b"; - function = "scif_clk"; - }; -}; - -&rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fs512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - bootparam@0 { - reg = <0x00000000 0x040000>; - read-only; - }; - cr7@40000 { - reg = <0x00040000 0x080000>; - read-only; - }; - cert_header_sa3@c0000 { - reg = <0x000c0000 0x080000>; - read-only; - }; - bl2@140000 { - reg = <0x00140000 0x040000>; - read-only; - }; - cert_header_sa6@180000 { - reg = <0x00180000 0x040000>; - read-only; - }; - bl31@1c0000 { - reg = <0x001c0000 0x460000>; - read-only; - }; - uboot@640000 { - reg = <0x00640000 0x0c0000>; - read-only; - }; - uboot-env@700000 { - reg = <0x00700000 0x040000>; - read-only; - }; - dtb@740000 { - reg = <0x00740000 0x080000>; - }; - kernel@7c0000 { - reg = <0x007c0000 0x1400000>; - }; - user@1bc0000 { - reg = <0x01bc0000 0x2440000>; - }; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; diff --git a/arch/arm/dts/r8a77970-v3msk.dts b/arch/arm/dts/r8a77970-v3msk.dts deleted file mode 100644 index e36999e91af..00000000000 --- a/arch/arm/dts/r8a77970-v3msk.dts +++ /dev/null @@ -1,303 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the V3M Starter Kit board - * - * Copyright (C) 2017 Renesas Electronics Corp. - * Copyright (C) 2017 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77970.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Renesas V3M Starter Kit board"; - compatible = "renesas,v3msk", "renesas,r8a77970"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - serial0 = &scif0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - lvds-decoder { - compatible = "thine,thc63lvd1024"; - vcc-supply = <&vcc_d3_3v>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - thc63lvd1024_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - - port@2 { - reg = <2>; - thc63lvd1024_out: endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - osc5_clk: osc5-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - vcc_d1_8v: regulator-0 { - compatible = "regulator-fixed"; - regulator-name = "VCC_D1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_d3_3v: regulator-1 { - compatible = "regulator-fixed"; - regulator-name = "VCC_D3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc_vddq_vin0: regulator-2 { - compatible = "regulator-fixed"; - regulator-name = "VCC_VDDQ_VIN0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&avb { - pinctrl-0 = <&avb_pins>; - pinctrl-names = "default"; - - renesas,no-ether-link; - phy-handle = <&phy0>; - rx-internal-delay-ps = <1800>; - tx-internal-delay-ps = <2000>; - status = "okay"; - - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio1>; - interrupts = <17 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&osc5_clk>; - clock-names = "du.0", "dclkin.0"; - status = "okay"; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - hdmi@39 { - compatible = "adi,adv7511w"; - #sound-dai-cells = <0>; - reg = <0x39>; - interrupt-parent = <&gpio1>; - interrupts = <20 IRQ_TYPE_LEVEL_LOW>; - avdd-supply = <&vcc_d1_8v>; - dvdd-supply = <&vcc_d1_8v>; - pvdd-supply = <&vcc_d1_8v>; - bgvdd-supply = <&vcc_d1_8v>; - dvdd-3v-supply = <&vcc_d3_3v>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&thc63lvd1024_out>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; -}; - -&lvds0 { - status = "okay"; - - ports { - port@1 { - lvds0_out: endpoint { - remote-endpoint = <&thc63lvd1024_in>; - }; - }; - }; -}; - -&mmc0 { - pinctrl-0 = <&mmc_pins>; - pinctrl-names = "default"; - - vmmc-supply = <&vcc_d3_3v>; - vqmmc-supply = <&vcc_vddq_vin0>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&pfc { - avb_pins: avb0 { - groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; - function = "avb0"; - }; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - mmc_pins: mmc_3_3v { - groups = "mmc_data8", "mmc_ctrl"; - function = "mmc"; - power-source = <3300>; - }; - - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; - - scif0_pins: scif0 { - groups = "scif0_data"; - function = "scif0"; - }; -}; - -&rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fs512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - bootparam@0 { - reg = <0x00000000 0x040000>; - read-only; - }; - cr7@40000 { - reg = <0x00040000 0x080000>; - read-only; - }; - cert_header_sa3@c0000 { - reg = <0x000c0000 0x080000>; - read-only; - }; - bl2@140000 { - reg = <0x00140000 0x040000>; - read-only; - }; - cert_header_sa6@180000 { - reg = <0x00180000 0x040000>; - read-only; - }; - bl31@1c0000 { - reg = <0x001c0000 0x460000>; - read-only; - }; - uboot@640000 { - reg = <0x00640000 0x0c0000>; - read-only; - }; - uboot-env@700000 { - reg = <0x00700000 0x040000>; - read-only; - }; - dtb@740000 { - reg = <0x00740000 0x080000>; - }; - kernel@7c0000 { - reg = <0x007c0000 0x1400000>; - }; - user@1bc0000 { - reg = <0x01bc0000 0x2440000>; - }; - }; - }; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi deleted file mode 100644 index ed6e2e47c60..00000000000 --- a/arch/arm/dts/r8a77970.dtsi +++ /dev/null @@ -1,1220 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car V3M (R8A77970) SoC - * - * Copyright (C) 2016-2017 Renesas Electronics Corp. - * Copyright (C) 2017 Cogent Embedded, Inc. - */ - -#include <dt-bindings/clock/r8a77970-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/power/r8a77970-sysc.h> - -/ { - compatible = "renesas,r8a77970"; - #address-cells = <2>; - #size-cells = <2>; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a53_0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0>; - clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; - power-domains = <&sysc R8A77970_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - a53_1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <1>; - clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>; - power-domains = <&sysc R8A77970_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - L2_CA53: cache-controller { - compatible = "cache"; - power-domains = <&sysc R8A77970_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a77970-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a77970", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 22>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a77970", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 28>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a77970", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77970", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a77970", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 6>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a77970", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a77970"; - reg = <0 0xe6060000 0 0x504>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a77970-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a77970-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a77970-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a77970-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a77970-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a77970-rst"; - reg = <0 0xe6160000 0 0x200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a77970-sysc"; - reg = <0 0xe6180000 0 0x440>; - #power-domain-cells = <1>; - }; - - thermal: thermal@e6190000 { - compatible = "renesas,thermal-r8a77970"; - reg = <0 0xe6190000 0 0x10>, - <0 0xe6190100 0 0x120>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a77970", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a77970", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a77970", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a77970", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a77970", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a77970", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - compatible = "renesas,i2c-r8a77970", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - compatible = "renesas,i2c-r8a77970", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - compatible = "renesas,i2c-r8a77970", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - compatible = "renesas,i2c-r8a77970", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac1 0x97>, <&dmac1 0x96>, - <&dmac2 0x97>, <&dmac2 0x96>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - compatible = "renesas,i2c-r8a77970", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac1 0x99>, <&dmac1 0x98>, - <&dmac2 0x99>, <&dmac2 0x98>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a77970", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 96>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a77970", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 96>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a77970", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 96>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a77970", - "renesas,rcar-gen3-hscif", "renesas,hscif"; - reg = <0 0xe66a0000 0 96>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x37>, <&dmac1 0x36>, - <&dmac2 0x37>, <&dmac2 0x36>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a77970-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A77970_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a77970", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - iommus = <&ipmmu_rt 3>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a77970", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a77970", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a77970", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x57>, <&dmac1 0x56>, - <&dmac2 0x57>, <&dmac2 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a77970", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A77970_CLK_S2D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x59>, <&dmac1 0x58>, - <&dmac2 0x59>, <&dmac2 0x58>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a77970", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a77970", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x64>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a77970", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a77970", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 209>; - dmas = <&dmac1 0x45>, <&dmac1 0x44>, - <&dmac2 0x45>, <&dmac2 0x44>; - dma-names = "tx", "rx", "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a77970", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 208>; - dmas = <&dmac1 0x47>, <&dmac1 0x46>, - <&dmac2 0x47>, <&dmac2 0x46>; - dma-names = "tx", "rx", "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a77970"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a77970"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a77970"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a77970"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a77970", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <8>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a77970", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <8>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a77970"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ir: iommu@ff8b0000 { - compatible = "renesas,ipmmu-r8a77970"; - reg = <0 0xff8b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 3>; - power-domains = <&sysc R8A77970_PD_A3IR>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a77970"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a77970"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 7>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a77970"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 9>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - mmc0: mmc@ee140000 { - compatible = "renesas,sdhi-r8a77970", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 314>; - max-frequency = <200000000>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a77970-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x4000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0xf1010000 0 0x1000>, - <0 0xf1020000 0 0x20000>, - <0 0xf1040000 0 0x20000>, - <0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | - IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 623>; - renesas,fcp = <&fcpvd0>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 603>; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a77970-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a77970"; - reg = <0 0xfeb00000 0 0x80000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>; - clock-names = "du.0"; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 724>; - reset-names = "du.0"; - renesas,vsps = <&vspd0 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds-encoder@feb90000 { - compatible = "renesas,r8a77970-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = - <&du_out_lvds0>; - }; - }; - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - cpu-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&thermal>; - - cooling-maps { - }; - - trips { - cpu-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/dts/r8a77980-condor.dts b/arch/arm/dts/r8a77980-condor.dts deleted file mode 100644 index 68d1f1d53b3..00000000000 --- a/arch/arm/dts/r8a77980-condor.dts +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Condor board with R-Car V3H - * - * Copyright (C) 2018 Renesas Electronics Corp. - * Copyright (C) 2018 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77980.dtsi" -#include "condor-common.dtsi" - -/ { - model = "Renesas Condor board based on r8a77980"; - compatible = "renesas,condor", "renesas,r8a77980"; -}; - -&i2c0 { - eeprom@50 { - compatible = "rohm,br24t01", "atmel,24c01"; - reg = <0x50>; - pagesize = <8>; - }; -}; diff --git a/arch/arm/dts/r8a77980-v3hsk.dts b/arch/arm/dts/r8a77980-v3hsk.dts deleted file mode 100644 index 77d22df25ff..00000000000 --- a/arch/arm/dts/r8a77980-v3hsk.dts +++ /dev/null @@ -1,293 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the V3H Starter Kit board - * - * Copyright (C) 2018 Renesas Electronics Corp. - * Copyright (C) 2018 Cogent Embedded, Inc. - */ - -/dts-v1/; -#include "r8a77980.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Renesas V3H Starter Kit board"; - compatible = "renesas,v3hsk", "renesas,r8a77980"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - serial0 = &scif0; - ethernet0 = &gether; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-out { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con: endpoint { - remote-endpoint = <&adv7511_out>; - }; - }; - }; - - lvds-decoder { - compatible = "thine,thc63lvd1024"; - vcc-supply = <&vcc3v3_d5>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - thc63lvd1024_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; - - port@2 { - reg = <2>; - thc63lvd1024_out: endpoint { - remote-endpoint = <&adv7511_in>; - }; - }; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0 0x48000000 0 0x78000000>; - }; - - osc1_clk: osc1-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <148500000>; - }; - - vcc1v8_d4: regulator-0 { - compatible = "regulator-fixed"; - regulator-name = "VCC1V8_D4"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - vcc3v3_d5: regulator-1 { - compatible = "regulator-fixed"; - regulator-name = "VCC3V3_D5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&osc1_clk>; - clock-names = "du.0", "dclkin.0"; - status = "okay"; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&gether { - pinctrl-0 = <&gether_pins>; - pinctrl-names = "default"; - - phy-mode = "rgmii"; - phy-handle = <&phy0>; - renesas,no-ether-link; - status = "okay"; - - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio4>; - interrupts = <23 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; - }; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - hdmi@39 { - compatible = "adi,adv7511w"; - #sound-dai-cells = <0>; - reg = <0x39>; - interrupt-parent = <&gpio1>; - interrupts = <20 IRQ_TYPE_LEVEL_LOW>; - avdd-supply = <&vcc1v8_d4>; - dvdd-supply = <&vcc1v8_d4>; - pvdd-supply = <&vcc1v8_d4>; - bgvdd-supply = <&vcc1v8_d4>; - dvdd-3v-supply = <&vcc3v3_d5>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7511_in: endpoint { - remote-endpoint = <&thc63lvd1024_out>; - }; - }; - - port@1 { - reg = <1>; - adv7511_out: endpoint { - remote-endpoint = <&hdmi_con>; - }; - }; - }; - }; -}; - -&lvds0 { - status = "okay"; - - ports { - port@1 { - lvds0_out: endpoint { - remote-endpoint = <&thc63lvd1024_in>; - }; - }; - }; -}; - -&pfc { - gether_pins: gether { - groups = "gether_mdio_a", "gether_rgmii", - "gether_txcrefclk", "gether_txcrefclk_mega"; - function = "gether"; - }; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; - - scif0_pins: scif0 { - groups = "scif0_data"; - function = "scif0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk_b"; - function = "scif_clk"; - }; -}; - -&rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fs512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - bootparam@0 { - reg = <0x00000000 0x040000>; - read-only; - }; - cr7@40000 { - reg = <0x00040000 0x080000>; - read-only; - }; - cert_header_sa3@c0000 { - reg = <0x000c0000 0x080000>; - read-only; - }; - bl2@140000 { - reg = <0x00140000 0x040000>; - read-only; - }; - cert_header_sa6@180000 { - reg = <0x00180000 0x040000>; - read-only; - }; - bl31@1c0000 { - reg = <0x001c0000 0x460000>; - read-only; - }; - uboot@640000 { - reg = <0x00640000 0x0c0000>; - read-only; - }; - uboot-env@700000 { - reg = <0x00700000 0x040000>; - read-only; - }; - dtb@740000 { - reg = <0x00740000 0x080000>; - }; - kernel@7c0000 { - reg = <0x007c0000 0x1400000>; - }; - user@1bc0000 { - reg = <0x01bc0000 0x2440000>; - }; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - -&scif_clk { - clock-frequency = <14745600>; -}; diff --git a/arch/arm/dts/r8a77980.dtsi b/arch/arm/dts/r8a77980.dtsi deleted file mode 100644 index 5ed2daaca1f..00000000000 --- a/arch/arm/dts/r8a77980.dtsi +++ /dev/null @@ -1,1625 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car V3H (R8A77980) SoC - * - * Copyright (C) 2018 Renesas Electronics Corp. - * Copyright (C) 2018 Cogent Embedded, Inc. - */ - -#include <dt-bindings/clock/r8a77980-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a77980-sysc.h> - -/ { - compatible = "renesas,r8a77980"; - #address-cells = <2>; - #size-cells = <2>; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a53_0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0>; - clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>; - power-domains = <&sysc R8A77980_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - a53_1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <1>; - clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>; - power-domains = <&sysc R8A77980_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - a53_2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <2>; - clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>; - power-domains = <&sysc R8A77980_PD_CA53_CPU2>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - a53_3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <3>; - clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>; - power-domains = <&sysc R8A77980_PD_CA53_CPU3>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - L2_CA53: cache-controller { - compatible = "cache"; - power-domains = <&sysc R8A77980_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a77980-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a77980", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 22>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a77980", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 28>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a77980", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 30>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77980", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 17>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a77980", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 25>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a77980", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 15>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a77980"; - reg = <0 0xe6060000 0 0x50c>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a77980-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a77980-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a77980-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a77980-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a77980-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a77980-rst"; - reg = <0 0xe6160000 0 0x200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a77980-sysc"; - reg = <0 0xe6180000 0 0x440>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a77980-thermal"; - reg = <0 0xe6198000 0 0x100>, - <0 0xe61a0000 0 0x100>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a77980", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a77980", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a77980", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a77980", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a77980", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a77980", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - compatible = "renesas,i2c-r8a77980", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - compatible = "renesas,i2c-r8a77980", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - compatible = "renesas,i2c-r8a77980", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - compatible = "renesas,i2c-r8a77980", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 928>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - compatible = "renesas,i2c-r8a77980", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 927>; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - compatible = "renesas,i2c-r8a77980", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac1 0x9b>, <&dmac1 0x9a>, - <&dmac2 0x9b>, <&dmac2 0x9a>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a77980", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a77980", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a77980", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a77980", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x37>, <&dmac1 0x36>, - <&dmac2 0x37>, <&dmac2 0x36>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - pcie_phy: pcie-phy@e65d0000 { - compatible = "renesas,r8a77980-pcie-phy"; - reg = <0 0xe65d0000 0 0x8000>; - #phy-cells = <0>; - clocks = <&cpg CPG_MOD 319>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 319>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a77980-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A77980_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a77980", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <2000>; - iommus = <&ipmmu_ds1 33>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a77980", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6e60000 0 0x40>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a77980", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6e68000 0 0x40>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a77980", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6c50000 0 0x40>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x57>, <&dmac1 0x56>, - <&dmac2 0x57>, <&dmac2 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a77980", - "renesas,rcar-gen3-scif", - "renesas,scif"; - reg = <0 0xe6c40000 0 0x40>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A77980_CLK_S3D1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x59>, <&dmac1 0x58>, - <&dmac2 0x59>, <&dmac2 0x58>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a77980", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 304>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 304>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a77980", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x64>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a77980", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a77980", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a77980", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin0: video@e6ef0000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin0csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin0>; - }; - }; - }; - }; - - vin1: video@e6ef1000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - status = "disabled"; - renesas,id = <1>; - resets = <&cpg 810>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin1csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin1>; - }; - }; - }; - }; - - vin2: video@e6ef2000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin2csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin2>; - }; - }; - }; - }; - - vin3: video@e6ef3000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin3csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin3>; - }; - }; - }; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin5>; - }; - }; - }; - }; - - vin6: video@e6ef6000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin6csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin6>; - }; - }; - }; - }; - - vin7: video@e6ef7000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin7csi41: endpoint@3 { - reg = <3>; - remote-endpoint = <&csi41vin7>; - }; - }; - }; - }; - - vin8: video@e6ef8000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef8000 0 0x1000>; - interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 628>; - renesas,id = <8>; - status = "disabled"; - }; - - vin9: video@e6ef9000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6ef9000 0 0x1000>; - interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 627>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 627>; - renesas,id = <9>; - status = "disabled"; - }; - - vin10: video@e6efa000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6efa000 0 0x1000>; - interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 625>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 625>; - renesas,id = <10>; - status = "disabled"; - }; - - vin11: video@e6efb000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6efb000 0 0x1000>; - interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 618>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 618>; - renesas,id = <11>; - status = "disabled"; - }; - - vin12: video@e6efc000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6efc000 0 0x1000>; - interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 612>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 612>; - renesas,id = <12>; - status = "disabled"; - }; - - vin13: video@e6efd000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6efd000 0 0x1000>; - interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 608>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 608>; - renesas,id = <13>; - status = "disabled"; - }; - - vin14: video@e6efe000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6efe000 0 0x1000>; - interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 605>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 605>; - renesas,id = <14>; - status = "disabled"; - }; - - vin15: video@e6eff000 { - compatible = "renesas,vin-r8a77980"; - reg = <0 0xe6eff000 0 0x1000>; - interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 604>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 604>; - renesas,id = <15>; - status = "disabled"; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a77980", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a77980", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - gether: ethernet@e7400000 { - compatible = "renesas,gether-r8a77980"; - reg = <0 0xe7400000 0 0x1000>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 813>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ir: iommu@ff8b0000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xff8b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 3>; - power-domains = <&sysc R8A77980_PD_A3IR>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 10>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vip0: iommu@e7b00000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xe7b00000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vip1: iommu@e7960000 { - compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xe7960000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 11>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - mmc0: mmc@ee140000 { - compatible = "renesas,sdhi-r8a77980", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77980_CLK_SD0H>; - clock-names = "core", "clkh"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 314>; - max-frequency = <200000000>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a77980-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x4000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec: pcie@fe000000 { - compatible = "renesas,pcie-r8a77980", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 319>; - phys = <&pcie_phy>; - phy-names = "pcie"; - iommu-map = <0 &ipmmu_vi0 5 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 623>; - renesas,fcp = <&fcpvd0>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 603>; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a77980-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin0csi40>; - }; - csi40vin1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin1csi40>; - }; - csi40vin2: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin2csi40>; - }; - csi40vin3: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin3csi40>; - }; - }; - }; - }; - - csi41: csi2@feab0000 { - compatible = "renesas,r8a77980-csi2"; - reg = <0 0xfeab0000 0 0x10000>; - interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi41vin4: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin4csi41>; - }; - csi41vin5: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin5csi41>; - }; - csi41vin6: endpoint@2 { - reg = <2>; - remote-endpoint = <&vin6csi41>; - }; - csi41vin7: endpoint@3 { - reg = <3>; - remote-endpoint = <&vin7csi41>; - }; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a77980"; - reg = <0 0xfeb00000 0 0x80000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>; - clock-names = "du.0"; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 724>; - reset-names = "du.0"; - renesas,vsps = <&vspd0 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - }; - }; - - lvds0: lvds-encoder@feb90000 { - compatible = "renesas,r8a77980-lvds"; - reg = <0 0xfeb90000 0 0x14>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = - <&du_out_lvds0>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - - trips { - sensor1-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; - sensor1-critical { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - - trips { - sensor2-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; - sensor2-critical { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts deleted file mode 100644 index 9da0fd08f8c..00000000000 --- a/arch/arm/dts/r8a77990-ebisu.dts +++ /dev/null @@ -1,15 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Ebisu board with R-Car E3 - * - * Copyright (C) 2018 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a77990.dtsi" -#include "ebisu.dtsi" - -/ { - model = "Renesas Ebisu board based on r8a77990"; - compatible = "renesas,ebisu", "renesas,r8a77990"; -}; diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi deleted file mode 100644 index 4c545eff9b4..00000000000 --- a/arch/arm/dts/r8a77990.dtsi +++ /dev/null @@ -1,2154 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car E3 (R8A77990) SoC - * - * Copyright (C) 2018-2019 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a77990-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a77990-sysc.h> - -/ { - compatible = "renesas,r8a77990"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_c: audio_clk_c { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster1_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - clock-latency-ns = <300000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - clock-latency-ns = <300000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - clock-latency-ns = <300000>; - opp-suspend; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a53_0: cpu@0 { - compatible = "arm,cortex-a53"; - reg = <0>; - device_type = "cpu"; - #cooling-cells = <2>; - power-domains = <&sysc R8A77990_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - dynamic-power-coefficient = <277>; - clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - }; - - a53_1: cpu@1 { - compatible = "arm,cortex-a53"; - reg = <1>; - device_type = "cpu"; - power-domains = <&sysc R8A77990_PD_CA53_CPU1>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; - operating-points-v2 = <&cluster1_opp>; - }; - - L2_CA53: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A77990_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <700>; - exit-latency-us = <700>; - min-residency-us = <5000>; - }; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - /* External PCIe clock - can be overridden by the board */ - pcie_bus_clk: pcie_bus { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&a53_0>, <&a53_1>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc: soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a77990-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 23>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 26>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 16>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 11>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 20>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a77990", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 18>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a77990"; - reg = <0 0xe6060000 0 0x508>; - }; - - i2c_dvfs: i2c@e60b0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,iic-r8a77990", - "renesas,rcar-gen3-iic", - "renesas,rmobile-iic"; - reg = <0 0xe60b0000 0 0x425>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 926>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 926>; - dmas = <&dmac0 0x11>, <&dmac0 0x10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a77990-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a77990-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a77990-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a77990-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a77990-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; - clock-names = "extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a77990-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a77990-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - thermal: thermal@e6190000 { - compatible = "renesas,thermal-r8a77990"; - reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a77990", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a77990", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a77990", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a77990", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a77990", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 927>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 927>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 919>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 918>; - dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c7: i2c@e6690000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77990", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6690000 0 0x40>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1003>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 1003>; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a77990", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a77990", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>, - <&dmac2 0x33>, <&dmac2 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 519>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a77990", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>, - <&dmac2 0x35>, <&dmac2 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 518>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a77990", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hscif4: serial@e66b0000 { - compatible = "renesas,hscif-r8a77990", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66b0000 0 0x60>; - interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x39>, <&dmac0 0x38>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a77990", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a77990-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a77990-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - arm_cc630p: crypto@e6601000 { - compatible = "arm,cryptocell-630p-ree"; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xe6601000 0 0x1000>; - clocks = <&cpg CPG_MOD 229>; - resets = <&cpg 229>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a77990", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a77990", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, - <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, - <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, - <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, - <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a77990", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, - <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, - <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, - <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, - <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 10>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A77990_PD_A3VC>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a77990"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a77990", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a77990", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A77990_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a77990", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A77990_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a77990-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A77990_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x8>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 523>; - #pwm-cells = <2>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a77990", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a77990", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a77990", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a77990", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a77990", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a77990", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 64>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A77990_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a77990", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a77990", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac0 0x43>, <&dmac0 0x42>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a77990", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a77990", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a77990"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin4csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin4>; - }; - }; - }; - }; - - vin5: video@e6ef5000 { - compatible = "renesas,vin-r8a77990"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - vin5csi40: endpoint@2 { - reg = <2>; - remote-endpoint = <&csi40vin5>; - }; - }; - }; - }; - - drif00: rif@e6f40000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f40000 0 0x84>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>; - clock-names = "fck"; - dmas = <&dmac1 0x20>, <&dmac2 0x20>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 515>; - renesas,bonding = <&drif01>; - status = "disabled"; - }; - - drif01: rif@e6f50000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f50000 0 0x84>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>; - clock-names = "fck"; - dmas = <&dmac1 0x22>, <&dmac2 0x22>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 514>; - renesas,bonding = <&drif00>; - status = "disabled"; - }; - - drif10: rif@e6f60000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f60000 0 0x84>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 513>; - clock-names = "fck"; - dmas = <&dmac1 0x24>, <&dmac2 0x24>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 513>; - renesas,bonding = <&drif11>; - status = "disabled"; - }; - - drif11: rif@e6f70000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f70000 0 0x84>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 512>; - clock-names = "fck"; - dmas = <&dmac1 0x26>, <&dmac2 0x26>; - dma-names = "rx", "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 512>; - renesas,bonding = <&drif10>; - status = "disabled"; - }; - - drif20: rif@e6f80000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f80000 0 0x84>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 511>; - clock-names = "fck"; - dmas = <&dmac0 0x28>; - dma-names = "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 511>; - renesas,bonding = <&drif21>; - status = "disabled"; - }; - - drif21: rif@e6f90000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6f90000 0 0x84>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 510>; - clock-names = "fck"; - dmas = <&dmac0 0x2a>; - dma-names = "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 510>; - renesas,bonding = <&drif20>; - status = "disabled"; - }; - - drif30: rif@e6fa0000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fa0000 0 0x84>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 509>; - clock-names = "fck"; - dmas = <&dmac0 0x2c>; - dma-names = "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 509>; - renesas,bonding = <&drif31>; - status = "disabled"; - }; - - drif31: rif@e6fb0000 { - compatible = "renesas,r8a77990-drif", - "renesas,rcar-gen3-drif"; - reg = <0 0xe6fb0000 0 0x84>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 508>; - clock-names = "fck"; - dmas = <&dmac0 0x2e>; - dma-names = "rx"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 508>; - renesas,bonding = <&drif30>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, - <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, - <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, - <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, - <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, - <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, - <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, - <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, - <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, - <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&audio_clk_c>, - <&cpg CPG_CORE R8A77990_CLK_ZA2>; - clock-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0", - "src.9", "src.8", "src.7", "src.6", - "src.5", "src.4", "src.3", "src.2", - "src.1", "src.0", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_c", "clk_i"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1006>, <&cpg 1007>, - <&cpg 1008>, <&cpg 1009>, - <&cpg 1010>, <&cpg 1011>, - <&cpg 1012>, <&cpg 1013>, - <&cpg 1014>, <&cpg 1015>; - reset-names = "ssi-all", - "ssi.9", "ssi.8", "ssi.7", "ssi.6", - "ssi.5", "ssi.4", "ssi.3", "ssi.2", - "ssi.1", "ssi.0"; - status = "disabled"; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma0 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma0 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,src { - src0: src-0 { - interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x85>, <&audma0 0x9a>; - dma-names = "rx", "tx"; - }; - src1: src-1 { - interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x87>, <&audma0 0x9c>; - dma-names = "rx", "tx"; - }; - src2: src-2 { - interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x89>, <&audma0 0x9e>; - dma-names = "rx", "tx"; - }; - src3: src-3 { - interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8b>, <&audma0 0xa0>; - dma-names = "rx", "tx"; - }; - src4: src-4 { - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8d>, <&audma0 0xb0>; - dma-names = "rx", "tx"; - }; - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma0 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma0 0xb4>; - dma-names = "rx", "tx"; - }; - src7: src-7 { - interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x93>, <&audma0 0xb6>; - dma-names = "rx", "tx"; - }; - src8: src-8 { - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x95>, <&audma0 0xb8>; - dma-names = "rx", "tx"; - }; - src9: src-9 { - interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x97>, <&audma0 0xba>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma0 0x02>, - <&audma0 0x15>, <&audma0 0x16>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma0 0x04>, - <&audma0 0x49>, <&audma0 0x4a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma0 0x06>, - <&audma0 0x63>, <&audma0 0x64>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma0 0x08>, - <&audma0 0x6f>, <&audma0 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma0 0x0a>, - <&audma0 0x71>, <&audma0 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma0 0x0c>, - <&audma0 0x73>, <&audma0 0x74>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma0 0x0e>, - <&audma0 0x75>, <&audma0 0x76>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma0 0x10>, - <&audma0 0x79>, <&audma0 0x7a>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma0 0x12>, - <&audma0 0x7b>, <&audma0 0x7c>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma0 0x14>, - <&audma0 0x7d>, <&audma0 0x7e>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - mlp: mlp@ec520000 { - compatible = "renesas,r8a77990-mlp", - "renesas,rcar-gen3-mlp"; - reg = <0 0xec520000 0 0x800>; - interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 802>; - status = "disabled"; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a77990", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, - <&ipmmu_mp 2>, <&ipmmu_mp 3>, - <&ipmmu_mp 4>, <&ipmmu_mp 5>, - <&ipmmu_mp 6>, <&ipmmu_mp 7>, - <&ipmmu_mp 8>, <&ipmmu_mp 9>, - <&ipmmu_mp 10>, <&ipmmu_mp 11>, - <&ipmmu_mp 12>, <&ipmmu_mp 13>, - <&ipmmu_mp 14>, <&ipmmu_mp 15>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a77990", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - usb3_peri0: usb@ee020000 { - compatible = "renesas,r8a77990-usb3-peri", - "renesas,rcar-gen3-usb3-peri"; - reg = <0 0xee020000 0 0x400>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a77990", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi0: mmc@ee100000 { - compatible = "renesas,sdhi-r8a77990", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 314>; - iommus = <&ipmmu_ds1 32>; - status = "disabled"; - }; - - sdhi1: mmc@ee120000 { - compatible = "renesas,sdhi-r8a77990", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 313>; - iommus = <&ipmmu_ds1 33>; - status = "disabled"; - }; - - sdhi3: mmc@ee160000 { - compatible = "renesas,sdhi-r8a77990", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 311>; - iommus = <&ipmmu_ds1 35>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a77990-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - pciec0: pcie@fe000000 { - compatible = "renesas,pcie-r8a77990", - "renesas,pcie-rcar-gen3"; - reg = <0 0xfe000000 0 0x80000>; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x00 0xff>; - device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, - <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, - <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, - <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR/IOMMU as inbound ranges */ - dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; - clock-names = "pcie", "pcie_bus"; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 319>; - iommu-map = <0 &ipmmu_hc 0 1>; - iommu-map-mask = <0>; - status = "disabled"; - }; - - vspb0: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 626>; - renesas,fcp = <&fcpvb0>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 607>; - iommus = <&ipmmu_vp0 5>; - }; - - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 631>; - renesas,fcp = <&fcpvi0>; - }; - - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 611>; - iommus = <&ipmmu_vp0 8>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x7000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 623>; - renesas,fcp = <&fcpvd0>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x7000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 622>; - renesas,fcp = <&fcpvd1>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 602>; - iommus = <&ipmmu_vi0 9>; - }; - - cmm0: cmm@fea40000 { - compatible = "renesas,r8a77990-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea40000 0 0x1000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 711>; - resets = <&cpg 711>; - }; - - cmm1: cmm@fea50000 { - compatible = "renesas,r8a77990-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea50000 0 0x1000>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 710>; - resets = <&cpg 710>; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a77990-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <1>; - - csi40vin4: endpoint@0 { - reg = <0>; - remote-endpoint = <&vin4csi40>; - }; - csi40vin5: endpoint@1 { - reg = <1>; - remote-endpoint = <&vin5csi40>; - }; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a77990"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - - renesas,cmms = <&cmm0>, <&cmm1>; - renesas,vsps = <&vspd0 0>, <&vspd1 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - - port@2 { - reg = <2>; - du_out_lvds1: endpoint { - remote-endpoint = <&lvds1_in>; - }; - }; - }; - }; - - lvds0: lvds-encoder@feb90000 { - compatible = "renesas,r8a77990-lvds"; - reg = <0 0xfeb90000 0 0x20>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - renesas,companion = <&lvds1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - lvds1: lvds-encoder@feb90100 { - compatible = "renesas,r8a77990-lvds"; - reg = <0 0xfeb90100 0 0x20>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; - resets = <&cpg 726>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds1_in: endpoint { - remote-endpoint = <&du_out_lvds1>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - cpu-thermal { - polling-delay-passive = <250>; - polling-delay = <0>; - thermal-sensors = <&thermal>; - sustainable-power = <717>; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&a53_0 0 2>; - contribution = <1024>; - }; - }; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - - target: trip-point1 { - temperature = <100000>; - hysteresis = <2000>; - type = "passive"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/dts/r8a77995-draak.dts b/arch/arm/dts/r8a77995-draak.dts deleted file mode 100644 index 384825617fc..00000000000 --- a/arch/arm/dts/r8a77995-draak.dts +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Draak board with R-Car D3 - * - * Copyright (C) 2016-2018 Renesas Electronics Corp. - * Copyright (C) 2017 Glider bvba - */ - -/dts-v1/; -#include "r8a77995.dtsi" -#include "draak.dtsi" - -/ { - model = "Renesas Draak board based on r8a77995"; - compatible = "renesas,draak", "renesas,r8a77995"; -}; diff --git a/arch/arm/dts/r8a77995.dtsi b/arch/arm/dts/r8a77995.dtsi deleted file mode 100644 index e25024a7b66..00000000000 --- a/arch/arm/dts/r8a77995.dtsi +++ /dev/null @@ -1,1473 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car D3 (R8A77995) SoC - * - * Copyright (C) 2016 Renesas Electronics Corp. - * Copyright (C) 2017 Glider bvba - */ - -#include <dt-bindings/clock/r8a77995-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a77995-sysc.h> - -/ { - compatible = "renesas,r8a77995"; - #address-cells = <2>; - #size-cells = <2>; - - /* - * The external audio clocks are configured as 0 Hz fixed frequency - * clocks by default. - * Boards that provide audio clocks should override them. - */ - audio_clk_a: audio_clk_a { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - audio_clk_b: audio_clk_b { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a53_0: cpu@0 { - compatible = "arm,cortex-a53"; - reg = <0x0>; - device_type = "cpu"; - power-domains = <&sysc R8A77995_PD_CA53_CPU0>; - next-level-cache = <&L2_CA53>; - enable-method = "psci"; - }; - - L2_CA53: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A77995_PD_CA53_SCU>; - cache-unified; - cache-level = <2>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - pmu_a53 { - compatible = "arm,cortex-a53-pmu"; - interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a77995-wdt", - "renesas,rcar-gen3-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - }; - - gpio0: gpio@e6050000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6050000 0 0x50>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 0 9>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 912>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 912>; - }; - - gpio1: gpio@e6051000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6051000 0 0x50>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 32 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 911>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 911>; - }; - - gpio2: gpio@e6052000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6052000 0 0x50>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 64 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 910>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 910>; - }; - - gpio3: gpio@e6053000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6053000 0 0x50>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 96 10>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 909>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 909>; - }; - - gpio4: gpio@e6054000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6054000 0 0x50>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 128 32>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 908>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 908>; - }; - - gpio5: gpio@e6055000 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055000 0 0x50>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 160 21>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 907>; - }; - - gpio6: gpio@e6055400 { - compatible = "renesas,gpio-r8a77995", - "renesas,rcar-gen3-gpio"; - reg = <0 0xe6055400 0 0x50>; - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - #gpio-cells = <2>; - gpio-controller; - gpio-ranges = <&pfc 0 192 14>; - #interrupt-cells = <2>; - interrupt-controller; - clocks = <&cpg CPG_MOD 906>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 906>; - }; - - pfc: pinctrl@e6060000 { - compatible = "renesas,pfc-r8a77995"; - reg = <0 0xe6060000 0 0x508>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a77995-cmt0", - "renesas,rcar-gen3-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 303>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 303>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a77995-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 302>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 302>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a77995-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 301>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 301>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a77995-cmt1", - "renesas,rcar-gen3-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 300>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 300>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a77995-cpg-mssr"; - reg = <0 0xe6150000 0 0x1000>; - clocks = <&extal_clk>; - clock-names = "extal"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a77995-rst"; - reg = <0 0xe6160000 0 0x0200>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a77995-sysc"; - reg = <0 0xe6180000 0 0x0400>; - #power-domain-cells = <1>; - }; - - thermal: thermal@e6190000 { - compatible = "renesas,thermal-r8a77995"; - reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 522>; - #thermal-sensor-cells = <0>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a77995", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 407>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 407>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a77995", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 125>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 125>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a77995", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 124>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 124>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a77995", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 123>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 123>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a77995", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 122>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 122>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a77995", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 121>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 121>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 931>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 931>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>, - <&dmac2 0x91>, <&dmac2 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 930>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 930>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>, - <&dmac2 0x93>, <&dmac2 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 929>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 929>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>, - <&dmac2 0x95>, <&dmac2 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "renesas,i2c-r8a77995", - "renesas,rcar-gen3-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 928>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 928>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <6>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a77995", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a77995", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - hsusb: usb@e6590000 { - compatible = "renesas,usbhs-r8a77995", - "renesas,rcar-gen3-usbhs"; - reg = <0 0xe6590000 0 0x200>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; - dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, - <&usb_dmac1 0>, <&usb_dmac1 1>; - dma-names = "ch0", "ch1", "ch2", "ch3"; - renesas,buswait = <11>; - phys = <&usb2_phy0 3>; - phy-names = "usb"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 704>, <&cpg 703>; - status = "disabled"; - }; - - usb_dmac0: dma-controller@e65a0000 { - compatible = "renesas,r8a77995-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 330>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 330>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - usb_dmac1: dma-controller@e65b0000 { - compatible = "renesas,r8a77995-usb-dmac", - "renesas,usb-dmac"; - reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1"; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 331>; - #dma-cells = <1>; - dma-channels = <2>; - }; - - arm_cc630p: crypto@e6601000 { - compatible = "arm,cryptocell-630p-ree"; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xe6601000 0 0x1000>; - clocks = <&cpg CPG_MOD 229>; - resets = <&cpg 229>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - }; - - canfd: can@e66c0000 { - compatible = "renesas,r8a77995-canfd", - "renesas,rcar-gen3-canfd"; - reg = <0 0xe66c0000 0 0x8000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 914>, - <&cpg CPG_CORE R8A77995_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 914>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - }; - - dmac0: dma-controller@e6700000 { - compatible = "renesas,dmac-r8a77995", - "renesas,rcar-dmac"; - reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7"; - clocks = <&cpg CPG_MOD 219>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 219>; - #dma-cells = <1>; - dma-channels = <8>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>; - }; - - dmac1: dma-controller@e7300000 { - compatible = "renesas,dmac-r8a77995", - "renesas,rcar-dmac"; - reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7"; - clocks = <&cpg CPG_MOD 218>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 218>; - #dma-cells = <1>; - dma-channels = <8>; - iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, - <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, - <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, - <&ipmmu_ds1 6>, <&ipmmu_ds1 7>; - }; - - dmac2: dma-controller@e7310000 { - compatible = "renesas,dmac-r8a77995", - "renesas,rcar-dmac"; - reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7"; - clocks = <&cpg CPG_MOD 217>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 217>; - #dma-cells = <1>; - dma-channels = <8>; - iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, - <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, - <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, - <&ipmmu_ds1 22>, <&ipmmu_ds1 23>; - }; - - ipmmu_ds0: iommu@e6740000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe6740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 0>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@e7740000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe7740000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 1>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@e6570000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe6570000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 2>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@e67b0000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xe67b0000 0 0x1000>; - interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mp: iommu@ec670000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xec670000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 4>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_pv0: iommu@fd800000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfd800000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 6>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt: iommu@ffc80000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xffc80000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 10>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@fe6b0000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfe6b0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 12>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@febd0000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfebd0000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 14>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vp0: iommu@fe990000 { - compatible = "renesas,ipmmu-r8a77995"; - reg = <0 0xfe990000 0 0x1000>; - renesas,ipmmu-main = <&ipmmu_mm 16>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - avb: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a77995", - "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 812>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <1800>; - iommus = <&ipmmu_ds0 16>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - can0: can@e6c30000 { - compatible = "renesas,can-r8a77995", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c30000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>, - <&cpg CPG_CORE R8A77995_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 916>; - status = "disabled"; - }; - - can1: can@e6c38000 { - compatible = "renesas,can-r8a77995", - "renesas,rcar-gen3-can"; - reg = <0 0xe6c38000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>, - <&cpg CPG_CORE R8A77995_CLK_CANFD>, - <&can_clk>; - clock-names = "clkp1", "clkp2", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>; - assigned-clock-rates = <40000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 915>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a77995", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x8>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 523>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 207>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>, - <&dmac2 0x51>, <&dmac2 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 207>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 206>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>, - <&dmac2 0x53>, <&dmac2 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 206>; - status = "disabled"; - }; - - scif2: serial@e6e88000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6e88000 0 64>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x13>, <&dmac1 0x12>, - <&dmac2 0x13>, <&dmac2 0x12>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 310>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 204>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 204>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 203>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 203>; - status = "disabled"; - }; - - scif5: serial@e6f30000 { - compatible = "renesas,scif-r8a77995", - "renesas,rcar-gen3-scif", "renesas,scif"; - reg = <0 0xe6f30000 0 64>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 202>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, - <&dmac2 0x5b>, <&dmac2 0x5a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 202>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a77995", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6e90000 0 0x64>; - interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 211>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>, - <&dmac2 0x41>, <&dmac2 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 211>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a77995", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6ea0000 0 0x64>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 210>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a77995", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c00000 0 0x64>; - interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 209>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 209>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a77995", - "renesas,rcar-gen3-msiof"; - reg = <0 0xe6c10000 0 0x64>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 208>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 208>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin4: video@e6ef4000 { - compatible = "renesas,vin-r8a77995"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <4>; - status = "disabled"; - }; - - rcar_sound: sound@ec500000 { - /* - * #sound-dai-cells is required if simple-card - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required for audio_clkout0/1/2/3 - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a77995", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ - reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; - - clocks = <&cpg CPG_MOD 1005>, - <&cpg CPG_MOD 1011>, <&cpg CPG_MOD 1012>, - <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, - <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, - <&audio_clk_a>, <&audio_clk_b>, - <&cpg CPG_CORE R8A77995_CLK_ZA2>; - clock-names = "ssi-all", - "ssi.4", "ssi.3", - "src.6", "src.5", - "mix.1", "mix.0", - "ctu.1", "ctu.0", - "dvc.0", "dvc.1", - "clk_a", "clk_b", "clk_i"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 1005>, - <&cpg 1011>, <&cpg 1012>; - reset-names = "ssi-all", - "ssi.4", "ssi.3"; - status = "disabled"; - - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - - rcar_sound,dvc { - dvc0: dvc-0 { - dmas = <&audma0 0xbc>; - dma-names = "tx"; - }; - dvc1: dvc-1 { - dmas = <&audma0 0xbe>; - dma-names = "tx"; - }; - }; - - rcar_sound,mix { - mix0: mix-0 { }; - mix1: mix-1 { }; - }; - - rcar_sound,src { - src5: src-5 { - interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x8f>, <&audma0 0xb2>; - dma-names = "rx", "tx"; - }; - src6: src-6 { - interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x91>, <&audma0 0xb4>; - dma-names = "rx", "tx"; - }; - }; - - rcar_sound,ssi { - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma0 0x08>, - <&audma0 0x6f>, <&audma0 0x70>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma0 0x0a>, - <&audma0 0x71>, <&audma0 0x72>; - dma-names = "rx", "tx", "rxu", "txu"; - }; - }; - }; - - mlp: mlp@ec520000 { - compatible = "renesas,r8a77995-mlp", - "renesas,rcar-gen3-mlp"; - reg = <0 0xec520000 0 0x800>; - interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 802>; - status = "disabled"; - }; - - audma0: dma-controller@ec700000 { - compatible = "renesas,dmac-r8a77995", - "renesas,rcar-dmac"; - reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15"; - clocks = <&cpg CPG_MOD 502>; - clock-names = "fck"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 502>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, - <&ipmmu_mp 2>, <&ipmmu_mp 3>, - <&ipmmu_mp 4>, <&ipmmu_mp 5>, - <&ipmmu_mp 6>, <&ipmmu_mp 7>, - <&ipmmu_mp 8>, <&ipmmu_mp 9>, - <&ipmmu_mp 10>, <&ipmmu_mp 11>, - <&ipmmu_mp 12>, <&ipmmu_mp 13>, - <&ipmmu_mp 14>, <&ipmmu_mp 15>; - }; - - ohci0: usb@ee080000 { - compatible = "generic-ohci"; - reg = <0 0xee080000 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 1>; - phy-names = "usb"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0 2>; - phy-names = "usb"; - companion = <&ohci0>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - status = "disabled"; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a77995", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <1>; - status = "disabled"; - }; - - sdhi2: mmc@ee140000 { - compatible = "renesas,sdhi-r8a77995", - "renesas,rcar-gen3-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77995_CLK_SD0H>; - clock-names = "core", "clkh"; - max-frequency = <200000000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 312>; - iommus = <&ipmmu_ds1 34>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a77995-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 917>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1010000 0 0x1000>, - <0x0 0xf1020000 0 0x20000>, - <0x0 0xf1040000 0 0x20000>, - <0x0 0xf1060000 0 0x20000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; - clocks = <&cpg CPG_MOD 408>; - clock-names = "clk"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 408>; - }; - - vspbs: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 627>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 627>; - renesas,fcp = <&fcpvb0>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 623>; - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 622>; - renesas,fcp = <&fcpvd1>; - }; - - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 607>; - iommus = <&ipmmu_vp0 5>; - }; - - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 603>; - iommus = <&ipmmu_vi0 8>; - }; - - fcpvd1: fcp@fea2f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea2f000 0 0x200>; - clocks = <&cpg CPG_MOD 602>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 602>; - iommus = <&ipmmu_vi0 9>; - }; - - cmm0: cmm@fea40000 { - compatible = "renesas,r8a77995-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea40000 0 0x1000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 711>; - resets = <&cpg 711>; - }; - - cmm1: cmm@fea50000 { - compatible = "renesas,r8a77995-cmm", - "renesas,rcar-gen3-cmm"; - reg = <0 0xfea50000 0 0x1000>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 710>; - resets = <&cpg 710>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a77995"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; - clock-names = "du.0", "du.1"; - resets = <&cpg 724>; - reset-names = "du.0"; - - renesas,cmms = <&cmm0>, <&cmm1>; - renesas,vsps = <&vspd0 0>, <&vspd1 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - du_out_lvds0: endpoint { - remote-endpoint = <&lvds0_in>; - }; - }; - - port@2 { - reg = <2>; - du_out_lvds1: endpoint { - remote-endpoint = <&lvds1_in>; - }; - }; - }; - }; - - lvds0: lvds-encoder@feb90000 { - compatible = "renesas,r8a77995-lvds"; - reg = <0 0xfeb90000 0 0x20>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 727>; - status = "disabled"; - - renesas,companion = <&lvds1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds0_in: endpoint { - remote-endpoint = <&du_out_lvds0>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - lvds1: lvds-encoder@feb90100 { - compatible = "renesas,r8a77995-lvds"; - reg = <0 0xfeb90100 0 0x20>; - clocks = <&cpg CPG_MOD 727>; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 726>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - lvds1_in: endpoint { - remote-endpoint = <&du_out_lvds1>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&thermal>; - - cooling-maps { - }; - - trips { - cpu-crit { - temperature = <120000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, - <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; - }; -}; diff --git a/arch/arm/dts/r8a779a0-falcon-cpu.dtsi b/arch/arm/dts/r8a779a0-falcon-cpu.dtsi deleted file mode 100644 index 99b73e21c82..00000000000 --- a/arch/arm/dts/r8a779a0-falcon-cpu.dtsi +++ /dev/null @@ -1,359 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Falcon CPU board - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/leds/common.h> - -#include "r8a779a0.dtsi" - -/ { - model = "Renesas Falcon CPU board"; - compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - serial0 = &scif0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - keys { - compatible = "gpio-keys"; - - pinctrl-0 = <&keys_pins>; - pinctrl-names = "default"; - - key-1 { - gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; - linux,code = <KEY_1>; - label = "SW47"; - wakeup-source; - debounce-interval = <20>; - }; - - key-2 { - gpios = <&gpio6 19 GPIO_ACTIVE_LOW>; - linux,code = <KEY_2>; - label = "SW48"; - wakeup-source; - debounce-interval = <20>; - }; - - key-3 { - gpios = <&gpio6 20 GPIO_ACTIVE_LOW>; - linux,code = <KEY_3>; - label = "SW49"; - wakeup-source; - debounce-interval = <20>; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-1 { - gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <1>; - }; - led-2 { - gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <2>; - }; - led-3 { - gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <3>; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@500000000 { - device_type = "memory"; - reg = <0x5 0x00000000 0x0 0x80000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x0 0x80000000>; - }; - - memory@700000000 { - device_type = "memory"; - reg = <0x7 0x00000000 0x0 0x80000000>; - }; - - mini-dp-con { - compatible = "dp-connector"; - label = "CN5"; - type = "mini"; - - port { - mini_dp_con_in: endpoint { - remote-endpoint = <&sn65dsi86_out>; - }; - }; - }; - - reg_1p2v: regulator-1p2v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.2V"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sn65dsi86_refclk: clk-x6 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <38400000>; - }; -}; - -&dsi0 { - status = "okay"; - - ports { - port@1 { - dsi0_out: endpoint { - remote-endpoint = <&sn65dsi86_in>; - data-lanes = <1 2 3 4>; - }; - }; - }; -}; - -&du { - status = "okay"; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - eeprom@50 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "cpu-board"; - reg = <0x50>; - pagesize = <8>; - }; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - bridge@2c { - pinctrl-0 = <&irq0_pins>; - pinctrl-names = "default"; - - compatible = "ti,sn65dsi86"; - reg = <0x2c>; - - clocks = <&sn65dsi86_refclk>; - clock-names = "refclk"; - - interrupt-parent = <&intc_ex>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - - vccio-supply = <&reg_1p8v>; - vpll-supply = <&reg_1p8v>; - vcca-supply = <&reg_1p2v>; - vcc-supply = <&reg_1p2v>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - sn65dsi86_in: endpoint { - remote-endpoint = <&dsi0_out>; - }; - }; - - port@1 { - reg = <1>; - sn65dsi86_out: endpoint { - remote-endpoint = <&mini_dp_con_in>; - }; - }; - }; - }; -}; - -&i2c6 { - pinctrl-0 = <&i2c6_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; -}; - -&mmc0 { - pinctrl-0 = <&mmc_pins>; - pinctrl-1 = <&mmc_pins>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&reg_3p3v>; - vqmmc-supply = <&reg_1p8v>; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - bus-width = <8>; - no-sd; - no-sdio; - non-removable; - full-pwr-cycle-in-suspend; - status = "okay"; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - i2c1_pins: i2c1 { - groups = "i2c1"; - function = "i2c1"; - }; - - i2c6_pins: i2c6 { - groups = "i2c6"; - function = "i2c6"; - }; - - irq0_pins: irq0 { - groups = "intc_ex_irq0"; - function = "intc_ex"; - }; - - keys_pins: keys { - pins = "GP_6_18", "GP_6_19", "GP_6_20"; - bias-pull-up; - }; - - mmc_pins: mmc { - groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; - function = "mmc"; - power-source = <1800>; - }; - - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; - - scif0_pins: scif0 { - groups = "scif0_data", "scif0_ctrl"; - function = "scif0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; -}; - -&rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fs512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <40000000>; - spi-rx-bus-width = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot@0 { - reg = <0x0 0xcc0000>; - read-only; - }; - user@cc0000 { - reg = <0xcc0000 0x3340000>; - }; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&scif_clk { - clock-frequency = <24000000>; -}; diff --git a/arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi b/arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi deleted file mode 100644 index dbc8dcab109..00000000000 --- a/arch/arm/dts/r8a779a0-falcon-csi-dsi.dtsi +++ /dev/null @@ -1,270 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Falcon CSI/DSI sub-board - * - * Copyright (C) 2021 Glider bv - */ - -#include <dt-bindings/media/video-interfaces.h> - -&csi40 { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - csi40_in: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&max96712_out0>; - }; - }; - }; -}; - -&csi42 { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - csi42_in: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&max96712_out1>; - }; - }; - }; -}; - -&csi43 { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - csi43_in: endpoint { - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&max96712_out2>; - }; - }; - }; -}; - -&i2c0 { - pca9654_a: gpio@21 { - compatible = "onnn,pca9654"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - }; - - pca9654_b: gpio@22 { - compatible = "onnn,pca9654"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - }; - - pca9654_c: gpio@23 { - compatible = "onnn,pca9654"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - }; - - eeprom@52 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "csi-dsi-sub-board-id"; - reg = <0x52>; - pagesize = <8>; - }; -}; - -&i2c1 { - gmsl0: gmsl-deserializer@49 { - compatible = "maxim,max96712"; - reg = <0x49>; - enable-gpios = <&pca9654_a 0 GPIO_ACTIVE_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@4 { - reg = <4>; - max96712_out0: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - remote-endpoint = <&csi40_in>; - }; - }; - }; - }; - - gmsl1: gmsl-deserializer@4b { - compatible = "maxim,max96712"; - reg = <0x4b>; - enable-gpios = <&pca9654_b 0 GPIO_ACTIVE_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@4 { - reg = <4>; - max96712_out1: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - lane-polarities = <0 0 0 0 1>; - remote-endpoint = <&csi42_in>; - }; - }; - }; - }; - - gmsl2: gmsl-deserializer@6b { - compatible = "maxim,max96712"; - reg = <0x6b>; - enable-gpios = <&pca9654_c 0 GPIO_ACTIVE_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@4 { - reg = <4>; - max96712_out2: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3 4>; - lane-polarities = <0 0 0 0 1>; - remote-endpoint = <&csi43_in>; - }; - }; - }; - }; -}; - -&isp0 { - status = "okay"; -}; - -&isp2 { - status = "okay"; -}; - -&isp3 { - status = "okay"; -}; - -&vin00 { - status = "okay"; -}; - -&vin01 { - status = "okay"; -}; - -&vin02 { - status = "okay"; -}; - -&vin03 { - status = "okay"; -}; - -&vin04 { - status = "okay"; -}; - -&vin05 { - status = "okay"; -}; - -&vin06 { - status = "okay"; -}; - -&vin07 { - status = "okay"; -}; - -&vin16 { - status = "okay"; -}; - -&vin17 { - status = "okay"; -}; - -&vin18 { - status = "okay"; -}; - -&vin19 { - status = "okay"; -}; - -&vin20 { - status = "okay"; -}; - -&vin21 { - status = "okay"; -}; - -&vin22 { - status = "okay"; -}; - -&vin23 { - status = "okay"; -}; - -&vin24 { - status = "okay"; -}; - -&vin25 { - status = "okay"; -}; - -&vin26 { - status = "okay"; -}; - -&vin27 { - status = "okay"; -}; - -&vin28 { - status = "okay"; -}; - -&vin29 { - status = "okay"; -}; - -&vin30 { - status = "okay"; -}; - -&vin31 { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a779a0-falcon-ethernet.dtsi b/arch/arm/dts/r8a779a0-falcon-ethernet.dtsi deleted file mode 100644 index e11bf9ace77..00000000000 --- a/arch/arm/dts/r8a779a0-falcon-ethernet.dtsi +++ /dev/null @@ -1,15 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Falcon Ethernet sub-board - * - * Copyright (C) 2021 Glider bv - */ - -&i2c0 { - eeprom@53 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "ethernet-sub-board-id"; - reg = <0x53>; - pagesize = <8>; - }; -}; diff --git a/arch/arm/dts/r8a779a0-falcon.dts b/arch/arm/dts/r8a779a0-falcon.dts deleted file mode 100644 index 63db822e5f4..00000000000 --- a/arch/arm/dts/r8a779a0-falcon.dts +++ /dev/null @@ -1,101 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Falcon CPU and BreakOut boards with R-Car V3U - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a779a0-falcon-cpu.dtsi" -#include "r8a779a0-falcon-csi-dsi.dtsi" -#include "r8a779a0-falcon-ethernet.dtsi" - -/ { - model = "Renesas Falcon CPU and Breakout boards based on r8a779a0"; - compatible = "renesas,falcon-breakout", "renesas,falcon-cpu", "renesas,r8a779a0"; - - aliases { - ethernet0 = &avb0; - }; -}; - -&avb0 { - pinctrl-0 = <&avb0_pins>; - pinctrl-names = "default"; - phy-handle = <&phy0>; - tx-internal-delay-ps = <2000>; - status = "okay"; - - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio4>; - interrupts = <16 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; - }; -}; - -&can_clk { - clock-frequency = <40000000>; -}; - -&canfd { - pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; - pinctrl-names = "default"; - status = "okay"; - - channel0 { - status = "okay"; - }; - - channel1 { - status = "okay"; - }; -}; - -&i2c0 { - eeprom@51 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "breakout-board"; - reg = <0x51>; - pagesize = <8>; - }; -}; - -&pfc { - avb0_pins: avb0 { - mux { - groups = "avb0_link", "avb0_mdio", "avb0_rgmii", - "avb0_txcrefclk"; - function = "avb0"; - }; - - pins_mdio { - groups = "avb0_mdio"; - drive-strength = <21>; - }; - - pins_mii { - groups = "avb0_rgmii"; - drive-strength = <21>; - }; - - }; - - can_clk_pins: can-clk { - groups = "can_clk"; - function = "can_clk"; - }; - - canfd0_pins: canfd0 { - groups = "canfd0_data"; - function = "canfd0"; - }; - - canfd1_pins: canfd1 { - groups = "canfd1_data"; - function = "canfd1"; - }; -}; diff --git a/arch/arm/dts/r8a779a0.dtsi b/arch/arm/dts/r8a779a0.dtsi deleted file mode 100644 index 4e67a035649..00000000000 --- a/arch/arm/dts/r8a779a0.dtsi +++ /dev/null @@ -1,2915 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the R-Car V3U (R8A779A0) SoC - * - * Copyright (C) 2020 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a779a0-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a779a0-sysc.h> - -/ { - compatible = "renesas,r8a779a0"; - #address-cells = <2>; - #size-cells = <2>; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - a76_0: cpu@0 { - compatible = "arm,cortex-a76"; - reg = <0>; - device_type = "cpu"; - power-domains = <&sysc R8A779A0_PD_A1E0D0C0>; - next-level-cache = <&L3_CA76_0>; - clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>; - }; - - L3_CA76_0: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A779A0_PD_A2E0D0>; - cache-unified; - cache-level = <3>; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - pmu_a76 { - compatible = "arm,cortex-a76-pmu"; - interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc: soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a779a0-wdt", - "renesas,rcar-gen4-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 907>; - status = "disabled"; - }; - - pfc: pinctrl@e6050000 { - compatible = "renesas,pfc-r8a779a0"; - reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, - <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, - <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, - <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>, - <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>; - }; - - gpio0: gpio@e6058180 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6058180 0 0x54>; - interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 916>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 0 28>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@e6050180 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6050180 0 0x54>; - interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 32 31>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@e6050980 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6050980 0 0x54>; - interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 64 25>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@e6058980 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6058980 0 0x54>; - interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 916>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 96 17>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@e6060180 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6060180 0 0x54>; - interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 128 27>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio5: gpio@e6060980 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6060980 0 0x54>; - interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 160 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@e6068180 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6068180 0 0x54>; - interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 918>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 192 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio7: gpio@e6068980 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6068980 0 0x54>; - interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 918>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 224 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio8: gpio@e6069180 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6069180 0 0x54>; - interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 918>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 256 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio9: gpio@e6069980 { - compatible = "renesas,gpio-r8a779a0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6069980 0 0x54>; - interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 918>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 288 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a779a0-cmt0", - "renesas,rcar-gen4-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 910>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 910>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a779a0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 911>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 911>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a779a0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 912>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 912>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a779a0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 913>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 913>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a779a0-cpg-mssr"; - reg = <0 0xe6150000 0 0x4000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a779a0-rst"; - reg = <0 0xe6160000 0 0x4000>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a779a0-sysc"; - reg = <0 0xe6180000 0 0x4000>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6190000 { - compatible = "renesas,r8a779a0-thermal"; - reg = <0 0xe6190000 0 0x200>, - <0 0xe6198000 0 0x200>, - <0 0xe61a0000 0 0x200>, - <0 0xe61a8000 0 0x200>, - <0 0xe61b0000 0 0x200>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 919>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a779a0", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 518>; - dmas = <&dmac1 0x91>, <&dmac1 0x90>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 519>; - dmas = <&dmac1 0x93>, <&dmac1 0x92>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 520>; - dmas = <&dmac1 0x95>, <&dmac1 0x94>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 521>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 521>; - dmas = <&dmac1 0x97>, <&dmac1 0x96>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 522>; - dmas = <&dmac1 0x99>, <&dmac1 0x98>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - dmas = <&dmac1 0x9b>, <&dmac1 0x9a>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c6: i2c@e66e8000 { - compatible = "renesas,i2c-r8a779a0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66e8000 0 0x40>; - interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 524>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 524>; - dmas = <&dmac1 0x9d>, <&dmac1 0x9c>; - dma-names = "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a779a0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 514>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a779a0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x33>, <&dmac1 0x32>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 515>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a779a0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x35>, <&dmac1 0x34>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a779a0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x37>, <&dmac1 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - canfd: can@e6660000 { - compatible = "renesas,r8a779a0-canfd", - "renesas,rcar-gen4-canfd"; - reg = <0 0xe6660000 0 0x8000>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 328>, - <&cpg CPG_CORE R8A779A0_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>; - assigned-clock-rates = <80000000>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - - channel2 { - status = "disabled"; - }; - - channel3 { - status = "disabled"; - }; - - channel4 { - status = "disabled"; - }; - - channel5 { - status = "disabled"; - }; - - channel6 { - status = "disabled"; - }; - - channel7 { - status = "disabled"; - }; - }; - - avb0: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a779a0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 211>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 211>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb1: ethernet@e6810000 { - compatible = "renesas,etheravb-r8a779a0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6810000 0 0x800>; - interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 212>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 212>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb2: ethernet@e6820000 { - compatible = "renesas,etheravb-r8a779a0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6820000 0 0x1000>; - interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 213>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 213>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb3: ethernet@e6830000 { - compatible = "renesas,etheravb-r8a779a0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6830000 0 0x1000>; - interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 214>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 214>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb4: ethernet@e6840000 { - compatible = "renesas,etheravb-r8a779a0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6840000 0 0x1000>; - interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 215>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 215>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb5: ethernet@e6850000 { - compatible = "renesas,etheravb-r8a779a0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6850000 0 0x1000>; - interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 216>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 216>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a779a0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x51>, <&dmac1 0x50>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a779a0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x53>, <&dmac1 0x52>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a779a0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x57>, <&dmac1 0x56>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 704>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a779a0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 705>, - <&cpg CPG_CORE R8A779A0_CLK_S1D2>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x59>, <&dmac1 0x58>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 705>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a779a0", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 718>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 718>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a779a0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 618>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 618>; - dmas = <&dmac1 0x41>, <&dmac1 0x40>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a779a0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 619>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 619>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a779a0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 620>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 620>; - dmas = <&dmac1 0x45>, <&dmac1 0x44>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a779a0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 621>; - dmas = <&dmac1 0x47>, <&dmac1 0x46>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof4: spi@e6c20000 { - compatible = "renesas,msiof-r8a779a0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c20000 0 0x0064>; - interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 622>; - dmas = <&dmac1 0x49>, <&dmac1 0x48>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof5: spi@e6c28000 { - compatible = "renesas,msiof-r8a779a0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c28000 0 0x0064>; - interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 623>; - dmas = <&dmac1 0x4b>, <&dmac1 0x4a>; - dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin00: video@e6ef0000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 730>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 730>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin00isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin00>; - }; - }; - }; - }; - - vin01: video@e6ef1000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 731>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 731>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin01isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin01>; - }; - }; - }; - }; - - vin02: video@e6ef2000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 800>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 800>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin02isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin02>; - }; - }; - }; - }; - - vin03: video@e6ef3000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 801>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 801>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin03isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin03>; - }; - }; - }; - }; - - vin04: video@e6ef4000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 802>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin04isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin04>; - }; - }; - }; - }; - - vin05: video@e6ef5000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 803>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 803>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin05isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin05>; - }; - }; - }; - }; - - vin06: video@e6ef6000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin06isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin06>; - }; - }; - }; - }; - - vin07: video@e6ef7000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin07isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin07>; - }; - }; - }; - }; - - vin08: video@e6ef8000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef8000 0 0x1000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <8>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin08isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin08>; - }; - }; - }; - }; - - vin09: video@e6ef9000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ef9000 0 0x1000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <9>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin09isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin09>; - }; - }; - }; - }; - - vin10: video@e6efa000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6efa000 0 0x1000>; - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <10>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin10isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin10>; - }; - }; - }; - }; - - vin11: video@e6efb000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6efb000 0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <11>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin11isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin11>; - }; - }; - }; - }; - - vin12: video@e6efc000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6efc000 0 0x1000>; - interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <12>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin12isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin12>; - }; - }; - }; - }; - - vin13: video@e6efd000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6efd000 0 0x1000>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <13>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin13isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin13>; - }; - }; - }; - }; - - vin14: video@e6efe000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6efe000 0 0x1000>; - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 812>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 812>; - renesas,id = <14>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin14isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin14>; - }; - }; - }; - }; - - vin15: video@e6eff000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6eff000 0 0x1000>; - interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 813>; - renesas,id = <15>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin15isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin15>; - }; - }; - }; - }; - - vin16: video@e6ed0000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed0000 0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 814>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 814>; - renesas,id = <16>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin16isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin16>; - }; - }; - }; - }; - - vin17: video@e6ed1000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed1000 0 0x1000>; - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 815>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 815>; - renesas,id = <17>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin17isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin17>; - }; - }; - }; - }; - - vin18: video@e6ed2000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed2000 0 0x1000>; - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 816>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 816>; - renesas,id = <18>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin18isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin18>; - }; - }; - }; - }; - - vin19: video@e6ed3000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed3000 0 0x1000>; - interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 817>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 817>; - renesas,id = <19>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin19isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin19>; - }; - }; - }; - }; - - vin20: video@e6ed4000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed4000 0 0x1000>; - interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 818>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 818>; - renesas,id = <20>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin20isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin20>; - }; - }; - }; - }; - - vin21: video@e6ed5000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed5000 0 0x1000>; - interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 819>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 819>; - renesas,id = <21>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin21isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin21>; - }; - }; - }; - }; - - vin22: video@e6ed6000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed6000 0 0x1000>; - interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 820>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 820>; - renesas,id = <22>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin22isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin22>; - }; - }; - }; - }; - - vin23: video@e6ed7000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed7000 0 0x1000>; - interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 821>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 821>; - renesas,id = <23>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin23isp2: endpoint@2 { - reg = <2>; - remote-endpoint = <&isp2vin23>; - }; - }; - }; - }; - - vin24: video@e6ed8000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed8000 0 0x1000>; - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 822>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 822>; - renesas,id = <24>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin24isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin24>; - }; - }; - }; - }; - - vin25: video@e6ed9000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ed9000 0 0x1000>; - interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 823>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 823>; - renesas,id = <25>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin25isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin25>; - }; - }; - }; - }; - - vin26: video@e6eda000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6eda000 0 0x1000>; - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 824>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 824>; - renesas,id = <26>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin26isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin26>; - }; - }; - }; - }; - - vin27: video@e6edb000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6edb000 0 0x1000>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 825>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 825>; - renesas,id = <27>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin27isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin27>; - }; - }; - }; - }; - - vin28: video@e6edc000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6edc000 0 0x1000>; - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 826>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 826>; - renesas,id = <28>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin28isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin28>; - }; - }; - }; - }; - - vin29: video@e6edd000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6edd000 0 0x1000>; - interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 827>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 827>; - renesas,id = <29>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin29isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin29>; - }; - }; - }; - }; - - vin30: video@e6ede000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6ede000 0 0x1000>; - interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 828>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 828>; - renesas,id = <30>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin30isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin30>; - }; - }; - }; - }; - - vin31: video@e6edf000 { - compatible = "renesas,vin-r8a779a0"; - reg = <0 0xe6edf000 0 0x1000>; - interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 829>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 829>; - renesas,id = <31>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin31isp3: endpoint@3 { - reg = <3>; - remote-endpoint = <&isp3vin31>; - }; - }; - }; - }; - - dmac1: dma-controller@e7350000 { - compatible = "renesas,dmac-r8a779a0", - "renesas,rcar-gen4-dmac"; - reg = <0 0xe7350000 0 0x1000>, - <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15"; - clocks = <&cpg CPG_MOD 709>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 709>; - #dma-cells = <1>; - dma-channels = <16>; - }; - - dmac2: dma-controller@e7351000 { - compatible = "renesas,dmac-r8a779a0", - "renesas,rcar-gen4-dmac"; - reg = <0 0xe7351000 0 0x1000>, - <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7"; - clocks = <&cpg CPG_MOD 710>; - clock-names = "fck"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 710>; - #dma-cells = <1>; - dma-channels = <8>; - }; - - mmc0: mmc@ee140000 { - compatible = "renesas,sdhi-r8a779a0", - "renesas,rcar-gen4-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>; - clock-names = "core", "clkh"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 706>; - max-frequency = <200000000>; - iommus = <&ipmmu_ds0 32>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a779a0-rpc-if", - "renesas,rcar-gen3-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 629>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - ipmmu_rt0: iommu@ee480000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xee480000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt1: iommu@ee4c0000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xee4c0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds0: iommu@eed00000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds1: iommu@eed40000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed40000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ir: iommu@eed80000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed80000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_A3IR>; - #iommu-cells = <1>; - }; - - ipmmu_vc0: iommu@eedc0000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeedc0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@eee80000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeee80000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi1: iommu@eeec0000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeeec0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_3dg: iommu@eee00000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeee00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vip0: iommu@eef00000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeef00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vip1: iommu@eef40000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeef40000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@eefc0000 { - compatible = "renesas,ipmmu-r8a779a0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeefc0000 0 0x20000>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - gic: interrupt-controller@f1000000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1000000 0 0x20000>, - <0x0 0xf1060000 0 0x110000>; - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - }; - - fcpvd0: fcp@fea10000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea10000 0 0x200>; - clocks = <&cpg CPG_MOD 508>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 508>; - }; - - fcpvd1: fcp@fea11000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea11000 0 0x200>; - clocks = <&cpg CPG_MOD 509>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 509>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 830>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 830>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 831>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 831>; - - renesas,fcp = <&fcpvd1>; - }; - - csi40: csi2@feaa0000 { - compatible = "renesas,r8a779a0-csi2"; - reg = <0 0xfeaa0000 0 0x10000>; - interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 331>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - csi40isp0: endpoint { - remote-endpoint = <&isp0csi40>; - }; - }; - }; - }; - - csi41: csi2@feab0000 { - compatible = "renesas,r8a779a0-csi2"; - reg = <0 0xfeab0000 0 0x10000>; - interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 400>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 400>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - csi41isp1: endpoint { - remote-endpoint = <&isp1csi41>; - }; - }; - }; - }; - - csi42: csi2@fed60000 { - compatible = "renesas,r8a779a0-csi2"; - reg = <0 0xfed60000 0 0x10000>; - interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 401>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 401>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - csi42isp2: endpoint { - remote-endpoint = <&isp2csi42>; - }; - }; - }; - }; - - csi43: csi2@fed70000 { - compatible = "renesas,r8a779a0-csi2"; - reg = <0 0xfed70000 0 0x10000>; - interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 402>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - csi43isp3: endpoint { - remote-endpoint = <&isp3csi43>; - }; - }; - }; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a779a0"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 411>; - clock-names = "du.0"; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - resets = <&cpg 411>; - reset-names = "du.0"; - renesas,vsps = <&vspd0 0>, <&vspd1 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_dsi0: endpoint { - remote-endpoint = <&dsi0_in>; - }; - }; - - port@1 { - reg = <1>; - du_out_dsi1: endpoint { - remote-endpoint = <&dsi1_in>; - }; - }; - }; - }; - - isp0: isp@fed00000 { - compatible = "renesas,r8a779a0-isp"; - reg = <0 0xfed00000 0 0x10000>; - interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 612>; - power-domains = <&sysc R8A779A0_PD_A3ISP01>; - resets = <&cpg 612>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <0>; - - isp0csi40: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi40isp0>; - }; - }; - - port@1 { - reg = <1>; - isp0vin00: endpoint { - remote-endpoint = <&vin00isp0>; - }; - }; - - port@2 { - reg = <2>; - isp0vin01: endpoint { - remote-endpoint = <&vin01isp0>; - }; - }; - - port@3 { - reg = <3>; - isp0vin02: endpoint { - remote-endpoint = <&vin02isp0>; - }; - }; - - port@4 { - reg = <4>; - isp0vin03: endpoint { - remote-endpoint = <&vin03isp0>; - }; - }; - - port@5 { - reg = <5>; - isp0vin04: endpoint { - remote-endpoint = <&vin04isp0>; - }; - }; - - port@6 { - reg = <6>; - isp0vin05: endpoint { - remote-endpoint = <&vin05isp0>; - }; - }; - - port@7 { - reg = <7>; - isp0vin06: endpoint { - remote-endpoint = <&vin06isp0>; - }; - }; - - port@8 { - reg = <8>; - isp0vin07: endpoint { - remote-endpoint = <&vin07isp0>; - }; - }; - }; - }; - - isp1: isp@fed20000 { - compatible = "renesas,r8a779a0-isp"; - reg = <0 0xfed20000 0 0x10000>; - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 613>; - power-domains = <&sysc R8A779A0_PD_A3ISP01>; - resets = <&cpg 613>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <0>; - - isp1csi41: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi41isp1>; - }; - }; - - port@1 { - reg = <1>; - isp1vin08: endpoint { - remote-endpoint = <&vin08isp1>; - }; - }; - - port@2 { - reg = <2>; - isp1vin09: endpoint { - remote-endpoint = <&vin09isp1>; - }; - }; - - port@3 { - reg = <3>; - isp1vin10: endpoint { - remote-endpoint = <&vin10isp1>; - }; - }; - - port@4 { - reg = <4>; - isp1vin11: endpoint { - remote-endpoint = <&vin11isp1>; - }; - }; - - port@5 { - reg = <5>; - isp1vin12: endpoint { - remote-endpoint = <&vin12isp1>; - }; - }; - - port@6 { - reg = <6>; - isp1vin13: endpoint { - remote-endpoint = <&vin13isp1>; - }; - }; - - port@7 { - reg = <7>; - isp1vin14: endpoint { - remote-endpoint = <&vin14isp1>; - }; - }; - - port@8 { - reg = <8>; - isp1vin15: endpoint { - remote-endpoint = <&vin15isp1>; - }; - }; - }; - }; - - isp2: isp@fed30000 { - compatible = "renesas,r8a779a0-isp"; - reg = <0 0xfed30000 0 0x10000>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 614>; - power-domains = <&sysc R8A779A0_PD_A3ISP23>; - resets = <&cpg 614>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <0>; - - isp2csi42: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi42isp2>; - }; - }; - - port@1 { - reg = <1>; - isp2vin16: endpoint { - remote-endpoint = <&vin16isp2>; - }; - }; - - port@2 { - reg = <2>; - isp2vin17: endpoint { - remote-endpoint = <&vin17isp2>; - }; - }; - - port@3 { - reg = <3>; - isp2vin18: endpoint { - remote-endpoint = <&vin18isp2>; - }; - }; - - port@4 { - reg = <4>; - isp2vin19: endpoint { - remote-endpoint = <&vin19isp2>; - }; - }; - - port@5 { - reg = <5>; - isp2vin20: endpoint { - remote-endpoint = <&vin20isp2>; - }; - }; - - port@6 { - reg = <6>; - isp2vin21: endpoint { - remote-endpoint = <&vin21isp2>; - }; - }; - - port@7 { - reg = <7>; - isp2vin22: endpoint { - remote-endpoint = <&vin22isp2>; - }; - }; - - port@8 { - reg = <8>; - isp2vin23: endpoint { - remote-endpoint = <&vin23isp2>; - }; - }; - }; - }; - - isp3: isp@fed40000 { - compatible = "renesas,r8a779a0-isp"; - reg = <0 0xfed40000 0 0x10000>; - interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 615>; - power-domains = <&sysc R8A779A0_PD_A3ISP23>; - resets = <&cpg 615>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <0>; - - isp3csi43: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi43isp3>; - }; - }; - - port@1 { - reg = <1>; - isp3vin24: endpoint { - remote-endpoint = <&vin24isp3>; - }; - }; - - port@2 { - reg = <2>; - isp3vin25: endpoint { - remote-endpoint = <&vin25isp3>; - }; - }; - - port@3 { - reg = <3>; - isp3vin26: endpoint { - remote-endpoint = <&vin26isp3>; - }; - }; - - port@4 { - reg = <4>; - isp3vin27: endpoint { - remote-endpoint = <&vin27isp3>; - }; - }; - - port@5 { - reg = <5>; - isp3vin28: endpoint { - remote-endpoint = <&vin28isp3>; - }; - }; - - port@6 { - reg = <6>; - isp3vin29: endpoint { - remote-endpoint = <&vin29isp3>; - }; - }; - - port@7 { - reg = <7>; - isp3vin30: endpoint { - remote-endpoint = <&vin30isp3>; - }; - }; - - port@8 { - reg = <8>; - isp3vin31: endpoint { - remote-endpoint = <&vin31isp3>; - }; - }; - }; - }; - - dsi0: dsi-encoder@fed80000 { - compatible = "renesas,r8a779a0-dsi-csi2-tx"; - reg = <0 0xfed80000 0 0x10000>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 415>, - <&cpg CPG_CORE R8A779A0_CLK_DSI>, - <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; - clock-names = "fck", "dsi", "pll"; - resets = <&cpg 415>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&du_out_dsi0>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - dsi1: dsi-encoder@fed90000 { - compatible = "renesas,r8a779a0-dsi-csi2-tx"; - reg = <0 0xfed90000 0 0x10000>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; - clocks = <&cpg CPG_MOD 416>, - <&cpg CPG_CORE R8A779A0_CLK_DSI>, - <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>; - clock-names = "fck", "dsi", "pll"; - resets = <&cpg 416>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi1_in: endpoint { - remote-endpoint = <&du_out_dsi1>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor1_thermal: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor2_thermal: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor3_thermal: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - - trips { - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor4_thermal: sensor4-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 3>; - - trips { - sensor4_crit: sensor4-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor5_thermal: sensor5-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 4>; - - trips { - sensor5_crit: sensor5-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; - }; -}; diff --git a/arch/arm/dts/r8a779f0-spider-cpu.dtsi b/arch/arm/dts/r8a779f0-spider-cpu.dtsi deleted file mode 100644 index 5cbde8e8fcd..00000000000 --- a/arch/arm/dts/r8a779f0-spider-cpu.dtsi +++ /dev/null @@ -1,210 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) -/* - * Device Tree Source for the Spider CPU board - * - * Copyright (C) 2021 Renesas Electronics Corp. - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/leds/common.h> - -#include "r8a779f0.dtsi" - -/ { - model = "Renesas Spider CPU board"; - compatible = "renesas,spider-cpu", "renesas,r8a779f0"; - - aliases { - serial0 = &hscif0; - serial1 = &scif0; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:1843200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-7 { - gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <7>; - }; - - led-8 { - gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <8>; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@480000000 { - device_type = "memory"; - reg = <0x4 0x80000000 0x0 0x80000000>; - }; - - rc21012_ufs: clk-rc21012-ufs { - compatible = "fixed-clock"; - clock-frequency = <38400000>; - #clock-cells = <0>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&extal_clk { - clock-frequency = <20000000>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&hscif0 { - pinctrl-0 = <&hscif0_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - gpio_exp_20: gpio@20 { - compatible = "ti,tca9554"; - reg = <0x20>; - gpio-controller; - #gpio-cells = <2>; - }; -}; - -&i2c4 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - eeprom@50 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "cpu-board"; - reg = <0x50>; - pagesize = <8>; - }; -}; - -/* - * This board also has a microSD slot which we will not support upstream - * because we cannot directly switch voltages in software. - */ -&mmc0 { - pinctrl-0 = <&mmc_pins>; - pinctrl-1 = <&mmc_pins>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&reg_3p3v>; - vqmmc-supply = <&reg_1p8v>; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - bus-width = <8>; - no-sd; - no-sdio; - non-removable; - full-pwr-cycle-in-suspend; - status = "okay"; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - hscif0_pins: hscif0 { - groups = "hscif0_data", "hscif0_ctrl"; - function = "hscif0"; - }; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - i2c4_pins: i2c4 { - groups = "i2c4"; - function = "i2c4"; - }; - - mmc_pins: mmc { - groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; - function = "mmc"; - power-source = <1800>; - }; - - scif0_pins: scif0 { - groups = "scif0_data", "scif0_ctrl"; - function = "scif0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif0 { - pinctrl-0 = <&scif0_pins>; - pinctrl-names = "default"; - - uart-has-rtscts; - status = "okay"; -}; - -&scif_clk { - clock-frequency = <24000000>; -}; - -&ufs { - status = "okay"; -}; - -&ufs30_clk { - compatible = "gpio-gate-clock"; - clocks = <&rc21012_ufs>; - enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>; - /delete-property/ clock-frequency; -}; diff --git a/arch/arm/dts/r8a779f0-spider-ethernet.dtsi b/arch/arm/dts/r8a779f0-spider-ethernet.dtsi deleted file mode 100644 index 33c1015e9ab..00000000000 --- a/arch/arm/dts/r8a779f0-spider-ethernet.dtsi +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for the Spider Ethernet sub-board - * - * Copyright (C) 2021 Renesas Electronics Corp. - */ - -&eth_serdes { - status = "okay"; -}; - -&i2c4 { - eeprom@52 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "ethernet-sub-board"; - reg = <0x52>; - pagesize = <8>; - }; -}; - -&pfc { - tsn0_pins: tsn0 { - groups = "tsn0_mdio_b", "tsn0_link_b"; - function = "tsn0"; - power-source = <1800>; - }; - - tsn1_pins: tsn1 { - groups = "tsn1_mdio_b", "tsn1_link_b"; - function = "tsn1"; - power-source = <1800>; - }; - - tsn2_pins: tsn2 { - groups = "tsn2_mdio_b", "tsn2_link_b"; - function = "tsn2"; - power-source = <1800>; - }; -}; - -&rswitch { - pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>, <&tsn2_pins>; - pinctrl-names = "default"; - status = "okay"; - - ethernet-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - phy-handle = <&u101>; - phy-mode = "sgmii"; - phys = <&eth_serdes 0>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - u101: ethernet-phy@1 { - reg = <1>; - compatible = "ethernet-phy-ieee802.3-c45"; - interrupt-parent = <&gpio3>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - }; - }; - }; - port@1 { - reg = <1>; - phy-handle = <&u201>; - phy-mode = "sgmii"; - phys = <&eth_serdes 1>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - u201: ethernet-phy@2 { - reg = <2>; - compatible = "ethernet-phy-ieee802.3-c45"; - interrupt-parent = <&gpio3>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; - }; - }; - port@2 { - reg = <2>; - phy-handle = <&u301>; - phy-mode = "sgmii"; - phys = <&eth_serdes 2>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - u301: ethernet-phy@3 { - reg = <3>; - compatible = "ethernet-phy-ieee802.3-c45"; - interrupt-parent = <&gpio3>; - interrupts = <9 IRQ_TYPE_LEVEL_LOW>; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/r8a779f0-spider.dts b/arch/arm/dts/r8a779f0-spider.dts deleted file mode 100644 index f139cc4feb3..00000000000 --- a/arch/arm/dts/r8a779f0-spider.dts +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) -/* - * Device Tree Source for the Spider CPU and BreakOut boards - * - * Copyright (C) 2021 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a779f0-spider-cpu.dtsi" -#include "r8a779f0-spider-ethernet.dtsi" - -/ { - model = "Renesas Spider CPU and Breakout boards based on r8a779f0"; - compatible = "renesas,spider-breakout", "renesas,spider-cpu", "renesas,r8a779f0"; -}; - -&i2c4 { - eeprom@51 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "breakout-board"; - reg = <0x51>; - pagesize = <8>; - }; -}; diff --git a/arch/arm/dts/r8a779f0.dtsi b/arch/arm/dts/r8a779f0.dtsi deleted file mode 100644 index ecdd5a523fa..00000000000 --- a/arch/arm/dts/r8a779f0.dtsi +++ /dev/null @@ -1,1193 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) -/* - * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC - * - * Copyright (C) 2021 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a779f0-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a779f0-sysc.h> - -/ { - compatible = "renesas,r8a779f0"; - #address-cells = <2>; - #size-cells = <2>; - - cluster01_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - }; - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - opp-suspend; - }; - }; - - cluster23_opp: opp-table-1 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - }; - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - opp-suspend; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&a55_0>; - }; - core1 { - cpu = <&a55_1>; - }; - }; - - cluster1 { - core0 { - cpu = <&a55_2>; - }; - core1 { - cpu = <&a55_3>; - }; - }; - - cluster2 { - core0 { - cpu = <&a55_4>; - }; - core1 { - cpu = <&a55_5>; - }; - }; - - cluster3 { - core0 { - cpu = <&a55_6>; - }; - core1 { - cpu = <&a55_7>; - }; - }; - }; - - a55_0: cpu@0 { - compatible = "arm,cortex-a55"; - reg = <0>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E0D0C0>; - next-level-cache = <&L3_CA55_0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; - operating-points-v2 = <&cluster01_opp>; - }; - - a55_1: cpu@100 { - compatible = "arm,cortex-a55"; - reg = <0x100>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E0D0C1>; - next-level-cache = <&L3_CA55_0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; - operating-points-v2 = <&cluster01_opp>; - }; - - a55_2: cpu@10000 { - compatible = "arm,cortex-a55"; - reg = <0x10000>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E0D1C0>; - next-level-cache = <&L3_CA55_1>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; - operating-points-v2 = <&cluster01_opp>; - }; - - a55_3: cpu@10100 { - compatible = "arm,cortex-a55"; - reg = <0x10100>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E0D1C1>; - next-level-cache = <&L3_CA55_1>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>; - operating-points-v2 = <&cluster01_opp>; - }; - - a55_4: cpu@20000 { - compatible = "arm,cortex-a55"; - reg = <0x20000>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E1D0C0>; - next-level-cache = <&L3_CA55_2>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; - operating-points-v2 = <&cluster23_opp>; - }; - - a55_5: cpu@20100 { - compatible = "arm,cortex-a55"; - reg = <0x20100>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E1D0C1>; - next-level-cache = <&L3_CA55_2>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; - operating-points-v2 = <&cluster23_opp>; - }; - - a55_6: cpu@30000 { - compatible = "arm,cortex-a55"; - reg = <0x30000>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E1D1C0>; - next-level-cache = <&L3_CA55_3>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; - operating-points-v2 = <&cluster23_opp>; - }; - - a55_7: cpu@30100 { - compatible = "arm,cortex-a55"; - reg = <0x30100>; - device_type = "cpu"; - power-domains = <&sysc R8A779F0_PD_A1E1D1C1>; - next-level-cache = <&L3_CA55_3>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>; - operating-points-v2 = <&cluster23_opp>; - }; - - L3_CA55_0: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A779F0_PD_A2E0D0>; - cache-unified; - cache-level = <3>; - }; - - L3_CA55_1: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A779F0_PD_A2E0D1>; - cache-unified; - cache-level = <3>; - }; - - L3_CA55_2: cache-controller-2 { - compatible = "cache"; - power-domains = <&sysc R8A779F0_PD_A2E1D0>; - cache-unified; - cache-level = <3>; - }; - - L3_CA55_3: cache-controller-3 { - compatible = "cache"; - power-domains = <&sysc R8A779F0_PD_A2E1D1>; - cache-unified; - cache-level = <3>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <4000>; - }; - }; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - pmu_a55 { - compatible = "arm,cortex-a55-pmu"; - interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc: soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a779f0-wdt", - "renesas,rcar-gen4-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 907>; - status = "disabled"; - }; - - pfc: pinctrl@e6050000 { - compatible = "renesas,pfc-r8a779f0"; - reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, - <0 0xe6051000 0 0x16c>, <0 0xe6051800 0 0x16c>; - }; - - gpio0: gpio@e6050180 { - compatible = "renesas,gpio-r8a779f0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6050180 0 0x54>; - interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 0 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@e6050980 { - compatible = "renesas,gpio-r8a779f0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6050980 0 0x54>; - interrupts = <GIC_SPI 823 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 32 25>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@e6051180 { - compatible = "renesas,gpio-r8a779f0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6051180 0 0x54>; - interrupts = <GIC_SPI 824 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 64 17>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@e6051980 { - compatible = "renesas,gpio-r8a779f0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6051980 0 0x54>; - interrupts = <GIC_SPI 825 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 96 19>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a779f0-cmt0", - "renesas,rcar-gen4-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 910>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 910>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a779f0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 911>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 911>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a779f0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 912>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 912>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a779f0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 913>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 913>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a779f0-cpg-mssr"; - reg = <0 0xe6150000 0 0x4000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a779f0-rst"; - reg = <0 0xe6160000 0 0x4000>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a779f0-sysc"; - reg = <0 0xe6180000 0 0x4000>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a779f0-thermal"; - /* The 4th sensor is in control domain and not for Linux */ - reg = <0 0xe6198000 0 0x200>, - <0 0xe61a0000 0 0x200>, - <0 0xe61a8000 0 0x200>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 919>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a779f0", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_CORE R8A779F0_CLK_CL16M>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 482 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 483 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 485 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 487 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a779f0", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 490 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 491 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - eth_serdes: phy@e6444000 { - compatible = "renesas,r8a779f0-ether-serdes"; - reg = <0 0xe6444000 0 0x2800>; - clocks = <&cpg CPG_MOD 1506>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 1506>; - #phy-cells = <1>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - compatible = "renesas,i2c-r8a779f0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 518>; - dmas = <&dmac0 0x91>, <&dmac0 0x90>, - <&dmac1 0x91>, <&dmac1 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - compatible = "renesas,i2c-r8a779f0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 519>; - dmas = <&dmac0 0x93>, <&dmac0 0x92>, - <&dmac1 0x93>, <&dmac1 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - compatible = "renesas,i2c-r8a779f0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <0 240 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 520>; - dmas = <&dmac0 0x95>, <&dmac0 0x94>, - <&dmac1 0x95>, <&dmac1 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - compatible = "renesas,i2c-r8a779f0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 521>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 521>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>, - <&dmac1 0x97>, <&dmac1 0x96>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - compatible = "renesas,i2c-r8a779f0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 522>; - dmas = <&dmac0 0x99>, <&dmac0 0x98>, - <&dmac1 0x99>, <&dmac1 0x98>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - compatible = "renesas,i2c-r8a779f0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 523>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, - <&dmac1 0x9b>, <&dmac1 0x9a>; - dma-names = "tx", "rx", "tx", "rx"; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a779f0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x31>, <&dmac0 0x30>, - <&dmac1 0x31>, <&dmac1 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 514>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a779f0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x33>, <&dmac0 0x32>, - <&dmac1 0x33>, <&dmac1 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 515>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a779f0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x35>, <&dmac0 0x34>, - <&dmac1 0x35>, <&dmac1 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a779f0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>, - <&dmac1 0x37>, <&dmac1 0x36>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - ufs: ufs@e6860000 { - compatible = "renesas,r8a779f0-ufs"; - reg = <0 0xe6860000 0 0x100>; - interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 1514>, <&ufs30_clk>; - clock-names = "fck", "ref_clk"; - freq-table-hz = <200000000 200000000>, <38400000 38400000>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 1514>; - status = "disabled"; - }; - - rswitch: ethernet@e6880000 { - compatible = "renesas,r8a779f0-ether-switch"; - reg = <0 0xe6880000 0 0x20000>, <0 0xe68c0000 0 0x20000>; - reg-names = "base", "secure_base"; - interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mfwd_error", "race_error", - "coma_error", "gwca0_error", - "gwca1_error", "etha0_error", - "etha1_error", "etha2_error", - "gptp0_status", "gptp1_status", - "mfwd_status", "race_status", - "coma_status", "gwca0_status", - "gwca1_status", "etha0_status", - "etha1_status", "etha2_status", - "rmac0_status", "rmac1_status", - "rmac2_status", - "gwca0_rxtx0", "gwca0_rxtx1", - "gwca0_rxtx2", "gwca0_rxtx3", - "gwca0_rxtx4", "gwca0_rxtx5", - "gwca0_rxtx6", "gwca0_rxtx7", - "gwca1_rxtx0", "gwca1_rxtx1", - "gwca1_rxtx2", "gwca1_rxtx3", - "gwca1_rxtx4", "gwca1_rxtx5", - "gwca1_rxtx6", "gwca1_rxtx7", - "gwca0_rxts0", "gwca0_rxts1", - "gwca1_rxts0", "gwca1_rxts1", - "rmac0_mdio", "rmac1_mdio", - "rmac2_mdio", - "rmac0_phy", "rmac1_phy", - "rmac2_phy"; - clocks = <&cpg CPG_MOD 1505>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 1505>; - status = "disabled"; - - ethernet-ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - phys = <&eth_serdes 0>; - }; - port@1 { - reg = <1>; - phys = <&eth_serdes 1>; - }; - port@2 { - reg = <2>; - phys = <&eth_serdes 2>; - }; - }; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a779f0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x51>, <&dmac0 0x50>, - <&dmac1 0x51>, <&dmac1 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a779f0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x53>, <&dmac0 0x52>, - <&dmac1 0x53>, <&dmac1 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a779f0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>, - <&dmac1 0x57>, <&dmac1 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 704>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a779f0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 705>, - <&cpg CPG_CORE R8A779F0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>, - <&dmac1 0x59>, <&dmac1 0x58>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 705>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a779f0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 618>; - dmas = <&dmac0 0x41>, <&dmac0 0x40>, - <&dmac1 0x41>, <&dmac1 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 618>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a779f0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 619>; - dmas = <&dmac0 0x43>, <&dmac0 0x42>, - <&dmac1 0x43>, <&dmac1 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 619>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a779f0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 620>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>, - <&dmac1 0x45>, <&dmac1 0x44>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 620>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a779f0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>, - <&dmac1 0x47>, <&dmac1 0x46>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 621>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - dmac0: dma-controller@e7350000 { - compatible = "renesas,dmac-r8a779f0", - "renesas,rcar-gen4-dmac"; - reg = <0 0xe7350000 0 0x1000>, - <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15"; - clocks = <&cpg CPG_MOD 709>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 709>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7351000 { - compatible = "renesas,dmac-r8a779f0", - "renesas,rcar-gen4-dmac"; - reg = <0 0xe7351000 0 0x1000>, - <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15"; - clocks = <&cpg CPG_MOD 710>; - clock-names = "fck"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 710>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, - <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, - <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, - <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, - <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, - <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, - <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, - <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; - }; - - mmc0: mmc@ee140000 { - compatible = "renesas,sdhi-r8a779f0", - "renesas,rcar-gen4-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779F0_CLK_SD0H>; - clock-names = "core", "clkh"; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - resets = <&cpg 706>; - max-frequency = <200000000>; - iommus = <&ipmmu_ds0 32>; - status = "disabled"; - }; - - ipmmu_rt0: iommu@ee480000 { - compatible = "renesas,ipmmu-r8a779f0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xee480000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt1: iommu@ee4c0000 { - compatible = "renesas,ipmmu-r8a779f0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xee4c0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds0: iommu@eed00000 { - compatible = "renesas,ipmmu-r8a779f0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@eed40000 { - compatible = "renesas,ipmmu-r8a779f0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed40000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@eefc0000 { - compatible = "renesas,ipmmu-r8a779f0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeefc0000 0 0x20000>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - gic: interrupt-controller@f1000000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1000000 0 0x20000>, - <0x0 0xf1060000 0 0x110000>; - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor_thermal_rtcore: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor_thermal_apcore0: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor_thermal_apcore4: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - - trips { - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; - }; - - ufs30_clk: ufs30-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; -}; diff --git a/arch/arm/dts/r8a779g0-white-hawk-cpu.dtsi b/arch/arm/dts/r8a779g0-white-hawk-cpu.dtsi deleted file mode 100644 index bb4a5270f71..00000000000 --- a/arch/arm/dts/r8a779g0-white-hawk-cpu.dtsi +++ /dev/null @@ -1,375 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -/* - * Device Tree Source for the White Hawk CPU board - * - * Copyright (C) 2022 Renesas Electronics Corp. - */ - -#include "r8a779g0.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/leds/common.h> - -/ { - model = "Renesas White Hawk CPU board"; - compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0"; - - aliases { - ethernet0 = &avb0; - serial0 = &hscif0; - }; - - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; - stdout-path = "serial0:921600n8"; - }; - - keys { - compatible = "gpio-keys"; - - pinctrl-0 = <&keys_pins>; - pinctrl-names = "default"; - - key-1 { - gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_1>; - label = "SW47"; - wakeup-source; - debounce-interval = <20>; - }; - - key-2 { - gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_2>; - label = "SW48"; - wakeup-source; - debounce-interval = <20>; - }; - - key-3 { - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_3>; - label = "SW49"; - wakeup-source; - debounce-interval = <20>; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-1 { - gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <1>; - }; - - led-2 { - gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <2>; - }; - - led-3 { - gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; - color = <LED_COLOR_ID_GREEN>; - function = LED_FUNCTION_INDICATOR; - function-enumerator = <3>; - }; - }; - - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x78000000>; - }; - - memory@480000000 { - device_type = "memory"; - reg = <0x4 0x80000000 0x0 0x80000000>; - }; - - memory@600000000 { - device_type = "memory"; - reg = <0x6 0x00000000 0x1 0x00000000>; - }; - - mini-dp-con { - compatible = "dp-connector"; - label = "CN5"; - type = "mini"; - - port { - mini_dp_con_in: endpoint { - remote-endpoint = <&sn65dsi86_out>; - }; - }; - }; - - reg_1p2v: regulator-1p2v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.2V"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sn65dsi86_refclk: clk-x6 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <38400000>; - }; -}; - -&avb0 { - pinctrl-0 = <&avb0_pins>; - pinctrl-names = "default"; - phy-handle = <&phy0>; - tx-internal-delay-ps = <2000>; - status = "okay"; - - phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id0022.1622", - "ethernet-phy-ieee802.3-c22"; - rxc-skew-ps = <1500>; - reg = <0>; - interrupt-parent = <&gpio7>; - interrupts = <5 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; - }; -}; - -&dsi0 { - status = "okay"; - - ports { - port@1 { - dsi0_out: endpoint { - remote-endpoint = <&sn65dsi86_in>; - data-lanes = <1 2 3 4>; - }; - }; - }; -}; - -&du { - status = "okay"; -}; - -&extal_clk { - clock-frequency = <16666666>; -}; - -&extalr_clk { - clock-frequency = <32768>; -}; - -&hscif0 { - status = "okay"; -}; - -&i2c0 { - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - io_expander_a: gpio@20 { - compatible = "onnn,pca9654"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - eeprom@50 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "cpu-board"; - reg = <0x50>; - pagesize = <8>; - }; -}; - -&i2c1 { - pinctrl-0 = <&i2c1_pins>; - pinctrl-names = "default"; - - status = "okay"; - clock-frequency = <400000>; - - bridge@2c { - compatible = "ti,sn65dsi86"; - reg = <0x2c>; - - clocks = <&sn65dsi86_refclk>; - clock-names = "refclk"; - - interrupt-parent = <&intc_ex>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - - enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; - - vccio-supply = <&reg_1p8v>; - vpll-supply = <&reg_1p8v>; - vcca-supply = <&reg_1p2v>; - vcc-supply = <&reg_1p2v>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - sn65dsi86_in: endpoint { - remote-endpoint = <&dsi0_out>; - }; - }; - - port@1 { - reg = <1>; - sn65dsi86_out: endpoint { - remote-endpoint = <&mini_dp_con_in>; - }; - }; - }; - }; -}; - -&mmc0 { - pinctrl-0 = <&mmc_pins>; - pinctrl-1 = <&mmc_pins>; - pinctrl-names = "default", "state_uhs"; - - vmmc-supply = <&reg_3p3v>; - vqmmc-supply = <&reg_1p8v>; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - bus-width = <8>; - no-sd; - no-sdio; - non-removable; - full-pwr-cycle-in-suspend; - status = "okay"; -}; - -&pfc { - pinctrl-0 = <&scif_clk_pins>; - pinctrl-names = "default"; - - avb0_pins: avb0 { - mux { - groups = "avb0_link", "avb0_mdio", "avb0_rgmii", - "avb0_txcrefclk"; - function = "avb0"; - }; - - pins_mdio { - groups = "avb0_mdio"; - drive-strength = <21>; - }; - - pins_mii { - groups = "avb0_rgmii"; - drive-strength = <21>; - }; - - }; - hscif0_pins: hscif0 { - groups = "hscif0_data"; - function = "hscif0"; - }; - - i2c0_pins: i2c0 { - groups = "i2c0"; - function = "i2c0"; - }; - - i2c1_pins: i2c1 { - groups = "i2c1"; - function = "i2c1"; - }; - - keys_pins: keys { - pins = "GP_5_0", "GP_5_1", "GP_5_2"; - bias-pull-up; - }; - - mmc_pins: mmc { - groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; - function = "mmc"; - power-source = <1800>; - }; - - qspi0_pins: qspi0 { - groups = "qspi0_ctrl", "qspi0_data4"; - function = "qspi0"; - }; - - scif_clk_pins: scif_clk { - groups = "scif_clk"; - function = "scif_clk"; - }; -}; - -&rpc { - pinctrl-0 = <&qspi0_pins>; - pinctrl-names = "default"; - - status = "okay"; - - flash@0 { - compatible = "spansion,s25fs512s", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <40000000>; - spi-rx-bus-width = <4>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - boot@0 { - reg = <0x0 0x1200000>; - read-only; - }; - user@1200000 { - reg = <0x1200000 0x2e00000>; - }; - }; - }; -}; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - -&scif_clk { - clock-frequency = <24000000>; -}; diff --git a/arch/arm/dts/r8a779g0-white-hawk-csi-dsi.dtsi b/arch/arm/dts/r8a779g0-white-hawk-csi-dsi.dtsi deleted file mode 100644 index f8537f7ea4d..00000000000 --- a/arch/arm/dts/r8a779g0-white-hawk-csi-dsi.dtsi +++ /dev/null @@ -1,187 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -/* - * Device Tree Source for the R-Car V4H White Hawk CSI/DSI sub-board - * - * Copyright (C) 2022 Glider bv - */ - -#include <dt-bindings/media/video-interfaces.h> - -&csi40 { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - csi40_in: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3>; - remote-endpoint = <&max96712_out0>; - }; - }; - }; -}; - -&csi41 { - status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - csi41_in: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3>; - remote-endpoint = <&max96712_out1>; - }; - }; - }; -}; - -&i2c0 { - pca9654_a: gpio@21 { - compatible = "onnn,pca9654"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - }; - - pca9654_b: gpio@22 { - compatible = "onnn,pca9654"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - }; - - eeprom@52 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "csi-dsi-sub-board-id"; - reg = <0x52>; - pagesize = <8>; - }; -}; - -&i2c1 { - gmsl0: gmsl-deserializer@49 { - compatible = "maxim,max96712"; - reg = <0x49>; - enable-gpios = <&pca9654_a 0 GPIO_ACTIVE_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@4 { - reg = <4>; - max96712_out0: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3>; - remote-endpoint = <&csi40_in>; - }; - }; - }; - }; - - gmsl1: gmsl-deserializer@4b { - compatible = "maxim,max96712"; - reg = <0x4b>; - enable-gpios = <&pca9654_b 0 GPIO_ACTIVE_HIGH>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@4 { - reg = <4>; - max96712_out1: endpoint { - bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>; - clock-lanes = <0>; - data-lanes = <1 2 3>; - remote-endpoint = <&csi41_in>; - }; - }; - }; - }; -}; - -&isp0 { - status = "okay"; -}; - -&isp1 { - status = "okay"; -}; - -&vin00 { - status = "okay"; -}; - -&vin01 { - status = "okay"; -}; - -&vin02 { - status = "okay"; -}; - -&vin03 { - status = "okay"; -}; - -&vin04 { - status = "okay"; -}; - -&vin05 { - status = "okay"; -}; - -&vin06 { - status = "okay"; -}; - -&vin07 { - status = "okay"; -}; - -&vin08 { - status = "okay"; -}; - -&vin09 { - status = "okay"; -}; - -&vin10 { - status = "okay"; -}; - -&vin11 { - status = "okay"; -}; - -&vin12 { - status = "okay"; -}; - -&vin13 { - status = "okay"; -}; - -&vin14 { - status = "okay"; -}; - -&vin15 { - status = "okay"; -}; diff --git a/arch/arm/dts/r8a779g0-white-hawk-ethernet.dtsi b/arch/arm/dts/r8a779g0-white-hawk-ethernet.dtsi deleted file mode 100644 index 4f411f95c67..00000000000 --- a/arch/arm/dts/r8a779g0-white-hawk-ethernet.dtsi +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -/* - * Device Tree Source for the R-Car V4H White Hawk RAVB/Ethernet(1000Base-T1) - * sub-board - * - * Copyright (C) 2022 Glider bv - */ - -&i2c0 { - eeprom@53 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "ethernet-sub-board-id"; - reg = <0x53>; - pagesize = <8>; - }; -}; diff --git a/arch/arm/dts/r8a779g0-white-hawk.dts b/arch/arm/dts/r8a779g0-white-hawk.dts deleted file mode 100644 index eff1ef6e2cc..00000000000 --- a/arch/arm/dts/r8a779g0-white-hawk.dts +++ /dev/null @@ -1,69 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -/* - * Device Tree Source for the White Hawk CPU and BreakOut boards - * - * Copyright (C) 2022 Renesas Electronics Corp. - */ - -/dts-v1/; -#include "r8a779g0-white-hawk-cpu.dtsi" -#include "r8a779g0-white-hawk-csi-dsi.dtsi" -#include "r8a779g0-white-hawk-ethernet.dtsi" - -/ { - model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0"; - compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0"; - - can_transceiver0: can-phy0 { - compatible = "nxp,tjr1443"; - #phy-cells = <0>; - enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; - max-bitrate = <5000000>; - }; -}; - -&can_clk { - clock-frequency = <40000000>; -}; - -&canfd { - pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; - pinctrl-names = "default"; - - status = "okay"; - - channel0 { - status = "okay"; - phys = <&can_transceiver0>; - }; - - channel1 { - status = "okay"; - }; -}; - -&i2c0 { - eeprom@51 { - compatible = "rohm,br24g01", "atmel,24c01"; - label = "breakout-board"; - reg = <0x51>; - pagesize = <8>; - }; -}; - -&pfc { - can_clk_pins: can-clk { - groups = "can_clk"; - function = "can_clk"; - }; - - canfd0_pins: canfd0 { - groups = "canfd0_data"; - function = "canfd0"; - }; - - canfd1_pins: canfd1 { - groups = "canfd1_data"; - function = "canfd1"; - }; -}; diff --git a/arch/arm/dts/r8a779g0.dtsi b/arch/arm/dts/r8a779g0.dtsi deleted file mode 100644 index d3d25e077c5..00000000000 --- a/arch/arm/dts/r8a779g0.dtsi +++ /dev/null @@ -1,2349 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -/* - * Device Tree Source for the R-Car V4H (R8A779G0) SoC - * - * Copyright (C) 2022 Renesas Electronics Corp. - */ - -#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/r8a779g0-sysc.h> - -/ { - compatible = "renesas,r8a779g0"; - #address-cells = <2>; - #size-cells = <2>; - - /* External Audio clock - to be overridden by boards that provide it */ - audio_clkin: audio_clkin { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - /* External CAN clock - to be overridden by boards that provide it */ - can_clk: can { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - cluster0_opp: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <825000>; - clock-latency-ns = <500000>; - }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <825000>; - clock-latency-ns = <500000>; - }; - opp-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - opp-microvolt = <825000>; - clock-latency-ns = <500000>; - }; - opp-1700000000 { - opp-hz = /bits/ 64 <1700000000>; - opp-microvolt = <825000>; - clock-latency-ns = <500000>; - opp-suspend; - }; - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <880000>; - clock-latency-ns = <500000>; - turbo-mode; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&a76_0>; - }; - core1 { - cpu = <&a76_1>; - }; - }; - - cluster1 { - core0 { - cpu = <&a76_2>; - }; - core1 { - cpu = <&a76_3>; - }; - }; - }; - - a76_0: cpu@0 { - compatible = "arm,cortex-a76"; - reg = <0>; - device_type = "cpu"; - power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; - next-level-cache = <&L3_CA76_0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; - operating-points-v2 = <&cluster0_opp>; - }; - - a76_1: cpu@100 { - compatible = "arm,cortex-a76"; - reg = <0x100>; - device_type = "cpu"; - power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; - next-level-cache = <&L3_CA76_0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; - operating-points-v2 = <&cluster0_opp>; - }; - - a76_2: cpu@10000 { - compatible = "arm,cortex-a76"; - reg = <0x10000>; - device_type = "cpu"; - power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; - next-level-cache = <&L3_CA76_1>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; - operating-points-v2 = <&cluster0_opp>; - }; - - a76_3: cpu@10100 { - compatible = "arm,cortex-a76"; - reg = <0x10100>; - device_type = "cpu"; - power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; - next-level-cache = <&L3_CA76_1>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; - operating-points-v2 = <&cluster0_opp>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <400>; - exit-latency-us = <500>; - min-residency-us = <4000>; - }; - }; - - L3_CA76_0: cache-controller-0 { - compatible = "cache"; - power-domains = <&sysc R8A779G0_PD_A2E0D0>; - cache-unified; - cache-level = <3>; - }; - - L3_CA76_1: cache-controller-1 { - compatible = "cache"; - power-domains = <&sysc R8A779G0_PD_A2E0D1>; - cache-unified; - cache-level = <3>; - }; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - extal_clk: extal { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - extalr_clk: extalr { - compatible = "fixed-clock"; - #clock-cells = <0>; - /* This value must be overridden by the board */ - clock-frequency = <0>; - }; - - pmu_a76 { - compatible = "arm,cortex-a76-pmu"; - interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; - }; - - /* External SCIF clock - to be overridden by boards that provide it */ - scif_clk: scif { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - }; - - soc: soc { - compatible = "simple-bus"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rwdt: watchdog@e6020000 { - compatible = "renesas,r8a779g0-wdt", - "renesas,rcar-gen4-wdt"; - reg = <0 0xe6020000 0 0x0c>; - interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 907>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 907>; - status = "disabled"; - }; - - pfc: pinctrl@e6050000 { - compatible = "renesas,pfc-r8a779g0"; - reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, - <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, - <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, - <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, - <0 0xe6068000 0 0x16c>; - }; - - gpio0: gpio@e6050180 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6050180 0 0x54>; - interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 0 19>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@e6050980 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6050980 0 0x54>; - interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 915>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 915>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 32 29>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@e6058180 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6058180 0 0x54>; - interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 916>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 64 20>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@e6058980 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6058980 0 0x54>; - interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 916>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 916>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 96 30>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@e6060180 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6060180 0 0x54>; - interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 128 25>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio5: gpio@e6060980 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6060980 0 0x54>; - interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 160 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@e6061180 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6061180 0 0x54>; - interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 192 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio7: gpio@e6061980 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6061980 0 0x54>; - interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 917>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 917>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 224 21>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio8: gpio@e6068180 { - compatible = "renesas,gpio-r8a779g0", - "renesas,rcar-gen4-gpio"; - reg = <0 0xe6068180 0 0x54>; - interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 918>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 918>; - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pfc 0 256 14>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - cmt0: timer@e60f0000 { - compatible = "renesas,r8a779g0-cmt0", - "renesas,rcar-gen4-cmt0"; - reg = <0 0xe60f0000 0 0x1004>; - interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 910>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 910>; - status = "disabled"; - }; - - cmt1: timer@e6130000 { - compatible = "renesas,r8a779g0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6130000 0 0x1004>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 911>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 911>; - status = "disabled"; - }; - - cmt2: timer@e6140000 { - compatible = "renesas,r8a779g0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6140000 0 0x1004>; - interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 912>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 912>; - status = "disabled"; - }; - - cmt3: timer@e6148000 { - compatible = "renesas,r8a779g0-cmt1", - "renesas,rcar-gen4-cmt1"; - reg = <0 0xe6148000 0 0x1004>; - interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 913>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 913>; - status = "disabled"; - }; - - cpg: clock-controller@e6150000 { - compatible = "renesas,r8a779g0-cpg-mssr"; - reg = <0 0xe6150000 0 0x4000>; - clocks = <&extal_clk>, <&extalr_clk>; - clock-names = "extal", "extalr"; - #clock-cells = <2>; - #power-domain-cells = <0>; - #reset-cells = <1>; - }; - - rst: reset-controller@e6160000 { - compatible = "renesas,r8a779g0-rst"; - reg = <0 0xe6160000 0 0x4000>; - }; - - sysc: system-controller@e6180000 { - compatible = "renesas,r8a779g0-sysc"; - reg = <0 0xe6180000 0 0x4000>; - #power-domain-cells = <1>; - }; - - tsc: thermal@e6198000 { - compatible = "renesas,r8a779g0-thermal"; - reg = <0 0xe6198000 0 0x200>, - <0 0xe61a0000 0 0x200>, - <0 0xe61a8000 0 0x200>, - <0 0xe61b0000 0 0x200>; - clocks = <&cpg CPG_MOD 919>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 919>; - #thermal-sensor-cells = <1>; - }; - - intc_ex: interrupt-controller@e61c0000 { - compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 611>; - }; - - tmu0: timer@e61e0000 { - compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; - reg = <0 0xe61e0000 0 0x30>; - interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 713>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 713>; - status = "disabled"; - }; - - tmu1: timer@e6fc0000 { - compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; - reg = <0 0xe6fc0000 0 0x30>; - interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 714>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 714>; - status = "disabled"; - }; - - tmu2: timer@e6fd0000 { - compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; - reg = <0 0xe6fd0000 0 0x30>; - interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 715>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 715>; - status = "disabled"; - }; - - tmu3: timer@e6fe0000 { - compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; - reg = <0 0xe6fe0000 0 0x30>; - interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 716>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 716>; - status = "disabled"; - }; - - tmu4: timer@ffc00000 { - compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; - reg = <0 0xffc00000 0 0x30>; - interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 717>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 717>; - status = "disabled"; - }; - - i2c0: i2c@e6500000 { - compatible = "renesas,i2c-r8a779g0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6500000 0 0x40>; - interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 518>; - dmas = <&dmac0 0x91>, <&dmac0 0x90>, - <&dmac1 0x91>, <&dmac1 0x90>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 518>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@e6508000 { - compatible = "renesas,i2c-r8a779g0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6508000 0 0x40>; - interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 519>; - dmas = <&dmac0 0x93>, <&dmac0 0x92>, - <&dmac1 0x93>, <&dmac1 0x92>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 519>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@e6510000 { - compatible = "renesas,i2c-r8a779g0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe6510000 0 0x40>; - interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>; - dmas = <&dmac0 0x95>, <&dmac0 0x94>, - <&dmac1 0x95>, <&dmac1 0x94>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 520>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@e66d0000 { - compatible = "renesas,i2c-r8a779g0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66d0000 0 0x40>; - interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 521>; - dmas = <&dmac0 0x97>, <&dmac0 0x96>, - <&dmac1 0x97>, <&dmac1 0x96>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 521>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@e66d8000 { - compatible = "renesas,i2c-r8a779g0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66d8000 0 0x40>; - interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 522>; - dma-names = "tx", "rx", "tx", "rx"; - dmas = <&dmac0 0x99>, <&dmac0 0x98>, - <&dmac1 0x99>, <&dmac1 0x98>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 522>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@e66e0000 { - compatible = "renesas,i2c-r8a779g0", - "renesas,rcar-gen4-i2c"; - reg = <0 0xe66e0000 0 0x40>; - interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 523>; - dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, - <&dmac1 0x9b>, <&dmac1 0x9a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 523>; - i2c-scl-internal-delay-ns = <110>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a779g0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 514>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x31>, <&dmac0 0x30>, - <&dmac1 0x31>, <&dmac1 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 514>; - status = "disabled"; - }; - - hscif1: serial@e6550000 { - compatible = "renesas,hscif-r8a779g0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6550000 0 0x60>; - interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 515>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x33>, <&dmac0 0x32>, - <&dmac1 0x33>, <&dmac1 0x32>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 515>; - status = "disabled"; - }; - - hscif2: serial@e6560000 { - compatible = "renesas,hscif-r8a779g0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe6560000 0 0x60>; - interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 516>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x35>, <&dmac0 0x34>, - <&dmac1 0x35>, <&dmac1 0x34>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 516>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a779g0", - "renesas,rcar-gen4-hscif", "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>, - <&dmac1 0x37>, <&dmac1 0x36>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - - canfd: can@e6660000 { - compatible = "renesas,r8a779g0-canfd", - "renesas,rcar-gen4-canfd"; - reg = <0 0xe6660000 0 0x8500>; - interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch_int", "g_int"; - clocks = <&cpg CPG_MOD 328>, - <&cpg CPG_CORE R8A779G0_CLK_CANFD>, - <&can_clk>; - clock-names = "fck", "canfd", "can_clk"; - assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; - assigned-clock-rates = <80000000>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 328>; - status = "disabled"; - - channel0 { - status = "disabled"; - }; - - channel1 { - status = "disabled"; - }; - - channel2 { - status = "disabled"; - }; - - channel3 { - status = "disabled"; - }; - - channel4 { - status = "disabled"; - }; - - channel5 { - status = "disabled"; - }; - - channel6 { - status = "disabled"; - }; - - channel7 { - status = "disabled"; - }; - }; - - avb0: ethernet@e6800000 { - compatible = "renesas,etheravb-r8a779g0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6800000 0 0x800>; - interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15", "ch16", "ch17", - "ch18", "ch19", "ch20", "ch21", - "ch22", "ch23", "ch24"; - clocks = <&cpg CPG_MOD 211>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 211>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb1: ethernet@e6810000 { - compatible = "renesas,etheravb-r8a779g0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6810000 0 0x800>; - interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15", "ch16", "ch17", - "ch18", "ch19", "ch20", "ch21", - "ch22", "ch23", "ch24"; - clocks = <&cpg CPG_MOD 212>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 212>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - avb2: ethernet@e6820000 { - compatible = "renesas,etheravb-r8a779g0", - "renesas,etheravb-rcar-gen4"; - reg = <0 0xe6820000 0 0x1000>; - interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15", "ch16", "ch17", - "ch18", "ch19", "ch20", "ch21", - "ch22", "ch23", "ch24"; - clocks = <&cpg CPG_MOD 213>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 213>; - phy-mode = "rgmii"; - rx-internal-delay-ps = <0>; - tx-internal-delay-ps = <0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@e6e30000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e30000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm1: pwm@e6e31000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e31000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm2: pwm@e6e32000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e32000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e33000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm4: pwm@e6e34000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e34000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm5: pwm@e6e35000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e35000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm6: pwm@e6e36000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e36000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm7: pwm@e6e37000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e37000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm8: pwm@e6e38000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e38000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - pwm9: pwm@e6e39000 { - compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; - reg = <0 0xe6e39000 0 0x10>; - #pwm-cells = <2>; - clocks = <&cpg CPG_MOD 628>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 628>; - status = "disabled"; - }; - - scif0: serial@e6e60000 { - compatible = "renesas,scif-r8a779g0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6e60000 0 64>; - interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x51>, <&dmac0 0x50>, - <&dmac1 0x51>, <&dmac1 0x50>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 702>; - status = "disabled"; - }; - - scif1: serial@e6e68000 { - compatible = "renesas,scif-r8a779g0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6e68000 0 64>; - interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x53>, <&dmac0 0x52>, - <&dmac1 0x53>, <&dmac1 0x52>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 703>; - status = "disabled"; - }; - - scif3: serial@e6c50000 { - compatible = "renesas,scif-r8a779g0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6c50000 0 64>; - interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 704>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x57>, <&dmac0 0x56>, - <&dmac1 0x57>, <&dmac1 0x56>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 704>; - status = "disabled"; - }; - - scif4: serial@e6c40000 { - compatible = "renesas,scif-r8a779g0", - "renesas,rcar-gen4-scif", "renesas,scif"; - reg = <0 0xe6c40000 0 64>; - interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 705>, - <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x59>, <&dmac0 0x58>, - <&dmac1 0x59>, <&dmac1 0x58>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 705>; - status = "disabled"; - }; - - tpu: pwm@e6e80000 { - compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; - reg = <0 0xe6e80000 0 0x148>; - interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 718>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 718>; - #pwm-cells = <3>; - status = "disabled"; - }; - - msiof0: spi@e6e90000 { - compatible = "renesas,msiof-r8a779g0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6e90000 0 0x0064>; - interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 618>; - dmas = <&dmac0 0x41>, <&dmac0 0x40>, - <&dmac1 0x41>, <&dmac1 0x40>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 618>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof1: spi@e6ea0000 { - compatible = "renesas,msiof-r8a779g0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6ea0000 0 0x0064>; - interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 619>; - dmas = <&dmac0 0x43>, <&dmac0 0x42>, - <&dmac1 0x43>, <&dmac1 0x42>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 619>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof2: spi@e6c00000 { - compatible = "renesas,msiof-r8a779g0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c00000 0 0x0064>; - interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 620>; - dmas = <&dmac0 0x45>, <&dmac0 0x44>, - <&dmac1 0x45>, <&dmac1 0x44>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 620>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof3: spi@e6c10000 { - compatible = "renesas,msiof-r8a779g0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c10000 0 0x0064>; - interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; - dmas = <&dmac0 0x47>, <&dmac0 0x46>, - <&dmac1 0x47>, <&dmac1 0x46>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 621>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof4: spi@e6c20000 { - compatible = "renesas,msiof-r8a779g0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c20000 0 0x0064>; - interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; - dmas = <&dmac0 0x49>, <&dmac0 0x48>, - <&dmac1 0x49>, <&dmac1 0x48>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 622>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - msiof5: spi@e6c28000 { - compatible = "renesas,msiof-r8a779g0", - "renesas,rcar-gen4-msiof"; - reg = <0 0xe6c28000 0 0x0064>; - interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; - dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, - <&dmac1 0x4b>, <&dmac1 0x4a>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 623>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - vin00: video@e6ef0000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef0000 0 0x1000>; - interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 730>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 730>; - renesas,id = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin00isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin00>; - }; - }; - }; - }; - - vin01: video@e6ef1000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef1000 0 0x1000>; - interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 731>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 731>; - renesas,id = <1>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin01isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin01>; - }; - }; - }; - }; - - vin02: video@e6ef2000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef2000 0 0x1000>; - interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 800>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 800>; - renesas,id = <2>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin02isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin02>; - }; - }; - }; - }; - - vin03: video@e6ef3000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef3000 0 0x1000>; - interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 801>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 801>; - renesas,id = <3>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin03isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin03>; - }; - }; - }; - }; - - vin04: video@e6ef4000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef4000 0 0x1000>; - interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 802>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 802>; - renesas,id = <4>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin04isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin04>; - }; - }; - }; - }; - - vin05: video@e6ef5000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef5000 0 0x1000>; - interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 803>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 803>; - renesas,id = <5>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin05isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin05>; - }; - }; - }; - }; - - vin06: video@e6ef6000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef6000 0 0x1000>; - interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 804>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 804>; - renesas,id = <6>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin06isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin06>; - }; - }; - }; - }; - - vin07: video@e6ef7000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef7000 0 0x1000>; - interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 805>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 805>; - renesas,id = <7>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin07isp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&isp0vin07>; - }; - }; - }; - }; - - vin08: video@e6ef8000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef8000 0 0x1000>; - interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 806>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 806>; - renesas,id = <8>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin08isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin08>; - }; - }; - }; - }; - - vin09: video@e6ef9000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6ef9000 0 0x1000>; - interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 807>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 807>; - renesas,id = <9>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin09isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin09>; - }; - }; - }; - }; - - vin10: video@e6efa000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6efa000 0 0x1000>; - interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 808>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 808>; - renesas,id = <10>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin10isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin10>; - }; - }; - }; - }; - - vin11: video@e6efb000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6efb000 0 0x1000>; - interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 809>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 809>; - renesas,id = <11>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin11isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin11>; - }; - }; - }; - }; - - vin12: video@e6efc000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6efc000 0 0x1000>; - interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 810>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 810>; - renesas,id = <12>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin12isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin12>; - }; - }; - }; - }; - - vin13: video@e6efd000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6efd000 0 0x1000>; - interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 811>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 811>; - renesas,id = <13>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin13isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin13>; - }; - }; - }; - }; - - vin14: video@e6efe000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6efe000 0 0x1000>; - interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 812>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 812>; - renesas,id = <14>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin14isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin14>; - }; - }; - }; - }; - - vin15: video@e6eff000 { - compatible = "renesas,vin-r8a779g0"; - reg = <0 0xe6eff000 0 0x1000>; - interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 813>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 813>; - renesas,id = <15>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@2 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <2>; - - vin15isp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&isp1vin15>; - }; - }; - }; - }; - - dmac0: dma-controller@e7350000 { - compatible = "renesas,dmac-r8a779g0", - "renesas,rcar-gen4-dmac"; - reg = <0 0xe7350000 0 0x1000>, - <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15"; - clocks = <&cpg CPG_MOD 709>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 709>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, - <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, - <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, - <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, - <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, - <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, - <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, - <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; - }; - - dmac1: dma-controller@e7351000 { - compatible = "renesas,dmac-r8a779g0", - "renesas,rcar-gen4-dmac"; - reg = <0 0xe7351000 0 0x1000>, - <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", "ch4", - "ch5", "ch6", "ch7", "ch8", "ch9", - "ch10", "ch11", "ch12", "ch13", - "ch14", "ch15"; - clocks = <&cpg CPG_MOD 710>; - clock-names = "fck"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 710>; - #dma-cells = <1>; - dma-channels = <16>; - iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, - <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, - <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, - <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, - <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, - <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, - <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, - <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; - }; - - rcar_sound: sound@ec5a0000 { - /* - * #sound-dai-cells is required - * - * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; - * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; - */ - /* - * #clock-cells is required - * - * clkout : #clock-cells = <0>; <&rcar_sound>; - * audio_clkout0/1/2/3 : #clock-cells = <1>; <&rcar_sound N>; - */ - compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; - reg = <0 0xec5a0000 0 0x020>, - <0 0xec540000 0 0x1000>, - <0 0xec541000 0 0x050>, - <0 0xec400000 0 0x40000>; - reg-names = "adg", "ssiu", "ssi", "sdmc"; - - clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; - clock-names = "ssiu.0", "ssi.0", "clkin"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 2926>, <&cpg 2927>; - reset-names = "ssiu.0", "ssi.0"; - status = "disabled"; - - rcar_sound,ssiu { - ssiu00: ssiu-0 { - dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; - dma-names = "tx", "rx"; - }; - ssiu01: ssiu-1 { - dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; - dma-names = "tx", "rx"; - }; - ssiu02: ssiu-2 { - dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; - dma-names = "tx", "rx"; - }; - ssiu03: ssiu-3 { - dmas = <&dmac0 0x68>, <&dmac0 0x69>; - dma-names = "tx", "rx"; - }; - ssiu04: ssiu-4 { - dmas = <&dmac0 0x66>, <&dmac0 0x67>; - dma-names = "tx", "rx"; - }; - ssiu05: ssiu-5 { - dmas = <&dmac0 0x64>, <&dmac0 0x65>; - dma-names = "tx", "rx"; - }; - ssiu06: ssiu-6 { - dmas = <&dmac0 0x62>, <&dmac0 0x63>; - dma-names = "tx", "rx"; - }; - ssiu07: ssiu-7 { - dmas = <&dmac0 0x60>, <&dmac0 0x61>; - dma-names = "tx", "rx"; - }; - }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - }; - - ipmmu_rt0: iommu@ee480000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xee480000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_rt1: iommu@ee4c0000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xee4c0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ds0: iommu@eed00000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_hc: iommu@eed40000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed40000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_ir: iommu@eed80000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeed80000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_A3IR>; - #iommu-cells = <1>; - }; - - ipmmu_vc: iommu@eedc0000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeedc0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_3dg: iommu@eee00000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeee00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi0: iommu@eee80000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeee80000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vi1: iommu@eeec0000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeeec0000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vip0: iommu@eef00000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeef00000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_vip1: iommu@eef40000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeef40000 0 0x20000>; - renesas,ipmmu-main = <&ipmmu_mm>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - ipmmu_mm: iommu@eefc0000 { - compatible = "renesas,ipmmu-r8a779g0", - "renesas,rcar-gen4-ipmmu-vmsa"; - reg = <0 0xeefc0000 0 0x20000>; - interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - #iommu-cells = <1>; - }; - - mmc0: mmc@ee140000 { - compatible = "renesas,sdhi-r8a779g0", - "renesas,rcar-gen4-sdhi"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 706>, - <&cpg CPG_CORE R8A779G0_CLK_SD0H>; - clock-names = "core", "clkh"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 706>; - max-frequency = <200000000>; - iommus = <&ipmmu_ds0 32>; - status = "disabled"; - }; - - rpc: spi@ee200000 { - compatible = "renesas,r8a779g0-rpc-if", - "renesas,rcar-gen4-rpc-if"; - reg = <0 0xee200000 0 0x200>, - <0 0x08000000 0 0x04000000>, - <0 0xee208000 0 0x100>; - reg-names = "regs", "dirmap", "wbuf"; - interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 629>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 629>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - gic: interrupt-controller@f1000000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xf1000000 0 0x20000>, - <0x0 0xf1060000 0 0x110000>; - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - }; - - csi40: csi2@fe500000 { - compatible = "renesas,r8a779g0-csi2"; - reg = <0 0xfe500000 0 0x40000>; - interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 331>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 331>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - csi40isp0: endpoint { - remote-endpoint = <&isp0csi40>; - }; - }; - }; - }; - - csi41: csi2@fe540000 { - compatible = "renesas,r8a779g0-csi2"; - reg = <0 0xfe540000 0 0x40000>; - interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 400>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 400>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - }; - - port@1 { - reg = <1>; - csi41isp1: endpoint { - remote-endpoint = <&isp1csi41>; - }; - }; - }; - }; - - fcpvd0: fcp@fea10000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea10000 0 0x200>; - clocks = <&cpg CPG_MOD 508>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 508>; - }; - - fcpvd1: fcp@fea11000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea11000 0 0x200>; - clocks = <&cpg CPG_MOD 509>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 509>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x7000>; - interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 830>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 830>; - - renesas,fcp = <&fcpvd0>; - }; - - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x7000>; - interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 831>; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 831>; - - renesas,fcp = <&fcpvd1>; - }; - - du: display@feb00000 { - compatible = "renesas,du-r8a779g0"; - reg = <0 0xfeb00000 0 0x40000>; - interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 411>; - clock-names = "du.0"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 411>; - reset-names = "du.0"; - renesas,vsps = <&vspd0 0>, <&vspd1 0>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - du_out_dsi0: endpoint { - remote-endpoint = <&dsi0_in>; - }; - }; - - port@1 { - reg = <1>; - du_out_dsi1: endpoint { - remote-endpoint = <&dsi1_in>; - }; - }; - }; - }; - - isp0: isp@fed00000 { - compatible = "renesas,r8a779g0-isp"; - reg = <0 0xfed00000 0 0x10000>; - interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; - clocks = <&cpg CPG_MOD 612>; - power-domains = <&sysc R8A779G0_PD_A3ISP0>; - resets = <&cpg 612>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <0>; - - isp0csi40: endpoint@0 { - reg = <0>; - remote-endpoint = <&csi40isp0>; - }; - }; - - port@1 { - reg = <1>; - isp0vin00: endpoint { - remote-endpoint = <&vin00isp0>; - }; - }; - - port@2 { - reg = <2>; - isp0vin01: endpoint { - remote-endpoint = <&vin01isp0>; - }; - }; - - port@3 { - reg = <3>; - isp0vin02: endpoint { - remote-endpoint = <&vin02isp0>; - }; - }; - - port@4 { - reg = <4>; - isp0vin03: endpoint { - remote-endpoint = <&vin03isp0>; - }; - }; - - port@5 { - reg = <5>; - isp0vin04: endpoint { - remote-endpoint = <&vin04isp0>; - }; - }; - - port@6 { - reg = <6>; - isp0vin05: endpoint { - remote-endpoint = <&vin05isp0>; - }; - }; - - port@7 { - reg = <7>; - isp0vin06: endpoint { - remote-endpoint = <&vin06isp0>; - }; - }; - - port@8 { - reg = <8>; - isp0vin07: endpoint { - remote-endpoint = <&vin07isp0>; - }; - }; - }; - }; - - isp1: isp@fed20000 { - compatible = "renesas,r8a779g0-isp"; - reg = <0 0xfed20000 0 0x10000>; - interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; - clocks = <&cpg CPG_MOD 613>; - power-domains = <&sysc R8A779G0_PD_A3ISP1>; - resets = <&cpg 613>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - - reg = <0>; - - isp1csi41: endpoint@1 { - reg = <1>; - remote-endpoint = <&csi41isp1>; - }; - }; - - port@1 { - reg = <1>; - isp1vin08: endpoint { - remote-endpoint = <&vin08isp1>; - }; - }; - - port@2 { - reg = <2>; - isp1vin09: endpoint { - remote-endpoint = <&vin09isp1>; - }; - }; - - port@3 { - reg = <3>; - isp1vin10: endpoint { - remote-endpoint = <&vin10isp1>; - }; - }; - - port@4 { - reg = <4>; - isp1vin11: endpoint { - remote-endpoint = <&vin11isp1>; - }; - }; - - port@5 { - reg = <5>; - isp1vin12: endpoint { - remote-endpoint = <&vin12isp1>; - }; - }; - - port@6 { - reg = <6>; - isp1vin13: endpoint { - remote-endpoint = <&vin13isp1>; - }; - }; - - port@7 { - reg = <7>; - isp1vin14: endpoint { - remote-endpoint = <&vin14isp1>; - }; - }; - - port@8 { - reg = <8>; - isp1vin15: endpoint { - remote-endpoint = <&vin15isp1>; - }; - }; - }; - }; - - dsi0: dsi-encoder@fed80000 { - compatible = "renesas,r8a779g0-dsi-csi2-tx"; - reg = <0 0xfed80000 0 0x10000>; - clocks = <&cpg CPG_MOD 415>, - <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, - <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; - clock-names = "fck", "dsi", "pll"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 415>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi0_in: endpoint { - remote-endpoint = <&du_out_dsi0>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - dsi1: dsi-encoder@fed90000 { - compatible = "renesas,r8a779g0-dsi-csi2-tx"; - reg = <0 0xfed90000 0 0x10000>; - clocks = <&cpg CPG_MOD 416>, - <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, - <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; - clock-names = "fck", "dsi", "pll"; - power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; - resets = <&cpg 416>; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - dsi1_in: endpoint { - remote-endpoint = <&du_out_dsi1>; - }; - }; - - port@1 { - reg = <1>; - }; - }; - }; - - prr: chipid@fff00044 { - compatible = "renesas,prr"; - reg = <0 0xfff00044 0 4>; - }; - }; - - thermal-zones { - sensor_thermal_cr52: sensor1-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 0>; - - trips { - sensor1_crit: sensor1-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor_thermal_cnn: sensor2-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 1>; - - trips { - sensor2_crit: sensor2-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor_thermal_ca76: sensor3-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 2>; - - trips { - sensor3_crit: sensor3-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - - sensor_thermal_ddr1: sensor4-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&tsc 3>; - - trips { - sensor4_crit: sensor4-crit { - temperature = <120000>; - hysteresis = <1000>; - type = "critical"; - }; - }; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; - }; -}; -- 2.43.0

2 1

[PATCH v2] net: ti: am65-cpsw-nuss: handle missing PHY in am65_cpsw_phy_init() gracefully
by A. Sverdlin 01 May '24

01 May '24

From: Alexander Sverdlin <alexander.sverdlin(a)siemens.com> am65_cpsw_ofdata_parse_phy() tries to handle the case when PHY is not specified in DT gracefully: am65_cpsw_nuss_port ethernet@8000000port@1: can't parse phy-handle port 1 (-2) am65_cpsw_mdio_init() in turn is prepared for this, checks if priv->has_phy == 0 and bails out (leaving cpsw_common->bus == NULL). am65_cpsw_phy_init() however is not prepared for this and calls phy_connect(cpsw_common->bus, ...) unconditionally, which leads to: "Synchronous Abort" handler, esr 0x8600000d, far 0x0 elr: ffffffff808ab000 lr : 000000008083bde4 (reloc) where lr points to the instruction right after bus->read() in get_phy_id(). Fixes: 9d0dca1199d1 ("net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver") Signed-off-by: Alexander Sverdlin <alexander.sverdlin(a)siemens.com> --- v2: rewritten subject; "is turn" -> "in turn" further down in message body drivers/net/ti/am65-cpsw-nuss.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c index 6da018c0f9d5..d1e452b6b43c 100644 --- a/drivers/net/ti/am65-cpsw-nuss.c +++ b/drivers/net/ti/am65-cpsw-nuss.c @@ -722,6 +722,9 @@ static int am65_cpsw_phy_init(struct udevice *dev) u32 supported = PHY_GBIT_FEATURES; int ret; + if (!priv->has_phy || !cpsw_common->bus) + return 0; + phydev = phy_connect(cpsw_common->bus, priv->phy_addr, priv->dev, -- 2.44.0

4 5

[PATCH 0/2] Optimize udelay for aarch64 boards
by Peter Hoyes 01 May '24

01 May '24

Arm boards currently use the default implementation of __udelay which consists of a spin-loop. AArch64 however provides an architectural timer with an event stream which can be enabled and waited upon with a few lines of assembly. This is more efficient and also avoids an issue on Arm FVPs where polling the counter frequently takes much longer than real-time. Therefore, overrride __udelay for all armv8 boards to use the event stream. Macros for the relevant instructions already existed for mach-exynos, so pull these up to a common header file. I have tested this patch chain on qemu-system-aarch64 (virt,secure=on), FVP_Base_RevC and a Raspberry Pi 4. Peter Hoyes (2): arm: Move sev() and wfe() definitions to common Arm header file armv8: generic_timer: Use event stream for udelay arch/arm/cpu/armv8/Kconfig | 8 +++++++ arch/arm/cpu/armv8/generic_timer.c | 27 ++++++++++++++++++++++ arch/arm/include/asm/system.h | 15 ++++++++++-- arch/arm/mach-exynos/include/mach/system.h | 19 --------------- 4 files changed, 48 insertions(+), 21 deletions(-) -- 2.34.1

3 9

[PATCH v3] test/py: net_boot: Add test cases for net boot
by Love Kumar 30 Apr '24

30 Apr '24

Add tests for booting image using tftpboot/pxe boot commands, tftpboot boot case loads the FIT image into DDR and boots using bootm command whereas pxe boot cases downloads the pxe configuration file from the TFTP server and interprets it to boot the images mentioned in the pxe configurations file. This test relies on boardenv_* containing configuration values including the parameter 'pattern'. tftpboot/pxe boot cases boots the Linux till the boot log pattern value is matched. For example, if the parameter 'pattern' is defined as 'login:', it will boot till login prompt. Signed-off-by: Love Kumar <love.kumar(a)amd.com> --- Changes in v2: - Expand commit message Changes in v3: - Add the config option to skip the test - Remove imi command to check FIT image config - Configure static networking only if DHCP fails --- test/py/tests/test_net_boot.py | 391 +++++++++++++++++++++++++++++++++ 1 file changed, 391 insertions(+) create mode 100644 test/py/tests/test_net_boot.py diff --git a/test/py/tests/test_net_boot.py b/test/py/tests/test_net_boot.py new file mode 100644 index 000000000000..cf7d5cca5cbd --- /dev/null +++ b/test/py/tests/test_net_boot.py @@ -0,0 +1,391 @@ +# SPDX-License-Identifier: GPL-2.0 +# (C) Copyright 2023, Advanced Micro Devices, Inc. + +import pytest +import u_boot_utils +import test_net + +""" +Note: This test relies on boardenv_* containing configuration values to define +which the network environment available for testing. Without this, this test +will be automatically skipped. + +For example: + +# Details regarding a boot image file that may be read from a TFTP server. This +# variable may be omitted or set to None if TFTP boot testing is not possible +# or desired. +env__net_tftp_bootable_file = { + 'fn': 'image.ub', + 'addr': 0x10000000, + 'size': 5058624, + 'crc32': 'c2244b26', + 'pattern': 'Linux', + 'config': 'config@2', + 'timeout': 50000, +} + +# False or omitted if a TFTP boot test should be tested. +# If TFTP boot testing is not possible or desired, set this variable to True. +# For example: If FIT image is not proper to boot +env__tftp_boot_test_skip = False + +# Here is the example of FIT image configurations: +configurations { + default = "config@1"; + config@1 { + description = "Boot Linux kernel with config@1"; + kernel = "kernel@0"; + fdt = "fdt@0"; + ramdisk = "ramdisk@0"; + hash@1 { + algo = "sha1"; + }; + }; + config@2 { + description = "Boot Linux kernel with config@2"; + kernel = "kernel@1"; + fdt = "fdt@1"; + ramdisk = "ramdisk@1"; + hash@1 { + algo = "sha1"; + }; + }; +}; + +# Details regarding a file that may be read from a TFTP server. This variable +# may be omitted or set to None if PXE testing is not possible or desired. +env__net_pxe_bootable_file = { + 'fn': 'default', + 'addr': 0x10000000, + 'size': 74, + 'timeout': 50000, + 'pattern': 'Linux', + 'valid_label': '1', + 'invalid_label': '2', + 'exp_str_invalid': 'Skipping install for failure retrieving', + 'local_label': '3', + 'exp_str_local': 'missing environment variable: localcmd', + 'empty_label': '4', + 'exp_str_empty': 'No kernel given, skipping boot', +} + +# False or omitted if a PXE boot test should be tested. +# If PXE boot testing is not possible or desired, set this variable to True. +# For example: If pxe configuration file is not proper to boot +env__pxe_boot_test_skip = False + +# Here is the example of pxe configuration file ordered based on the execution +# flow: +1) /tftpboot/pxelinux.cfg/default-arm-zynqmp + + menu include pxelinux.cfg/default-arm + timeout 50 + + default Linux + +2) /tftpboot/pxelinux.cfg/default-arm + + menu title Linux boot selections + menu include pxelinux.cfg/default + + label install + menu label Invalid boot + kernel kernels/install.bin + append console=ttyAMA0,38400 debug earlyprintk + initrd initrds/uzInitrdDebInstall + + label local + menu label Local boot + append root=/dev/sdb1 + localboot 1 + + label boot + menu label Empty boot + +3) /tftpboot/pxelinux.cfg/default + + label Linux + menu label Boot kernel + kernel Image + fdt system.dtb + initrd rootfs.cpio.gz.u-boot +""" + +def setup_tftpboot_boot(u_boot_console): + f = u_boot_console.config.env.get('env__net_tftp_bootable_file', None) + if not f: + pytest.skip('No TFTP bootable file to read') + + test_net.test_net_dhcp(u_boot_console) + if not test_net.net_set_up: + test_net.test_net_setup_static(u_boot_console) + + addr = f.get('addr', None) + if not addr: + addr = u_boot_utils.find_ram_base(u_boot_console) + + fn = f['fn'] + output = u_boot_console.run_command('tftpboot %x %s' % (addr, fn)) + expected_text = 'Bytes transferred = ' + sz = f.get('size', None) + if sz: + expected_text += '%d' % sz + assert expected_text in output + + expected_crc = f.get('crc32', None) + output = u_boot_console.run_command('crc32 %x $filesize' % addr) + if expected_crc: + assert expected_crc in output + + pattern = f.get('pattern') + config = f.get('config', None) + timeout = f.get('timeout', 50000) + + return addr, pattern, timeout, config + +(a)pytest.mark.buildconfigspec('cmd_net') +def test_net_tftpboot_boot(u_boot_console): + """Boot the loaded image + + A boot file (fit image) is downloaded from the TFTP server and booted using + bootm command with the default fit configuration, its boot log pattern are + validated. + + The details of the file to download are provided by the boardenv_* file; + see the comment at the beginning of this file. + """ + if u_boot_console.config.env.get('env__tftp_boot_test_skip', True): + pytest.skip('TFTP boot test is not enabled!') + + addr, pattern, timeout, imcfg = setup_tftpboot_boot(u_boot_console) + with u_boot_console.temporary_timeout(timeout): + try: + # wait_for_prompt=False makes the core code not wait for the U-Boot + # prompt code to be seen, since it won't be on a successful kernel + # boot + u_boot_console.run_command('bootm %x'% addr, wait_for_prompt=False) + # You might want to expand wait_for() with options to add extra bad + # patterns which immediately indicate a failed boot, or add a new + # "with object" function u_boot_console.enable_check() that can + # cause extra patterns like the U-Boot console prompt, U-Boot boot + # error messages, kernel boot error messages, etc. to fail the + # wait_for(). + + # Wait for boot log pattern + u_boot_console.wait_for(pattern) + finally: + # This forces the console object to be shutdown, so any subsequent + # test will reset the board back into U-Boot. We want to force this + # no matter whether the kernel boot passed or failed. + u_boot_console.drain_console() + u_boot_console.cleanup_spawn() + +(a)pytest.mark.buildconfigspec('cmd_net') +def test_net_tftpboot_boot_config(u_boot_console): + """Boot the loaded image from FIT image configuration + + A boot file (fit image) is downloaded from the TFTP server and booted using + bootm command with the custom fit configuration, its boot log pattern are + validated. + + The details of the file to download are provided by the boardenv_* file; + see the comment at the beginning of this file. + """ + if u_boot_console.config.env.get('env__tftp_boot_test_skip', True): + pytest.skip('TFTP boot test is not enabled!') + + addr, pattern, timeout, imcfg = setup_tftpboot_boot(u_boot_console) + + with u_boot_console.temporary_timeout(timeout): + try: + u_boot_console.run_command( + 'bootm %x#%s' % (addr, imcfg), wait_for_prompt=False + ) + u_boot_console.wait_for(pattern) + finally: + u_boot_console.drain_console() + u_boot_console.cleanup_spawn() + +def setup_pxe_boot(u_boot_console): + f = u_boot_console.config.env.get('env__net_pxe_bootable_file', None) + if not f: + pytest.skip('No PXE bootable file to read') + + test_net.test_net_dhcp(u_boot_console) + test_net.test_net_setup_static(u_boot_console) + return f + +(a)pytest.mark.buildconfigspec('cmd_net') +(a)pytest.mark.buildconfigspec('cmd_pxe') +def test_net_pxe_boot(u_boot_console): + """Test the pxe boot command. + + A pxe configuration file is downloaded from the TFTP server and interpreted + to boot the images mentioned in pxe configuration file. + + The details of the file to download are provided by the boardenv_* file; + see the comment at the beginning of this file. + """ + if u_boot_console.config.env.get('env__pxe_boot_test_skip', True): + pytest.skip('PXE boot test is not enabled!') + + f = setup_pxe_boot(u_boot_console) + addr = f.get('addr', None) + timeout = f.get('timeout', u_boot_console.p.timeout) + fn = f['fn'] + + with u_boot_console.temporary_timeout(timeout): + output = u_boot_console.run_command('pxe get') + + expected_text = 'Bytes transferred = ' + sz = f.get('size', None) + if sz: + expected_text += '%d' % sz + assert 'TIMEOUT' not in output + assert expected_text in output + assert "Config file 'default.boot' found" in output + + pattern = f.get('pattern') + if not addr: + pxe_boot_cmd = 'pxe boot' + else: + pxe_boot_cmd = 'pxe boot %x' % addr + + with u_boot_console.temporary_timeout(timeout): + try: + u_boot_console.run_command(pxe_boot_cmd, wait_for_prompt=False) + u_boot_console.wait_for(pattern) + finally: + u_boot_console.drain_console() + u_boot_console.cleanup_spawn() + +(a)pytest.mark.buildconfigspec('cmd_net') +(a)pytest.mark.buildconfigspec('cmd_pxe') +def test_net_pxe_boot_config(u_boot_console): + """Test the pxe boot command by selecting different combination of labels + + A pxe configuration file is downloaded from the TFTP server and interpreted + to boot the images mentioned in pxe configuration file. + + The details of the file to download are provided by the boardenv_* file; + see the comment at the beginning of this file. + """ + if u_boot_console.config.env.get('env__pxe_boot_test_skip', True): + pytest.skip('PXE boot test is not enabled!') + + f = setup_pxe_boot(u_boot_console) + addr = f.get('addr', None) + timeout = f.get('timeout', u_boot_console.p.timeout) + fn = f['fn'] + local_label = f['local_label'] + empty_label = f['empty_label'] + exp_str_local = f['exp_str_local'] + exp_str_empty = f['exp_str_empty'] + + with u_boot_console.temporary_timeout(timeout): + output = u_boot_console.run_command('pxe get') + + expected_text = 'Bytes transferred = ' + sz = f.get('size', None) + if sz: + expected_text += '%d' % sz + assert 'TIMEOUT' not in output + assert expected_text in output + assert "Config file 'default.boot' found" in output + + pattern = f.get('pattern') + if not addr: + pxe_boot_cmd = 'pxe boot' + else: + pxe_boot_cmd = 'pxe boot %x' % addr + + with u_boot_console.temporary_timeout(timeout): + try: + u_boot_console.run_command(pxe_boot_cmd, wait_for_prompt=False) + + # pxe config is loaded where multiple labels are there and need to + # select particular label to boot and check for expected string + # In this case, local label is selected and it should look for + # localcmd env variable and if that variable is not defined it + # should not boot it and come out to u-boot prompt + u_boot_console.wait_for('Enter choice:') + u_boot_console.run_command(local_label, wait_for_prompt=False) + expected_str = u_boot_console.p.expect([exp_str_local]) + assert ( + expected_str == 0 + ), f'Expected string: {exp_str_local} did not match!' + + # In this case, empty label is selected and it should look for + # kernel image path and if it is not set it should fail it and load + # default label to boot + u_boot_console.run_command(pxe_boot_cmd, wait_for_prompt=False) + u_boot_console.wait_for('Enter choice:') + u_boot_console.run_command(empty_label, wait_for_prompt=False) + expected_str = u_boot_console.p.expect([exp_str_empty]) + assert ( + expected_str == 0 + ), f'Expected string: {exp_str_empty} did not match!' + + u_boot_console.wait_for(pattern) + finally: + u_boot_console.drain_console() + u_boot_console.cleanup_spawn() + +(a)pytest.mark.buildconfigspec('cmd_net') +(a)pytest.mark.buildconfigspec('cmd_pxe') +def test_net_pxe_boot_config_invalid(u_boot_console): + """Test the pxe boot command by selecting invalid label + + A pxe configuration file is downloaded from the TFTP server and interpreted + to boot the images mentioned in pxe configuration file. + + The details of the file to download are provided by the boardenv_* file; + see the comment at the beginning of this file. + """ + if u_boot_console.config.env.get('env__pxe_boot_test_skip', True): + pytest.skip('PXE boot test is not enabled!') + + f = setup_pxe_boot(u_boot_console) + addr = f.get('addr', None) + timeout = f.get('timeout', u_boot_console.p.timeout) + fn = f['fn'] + invalid_label = f['invalid_label'] + exp_str_invalid = f['exp_str_invalid'] + + with u_boot_console.temporary_timeout(timeout): + output = u_boot_console.run_command('pxe get') + + expected_text = 'Bytes transferred = ' + sz = f.get('size', None) + if sz: + expected_text += '%d' % sz + assert 'TIMEOUT' not in output + assert expected_text in output + assert "Config file 'default.boot' found" in output + + pattern = f.get('pattern') + if not addr: + pxe_boot_cmd = 'pxe boot' + else: + pxe_boot_cmd = 'pxe boot %x' % addr + + with u_boot_console.temporary_timeout(timeout): + try: + u_boot_console.run_command(pxe_boot_cmd, wait_for_prompt=False) + + # pxe config is loaded where multiple labels are there and need to + # select particular label to boot and check for expected string + # In this case invalid label is selected, it should load invalid + # label and if it fails it should load the default label to boot + u_boot_console.wait_for('Enter choice:') + u_boot_console.run_command(invalid_label, wait_for_prompt=False) + expected_str = u_boot_console.p.expect([exp_str_invalid]) + assert ( + expected_str == 0 + ), f'Expected string: {exp_str_invalid} did not match!' + + u_boot_console.wait_for(pattern) + finally: + u_boot_console.drain_console() + u_boot_console.cleanup_spawn() -- 2.25.1

2 1

[PATCH v2] sandbox: make function 'do_undefined' properly compiles for PowerPC
by WHR 30 Apr '24

30 Apr '24

The 2 bytes 0xffff is too short for being a PowerPC instruction, resulting in an error similar to: /tmp/ccW8yjie.s: Assembler messages: /tmp/ccW8yjie.s: Error: unaligned opcodes detected in executable segment /tmp/ccW8yjie.s:223: Error: instruction address is not a multiple of 4 make[2]: *** [/tmp/ccyF4HIC.mk:17: /tmp/ccCKUFuF.ltrans5.ltrans.o] Error 1 Signed-off-by: WHR <msl0000023508(a)gmail.com> --- v2: Resubmit with diff content in plain text. cmd/sandbox/exception.c | 4 ++++ 1 file changed, 4 insertions(+)

1 0

[PATCH] zfs: recognize zpools formatted with features support as used in OpenZFS
by WHR 30 Apr '24

30 Apr '24

Currently no features are implemented, only the zpool version 5000 that indicating the features support, is recognized. Since it is possible for OpenZFS to create a pool with features support enabled, but without enabling any actual feature, this change enables U-Boot to read such pools. Signed-off-by: WHR <msl0000023508(a)gmail.com>

1 1

[PATCH] zfs: recognize zpools formatted with features support
by WHR 30 Apr '24

30 Apr '24

Currently no features are implemented, only the zpool version 5000 that indicating the features support, is recognized. Since it is possible for OpenZFS to create a pool with features support enabled, but without enabling any actual feature, this change enables U-Boot to read such pools. Signed-off-by: WHR <msl0000023508(a)gmail.com>

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