February 2024 - U-Boot

[PATCH v2 0/3] rockchip: rk35xx: Fix writing to eMMC
by Jonas Karlman 06 Feb '24

06 Feb '24

Testing has shown that writing to eMMC using DDR52 mode does not seem to work on RK356x and RK3588 boards. This series fixes this issue by changing RK356x and RK3588 boards to prefer use of the more reliably HS200 mode. Changes in v2: - Update commit messages - Imply MMC_HS200_SUPPORT and SPL_MMC_HS200_SUPPORT in arch Kconfig instead of adding to each boards defconfig - Combine changes for rk356x and rk3588 in one patch - New patch to fix HS400 mode write on RK3568 Link to v1: https://patchwork.ozlabs.org/cover/1891692/ This series depend on the series "rockchip: rk35xx: Sync device tree with linux v6.8-rc1" [1]. [1] https://patchwork.ozlabs.org/cover/1891669/ Jonas Karlman (3): rockchip: rk35xx: Remove use of eMMC DDR52 mode rockchip: rk35xx: Enable eMMC HS200 mode by default rockchip: sdhci: Fix eMMC HS400 modes for RK3568 arch/arm/dts/rk3566-quartz64-a-u-boot.dtsi | 1 - arch/arm/dts/rk3566-quartz64-b-u-boot.dtsi | 1 - arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi | 1 - arch/arm/dts/rk3566-soquartz-u-boot.dtsi | 1 - arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi | 1 - arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 1 - arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi | 1 - arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 1 - arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 1 - arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 1 - arch/arm/dts/rk3588-turing-rk1-u-boot.dtsi | 1 - arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi | 1 - arch/arm/mach-rockchip/Kconfig | 4 ++++ configs/nanopi-r5c-rk3568_defconfig | 2 -- configs/nanopi-r5s-rk3568_defconfig | 2 -- configs/radxa-e25-rk3568_defconfig | 2 -- drivers/mmc/rockchip_sdhci.c | 9 +++++---- 17 files changed, 9 insertions(+), 22 deletions(-) -- 2.43.0

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[RFC] rockchip: Reset to bootrom download mode on hang
by Jonas Karlman 06 Feb '24

06 Feb '24

Add support to reset to bootrom download mode on hang in U-Boot SPL and proper. ROCKCHIP_HANG_TO_BROM can be used to enable this feature. Example when SPL cannot load FIT: U-Boot SPL 2024.04-rc1 (Feb 01 2024 - 23:01:12 +0000) Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error Trying to boot from MMC2 Card did not respond to voltage select! : -110 spl: mmc init failed with error: -95 Trying to boot from MMC1 mmc_load_image_raw_sector: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### entering download mode ... resetting ... Procedure to start bootrom download mode: - U-Boot SPL or proper write 0xEF08A53C to BOOT_MODE_REG and then reset - Bootrom loads and run boot code (TPL) from e.g. SPI > eMMC > SD-card - TPL check for 0xEF08A53C in BOOT_MODE_REG very early, i.e. Rockchip TPL blobs check for this value directly at start - TPL return to bootrom with a return value != 0 - Bootrom enter download mode This also fixes an issue where the BOOT_MODE_REG is reset to 0 when board is reset on RK35xx after TF-A has been loaded. To fix this the SOC_CON1 reg value is reset prior to issuing a global reset. The RK356x TF-A blobs will clear SOC_CON1 as part of a PSCI reset, however the RK3588 TF-A blobs does not seem to clear SOC_CON1. Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> --- - Is reset to bootrom download mode on hang a feature of intereset to anyone else? - How can we best handle the issue with BOOT_MODE_REG being reset? - Should we instead enable SYSRESET_PSCI and relay on TF-A to properly reset without loosing value in BOOT_MODE_REG? Currently works on RK356x bl31 blobs but not on the RK3588 bl31 blobs. --- arch/arm/mach-rockchip/Kconfig | 9 +++++++ arch/arm/mach-rockchip/Makefile | 9 ++++--- arch/arm/mach-rockchip/boot_mode.c | 38 ++++++++++++++++++++++++++---- configs/generic-rk3568_defconfig | 1 + configs/generic-rk3588_defconfig | 1 + 5 files changed, 48 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 6ff0aa6911e2..66556d30af27 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -508,6 +508,15 @@ config TPL_ROCKCHIP_EARLYRETURN_TO_BROM This enables support code in the BOOT0 hook for the TPL stage to allow multiple entries. +config ROCKCHIP_HANG_TO_BROM + bool "Reset to bootrom download mode on hang" + select SHOW_BOOT_PROGRESS + +config SPL_ROCKCHIP_HANG_TO_BROM + bool "Reset to bootrom download mode on hang in SPL" + default y if ROCKCHIP_HANG_TO_BROM + select SPL_SHOW_BOOT_PROGRESS + config SPL_MMC default y if !SPL_ROCKCHIP_BACK_TO_BROM diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf3..ab4446bb6b51 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -16,17 +16,16 @@ obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) +obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o +obj-$(CONFIG_MISC_INIT_R) += misc.o +endif +ifeq ($(CONFIG_TPL_BUILD),) # Always include boot_mode.o, as we bypass it (i.e. turn it off) # inside of boot_mode.c when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0. This way, # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o -obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o -endif - -ifeq ($(CONFIG_TPL_BUILD),) obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o endif diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index eb8f65ae4e9d..de9ec1414926 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -5,6 +5,7 @@ #include <common.h> #include <adc.h> +#include <bootstage.h> #include <command.h> #include <env.h> #include <log.h> @@ -23,11 +24,31 @@ int setup_boot_mode(void) #else -void set_back_to_bootrom_dnl_flag(void) +static void set_back_to_bootrom_dnl_flag(void) { + /* + * These SOC_CON1 regs needs to be cleared before a reset or the + * BOOT_MODE_REG do not retain its value and it is not possible + * to reset to bootrom download mode once TF-A has been started. + * + * TF-A blobs for RK3568 already clear SOC_CON1 for PSCI reset. + * However, the TF-A blobs for RK3588 does not clear SOC_CON1. + */ + if (IS_ENABLED(CONFIG_ROCKCHIP_RK3568)) + writel(0x40000, 0xFDC20104); + if (IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) + writel(0xFFFF0000, 0xFD58A004); + writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); } +static void rockchip_reset_to_dnl_mode(void) +{ + puts("entering download mode ...\n"); + set_back_to_bootrom_dnl_flag(); + do_reset(NULL, 0, 0, NULL); +} + /* * detect download key status by adc, most rockchip * based boards use adc sample the download key status, @@ -71,12 +92,19 @@ __weak int rockchip_dnl_key_pressed(void) return false; } -void rockchip_dnl_mode_check(void) +#if CONFIG_IS_ENABLED(ROCKCHIP_HANG_TO_BROM) +void show_boot_progress(int val) +{ + if (val == -BOOTSTAGE_ID_NEED_RESET) + rockchip_reset_to_dnl_mode(); +} +#endif + +static void rockchip_dnl_mode_check(void) { if (rockchip_dnl_key_pressed()) { - printf("download key pressed, entering download mode..."); - set_back_to_bootrom_dnl_flag(); - do_reset(NULL, 0, 0, NULL); + puts("download key pressed, "); + rockchip_reset_to_dnl_mode(); } } diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index b90ecb643dc7..9edd4c33000e 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -11,6 +11,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_HANG_TO_BROM=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_SPL_STACK=0x400000 diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index a9329eb1c625..5872bd4802c5 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -11,6 +11,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-generic" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_HANG_TO_BROM=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_TARGET_EVB_RK3588=y -- 2.43.0

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Re: [PATCH V4 3/7] rockchip: boot_mode: Allow rockchip_dnl_key_pressed() in SPL
by Kever Yang 06 Feb '24

06 Feb '24

On 2024/1/25 06:55, Chris Morgan wrote: > On Fri, Jan 19, 2024 at 05:01:38PM +0800, Kever Yang wrote: >> Hi Chris, >> >> On 2024/1/18 23:06, Chris Morgan wrote: >>> On Thu, Jan 18, 2024 at 03:20:52PM +0800, Kever Yang wrote: >>>> Hi Chris, >>>> >>>> On 2024/1/2 23:46, Chris Morgan wrote: >>>>> From: Chris Morgan<macromorgan(a)hotmail.com> >>>>> >>>>> Update the rockchip_dnl_key_pressed() so that it can run in >>>>> SPL. Also change the ADC channel to a define that can be >>>>> overridden by a board specific option. >>>> I should ask this earlier. >>>> >>>> Why you have to enable the download key in SPL? >>>> >>>> This works for a long time in U-Boot proper, both mainline and downstream >>>> vendor U-Boot, >>>> >>>> no one is detect this download key in SPL. >>>> >>>> In theory the SPL can implement all the feature which is available in U-Boot >>>> proper, >>>> >>>> but it would be better to make the SPL focus on the job it should be done >>>> and keep as small as possible. >>>> >>> I wanted this code to run as soon as possible in the event of a bad >>> write. I have some devices which lack a way to bypass the eMMC in the >>> boot path; the fear is that if an SPL stage is written with a good >>> header but a bad payload (or if the A-TF does something wrong) the >>> device will become unbootable. If we can't do it this way for >>> all Rockchip boards that's fine, but I REALLY want to at least do >>> it this way for the Powkiddy X55 board and the Anbernic RGxx3 board. >> That's why rockchip platform has two download mode, loader mode(in U-Boot) >> >> and maskRom mode, any error happen before U-Boot should get into maksRom >> mode. >> >> Most of user/developer only use loader mode because the modules before >> U-Boot should >> >> be more stable and have very little chance to update, for the module owners >> before U-Boot, >> >> they are the users of maskRom mode. >> >> If you enable this feature in SPL, the error still have chance to happen >> during dram init to SPL key detect. >> >> Does these two board has no way to get into eMMC event with hardware rework? >> any hardware >> >> signal of eMMC CMD/CLK/DATA is OK. > A few do not. The error is less likely to occur between RAM init and > SPL key detect, but yes it's even possible at this stage. > > >From my testing using the latest BL31 file from the > rockchip-linux/rkbin github repository I was unable to reboot into > maskrom mode after A-TF loaded, the device would just straight > reboot. Do you know if A-TF does something that makes reboot > into maskrom mode no longer work? This is no reasonable, it should be able to reboot to maskrom mode any time we want, because the vendor kernel also do this and the function works. > >> And another way to bypass eMMC is to use SDcard which has higher priority >> then eMMC in BootRom. >> > I see in the TRM under section 1.2 that the eMMC is higher in the boot > path than SDMMC, and that matches my experience as well. Yes, you are right about this, and I think rockchip vendor code is using SD card as the first priority in the SPL instead of "same-as SPL", and make the SPL small and simple enough to involve less bug, so that stable enough and no need to update. This patch is OK when the check for key press entry is in the board level instead of platform common code. Thanks, - Kever > So this > wouldn't be a solution sadly. > >> For SPL itself debug, I would suggest to RESET into bootrom download mode if >> any error happen >> >> and a reset will need. >> >> I pick up patches other than 2,3,4 in this patchset for now. >> >>> While I have you, I have a related question I hope you can help with. >>> Is there any way to utilize the boot partitions of an eMMC device? I >>> don't know if the BROM of an RK3568 or RK3588 is capable, but I'd love >>> to have the SPL and U-Boot stages written to the eMMC boot partitions >>> instead of the user partition if I can. >> No, Rockchip SoCs does not use the boot partitions of eMMC, only use the >> user data partition. > That's unfortunate, but I appreciate the feedback. > > Thank you, > Chris > >> >> Thanks, >> >> - Kever >> >>> Thank you. >>> >>>> Thanks, >>>> >>>> - Kever >>>> >>>>> Signed-off-by: Chris Morgan<macromorgan(a)hotmail.com> >>>>> --- >>>>> arch/arm/mach-rockchip/Makefile | 4 ++-- >>>>> arch/arm/mach-rockchip/boot_mode.c | 11 ++++++++++- >>>>> 2 files changed, 12 insertions(+), 3 deletions(-) >>>>> >>>>> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile >>>>> index 1dc92066bb..ff089ae949 100644 >>>>> --- a/arch/arm/mach-rockchip/Makefile >>>>> +++ b/arch/arm/mach-rockchip/Makefile >>>>> @@ -15,13 +15,13 @@ obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o >>>>> obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o >>>>> -ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) >>>>> - >>>>> # Always include boot_mode.o, as we bypass it (i.e. turn it off) >>>>> # inside of boot_mode.c when CONFIG_ROCKCHIP_BOOT_MODE_REG is 0. This way, >>>>> # we can have the preprocessor correctly recognise both 0x0 and 0 >>>>> # meaning "turn it off". >>>>> obj-y += boot_mode.o >>>>> + >>>>> +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) >>>>> obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o >>>>> obj-$(CONFIG_MISC_INIT_R) += misc.o >>>>> endif >>>>> diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c >>>>> index eb8f65ae4e..d2308768be 100644 >>>>> --- a/arch/arm/mach-rockchip/boot_mode.c >>>>> +++ b/arch/arm/mach-rockchip/boot_mode.c >>>>> @@ -38,6 +38,10 @@ void set_back_to_bootrom_dnl_flag(void) >>>>> #define KEY_DOWN_MIN_VAL 0 >>>>> #define KEY_DOWN_MAX_VAL 30 >>>>> +#ifndef RK_DNL_ADC_CHAN >>>>> +#define RK_DNL_ADC_CHAN 1 >>>>> +#endif >>>>> + >>>>> __weak int rockchip_dnl_key_pressed(void) >>>>> { >>>>> unsigned int val; >>>>> @@ -52,7 +56,8 @@ __weak int rockchip_dnl_key_pressed(void) >>>>> ret = -ENODEV; >>>>> uclass_foreach_dev(dev, uc) { >>>>> if (!strncmp(dev->name, "saradc", 6)) { >>>>> - ret = adc_channel_single_shot(dev->name, 1, &val); >>>>> + ret = adc_channel_single_shot(dev->name, >>>>> + RK_DNL_ADC_CHAN, &val); >>>>> break; >>>>> } >>>>> } >>>>> @@ -73,11 +78,13 @@ __weak int rockchip_dnl_key_pressed(void) >>>>> void rockchip_dnl_mode_check(void) >>>>> { >>>>> +#if CONFIG_IS_ENABLED(ADC) >>>>> if (rockchip_dnl_key_pressed()) { >>>>> printf("download key pressed, entering download mode..."); >>>>> set_back_to_bootrom_dnl_flag(); >>>>> do_reset(NULL, 0, 0, NULL); >>>>> } >>>>> +#endif >>>>> } >>>>> int setup_boot_mode(void) >>>>> @@ -90,6 +97,7 @@ int setup_boot_mode(void) >>>>> boot_mode = readl(reg); >>>>> debug("%s: boot mode 0x%08x\n", __func__, boot_mode); >>>>> +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) >>>>> /* Clear boot mode */ >>>>> writel(BOOT_NORMAL, reg); >>>>> @@ -103,6 +111,7 @@ int setup_boot_mode(void) >>>>> env_set("preboot", "setenv preboot; ums mmc 0"); >>>>> break; >>>>> } >>>>> +#endif >>>>> return 0; >>>>> }

1 0

[PATCH v6 0/7] board: siemens: clean up subfolders
by Enrico Leto 05 Feb '24

05 Feb '24

The common folder was initialially created for the common parts of the products based on draco-am355x board family. We have the product lines 'pxm2', 'rut' and the base line unfortunately named 'draco'! Adding the new capricorn-imx8 board family, the files were enhanced without cleanup. Simplify first EEPROM probe and access that implements both i2c with & without driver model. Use abstraction functions for this. Move all am355x specifics to a new file 'board_am335x'. Clean-up includes, config checks, maintainer. Signed-off-by: Enrico Leto <enrico.leto(a)siemens.com> Enrico Leto (7): siemens: eeprom: clean up definitions siemens: eeprom: simplify setup & read siemens draco: i2c: use driver model for u-boot siemens: board: etamin: remove deprecated nand config siemens: board: clean up products folders vs common siemens: board: clean up includes siemens: factoryset: use correct config for soc specific implementation board/siemens/capricorn/Makefile | 1 + board/siemens/capricorn/board.c | 6 +- .../common/{board.c => board_am335x.c} | 44 +++------- board/siemens/common/board_am335x.h | 39 +++++++++ board/siemens/common/eeprom.c | 52 +++++++++++ board/siemens/common/eeprom.h | 24 +++++ board/siemens/common/factoryset.c | 87 ++++--------------- board/siemens/common/factoryset.h | 2 +- board/siemens/draco/Kconfig | 2 - board/siemens/draco/Makefile | 2 + board/siemens/draco/board.c | 87 ++++--------------- board/siemens/draco/board.h | 31 ++----- board/siemens/draco/mux.c | 6 +- board/siemens/pxm2/MAINTAINERS | 2 +- board/siemens/pxm2/Makefile | 2 + board/siemens/pxm2/board.c | 39 +++------ board/siemens/pxm2/board.h | 21 ----- board/siemens/pxm2/mux.c | 6 +- board/siemens/rut/MAINTAINERS | 2 +- board/siemens/rut/Makefile | 2 + board/siemens/rut/board.c | 38 +++----- board/siemens/rut/board.h | 21 ----- board/siemens/rut/mux.c | 4 +- configs/draco-etamin_defconfig | 4 +- configs/draco-rastaban_defconfig | 4 +- configs/draco-thuban_defconfig | 4 +- include/configs/draco-etamin.h | 3 - include/configs/draco-rastaban.h | 3 - include/configs/draco-thuban.h | 3 - 29 files changed, 216 insertions(+), 325 deletions(-) rename board/siemens/common/{board.c => board_am335x.c} (87%) create mode 100644 board/siemens/common/board_am335x.h create mode 100644 board/siemens/common/eeprom.c create mode 100644 board/siemens/common/eeprom.h delete mode 100644 board/siemens/pxm2/board.h delete mode 100644 board/siemens/rut/board.h -- 2.30.2

2 9

[PATCH 0/5] update venice dts
by Tim Harvey 05 Feb '24

05 Feb '24

This series brings some recent upstream Linux dt updates into U-Boot for the Gateworks Venice family. Tim Harvey (5): arm: dts: imx8mm-venice-gw7901: add digital I/O direction control GPIO's arm: dts: imx8mm-venice-gw7901: add TPM device arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS arm: dts: imx8mm-venice-gw71xx: add TPM device arm: dts: imx8mp-venice-gw71xx: add TPM device .../dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi | 7 ++++ arch/arm/dts/imx8mm-venice-gw71xx.dtsi | 40 +++++++++---------- arch/arm/dts/imx8mm-venice-gw7901-u-boot.dtsi | 14 +++++++ arch/arm/dts/imx8mm-venice-gw7901.dts | 14 ++++++- .../dts/imx8mp-venice-gw71xx-2x-u-boot.dtsi | 9 +++++ arch/arm/dts/imx8mp-venice-gw71xx.dtsi | 10 ++++- 6 files changed, 69 insertions(+), 25 deletions(-) -- 2.25.1

3 8

[GIT PULL] rpi: updates for v2024.04
by Matthias Brugger 05 Feb '24

05 Feb '24

Hi Tom, Here come a small set of patches for v2024.04 for the RaspberryPi. It adds basic support for RPi5 to be able to boot on a SD card. You can find the passing tests here: https://source.denx.de/u-boot/custodians/u-boot-raspberrypi/-/pipelines/195… It's the same commit ID as the tag, although it's not the same test-run. Regards, Matthias --- The following changes since commit 6faba41927bdc8973b59678649ef83c564cc421e: Prepare v2024.04-rc1 (2024-01-29 20:53:19 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-raspberrypi.git tags/rpi-next-2024.04 for you to fetch changes up to 12d479d01849c164020e17c3ae921f974b96372d: configs: rpi_arm64: build position independent code (2024-01-30 17:40:13 +0100) ---------------------------------------------------------------- Add RaspberryPi5 basic support. ---------------------------------------------------------------- Dmitry Malkin (2): rpi5: add initial memory map for bcm2712 rpi5: Use devicetree as alternative way to read IO base addresses Ivan T. Ivanov (5): rpi5: Use devicetree to retrieve board revision bcm2835: Dynamically calculate bytes per pixel parameter mmc: bcmstb: Add support for bcm2712 SD controller configs: rpi_arm64: enable SDHCI BCMSTB driver configs: rpi_arm64: build position independent code arch/arm/mach-bcm283x/include/mach/base.h | 5 +- arch/arm/mach-bcm283x/include/mach/mbox.h | 3 +- arch/arm/mach-bcm283x/include/mach/sdhci.h | 3 +- arch/arm/mach-bcm283x/include/mach/timer.h | 3 +- arch/arm/mach-bcm283x/include/mach/wdog.h | 3 +- arch/arm/mach-bcm283x/init.c | 74 ++++++++++++++++++++++++++---- board/raspberrypi/rpi/rpi.c | 22 +++++++-- configs/rpi_arm64_defconfig | 3 +- drivers/mmc/bcmstb_sdhci.c | 64 ++++++++++++++++++++++++-- drivers/video/bcm2835.c | 18 +++++++- 10 files changed, 171 insertions(+), 27 deletions(-)

3 2

[PATCH] cmd: setexpr: fix no matching string in gsub return empty value
by Massimiliano Minella 05 Feb '24

05 Feb '24

From: Massimiliano Minella <massimiliano.minella(a)se.com> In gsub, when the destination string is empty, the string 't' is provided and the regular expression doesn't match, then the final result is an empty string. Example: => echo ${foo} => setenv foo => setexpr foo gsub e a bar => echo ${foo} => The variable ${foo} should contain "bar" and the lack of match shouldn't be considered an error. This patch fixes the erroneous behavior by removing the return statement and breaking out of the loop in case of lack of match. Also add a test for the no match case. Signed-off-by: Massimiliano Minella <massimiliano.minella(a)se.com> --- cmd/setexpr.c | 6 ++---- test/cmd/setexpr.c | 10 ++++++++++ 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/cmd/setexpr.c b/cmd/setexpr.c index 233471f6cb..6a7c0c914b 100644 --- a/cmd/setexpr.c +++ b/cmd/setexpr.c @@ -216,14 +216,12 @@ int setexpr_regex_sub(char *data, uint data_size, char *nbuf, uint nbuf_size, if (res == 0) { if (loop == 0) { debug("%s: No match\n", data); - return 1; } else { - break; + debug("## MATCH ## %s\n", data); } + break; } - debug("## MATCH ## %s\n", data); - if (!s) return 1; diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c index 312593e1e3..ee329e94b8 100644 --- a/test/cmd/setexpr.c +++ b/test/cmd/setexpr.c @@ -179,6 +179,16 @@ static int setexpr_test_regex(struct unit_test_state *uts) val = env_get("mary"); ut_asserteq_str("this is a test", val); + /* No match */ + ut_assertok(run_command("setenv fred 'this is a test'", 0)); + ut_assertok(run_command("setenv mary ''", 0)); + ut_assertok(run_command("setexpr fred gsub us is \"${fred}\"", 0)); + ut_assertok(run_command("setexpr mary gsub us is \"${fred}\"", 0)); + val = env_get("fred"); + ut_asserteq_str("this is a test", val); + val = env_get("mary"); + ut_asserteq_str("this is a test", val); + unmap_sysmem(buf); return 0; -- 2.43.0

2 1

[PATCH v3] rockchip: spl: Enable caches to speed up checksum validation
by Jonas Karlman 05 Feb '24

05 Feb '24

FIT checksum validation is very slow in SPL due to D-cache not being enabled. Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation, from seconds to milliseconds. This change enables caches in SPL on all Rockchip ARM64 boards, the Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to disable caches for a specific board or SoC if needed. Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> Reviewed-by: Kever Yang <kever.yang(a)rock-chips.com> --- Changes in v3: - Limit to ARM64 SoCs - Fix build with SPL_SYS_ICACHE_OFF or SPL_SYS_DCACHE_OFF enabled - Use cleanup_before_linux() in spl_board_prepare_for_boot() to disable caches before jumping from SPL to next stage - Collect r-b tag Changes in v2: - None This has been tested on multiple RK3328, RK3399, RK356x and RK3588 boards without any issues, vendor U-Boot also enables caches in SPL for all SoCs. This only worked on RK3288 because the default enable_caches() that does not enable caches was being used. Trying to enable caches on my RK3288 froze my boards in mmu_setup(). So v3 limits the enable_caches() call to only include ARM64 SoCs. Link to RFC: https://patchwork.ozlabs.org/patch/1802303/ Link to v2: https://patchwork.ozlabs.org/patch/1889319/ --- arch/arm/mach-rockchip/spl.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 87280e2ba7cc..c4d3983a6735 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -136,6 +136,20 @@ void board_init_f(ulong dummy) } gd->ram_top = gd->ram_base + get_effective_memsize(); gd->ram_top = board_get_usable_ram_top(gd->ram_size); + + if (IS_ENABLED(CONFIG_ARM64) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) { + gd->relocaddr = gd->ram_top; + arch_reserve_mmu(); + enable_caches(); + } #endif preloader_console_init(); } + +void spl_board_prepare_for_boot(void) +{ + if (!IS_ENABLED(CONFIG_ARM64) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) + return; + + cleanup_before_linux(); +} -- 2.43.0

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[PATCH v5 0/6] rockchip: add vendor-wide support for detecting U-Boot proper boot medium
by Quentin Schulz 05 Feb '24

05 Feb '24

It is possible to boot U-Boot proper from a different storage medium than the one used by the BOOTROM to load the SPL. This information is stored in the u-boot,spl-boot-device Device Tree property and is accessible from U-Boot proper so that it has knowledge at runtime where it was loaded from. This is already supported on rk3399 and px30 but with duplicated code, so this patch series also factor out all of this into spl-boot-order of Rockchip platforms. Finally, let's invert the logic used to define the BOOT_DEVICE_ value in a different function so that /chosen/u-boot,spl-boot-device can be transparently added without any further work for existing and future SoCs. While at it, let's do some cleanups for Rockchip platforms. Tested on RK3399 Puma, PX30 Ringneck and (upcoming) RK3588 Jaguar. Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- Changes in v5: - guard blk_find_device use with ifdef check on BLK symbol to fix build issues on some Aarch32 Rockchip platforms, - Link to v4: https://lore.kernel.org/r/20240118-rk3588-spl-boot-dev-v4-0-23a97c82c77c@th… Changes in v4: - use spl_image_fdt_addr() instead of accessing (possibly non-existing) fdt_addr member of spl_image_info to fix build issues on some Aarch32 Rockchip platforms, - add Rbs - Link to v3: https://lore.kernel.org/r/20240117-rk3588-spl-boot-dev-v3-0-72cb989e6da8@th… Changes in v3: - revamp spl_decode_boot_device to not necessitate hardcoded arrays, instead, the info is gotten from the inverted logic from spl_node_to_boot_device where the BOOT_DEVICE_* is set - add Rbs - Link to v2: https://lore.kernel.org/r/20231108-rk3588-spl-boot-dev-v2-0-e67e26202c85@th… Changes in v2: - add factoring into spl-boot-order - rework rk3588 support to use the factored out function - add global data ptr cleanup - remove rk3128 main SoC file (useless content) - Link to v1: https://lore.kernel.org/r/20230502-rk3588-spl-boot-dev-v1-1-071722a85d2d@th… --- Quentin Schulz (6): rockchip: rk3399: simplify logic for getting SPL boot medium DT node rockchip: px30: simplify logic for getting SPL boot medium DT node rockchip: factor out spl_perform_fixups into common spl-boot-order rockchip: find U-boot proper boot device by inverting the logic that sets it rockchip: remove unused global data ptr rockchip: rk3128: remove noop file arch/arm/mach-rockchip/board.c | 3 - arch/arm/mach-rockchip/px30/px30.c | 49 -------------- arch/arm/mach-rockchip/rk3128/Makefile | 1 - arch/arm/mach-rockchip/rk3128/rk3128.c | 16 ----- arch/arm/mach-rockchip/rk3308/rk3308.c | 3 - arch/arm/mach-rockchip/rk3328/rk3328.c | 3 - arch/arm/mach-rockchip/rk3368/rk3368.c | 3 - arch/arm/mach-rockchip/rk3399/rk3399.c | 51 --------------- arch/arm/mach-rockchip/rk3588/rk3588.c | 2 - arch/arm/mach-rockchip/spl-boot-order.c | 111 ++++++++++++++++++++++++++++++++ 10 files changed, 111 insertions(+), 131 deletions(-) --- base-commit: 106332d6cc583c4339e07020989d09b567900a59 change-id: 20230502-rk3588-spl-boot-dev-efa2777cc21b Best regards, -- Quentin Schulz <quentin.schulz(a)theobroma-systems.com>

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[PATCH 0/3] usb: dwv3: add glue driver for hi3798mv200
by Yang Xiwen via B4 Relay 05 Feb '24

05 Feb '24

Also edit the prototype of .glue_configure to fulfill our needs. Signed-off-by: Yang Xiwen <forbidden405(a)outlook.com> --- Yang Xiwen (3): usb: dwc3: handle return value of clk_get_rate() correctly usb: dwc3: replace argument mode with child ofnode usb: dwc3: add glue driver for Hi3798MV200 drivers/usb/dwc3/core.c | 2 +- drivers/usb/dwc3/dwc3-generic.c | 52 ++++++++++++++++++++++++++++++++++------- drivers/usb/dwc3/dwc3-generic.h | 3 +-- 3 files changed, 46 insertions(+), 11 deletions(-) --- base-commit: 050a9b981d6a835133521b599be3ae189ce70f41 change-id: 20240203-hisi-dwc3-3c47f734cd20 Best regards, -- Yang Xiwen <forbidden405(a)outlook.com>

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