December 2024 - U-Boot

[PATCH 0/5] board: sl28: various fixes
by Michael Walle 15 Dec '24

15 Dec '24

Give the sl28 board some love and fix various issues. Most of them were due to the transition to the upstream device trees. Michael Walle (5): board: sl28: fix linking with disabled watchdog board: sl28: increase SPL_SYS_MALLOC_SIZE board: sl28: fix network on variant 3 doc: board: sl28: fix table board: sl28: fix USB0 arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 4 ++++ board/kontron/sl28/sl28.c | 3 ++- board/kontron/sl28/spl.c | 3 ++- configs/kontron_sl28_defconfig | 3 ++- doc/board/kontron/sl28.rst | 14 ++++++++------ 5 files changed, 18 insertions(+), 9 deletions(-) -- 2.39.5

3 10

[PATCH] configs: ls1028a: Fix bootefi issue on Layerscape ls1028ardb platform
by Wei Ming Chen 15 Dec '24

15 Dec '24

Without this patch, there will be error indicating that "Cannot use 64 bit addresses with SDMA", and the booting process will stuck. please see full boot log below U-Boot 2022.04-g18185931 (Sep 11 2024 - 13:15:30 +0800) SoC: LS1028AE Rev1.0 (0x870b0010) Clock Configuration: CPU0(A72):1500 MHz CPU1(A72):1500 MHz Bus: 400 MHz DDR: 1600 MT/s Reset Configuration Word (RCW): 00000000: 3c004010 00000030 00000000 00000000 00000010: 00000000 018f0000 0030c000 00000000 00000020: 020031a0 00002580 00000000 00003296 00000030: 00000000 00000010 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 200e705a 00000000 00000070: bb580000 00000000 Model: LS1028A RDB Board Board: LS1028AE Rev1.0-RDB, Version: C, boot from SD FPGA: v8 (RDB) SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz DRAM: 3.9 GiB DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on) Using SERDES1 Protocol: 47960 (0xbb58) PCIe1: pcie@3400000 Root Complex: no link PCIe2: pcie@3500000 Root Complex: x1 gen2 Core: 45 devices, 22 uclasses, devicetree: separate WDT: Started watchdog@c000000 with servicing (60s timeout) WDT: Started watchdog@c010000 with servicing (60s timeout) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment EEPROM: Invalid ID (ff ff ff ff) In: serial Out: serial Err: serial SEC0: RNG instantiated Net: Warning: enetc-0 (eth0) using random MAC address - d2:9b:a5:37:7b:b5 eth0: enetc-0 Warning: enetc-2 (eth1) using random MAC address - ca:57:11:de:de:cb , eth1: enetc-2, eth2: swp0, eth3: swp1, eth4: swp2, eth5: swp3 Hit any key to stop autoboot: 0 Trying load HDP firmware from SD.. switch to partitions #0, OK mmc0 is current device Device: FSL_SDHC Manufacturer ID: 9f OEM: 5449 Name: SD32G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 28.9 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes MMC read: dev # 0, block # 18944, count 512 ... 512 blocks read: OK Loading hdp firmware from 0x00000000a0000000 offset 0x0000000000002000 Loading hdp firmware Complete switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... ** Unable to read file / ** Failed to load '/' libfdt fdt_check_header(): FDT_ERR_BADMAGIC Scanning disk mmc(a)2140000.blk... Scanning disk mmc(a)2150000.blk... Found 7 disks ERROR: invalid device tree Found EFI removable media binary efi/boot/bootaa64.efi 981992 bytes read in 44 ms (21.3 MiB/s) libfdt fdt_check_header(): FDT_ERR_BADMAGIC WARNING could not find node vivante,gc: FDT_ERR_NOTFOUND. Booting /efi\boot\bootaa64.efi Cannot use 64 bit addresses with SDMA Error reading cluster ** Unable to read file /efi/boot/grubaa64.efi ** Unexpected return from initial read: Device Error, buffersize 29D790 Failed to load image ぀￢ : Device Error start_image() returned Device Error EFI LOAD FAILED: continuing... switch to partitions #0, OK mmc1(part 0) is current device Scanning mmc 1:1... ** Unable to read file / ** Failed to load '/' libfdt fdt_check_header(): FDT_ERR_BADMAGIC BootOrder not defined EFI boot manager: Cannot load any image Scanning mmc 1:2... ** Unable to read file / ** Failed to load '/' libfdt fdt_check_header(): FDT_ERR_BADMAGIC BootOrder not defined EFI boot manager: Cannot load any image starting USB... Bus usb@3100000: Register 200017f NbrPorts 2 Starting the controller USB XHCI 1.00 Bus usb@3110000: Register 200017f NbrPorts 2 Starting the controller USB XHCI 1.00 scanning bus usb@3100000 for devices... 1 USB Device(s) found scanning bus usb@3110000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Device 0: unknown device Trying load from SD ... switch to partitions #0, OK mmc0 is current device Device: FSL_SDHC Manufacturer ID: 9f OEM: 5449 Name: SD32G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 28.9 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes MMC read: dev # 0, block # 32768, count 81920 ... 81920 blocks read: OK Wrong Image Format for bootm command ERROR: can't get kernel image! Signed-off-by: Wei Ming Chen <jj251510319013(a)gmail.com> --- configs/ls1028ardb_tfa_defconfig | 1 + include/configs/ls1028ardb.h | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 17230d0d97..90f22ea3ba 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -101,3 +101,4 @@ CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y CONFIG_WDT=y CONFIG_WDT_SP805=y +CONFIG_FSL_ESDHC_SUPPORT_ADMA2=y diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index d44ce45fd6..9c869ee684 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -53,6 +53,7 @@ #define CFG_EXTRA_ENV_SETTINGS \ "board=ls1028ardb\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ + "fdtfile=fsl-ls1028a-rdb.dtb\0" \ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ "bootm_size=0x10000000\0" \ -- 2.34.1

2 1

[PATCH] board: freescale: Replace invalid usage of sprintf by strcat
by Francois Berder 15 Dec '24

15 Dec '24

buf was used as destination and as parameter to sprintf which triggers an undefined behaviour. This commit removes this usage of sprintf and uses strcat to append strings to buf variable. Signed-off-by: Francois Berder <fberder(a)outlook.fr> --- board/freescale/t208xqds/eth_t208xqds.c | 40 ++++++++++++------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c index 9f299227e2..b55078c8fe 100644 --- a/board/freescale/t208xqds/eth_t208xqds.c +++ b/board/freescale/t208xqds/eth_t208xqds.c @@ -210,8 +210,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_1gkx1"); fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio1"); - sprintf(buf, "%s%s%s", buf, "lane-c,", - (char *)lane_mode[0]); + strcat(buf, "lane-c,"); + strcat(buf, (char *)lane_mode[0]); out_be32(&srds_regs->srdspccr1, srds1_pccr1 | PCCR1_SGMIIH_KX_MASK); break; @@ -222,8 +222,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_1gkx2"); fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio2"); - sprintf(buf, "%s%s%s", buf, "lane-d,", - (char *)lane_mode[0]); + strcat(buf, "lane-d,"); + strcat(buf, (char *)lane_mode[0]); out_be32(&srds_regs->srdspccr1, srds1_pccr1 | PCCR1_SGMIIG_KX_MASK); break; @@ -234,8 +234,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_1gkx9"); fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio9"); - sprintf(buf, "%s%s%s", buf, "lane-a,", - (char *)lane_mode[0]); + strcat(buf, "lane-a,"); + strcat(buf, (char *)lane_mode[0]); out_be32(&srds_regs->srdspccr1, srds1_pccr1 | PCCR1_SGMIIE_KX_MASK); break; @@ -247,8 +247,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, "phy_1gkx10"); fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio10"); - sprintf(buf, "%s%s%s", buf, "lane-b,", - (char *)lane_mode[0]); + strcat(buf, "lane-b,"); + strcat(buf, (char *)lane_mode[0]); out_be32(&srds_regs->srdspccr1, srds1_pccr1 | PCCR1_SGMIIF_KX_MASK); break; @@ -269,8 +269,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_1gkx5"); fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio5"); - sprintf(buf, "%s%s%s", buf, "lane-g,", - (char *)lane_mode[0]); + strcat(buf, "lane-g,"); + strcat(buf, (char *)lane_mode[0]); out_be32(&srds_regs->srdspccr1, srds1_pccr1 | PCCR1_SGMIIC_KX_MASK); break; @@ -281,8 +281,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_1gkx6"); fdt_status_okay_by_alias(fdt, "1gkx_pcs_mdio6"); - sprintf(buf, "%s%s%s", buf, "lane-h,", - (char *)lane_mode[0]); + strcat(buf, "lane-h,"); + strcat(buf, (char *)lane_mode[0]); out_be32(&srds_regs->srdspccr1, srds1_pccr1 | PCCR1_SGMIID_KX_MASK); break; @@ -328,8 +328,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_xfi9"); fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio9"); - sprintf(buf, "%s%s%s", buf, "lane-a,", - (char *)lane_mode[1]); + strcat(buf, "lane-a,"); + strcat(buf, (char *)lane_mode[1]); } break; case FM1_10GEC2: @@ -339,8 +339,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_xfi10"); fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio10"); - sprintf(buf, "%s%s%s", buf, "lane-b,", - (char *)lane_mode[1]); + strcat(buf, "lane-b,"); + strcat(buf, (char *)lane_mode[1]); } break; case FM1_10GEC3: @@ -350,8 +350,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_xfi1"); fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio1"); - sprintf(buf, "%s%s%s", buf, "lane-c,", - (char *)lane_mode[1]); + strcat(buf, "lane-c,"); + strcat(buf, (char *)lane_mode[1]); } break; case FM1_10GEC4: @@ -361,8 +361,8 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, fdt_set_phy_handle(fdt, compat, addr, "phy_xfi2"); fdt_status_okay_by_alias(fdt, "xfi_pcs_mdio2"); - sprintf(buf, "%s%s%s", buf, "lane-d,", - (char *)lane_mode[1]); + strcat(buf, "lane-d,"); + strcat(buf, (char *)lane_mode[1]); } break; default: -- 2.34.1

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[PATCH] pinctrl: renesas: Convert to IS_ENABLED() macro
by Marek Vasut 14 Dec '24

14 Dec '24

Use the IS_ENABLED() macro to reduce amount of #ifdef use in the driver and improve code coverage. With IS_ENABLED() macro, the code is compiled and then optimized out, which prevents bitrot. In case no PFC table matches the SoC in use, do not probe the driver and instead exit with -ENODEV. This should never happen under normal conditions, because this would mean the driver DT compatible string match happened, but the list in probe() cannot match the model listed in match data associated with the compatible string on which the match did happen. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Hai Pham <hai.pham.ud(a)renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)lists.denx.de --- drivers/pinctrl/renesas/pfc.c | 128 ++++++++++++---------------------- 1 file changed, 44 insertions(+), 84 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c index 2f6c3b3d1c7..db6be39a528 100644 --- a/drivers/pinctrl/renesas/pfc.c +++ b/drivers/pinctrl/renesas/pfc.c @@ -961,90 +961,50 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev) if (!priv->pfc.regs) return -ENOMEM; -#ifdef CONFIG_PINCTRL_PFC_R8A7790 - if (model == SH_PFC_R8A7790) + if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7790) && model == SH_PFC_R8A7790) priv->pfc.info = &r8a7790_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A7791 - if (model == SH_PFC_R8A7791) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7791) && model == SH_PFC_R8A7791) priv->pfc.info = &r8a7791_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A7792 - if (model == SH_PFC_R8A7792) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7792) && model == SH_PFC_R8A7792) priv->pfc.info = &r8a7792_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A7793 - if (model == SH_PFC_R8A7793) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7793) && model == SH_PFC_R8A7793) priv->pfc.info = &r8a7793_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A7794 - if (model == SH_PFC_R8A7794) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7794) && model == SH_PFC_R8A7794) priv->pfc.info = &r8a7794_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77951 - if (model == SH_PFC_R8A7795) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77951) && model == SH_PFC_R8A7795) priv->pfc.info = &r8a77951_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77960 - if (model == SH_PFC_R8A77960) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77960) && model == SH_PFC_R8A77960) priv->pfc.info = &r8a77960_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77961 - if (model == SH_PFC_R8A77961) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77961) && model == SH_PFC_R8A77961) priv->pfc.info = &r8a77961_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A774A1 - if (model == SH_PFC_R8A774A1) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774A1) && model == SH_PFC_R8A774A1) priv->pfc.info = &r8a774a1_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A774B1 - if (model == SH_PFC_R8A774B1) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774B1) && model == SH_PFC_R8A774B1) priv->pfc.info = &r8a774b1_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A774C0 - if (model == SH_PFC_R8A774C0) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774C0) && model == SH_PFC_R8A774C0) priv->pfc.info = &r8a774c0_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A774E1 - if (model == SH_PFC_R8A774E1) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774E1) && model == SH_PFC_R8A774E1) priv->pfc.info = &r8a774e1_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77965 - if (model == SH_PFC_R8A77965) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77965) && model == SH_PFC_R8A77965) priv->pfc.info = &r8a77965_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77970 - if (model == SH_PFC_R8A77970) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77970) && model == SH_PFC_R8A77970) priv->pfc.info = &r8a77970_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77980 - if (model == SH_PFC_R8A77980) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77980) && model == SH_PFC_R8A77980) priv->pfc.info = &r8a77980_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77990 - if (model == SH_PFC_R8A77990) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77990) && model == SH_PFC_R8A77990) priv->pfc.info = &r8a77990_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A77995 - if (model == SH_PFC_R8A77995) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77995) && model == SH_PFC_R8A77995) priv->pfc.info = &r8a77995_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A779A0 - if (model == SH_PFC_R8A779A0) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779A0) && model == SH_PFC_R8A779A0) priv->pfc.info = &r8a779a0_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A779F0 - if (model == SH_PFC_R8A779F0) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779F0) && model == SH_PFC_R8A779F0) priv->pfc.info = &r8a779f0_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A779G0 - if (model == SH_PFC_R8A779G0) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779G0) && model == SH_PFC_R8A779G0) priv->pfc.info = &r8a779g0_pinmux_info; -#endif -#ifdef CONFIG_PINCTRL_PFC_R8A779H0 - if (model == SH_PFC_R8A779H0) + else if (IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779H0) && model == SH_PFC_R8A779H0) priv->pfc.info = &r8a779h0_pinmux_info; -#endif + else + return -ENODEV; priv->pmx.pfc = &priv->pfc; sh_pfc_init_ranges(&priv->pfc); @@ -1054,127 +1014,127 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev) } static const struct udevice_id sh_pfc_pinctrl_ids[] = { -#ifdef CONFIG_PINCTRL_PFC_R8A7790 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7790) { .compatible = "renesas,pfc-r8a7790", .data = SH_PFC_R8A7790, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A7791 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7791) { .compatible = "renesas,pfc-r8a7791", .data = SH_PFC_R8A7791, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A7792 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7792) { .compatible = "renesas,pfc-r8a7792", .data = SH_PFC_R8A7792, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A7793 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7793) { .compatible = "renesas,pfc-r8a7793", .data = SH_PFC_R8A7793, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A7794 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A7794) { .compatible = "renesas,pfc-r8a7794", .data = SH_PFC_R8A7794, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77951 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77951) { .compatible = "renesas,pfc-r8a7795", .data = SH_PFC_R8A7795, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77960 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77960) { .compatible = "renesas,pfc-r8a7796", .data = SH_PFC_R8A77960, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77961 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77961) { .compatible = "renesas,pfc-r8a77961", .data = SH_PFC_R8A77961, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A774A1 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774A1) { .compatible = "renesas,pfc-r8a774a1", .data = SH_PFC_R8A774A1, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A774B1 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774B1) { .compatible = "renesas,pfc-r8a774b1", .data = SH_PFC_R8A774B1, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A774C0 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774C0) { .compatible = "renesas,pfc-r8a774c0", .data = SH_PFC_R8A774C0, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A774E1 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A774E1) { .compatible = "renesas,pfc-r8a774e1", .data = SH_PFC_R8A774E1, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77965 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77965) { .compatible = "renesas,pfc-r8a77965", .data = SH_PFC_R8A77965, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77970 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77970) { .compatible = "renesas,pfc-r8a77970", .data = SH_PFC_R8A77970, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77980 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77980) { .compatible = "renesas,pfc-r8a77980", .data = SH_PFC_R8A77980, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77990 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77990) { .compatible = "renesas,pfc-r8a77990", .data = SH_PFC_R8A77990, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A77995 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A77995) { .compatible = "renesas,pfc-r8a77995", .data = SH_PFC_R8A77995, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A779A0 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779A0) { .compatible = "renesas,pfc-r8a779a0", .data = SH_PFC_R8A779A0, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A779F0 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779F0) { .compatible = "renesas,pfc-r8a779f0", .data = SH_PFC_R8A779F0, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A779G0 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779G0) { .compatible = "renesas,pfc-r8a779g0", .data = SH_PFC_R8A779G0, }, #endif -#ifdef CONFIG_PINCTRL_PFC_R8A779H0 +#if IS_ENABLED(CONFIG_PINCTRL_PFC_R8A779H0) { .compatible = "renesas,pfc-r8a779h0", .data = SH_PFC_R8A779H0, -- 2.45.2

1 0

[PATCH] arm64: dts: renesas: Deduplicate extalr_clk bootph-all
by Marek Vasut 14 Dec '24

14 Dec '24

Most R-Car Gen3 and Gen4 systems require extalr_clk very early in the boot process. Currently the extalr_clk { bootph-all } DT property to indicate this clock should be available early is set in each SoC U-Boot DT extras file. Deduplicate this assignment to new common r8a779x-rcar64-u-boot.dtsi file. Note that R-Car Gen3 R8A77990 E3 and R8A77995 D3 do not require extalr_clk early, therefore these SoCs still include plain r8a779x-u-boot.dtsi in their U-Boot DT extras . Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Chris Paterson <chris.paterson2(a)renesas.com> Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj(a)bp.renesas.com> Cc: Marek Vasut <marek.vasut+renesas(a)mailbox.org> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)lists.denx.de --- arch/arm/dts/r8a774a1-u-boot.dtsi | 6 +----- arch/arm/dts/r8a774b1-u-boot.dtsi | 6 +----- arch/arm/dts/r8a774c0-u-boot.dtsi | 2 +- arch/arm/dts/r8a774e1-u-boot.dtsi | 6 +----- arch/arm/dts/r8a77951-u-boot.dtsi | 6 +----- arch/arm/dts/r8a77960-u-boot.dtsi | 6 +----- arch/arm/dts/r8a77965-u-boot.dtsi | 6 +----- arch/arm/dts/r8a77970-u-boot.dtsi | 6 +----- arch/arm/dts/r8a77980-u-boot.dtsi | 6 +----- arch/arm/dts/r8a779a0-u-boot.dtsi | 6 +----- arch/arm/dts/r8a779f0-u-boot.dtsi | 6 +----- arch/arm/dts/r8a779g0-u-boot.dtsi | 6 +----- arch/arm/dts/r8a779x-rcar64-u-boot.dtsi | 12 ++++++++++++ 13 files changed, 24 insertions(+), 56 deletions(-) create mode 100644 arch/arm/dts/r8a779x-rcar64-u-boot.dtsi diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi index 3530eeb2718..bd91a963cd6 100644 --- a/arch/arm/dts/r8a774a1-u-boot.dtsi +++ b/arch/arm/dts/r8a774a1-u-boot.dtsi @@ -5,8 +5,4 @@ * Copyright (C) 2021 Renesas Electronics Corporation */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi b/arch/arm/dts/r8a774b1-u-boot.dtsi index 07aeabc46b4..38a82f065c0 100644 --- a/arch/arm/dts/r8a774b1-u-boot.dtsi +++ b/arch/arm/dts/r8a774b1-u-boot.dtsi @@ -5,8 +5,4 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" diff --git a/arch/arm/dts/r8a774c0-u-boot.dtsi b/arch/arm/dts/r8a774c0-u-boot.dtsi index 4572c22f6c1..91d14536e48 100644 --- a/arch/arm/dts/r8a774c0-u-boot.dtsi +++ b/arch/arm/dts/r8a774c0-u-boot.dtsi @@ -6,7 +6,7 @@ * */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi b/arch/arm/dts/r8a774e1-u-boot.dtsi index 2202731ccb3..f314b2b0cf8 100644 --- a/arch/arm/dts/r8a774e1-u-boot.dtsi +++ b/arch/arm/dts/r8a774e1-u-boot.dtsi @@ -5,8 +5,4 @@ * Copyright (C) 2020 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77951-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi index 4cbec591479..54eb331ec39 100644 --- a/arch/arm/dts/r8a77951-u-boot.dtsi +++ b/arch/arm/dts/r8a77951-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut(a)gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi index 15a91474324..c712837500e 100644 --- a/arch/arm/dts/r8a77960-u-boot.dtsi +++ b/arch/arm/dts/r8a77960-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut(a)gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index 54107d1ae35..4a6ded386f8 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut(a)gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi index d252c2e8e6c..160e1c983cb 100644 --- a/arch/arm/dts/r8a77970-u-boot.dtsi +++ b/arch/arm/dts/r8a77970-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut(a)gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi index 9f7bf499bc0..afb226403a0 100644 --- a/arch/arm/dts/r8a77980-u-boot.dtsi +++ b/arch/arm/dts/r8a77980-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2019 Marek Vasut <marek.vasut(a)gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a779a0-u-boot.dtsi b/arch/arm/dts/r8a779a0-u-boot.dtsi index 2b6d6ef05dc..f506a666518 100644 --- a/arch/arm/dts/r8a779a0-u-boot.dtsi +++ b/arch/arm/dts/r8a779a0-u-boot.dtsi @@ -5,7 +5,7 @@ * Copyright (C) 2020 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { @@ -19,7 +19,3 @@ }; }; }; - -&extalr_clk { - bootph-all; -}; diff --git a/arch/arm/dts/r8a779f0-u-boot.dtsi b/arch/arm/dts/r8a779f0-u-boot.dtsi index 0f98c09fc52..08d32fef2b9 100644 --- a/arch/arm/dts/r8a779f0-u-boot.dtsi +++ b/arch/arm/dts/r8a779f0-u-boot.dtsi @@ -5,7 +5,7 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { @@ -22,7 +22,3 @@ }; }; }; - -&extalr_clk { - bootph-all; -}; diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index f60eba531e4..4fc196e97b5 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -5,13 +5,9 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" &rpc { bank-width = <2>; num-cs = <1>; }; - -&extalr_clk { - bootph-all; -}; diff --git a/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi b/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi new file mode 100644 index 00000000000..b59cc7deca7 --- /dev/null +++ b/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot on R-Car 64bit SoC + * + * Copyright (C) 2024 Marek Vasut <marek.vasut+renesas(a)mailbox.org> + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + bootph-all; +}; -- 2.45.2

1 0

[PATCH] arm64: dts: renesas: Drop OF_UPSTREAM conversion remnant
by Marek Vasut 14 Dec '24

14 Dec '24

This DTC_FLAGS assignment is no longer necessary as all R-Car Gen2/Gen3/Gen4 platforms have been converted to OF_UPSTREAM and matching DTC_FLAGS assignment is present in dts/upstream/src/arm64/Makefile . Drop the remnant. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Paul Barker <paul.barker.ct(a)bp.renesas.com> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)lists.denx.de --- arch/arm/dts/Makefile | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 99d775fd382..3763e34dea3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -978,10 +978,6 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \ imxrt1020-evk.dtb \ imxrt1170-evk.dtb \ -ifdef CONFIG_RCAR_64 -DTC_FLAGS += -R 4 -p 0x1000 -endif - dtb-$(CONFIG_RZA1) += \ r7s72100-gr-peach.dtb -- 2.45.2

1 0

[PATCH] doc: cosmetic: fwu_updates: Fix formatting
by Leonard Anderweit 14 Dec '24

14 Dec '24

Remove one of the double colon so ..code-block is used for formatting. Signed-off-by: Leonard Anderweit <l.anderweit(a)phytec.de> --- doc/develop/uefi/fwu_updates.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst index 51e8a28efe15..847135814590 100644 --- a/doc/develop/uefi/fwu_updates.rst +++ b/doc/develop/uefi/fwu_updates.rst @@ -170,7 +170,7 @@ build the tool, enable:: CONFIG_TOOLS_MKEFICAPSULE=y -Run the following commands to generate the accept/revert capsules:: +Run the following commands to generate the accept/revert capsules: .. code-block:: bash @@ -180,7 +180,7 @@ Run the following commands to generate the accept/revert capsules:: <capsule_file_name> Some examples of using the mkeficapsule tool for generation of the -empty capsule would be:: +empty capsule would be: .. code-block:: bash -- 2.34.1

3 2

[PATCH v3] toradex: tdx-cfg-block: rework modules pid4 handling
by Vitor Soares 14 Dec '24

14 Dec '24

From: Vitor Soares <vitor.soares(a)toradex.com> The module pid4 currently corresponds to the index of the toradex_module array. If a new pid4 is introduced that does not follow the sequence of the previous entries, it will create a gap in the array. To address this, embed pid4 within the toradex_som structure and implement a function to retrieve the index corresponding to pid4. Signed-off-by: Vitor Soares <vitor.soares(a)toradex.com> --- v2->v3: - Don't create variables inside the switch case block, this is not valid. v1->v2: - Fix incorrect PID4 print when creating config block in interactive mode. board/toradex/common/tdx-cfg-block.c | 207 ++++++++++++++------------- board/toradex/common/tdx-cfg-block.h | 2 + board/toradex/common/tdx-common.c | 5 +- 3 files changed, 117 insertions(+), 97 deletions(-) diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c index a6e3c6afae80..0fb49fcdfbf6 100644 --- a/board/toradex/common/tdx-cfg-block.c +++ b/board/toradex/common/tdx-cfg-block.c @@ -70,97 +70,95 @@ struct toradex_hw tdx_car_hw_tag; #define TARGET_IS_ENABLED(x) IS_ENABLED(CONFIG_TARGET_ ## x) const struct toradex_som toradex_modules[] = { - [0] = { "UNKNOWN MODULE", 0 }, - [1] = { "Colibri PXA270 312MHz", 0 }, - [2] = { "Colibri PXA270 520MHz", 0 }, - [3] = { "Colibri PXA320 806MHz", 0 }, - [4] = { "Colibri PXA300 208MHz", 0 }, - [5] = { "Colibri PXA310 624MHz", 0 }, - [6] = { "Colibri PXA320IT 806MHz", 0 }, - [7] = { "Colibri PXA300 208MHz XT", 0 }, - [8] = { "Colibri PXA270 312MHz", 0 }, - [9] = { "Colibri PXA270 520MHz", 0 }, - [10] = { "Colibri VF50 128MB", TARGET_IS_ENABLED(COLIBRI_VF) }, - [11] = { "Colibri VF61 256MB", TARGET_IS_ENABLED(COLIBRI_VF) }, - [12] = { "Colibri VF61 256MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, - [13] = { "Colibri VF50 128MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, - [14] = { "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [15] = { "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [16] = { "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [17] = { "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [18] = { "UNKNOWN MODULE", 0 }, - [19] = { "UNKNOWN MODULE", 0 }, - [20] = { "Colibri T20 256MB", TARGET_IS_ENABLED(COLIBRI_T20) }, - [21] = { "Colibri T20 512MB", TARGET_IS_ENABLED(COLIBRI_T20) }, - [22] = { "Colibri T20 512MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, - [23] = { "Colibri T30 1GB", TARGET_IS_ENABLED(COLIBRI_T30) }, - [24] = { "Colibri T20 256MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, - [25] = { "Apalis T30 2GB", TARGET_IS_ENABLED(APALIS_T30) }, - [26] = { "Apalis T30 1GB", TARGET_IS_ENABLED(APALIS_T30) }, - [27] = { "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, - [28] = { "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, - [29] = { "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, - [30] = { "Colibri T30 1GB IT", TARGET_IS_ENABLED(COLIBRI_T30) }, - [31] = { "Apalis T30 1GB IT", TARGET_IS_ENABLED(APALIS_T30) }, - [32] = { "Colibri iMX7S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, - [33] = { "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, - [34] = { "Apalis TK1 2GB", TARGET_IS_ENABLED(APALIS_TK1) }, - [35] = { "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, - [36] = { "Colibri iMX6ULL 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, - [37] = { "Apalis iMX8QM 4GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, - [38] = { "Colibri iMX8QXP 2GB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, - [39] = { "Colibri iMX7D 1GB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, - [40] = { "Colibri iMX6ULL 512MB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, - [41] = { "Colibri iMX7D 512MB EPDC", TARGET_IS_ENABLED(COLIBRI_IMX7) }, - [42] = { "Apalis TK1 4GB", TARGET_IS_ENABLED(APALIS_TK1) }, - [43] = { "Colibri T20 512MB IT SETEK", TARGET_IS_ENABLED(COLIBRI_T20) }, - [44] = { "Colibri iMX6ULL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, - [45] = { "Colibri iMX6ULL 512MB WB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, - [46] = { "Apalis iMX8QXP 2GB WB IT", 0 }, - [47] = { "Apalis iMX8QM 4GB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, - [48] = { "Apalis iMX8QP 2GB WB", TARGET_IS_ENABLED(APALIS_IMX8) }, - [49] = { "Apalis iMX8QP 2GB", TARGET_IS_ENABLED(APALIS_IMX8) }, - [50] = { "Colibri iMX8QXP 2GB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, - [51] = { "Colibri iMX8DX 1GB WB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, - [52] = { "Colibri iMX8DX 1GB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, - [53] = { "Apalis iMX8QXP 2GB ECC IT", 0 }, - [54] = { "Apalis iMX8DXP 1GB", TARGET_IS_ENABLED(APALIS_IMX8) }, - [55] = { "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [56] = { "Verdin iMX8M Nano Quad 1GB WB", 0 }, - [57] = { "Verdin iMX8M Mini DualLite 1GB", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [58] = { "Verdin iMX8M Plus Quad 4GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [59] = { "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [60] = { "Verdin iMX8M Mini DualLite 1GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [61] = { "Verdin iMX8M Plus Quad 2GB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [62] = { "Colibri iMX6ULL 1GB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, - [63] = { "Verdin iMX8M Plus Quad 4GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [64] = { "Verdin iMX8M Plus Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [65] = { "Verdin iMX8M Plus QuadLite 1GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [66] = { "Verdin iMX8M Plus Quad 8GB WB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [67] = { "Apalis iMX8QM 8GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, - [68] = { "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [69] = { "Verdin AM62 Quad 1GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [70] = { "Verdin iMX8M Plus Quad 8GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, - [71] = { "Verdin AM62 Solo 512MB", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [72] = { "Verdin AM62 Solo 512MB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [73] = { "Verdin AM62 Dual 1GB ET", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [74] = { "Verdin AM62 Dual 1GB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [75] = { "Verdin AM62 Dual 1GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [76] = { "Verdin AM62 Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, - [77] = { "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [78] = { "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [79] = { "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [80] = { "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, - [81] = { "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, - [82] = { "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, - [83] = { "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, - [84] = { "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, - [85] = { "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, - [86] = { "Verdin iMX8M Mini DualLite 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [87] = { "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, - [88] = { "Aquila AM69 Octa 32GB WB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) }, - [89] = { "Verdin iMX95 Hexa 16GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX95) }, - [90] = { "Verdin iMX8M Mini Quad 4GB WB ET", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { 0, "UNKNOWN MODULE", 0 }, + { COLIBRI_PXA270_V1_312MHZ, "Colibri PXA270 312MHz", 0 }, + { COLIBRI_PXA270_V1_520MHZ, "Colibri PXA270 520MHz", 0 }, + { COLIBRI_PXA320, "Colibri PXA320 806MHz", 0 }, + { COLIBRI_PXA300, "Colibri PXA300 208MHz", 0 }, + { COLIBRI_PXA310, "Colibri PXA310 624MHz", 0 }, + { COLIBRI_PXA320_IT, "Colibri PXA320IT 806MHz", 0 }, + { COLIBRI_PXA300_XT, "Colibri PXA300 208MHz XT", 0 }, + { COLIBRI_PXA270_312MHZ, "Colibri PXA270 312MHz", 0 }, + { COLIBRI_PXA270_520MHZ, "Colibri PXA270 520MHz", 0 }, + { COLIBRI_VF50, "Colibri VF50 128MB", TARGET_IS_ENABLED(COLIBRI_VF) }, + { COLIBRI_VF61, "Colibri VF61 256MB", TARGET_IS_ENABLED(COLIBRI_VF) }, + { COLIBRI_VF61_IT, "Colibri VF61 256MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, + { COLIBRI_VF50_IT, "Colibri VF50 128MB IT", TARGET_IS_ENABLED(COLIBRI_VF) }, + { COLIBRI_IMX6S, "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX6DL, "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX6S_IT, "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX6DL_IT, "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_T20_256MB, "Colibri T20 256MB", TARGET_IS_ENABLED(COLIBRI_T20) }, + { COLIBRI_T20_512MB, "Colibri T20 512MB", TARGET_IS_ENABLED(COLIBRI_T20) }, + { COLIBRI_T20_512MB_IT, "Colibri T20 512MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, + { COLIBRI_T30, "Colibri T30 1GB", TARGET_IS_ENABLED(COLIBRI_T30) }, + { COLIBRI_T20_256MB_IT, "Colibri T20 256MB IT", TARGET_IS_ENABLED(COLIBRI_T20) }, + { APALIS_T30_2GB, "Apalis T30 2GB", TARGET_IS_ENABLED(APALIS_T30) }, + { APALIS_T30_1GB, "Apalis T30 1GB", TARGET_IS_ENABLED(APALIS_T30) }, + { APALIS_IMX6Q, "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, + { APALIS_IMX6Q_IT, "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, + { APALIS_IMX6D, "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, + { COLIBRI_T30_IT, "Colibri T30 1GB IT", TARGET_IS_ENABLED(COLIBRI_T30) }, + { APALIS_T30_IT, "Apalis T30 1GB IT", TARGET_IS_ENABLED(APALIS_T30) }, + { COLIBRI_IMX7S, "Colibri iMX7S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + { COLIBRI_IMX7D, "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + { APALIS_TK1_2GB, "Apalis TK1 2GB", TARGET_IS_ENABLED(APALIS_TK1) }, + { APALIS_IMX6D_IT, "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, + { COLIBRI_IMX6ULL, "Colibri iMX6ULL 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + { APALIS_IMX8QM_WIFI_BT_IT, "Apalis iMX8QM 4GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, + { COLIBRI_IMX8QXP_WIFI_BT_IT, "Colibri iMX8QXP 2GB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + { COLIBRI_IMX7D_EMMC, "Colibri iMX7D 1GB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + { COLIBRI_IMX6ULL_WIFI_BT_IT, "Colibri iMX6ULL 512MB WB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + { COLIBRI_IMX7D_EPDC, "Colibri iMX7D 512MB EPDC", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + { APALIS_TK1_4GB, "Apalis TK1 4GB", TARGET_IS_ENABLED(APALIS_TK1) }, + { COLIBRI_T20_512MB_IT_SETEK, "Colibri T20 512MB IT SETEK", TARGET_IS_ENABLED(COLIBRI_T20) }, + { COLIBRI_IMX6ULL_IT, "Colibri iMX6ULL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + { COLIBRI_IMX6ULL_WIFI_BT, "Colibri iMX6ULL 512MB WB", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + { APALIS_IMX8QXP_WIFI_BT_IT, "Apalis iMX8QXP 2GB WB IT", 0 }, + { APALIS_IMX8QM_IT, "Apalis iMX8QM 4GB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, + { APALIS_IMX8QP_WIFI_BT, "Apalis iMX8QP 2GB WB", TARGET_IS_ENABLED(APALIS_IMX8) }, + { APALIS_IMX8QP, "Apalis iMX8QP 2GB", TARGET_IS_ENABLED(APALIS_IMX8) }, + { COLIBRI_IMX8QXP_IT, "Colibri iMX8QXP 2GB IT", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + { COLIBRI_IMX8DX_WIFI_BT, "Colibri iMX8DX 1GB WB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + { COLIBRI_IMX8DX, "Colibri iMX8DX 1GB", TARGET_IS_ENABLED(COLIBRI_IMX8X) }, + { APALIS_IMX8QXP, "Apalis iMX8QXP 2GB ECC IT", 0 }, + { APALIS_IMX8DXP, "Apalis iMX8DXP 1GB", TARGET_IS_ENABLED(APALIS_IMX8) }, + { VERDIN_IMX8MMQ_WIFI_BT_IT, "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { VERDIN_IMX8MNQ_WIFI_BT, "Verdin iMX8M Nano Quad 1GB WB", 0 }, + { VERDIN_IMX8MMDL, "Verdin iMX8M Mini DualLite 1GB", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { VERDIN_IMX8MPQ_WIFI_BT_IT, "Verdin iMX8M Plus Quad 4GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { VERDIN_IMX8MMQ_IT, "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { VERDIN_IMX8MMDL_WIFI_BT_IT, "Verdin iMX8M Mini DualLite 1GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { VERDIN_IMX8MPQ, "Verdin iMX8M Plus Quad 2GB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { COLIBRI_IMX6ULL_IT_EMMC, "Colibri iMX6ULL 1GB IT", TARGET_IS_ENABLED(COLIBRI_IMX6ULL) }, + { VERDIN_IMX8MPQ_IT, "Verdin iMX8M Plus Quad 4GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { VERDIN_IMX8MPQ_2GB_WIFI_BT_IT, "Verdin iMX8M Plus Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { VERDIN_IMX8MPQL_IT, "Verdin iMX8M Plus QuadLite 1GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { VERDIN_IMX8MPQ_8GB_WIFI_BT, "Verdin iMX8M Plus Quad 8GB WB", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { APALIS_IMX8QM_8GB_WIFI_BT_IT, "Apalis iMX8QM 8GB WB IT", TARGET_IS_ENABLED(APALIS_IMX8) }, + { VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN, "Verdin iMX8M Mini Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { VERDIN_AM62Q_WIFI_BT_IT, "Verdin AM62 Quad 1GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { VERDIN_IMX8MPQ_8GB_WIFI_BT_IT, "Verdin iMX8M Plus Quad 8GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX8MP) }, + { VERDIN_AM62S_512MB, "Verdin AM62 Solo 512MB", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { VERDIN_AM62S_512MB_WIFI_BT_IT, "Verdin AM62 Solo 512MB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { VERDIN_AM62D_1G_ET, "Verdin AM62 Dual 1GB ET", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { VERDIN_AM62D_1G_IT, "Verdin AM62 Dual 1GB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { VERDIN_AM62D_1G_WIFI_BT_IT, "Verdin AM62 Dual 1GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { VERDIN_AM62Q_2G_WIFI_BT_IT, "Verdin AM62 Quad 2GB WB IT", TARGET_IS_ENABLED(VERDIN_AM62_A53) }, + { COLIBRI_IMX6S_NOWINCE, "Colibri iMX6S 256MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX6S_IT_NOWINCE, "Colibri iMX6S 256MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX6DL_NOWINCE, "Colibri iMX6DL 512MB", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX6DL_IT_NOWINCE, "Colibri iMX6DL 512MB IT", TARGET_IS_ENABLED(COLIBRI_IMX6) }, + { COLIBRI_IMX7D_NOWINCE, "Colibri iMX7D 512MB", TARGET_IS_ENABLED(COLIBRI_IMX7) }, + { APALIS_IMX6D_NOWINCE, "Apalis iMX6D 512MB", TARGET_IS_ENABLED(APALIS_IMX6) }, + { APALIS_IMX6Q_NOWINCE, "Apalis iMX6Q 1GB", TARGET_IS_ENABLED(APALIS_IMX6) }, + { APALIS_IMX6D_IT_NOWINCE, "Apalis iMX6D 1GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, + { APALIS_IMX6Q_IT_NOWINCE, "Apalis iMX6Q 2GB IT", TARGET_IS_ENABLED(APALIS_IMX6) }, + { VERDIN_IMX8MMDL_2G_IT, "Verdin iMX8M Mini DualLite 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { VERDIN_IMX8MMQ_2G_IT_NO_CAN, "Verdin iMX8M Mini Quad 2GB IT", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, + { AQUILA_AM69O_32G_WIFI_BT_IT, "Aquila AM69 Octa 32GB WB IT", TARGET_IS_ENABLED(AQUILA_AM69_A72) }, + { VERDIN_IMX95H_16G_WIFI_BT_IT, "Verdin iMX95 Hexa 16GB WB IT", TARGET_IS_ENABLED(VERDIN_IMX95) }, + { VERDIN_IMX8MMQ_4G_WIFI_BT_ET, "Verdin iMX8M Mini Quad 4GB WB ET", TARGET_IS_ENABLED(VERDIN_IMX8MM) }, }; struct pid4list { @@ -188,6 +186,20 @@ const u32 toradex_ouis[] = { [1] = 0x8c06cbUL, }; +int get_toradex_modules_idx(int pid4) +{ + int i, index = 0; + + for (i = 1; i < ARRAY_SIZE(toradex_modules); i++) { + if (pid4 == toradex_modules[i].pid4) { + index = i; + break; + } + } + + return index; +} + const char * const get_toradex_carrier_boards(int pid4) { int i, index = 0; @@ -361,7 +373,7 @@ static int write_tdx_cfg_block_to_eeprom(unsigned char *config_block) int read_tdx_cfg_block(void) { - int ret = 0; + int idx, ret = 0; u8 *config_block = NULL; struct toradex_tag *tag; size_t size = TDX_CFG_BLOCK_MAX_SIZE; @@ -430,7 +442,8 @@ int read_tdx_cfg_block(void) } /* Cap product id to avoid issues with a yet unknown one */ - if (tdx_hw_tag.prodid >= ARRAY_SIZE(toradex_modules)) + idx = get_toradex_modules_idx(tdx_hw_tag.prodid); + if (!toradex_modules[idx].pid4) tdx_hw_tag.prodid = 0; out: @@ -456,19 +469,21 @@ static int get_cfgblock_interactive(void) int len = 0; int ret = 0; unsigned int prodid; - int i; + int i, idx; printf("Enabled modules:\n"); for (i = 0; i < ARRAY_SIZE(toradex_modules); i++) { if (toradex_modules[i].is_enabled) - printf(" %04d %s\n", i, toradex_modules[i].name); + printf(" %04d %s\n", toradex_modules[i].pid4, + toradex_modules[i].name); } sprintf(message, "Enter the module ID: "); len = cli_readline(message); prodid = dectoul(console_buffer, NULL); - if (prodid >= ARRAY_SIZE(toradex_modules) || !toradex_modules[prodid].is_enabled) { + idx = get_toradex_modules_idx(prodid); + if (!toradex_modules[idx].pid4 || !toradex_modules[idx].is_enabled) { printf("Parsing module id failed\n"); return -1; } diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h index 0d6dd1c3a721..937e84c3199b 100644 --- a/board/toradex/common/tdx-cfg-block.h +++ b/board/toradex/common/tdx-cfg-block.h @@ -21,6 +21,7 @@ struct toradex_eth_addr { } __attribute__((__packed__)); struct toradex_som { + int pid4; const char *name; int is_enabled; }; @@ -139,6 +140,7 @@ extern u32 tdx_car_serial; int read_tdx_cfg_block(void); int read_tdx_cfg_block_carrier(void); +int get_toradex_modules_idx(int pid4); const char * const get_toradex_carrier_boards(int pid4); const char * const get_toradex_display_adapters(int pid4); int try_migrate_tdx_cfg_block_carrier(void); diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c index a6b45cdab810..1afa7ec16d4a 100644 --- a/board/toradex/common/tdx-common.c +++ b/board/toradex/common/tdx-common.c @@ -191,13 +191,16 @@ static int tdx_detect(struct udevice *dev) static int tdx_get_str(struct udevice *dev, int id, size_t size, char *val) { int ret = -ENOTSUPP; + int idx; switch (id) { case SYSINFO_ID_BOARD_MODEL: + idx = get_toradex_modules_idx(tdx_hw_tag.prodid); + snprintf(val, size, "Toradex %04d %s %s", tdx_hw_tag.prodid, - toradex_modules[tdx_hw_tag.prodid].name, + toradex_modules[idx].name, tdx_board_rev_str); ret = 0; -- 2.34.1

3 2

[PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPLs
by Garrett Giordano 14 Dec '24

14 Dec '24

Introduce get_boot_device() to obtain the booting device. Make it also available for non SPL builds so u-boot can also know the device it is booting from. Signed-off-by: Garrett Giordano <ggiordano(a)phytec.com> Reviewed-by: Bryan Brattlof <bb(a)ti.com> --- v2: - Drop duplicate CONFIG_SOC_K3_AM62A7 entry from arch/arm/mach-k3/Makefile arch/arm/mach-k3/am62ax/Makefile | 1 + arch/arm/mach-k3/am62ax/am62a7_init.c | 97 +---------------------- arch/arm/mach-k3/am62ax/boot.c | 106 ++++++++++++++++++++++++++ 3 files changed, 108 insertions(+), 96 deletions(-) create mode 100644 arch/arm/mach-k3/am62ax/boot.c diff --git a/arch/arm/mach-k3/am62ax/Makefile b/arch/arm/mach-k3/am62ax/Makefile index e2ef88196f8..4e35e0c844d 100644 --- a/arch/arm/mach-k3/am62ax/Makefile +++ b/arch/arm/mach-k3/am62ax/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_OF_SYSTEM_SETUP) += am62a7_fdt.o obj-$(CONFIG_XPL_BUILD) += am62a7_init.o +obj-y += boot.o diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c index 0f62f39075b..5c0d3ee6869 100644 --- a/arch/arm/mach-k3/am62ax/am62a7_init.c +++ b/arch/arm/mach-k3/am62ax/am62a7_init.c @@ -171,102 +171,7 @@ void board_init_f(ulong dummy) debug("am62a_init: %s done\n", __func__); } -static u32 __get_backup_bootmedia(u32 devstat) -{ - u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; - u32 bkup_bootmode_cfg = - (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; - - switch (bkup_bootmode) { - case BACKUP_BOOT_DEVICE_UART: - return BOOT_DEVICE_UART; - - case BACKUP_BOOT_DEVICE_USB: - return BOOT_DEVICE_USB; - - case BACKUP_BOOT_DEVICE_ETHERNET: - return BOOT_DEVICE_ETHERNET; - - case BACKUP_BOOT_DEVICE_MMC: - if (bkup_bootmode_cfg) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BACKUP_BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BACKUP_BOOT_DEVICE_I2C: - return BOOT_DEVICE_I2C; - - case BACKUP_BOOT_DEVICE_DFU: - if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - }; - - return BOOT_DEVICE_RAM; -} - -static u32 __get_primary_bootmedia(u32 devstat) -{ - u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; - u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> - MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; - - switch (bootmode) { - case BOOT_DEVICE_OSPI: - fallthrough; - case BOOT_DEVICE_QSPI: - fallthrough; - case BOOT_DEVICE_XSPI: - fallthrough; - case BOOT_DEVICE_SPI: - return BOOT_DEVICE_SPI; - - case BOOT_DEVICE_ETHERNET_RGMII: - fallthrough; - case BOOT_DEVICE_ETHERNET_RMII: - return BOOT_DEVICE_ETHERNET; - - case BOOT_DEVICE_EMMC: - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_SPI_NAND: - return BOOT_DEVICE_SPINAND; - - case BOOT_DEVICE_MMC: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> - MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) - return BOOT_DEVICE_MMC2; - return BOOT_DEVICE_MMC1; - - case BOOT_DEVICE_DFU: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> - MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) - return BOOT_DEVICE_USB; - return BOOT_DEVICE_DFU; - - case BOOT_DEVICE_NOBOOT: - return BOOT_DEVICE_RAM; - } - - return bootmode; -} - u32 spl_boot_device(void) { - u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); - u32 bootmedia; - - if (bootindex == K3_PRIMARY_BOOTMODE) - bootmedia = __get_primary_bootmedia(devstat); - else - bootmedia = __get_backup_bootmedia(devstat); - - debug("am62a_init: %s: devstat = 0x%x bootmedia = 0x%x bootindex = %d\n", - __func__, devstat, bootmedia, bootindex); - return bootmedia; + return get_boot_device(); } diff --git a/arch/arm/mach-k3/am62ax/boot.c b/arch/arm/mach-k3/am62ax/boot.c new file mode 100644 index 00000000000..af7fce1e5e9 --- /dev/null +++ b/arch/arm/mach-k3/am62ax/boot.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/am62a_spl.h> + +static u32 __get_backup_bootmedia(u32 devstat) +{ + u32 bkup_bootmode = (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT; + u32 bkup_bootmode_cfg = + (devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT; + + switch (bkup_bootmode) { + case BACKUP_BOOT_DEVICE_UART: + return BOOT_DEVICE_UART; + + case BACKUP_BOOT_DEVICE_USB: + return BOOT_DEVICE_USB; + + case BACKUP_BOOT_DEVICE_ETHERNET: + return BOOT_DEVICE_ETHERNET; + + case BACKUP_BOOT_DEVICE_MMC: + if (bkup_bootmode_cfg) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BACKUP_BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BACKUP_BOOT_DEVICE_I2C: + return BOOT_DEVICE_I2C; + + case BACKUP_BOOT_DEVICE_DFU: + if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + }; + + return BOOT_DEVICE_RAM; +} + +static u32 __get_primary_bootmedia(u32 devstat) +{ + u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; + u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (bootmode) { + case BOOT_DEVICE_OSPI: + fallthrough; + case BOOT_DEVICE_QSPI: + fallthrough; + case BOOT_DEVICE_XSPI: + fallthrough; + case BOOT_DEVICE_SPI: + return BOOT_DEVICE_SPI; + + case BOOT_DEVICE_ETHERNET_RGMII: + fallthrough; + case BOOT_DEVICE_ETHERNET_RMII: + return BOOT_DEVICE_ETHERNET; + + case BOOT_DEVICE_EMMC: + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_SPI_NAND: + return BOOT_DEVICE_SPINAND; + + case BOOT_DEVICE_MMC: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >> + MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT) + return BOOT_DEVICE_MMC2; + return BOOT_DEVICE_MMC1; + + case BOOT_DEVICE_DFU: + if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT) + return BOOT_DEVICE_USB; + return BOOT_DEVICE_DFU; + + case BOOT_DEVICE_NOBOOT: + return BOOT_DEVICE_RAM; + } + + return bootmode; +} + +u32 get_boot_device(void) +{ + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmode = *(u32 *)(K3_BOOT_PARAM_TABLE_INDEX_OCRAM); + u32 bootmedia; + + if (bootmode == K3_PRIMARY_BOOTMODE) + bootmedia = __get_primary_bootmedia(devstat); + else + bootmedia = __get_backup_bootmedia(devstat); + + debug("%s: devstat = 0x%x bootmedia = 0x%x bootmode = %d\n", + __func__, devstat, bootmedia, bootmode); + + return bootmedia; +} -- 2.25.1

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[PATCH v2 0/2] Add phyCORE AM62Ax
by Garrett Giordano 14 Dec '24

14 Dec '24

This patch set adds the phyCORE AM62Ax board support and documenation to u-boot. The phyCORE-AM62Ax is a SoM (System on Module) featuring TI's AM62Ax SoC. It can be used in combination with different carrier boards. This module can come with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62x family. A development Kit, called phyBOARD-Lyra is used as a carrier board reference design around the AM62x SoM. This series depends on the following two patches: - [PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPL https://lists.denx.de/pipermail/u-boot/2024-October/570156.html - [PATCH] board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH https://lists.denx.de/pipermail/u-boot/2024-November/571543.html v2: - Dop DECLARE_GLOBAL_DATA_PTR from phycore-am62ax.c board file. - fix underline length in phyCORE-AM62Ax docs - explicitly define build steps in docs, replacing include - Verified make htmldocs is working. - picked up Reviewed-by Garrett Giordano (2): board: phytec: am62a7: Add PHYTEC phyCORE-AM62A7 SoM doc: board: phytec: Add phyCORE-AM62ax arch/arm/dts/Makefile | 4 +- arch/arm/dts/k3-am62a-phycore-som-binman.dtsi | 454 +++ .../dts/k3-am62a-phycore-som-ddr4-2gb.dtsi | 2798 +++++++++++++++++ .../k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi | 252 ++ arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts | 137 + arch/arm/mach-k3/am62ax/Kconfig | 21 + board/phytec/phycore_am62ax/Kconfig | 37 + board/phytec/phycore_am62ax/MAINTAINERS | 14 + board/phytec/phycore_am62ax/Makefile | 6 + board/phytec/phycore_am62ax/board-cfg.yaml | 36 + board/phytec/phycore_am62ax/phycore-am62ax.c | 64 + .../phytec/phycore_am62ax/phycore_am62ax.env | 14 + board/phytec/phycore_am62ax/pm-cfg.yaml | 12 + board/phytec/phycore_am62ax/rm-cfg.yaml | 1047 ++++++ board/phytec/phycore_am62ax/sec-cfg.yaml | 379 +++ board/phytec/phycore_am62ax/tifs-rm-cfg.yaml | 903 ++++++ configs/phycore_am62ax_a53_defconfig | 181 ++ configs/phycore_am62ax_r5_defconfig | 129 + doc/board/phytec/index.rst | 1 + doc/board/phytec/phycore-am62ax.rst | 183 ++ doc/board/ti/k3.rst | 1 + include/configs/phycore_am62ax.h | 15 + 22 files changed, 6687 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am62a-phycore-som-binman.dtsi create mode 100644 arch/arm/dts/k3-am62a-phycore-som-ddr4-2gb.dtsi create mode 100644 arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts create mode 100644 board/phytec/phycore_am62ax/Kconfig create mode 100644 board/phytec/phycore_am62ax/MAINTAINERS create mode 100644 board/phytec/phycore_am62ax/Makefile create mode 100644 board/phytec/phycore_am62ax/board-cfg.yaml create mode 100644 board/phytec/phycore_am62ax/phycore-am62ax.c create mode 100644 board/phytec/phycore_am62ax/phycore_am62ax.env create mode 100644 board/phytec/phycore_am62ax/pm-cfg.yaml create mode 100644 board/phytec/phycore_am62ax/rm-cfg.yaml create mode 100644 board/phytec/phycore_am62ax/sec-cfg.yaml create mode 100644 board/phytec/phycore_am62ax/tifs-rm-cfg.yaml create mode 100644 configs/phycore_am62ax_a53_defconfig create mode 100644 configs/phycore_am62ax_r5_defconfig create mode 100644 doc/board/phytec/phycore-am62ax.rst create mode 100644 include/configs/phycore_am62ax.h -- 2.25.1

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