December 2024 - U-Boot

[PATCH 0/4] clk: qcom: add PCIe clocks
by Neil Armstrong 22 Jan '25

22 Jan '25

Add the PCIe clocks for the SM8550, SM8650 and X1E80100 platforms to enable support for PCIe feature. Depends on: - https://lore.kernel.org/all/20241118-topic-x1e80100-clk-v1-0-8841e87ad81f@l… Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (4): clk: qcom: add clk_phy_mux_enable() for PCIe PIPE clock clk: qcom: sm8550: add support for PCIe clocks clk: qcom: sm8650: add support for PCIe clocks clk: qcom: x1e80100: add support for PCIe clocks drivers/clk/qcom/clock-qcom.c | 19 ++++++++++++++ drivers/clk/qcom/clock-qcom.h | 2 ++ drivers/clk/qcom/clock-sm8550.c | 36 ++++++++++++++++++++++++++ drivers/clk/qcom/clock-sm8650.c | 36 ++++++++++++++++++++++++++ drivers/clk/qcom/clock-x1e80100.c | 54 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 147 insertions(+) --- base-commit: c7934881aa75d34aea2493322de0a417524ebf4a change-id: 20241125-topic-pcie-clk-8e345d8ace7a Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH] regulator: qcom-rpmh-regulator: add support for pmc8380 regulators
by Neil Armstrong 22 Jan '25

22 Jan '25

Add the PMC8380 regulator data found on the Snapdragon X Elite platforms. The tables are imported from the Linux driver. Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- drivers/power/regulator/qcom-rpmh-regulator.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/power/regulator/qcom-rpmh-regulator.c b/drivers/power/regulator/qcom-rpmh-regulator.c index 2dc261d83e3727a5b2f72a5d13c1ef17a9677a8c..70df51b5fa4ee4001b7eff6facc80957ada84391 100644 --- a/drivers/power/regulator/qcom-rpmh-regulator.c +++ b/drivers/power/regulator/qcom-rpmh-regulator.c @@ -536,6 +536,21 @@ static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), + {} +}; + /* probe an individual regulator */ static int rpmh_regulator_probe(struct udevice *dev) { @@ -662,6 +677,10 @@ static const struct udevice_id rpmh_regulator_ids[] = { .compatible = "qcom,pm8550vs-rpmh-regulators", .data = (ulong)pm8550vs_vreg_data, }, + { + .compatible = "qcom,pmc8380-rpmh-regulators", + .data = (ulong)pmc8380_vreg_data, + }, { /* sentinal */ }, }; --- base-commit: 7fe55182d9263a62e18b450c97bdf0b8031e5667 change-id: 20241125-topic-hamoa-pmc8380-rpmh-regulators-2b9460fcd7bd Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH 0/3] pinctrl: qcom: add clk_req functions
by Neil Armstrong 22 Jan '25

22 Jan '25

Add the missing PCIe clk_req functions for the SM8550, SM8650 and X1E80100 TLMM. Depends on: - https://lore.kernel.org/all/20241115-topic-x1e80100-pinctrl-v1-0-35f984226e… Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (3): pinctrl: qcom: sm8550: add pcie1_clk_req_n function pinctrl: qcom: sm8650: add pcie[01]_clk_req_n function pinctrl: qcom: x1e80100: add pcie[3456ab]_clk functions drivers/pinctrl/qcom/pinctrl-sm8550.c | 1 + drivers/pinctrl/qcom/pinctrl-sm8650.c | 2 ++ drivers/pinctrl/qcom/pinctrl-x1e80100.c | 5 +++++ 3 files changed, 8 insertions(+) --- base-commit: 7a36c84ff57177ccd3107f62c8d14fa0093e0e76 change-id: 20241125-topic-pcie-pinctrl-77f1c184e73f Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH] button: qcom-pmic: add software debounce
by Caleb Connolly 22 Jan '25

22 Jan '25

This helps with reliability on some platforms. We should probably also configure the hardware debounce timer eventually. Signed-off-by: Caleb Connolly <caleb.connolly(a)linaro.org> --- drivers/button/button-qcom-pmic.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c index ad7fed3ddaaa..f9f0948ae095 100644 --- a/drivers/button/button-qcom-pmic.c +++ b/drivers/button/button-qcom-pmic.c @@ -14,8 +14,9 @@ #include <log.h> #include <power/pmic.h> #include <spmi/spmi.h> #include <linux/bitops.h> +#include <time.h> #define REG_TYPE 0x4 #define REG_SUBTYPE 0x5 @@ -30,8 +31,9 @@ struct qcom_pmic_btn_priv { u32 base; u32 status_bit; int code; struct udevice *pmic; + ulong last_release_time; }; #define PON_INT_RT_STS 0x10 #define PON_KPDPWR_N_SET 0 @@ -41,15 +43,23 @@ struct qcom_pmic_btn_priv { static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) { struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + bool pressed; + int reg; - int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); + if (get_timer_us(0) - priv->last_release_time < 25000) + return BUTTON_OFF; + reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); if (reg < 0) return 0; - return (reg & BIT(priv->status_bit)) != 0; + pressed = !!(reg & BIT(priv->status_bit)); + if (!pressed) + priv->last_release_time = get_timer_us(0); + + return pressed; } static int qcom_pwrkey_get_code(struct udevice *dev) { -- 2.47.0

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[PATCH 0/2] pinctrl: add support for X1E80100 TLMM
by Neil Armstrong 22 Jan '25

22 Jan '25

Add support for TLMM in X1E80100, and enable it in qcom_defconfig Signed-off-by: Neil Armstrong <neil.armstrong(a)linaro.org> --- Neil Armstrong (2): pinctrl: qcom: Add X1E80100 pinctrl driver qcom_defconfig: enable X1E80100 pinctrl driver configs/qcom_defconfig | 1 + drivers/pinctrl/qcom/Kconfig | 7 +++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-x1e80100.c | 100 ++++++++++++++++++++++++++++++++ 4 files changed, 109 insertions(+) --- base-commit: 56accc56b9aab87ef4809ccc588e1257969cd271 change-id: 20241115-topic-x1e80100-pinctrl-fb69c767b51b Best regards, -- Neil Armstrong <neil.armstrong(a)linaro.org>

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[PATCH] configs: am62x_evm_*: Set DFU buffer size to 256k
by Jonathan Humphreys 21 Jan '25

21 Jan '25

OSPI flash writing was broken on am62x SKs as the OSPI flash device has a 256k sector size but was set to 20k. This breaks OSPI flash writes because the current implementation of the SF DFU backend requires that the DFU data buffer size be the same as the sector erase size, and the USB DFU config fragment (for both A53 and R5) reduced the size of the DFU data buffer, presumably so that it can fit into SPL's much smaller heap. Change the SYS_DFU_DATA_BUF_SIZE to the erase sector size, which still fits within the post-relocation heap size in SPL. Fixes: dfc2dff5a844 ("configs: am62x_evm_*: Enable USB and DFU support") Signed-off-by: Jonathan Humphreys <j-humphreys(a)ti.com> --- configs/am62x_a53_usbdfu.config | 2 +- configs/am62x_r5_usbdfu.config | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/am62x_a53_usbdfu.config b/configs/am62x_a53_usbdfu.config index 0d3c6df1e73..812f99ee70b 100644 --- a/configs/am62x_a53_usbdfu.config +++ b/configs/am62x_a53_usbdfu.config @@ -10,7 +10,7 @@ CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y -CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_USB=y CONFIG_DM_USB_GADGET=y diff --git a/configs/am62x_r5_usbdfu.config b/configs/am62x_r5_usbdfu.config index 772bb2ab935..efaae504c1a 100644 --- a/configs/am62x_r5_usbdfu.config +++ b/configs/am62x_r5_usbdfu.config @@ -1,7 +1,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y -CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 CONFIG_MISC=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y -- 2.34.1

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[PATCH 1/1] acpi: don't fill FADT, MADT if CONFIG_QFW_ACPI=y
by Heinrich Schuchardt 21 Jan '25

21 Jan '25

When using the ACPI tables supplied by QEMU, we don't need to build the FADT and MADT tables in U-Boot. This patch avoids a build failure make qemu-riscv64_smode_defconfig acpi.config riscv64-linux-gnu-ld.bfd: lib/acpi/acpi_table.o: in function `acpi_write_fadt': lib/acpi/acpi_table.c:265:(.text.acpi_write_fadt+0x15c): undefined reference to `acpi_fill_fadt' riscv64-linux-gnu-ld.bfd: lib/acpi/acpi_table.o: in function `acpi_write_madt': lib/acpi/acpi_table.c:294:(.text.acpi_write_madt+0x52): undefined reference to `acpi_fill_madt' Fixes: f5f7962091e4 ("acpi: x86: Write FADT in common code") Fixes: 4a3fc0f525da ("acpi: x86: Move MADT to common code") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- lib/acpi/acpi_table.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c index 150f75027a5..c0ed24984af 100644 --- a/lib/acpi/acpi_table.c +++ b/lib/acpi/acpi_table.c @@ -273,7 +273,9 @@ int acpi_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry) return acpi_add_fadt(ctx, fadt); } +#ifndef CONFIG_QFW_ACPI ACPI_WRITER(5fadt, "FADT", acpi_write_fadt, 0); +#endif int acpi_write_madt(struct acpi_ctx *ctx, const struct acpi_writer *entry) { @@ -308,7 +310,9 @@ int acpi_write_madt(struct acpi_ctx *ctx, const struct acpi_writer *entry) return 0; } +#ifndef CONFIG_QFW_ACPI ACPI_WRITER(5madt, "MADT", acpi_write_madt, 0); +#endif void acpi_create_dbg2(struct acpi_dbg2_header *dbg2, int port_type, int port_subtype, -- 2.47.1

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[PATCH 0/6] Rework the BLK symbol usage in Kconfig
by Tom Rini 21 Jan '25

21 Jan '25

Hey all, One problem we have today is how the BLK symbol is set and used in Kconfig files. Part of the challenge is that we use it as a gating symbol for "we have a block device" and also for "enable block device library code". What this series does is move to always use "select BLK" by block drivers (a few were and a few others had it the inverse) and then "depends on BLK" for functionality that needs a block device present. The end result of this series is that a number of platforms which had disabled EFI_LOADER now don't ask for it (they have no block device) and espresso7420 has a regression about MMC support fixed. -- Tom

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[PATCH] sunxi: pinephone: detect existed magnetometer and fixup dtb
by Andrey Skvortsov 21 Jan '25

21 Jan '25

In newer 1.2 PinePhone board revisions LIS3MDL magnetometer was replaced by AF8133J. They use the same PB1 pin in different modes. LIS3MDL uses it as an gpio input to handle interrupt. AF8133J uses it as an gpio output as a reset signal. It wasn't possible at runtime to enable both device tree nodes and detect supported sensor at probe time. AF8133J has reset pin (PB1) connected to the SoC. By default AF8133J is in a reset state and don't respond to probe request on I2C bus. Extra code would be needed to handle reset signal. Therefore this code uses LIS3MDL magnetometer instead of AF8133J. Introducing new dts 1.2b with AF8133J sensor would require probing in SPL. That would lead to pulling in into SPL I2C controller driver, RSB controller driver, introducing new AXP803 driver to power-up sensors for probe. It's working, but SPL is pretty size-constrained on A64 and doesn't have much space. Therefore fdt fixup is done in U-Boot proper without introducing new board revision and new dts. Signed-off-by: Andrey Skvortsov <andrej.skvortzov(a)gmail.com> Link: https://lore.kernel.org/all/20240908214718.36316-1-andrej.skvortzov@gmail.c… Link: https://lists.denx.de/pipermail/u-boot/2024-February/545700.html --- This patch was discussed previously as RFC. [1] All relevant kernel device-tree changes are merged. [2] 1. https://lists.denx.de/pipermail/u-boot/2024-February/545700.html 2. https://lore.kernel.org/all/20240908214718.36316-1-andrej.skvortzov@gmail.c… board/sunxi/board.c | 23 +++++++++++++++++++++++ configs/pinephone_defconfig | 1 + 2 files changed, 24 insertions(+) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 824c322a0dc..703081b403f 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -14,6 +14,7 @@ #include <dm.h> #include <env.h> #include <hang.h> +#include <i2c.h> #include <image.h> #include <init.h> #include <log.h> @@ -876,6 +877,27 @@ static void bluetooth_dt_fixup(void *blob) "local-bd-address", bdaddr, ETH_ALEN, 1); } +#define PINEPHONE_LIS3MDL_I2C_ADDR 0x1E +#define PINEPHONE_LIS3MDL_I2C_BUS 1 /* I2C1 */ + +static void board_dt_fixup(void *blob) +{ + struct udevice *bus, *dev; + + if (IS_ENABLED(CONFIG_PINEPHONE_DT_SELECTION) && + !fdt_node_check_compatible(blob, 0, "pine64,pinephone-1.2")) { + if (!uclass_get_device_by_seq(UCLASS_I2C, PINEPHONE_LIS3MDL_I2C_BUS, &bus)) { + dm_i2c_probe(bus, PINEPHONE_LIS3MDL_I2C_ADDR, 0, &dev); + fdt_set_status_by_compatible( + blob, "st,lis3mdl-magn", + dev ? FDT_STATUS_OKAY : FDT_STATUS_DISABLED); + fdt_set_status_by_compatible( + blob, "voltafield,af8133j", + dev ? FDT_STATUS_DISABLED : FDT_STATUS_OKAY); + } + } +} + int ft_board_setup(void *blob, struct bd_info *bd) { int __maybe_unused r; @@ -889,6 +911,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_ethernet(blob); bluetooth_dt_fixup(blob); + board_dt_fixup(blob); #ifdef CONFIG_VIDEO_DT_SIMPLEFB r = sunxi_simplefb_setup(blob); diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9d39204a439..0f9ab0c4662 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -11,6 +11,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" +CONFIG_SYS_I2C_MVTWSI=y CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y CONFIG_LED_STATUS0=y -- 2.45.2

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[PATCH v2] sunxi: defconfig: Add pstore support for pinephone
by Andrey Skvortsov 20 Jan '25

20 Jan '25

pstore will allow users to catch kernel crashes and report them to developers. Modern (Android) phones have pstore usually enabled to get information about kernel crash, since it's the simplest way to get kernel backtrace on mobile device without serial console. Usually it's enabled by default in distribution kernels like Debian. CONFIG_PSTORE=y CONFIG_PSTORE_RAM=m systemd has service that automatically handles pstore and saves them in /var/lib/pstore for later usage. In general any DRAM address, that isn't overwritten during a boot is suitable for pstore. Range from 0x40000000 - 0x50000000 is heavily used by u-boot for internal use and to load kernel, fdt, fdto, scripts, pxefile and ramdisk later in the boot process. Ramdisk start address is 0x4FF00000, initramfs for kernel with some hacking features and debug info enabled can take more than 100Mb and final address will be around 0x58000000. Address 0x61000000 will most likely not overlap with that. Signed-off-by: Andrey Skvortsov <andrej.skvortzov(a)gmail.com> --- Changes since v1: - updated description with pstore usage details configs/pinephone_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9d39204a439..7b80cc3131b 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,6 +10,8 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CMD_PSTORE=y +CONFIG_CMD_PSTORE_MEM_ADDR=0x61000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y -- 2.45.2

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