October 2024 - U-Boot

[PATCH V3] cpu: imx8_cpu: Avoid revision to corrupt device tree
by Peng Fan (OSS) 18 Oct '24

18 Oct '24

From: Peng Fan <peng.fan(a)nxp.com> U-Boot device tree is padded just after U-Boot proper. After the whole stuff loaded to DRAM space, the device tree area is conflict with BSS region before U-Boot relocation. So any write to BSS area before reloc_fdt will corrupt the device tree. Without the fix, there is issue that “binman_init failed:-2” on i.MX8MP-EVK board. Drop 'revision' and use malloc area in cpu_imx_plat->rev. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- V3: Update commit Pass CI V2: Move to use malloc area for revision drivers/cpu/imx8_cpu.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 6c0a8c0cbe4..51262befaff 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -20,10 +20,11 @@ DECLARE_GLOBAL_DATA_PTR; +#define IMX_REV_LEN 4 struct cpu_imx_plat { const char *name; - const char *rev; const char *type; + char rev[IMX_REV_LEN]; u32 cpu_rsrc; u32 cpurev; u32 freq_mhz; @@ -69,28 +70,29 @@ static const char *get_imx_type_str(u32 imxtype) } } -static const char *get_imx_rev_str(u32 rev) +static void get_imx_rev_str(struct cpu_imx_plat *plat, u32 rev) { - static char revision[4]; - if (IS_ENABLED(CONFIG_IMX8)) { switch (rev) { case CHIP_REV_A: - return "A"; + plat->rev[0] = 'A'; + break; case CHIP_REV_B: - return "B"; + plat->rev[0] = 'B'; + break; case CHIP_REV_C: - return "C"; + plat->rev[0] = 'C'; + break; default: - return "?"; + plat->rev[0] = '?'; + break; } + plat->rev[1] = '\0'; } else { - revision[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4); - revision[1] = '.'; - revision[2] = '0' + (rev & 0xf); - revision[3] = '\0'; - - return revision; + plat->rev[0] = '1' + (((rev & 0xf0) - CHIP_REV_1_0) >> 4); + plat->rev[1] = '.'; + plat->rev[2] = '0' + (rev & 0xf); + plat->rev[3] = '\0'; } } @@ -318,7 +320,7 @@ static int imx_cpu_probe(struct udevice *dev) set_core_data(dev); cpurev = get_cpu_rev(); plat->cpurev = cpurev; - plat->rev = get_imx_rev_str(cpurev & 0xFFF); + get_imx_rev_str(plat, cpurev & 0xFFF); plat->type = get_imx_type_str((cpurev & 0x1FF000) >> 12); plat->freq_mhz = imx_get_cpu_rate(dev) / 1000000; plat->mpidr = dev_read_addr(dev); -- 2.35.3

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[PATCH v4] dts: Add ability to build fallback DTBOs from arch/$(ARCH)/dts
by Marek Vasut 18 Oct '24

18 Oct '24

Currently the enablement of OF_UPSTREAM results on the build system searching for DTs only in dts/upstream/ . There are platforms which use U-Boot specific DTBOs applied on top of U-Boot control DT during SPL stage, and source DTs for these are located in arch/$(ARCH)/dtb. Add dedicated 'dtbos' target which builds only .dtbos and not .dtbs and in case CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is enabled, build this target for arch/$(ARCH)/dtb to generate local U-Boot specific DTBOs. Adjust top level Makefile so binman would search for .dtb and .dtbo in both OF_UPSTREAM specific paths and arch/$(ARCH)/dtb for the .dtbo case in case CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is enabled. Reviewed-by: Sumit Garg <sumit.garg(a)linaro.org> Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Caleb Connolly <caleb.connolly(a)linaro.org> Cc: Christoph Niedermaier <cniedermaier(a)dh-electronics.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: Jonas Karlman <jonas(a)kwiboo.se> Cc: Lothar Rubusch <l.rubusch(a)gmail.com> Cc: Michal Simek <michal.simek(a)amd.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> Cc: Simon Glass <sjg(a)chromium.org> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Sumit Garg <sumit.garg(a)linaro.org> Cc: Tom Rini <trini(a)konsulko.com> Cc: u-boot(a)dh-electronics.com Cc: u-boot(a)lists.denx.de --- V2: Gate this functionality behind CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS V3: - Unnest CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS - Add RB from from Sumit V4: Rebase on u-boot/master --- Makefile | 4 ++++ dts/Kconfig | 16 ++++++++++++++++ dts/Makefile | 14 +++++++++++++- scripts/Makefile.dts | 6 ++++++ 4 files changed, 39 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index a2e9435c4f8..2e0a2e9f90c 100644 --- a/Makefile +++ b/Makefile @@ -1383,7 +1383,11 @@ of_list := "$(ext_dtb_list)" of_list_dirs := $(dir $(EXT_DTB)) else of_list := $(CONFIG_OF_LIST) +ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),) +of_list_dirs := $(dt_dir) arch/$(ARCH)/dts +else of_list_dirs := $(dt_dir) +endif default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE)) endif diff --git a/dts/Kconfig b/dts/Kconfig index 569d4be338e..385058b429f 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -125,6 +125,22 @@ config OF_UPSTREAM_VENDOR help Select the vendor to build all devicetree files for. +config OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS + bool "Build local DTBOs as fallback for DTBOs missing upstream" + default n + depends on OF_UPSTREAM + help + Enable building DTBOs from arch/$(ARCH)/dts as a fallback for + DTBOs which are not part of Linux kernel upstream yet. This is + a stopgap measure to expedite OF_UPSTREAM switch for platforms + which already have main DT in Linux kernel upstream, but still + have leftover DTBOs in U-Boot tree. + + Do not use this option, upstream your DTs and DTBOs instead. + If the upstreaming is in progress, use with utmost caution. + + If unsure, say N. + choice prompt "Provider of DTB for DT control" depends on OF_CONTROL diff --git a/dts/Makefile b/dts/Makefile index 62a65688cf5..86bf8dc2156 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -20,6 +20,12 @@ else dt_dir := arch/$(ARCH)/dts endif +ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),) +local_dtbos := local-dtbos +else +local_dtbos := +endif + ifneq ($(EXT_DTB),) DTB := $(EXT_DTB) else @@ -40,7 +46,7 @@ endif targets += dt.dtb -$(DTB): arch-dtbs +$(DTB): arch-dtbs $(local_dtbos) $(Q)test -e $@ || ( \ echo >&2; \ echo >&2 "Device Tree Source ($@) is not correctly specified."; \ @@ -53,6 +59,12 @@ PHONY += arch-dtbs arch-dtbs: $(Q)$(MAKE) $(build)=$(dt_dir) dtbs +ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),) +PHONY += local-dtbos +local-dtbos: + $(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbos +endif + ifeq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o # support "out-of-tree" build for dtb-spl diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts index 1fe142f2bbf..3ab67b3c247 100644 --- a/scripts/Makefile.dts +++ b/scripts/Makefile.dts @@ -21,4 +21,10 @@ PHONY += dtbs dtbs: $(addprefix $(obj)/, $(dtb-y)) @: +ifneq ($(CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS),) +PHONY += dtbos +dtbos: $(addprefix $(obj)/, $(filter-out %.dtb,$(dtb-y))) + @: +endif + clean-files := *.dtb *.dtbo */*.dtb */*.dtbo *_HS -- 2.45.2

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[PATCH] mtd: spi-nor: Fix the qspi parallel memory issues
by Venkatesh Yadav Abbarapu 18 Oct '24

18 Oct '24

The below issues are fixed 1)Fix the read issue for 4byte address width as read_len is getting zero. 2)Fix the spi_nor_erase function by passing the correct offset when it is configured as dual parallel. 3)Update the write_bar() only if the address width is 3byte for spi_nor_erase() function. ZynqMP> sf read 0x4000000 0 100000 device 0 offset 0x0, size 0x100000 SF: 1048576 bytes @ 0x0 Read: ERROR -5 Fixes: 5d40b3d384 ("mtd: spi-nor: Add parallel and stacked memories support") Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> --- drivers/mtd/spi/spi-nor-core.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f5c9868bbc..2034d84251 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1141,11 +1141,14 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) nor->spi->flags &= ~SPI_XFER_U_PAGE; } } + if (nor->addr_width == 3) { #ifdef CONFIG_SPI_FLASH_BAR - ret = write_bar(nor, addr); - if (ret < 0) - goto erase_err; + ret = write_bar(nor, offset); + if (ret < 0) + goto erase_err; #endif + } + ret = write_enable(nor); if (ret < 0) goto erase_err; @@ -1154,7 +1157,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { ret = spi_nor_erase_chip(nor); } else { - ret = spi_nor_erase_sector(nor, addr); + ret = spi_nor_erase_sector(nor, offset); } if (ret < 0) goto erase_err; @@ -1582,6 +1585,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, loff_t offset = from; u32 read_len = 0; u32 rem_bank_len = 0; + u32 stack_shift = 0; u8 bank; bool is_ofst_odd = false; @@ -1608,6 +1612,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, offset = from; if (nor->flags & SNOR_F_HAS_STACKED) { + stack_shift = 1; if (offset >= (mtd->size / 2)) { offset = offset - (mtd->size / 2); nor->spi->flags |= SPI_XFER_U_PAGE; @@ -1616,6 +1621,10 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, } } + if (nor->addr_width == 4) + rem_bank_len = (mtd->size >> stack_shift) - + offset; + if (nor->flags & SNOR_F_HAS_PARALLEL) offset /= 2; -- 2.17.1

1 0

Please pull u-boot-dm
by Simon Glass 18 Oct '24

18 Oct '24

Hi Tom, I have kept back some of the coreboot patches until the docker change is applied. It needs a newer version of coreboot. - Simon https://source.denx.de/u-boot/custodians/u-boot-dm/-/pipelines/22775 https://dev.azure.com/simon0972/u-boot/_build/results?buildId=69&view=resul… The following changes since commit 8efc954fc77eaa734b9fe0cba4b33b75b6e8dbb8: Makefile: Drop SPL_FIT_SOURCE support (2024-10-17 08:36:10 -0600) are available in the Git repository at: git://git.denx.de/u-boot-dm.git tags/dm-pull-17oct24 for you to fetch changes up to d9cfa1e3a3d6977feb8265703a6612f1477e9508: x86: cpu: Add missing header inclusion (2024-10-17 14:36:23 -0600) ---------------------------------------------------------------- A few new x86 commands and minor improvements expo improvements binman support for signing FIT images ---------------------------------------------------------------- Alexander Kochetkov (3): binman: fix passing loadables to mkimage on first run image-host: fix 'unknown error' error message binman: implement signing FIT images during image build Andy Shevchenko (4): x86: cpu: Use default print_cpuinfo() for all x86: cpu: Mark a few functions static x86: cpu: Add a few prototypes to the header file x86: cpu: Add missing header inclusion Dmitrii Merkurev (1): virtio: blk: introduce virtio-block erase support Marek Vasut (1): sandbox: dts: Add missing sandbox, emul phandle to sandbox-pmic Simon Glass (33): video: Allow querying the font size coreboot: Switch to a monospaced font x86: Show the CPU vendor in bdinfo x86: Ensure the CPU identity exists for timer init x86: Avoid timer-clock overflow x86: Sync up tsc_timer with Linux x86: Add a cpuid command x86: Add msr command x86: coreboot: Update the timestamp code to use sysinfo x86: coreboot: Add timestamps from coreboot to bootstage x86: coreboot: Enable receiving timestamps from coreboot blk: Make functions available unconditionally bootstd: Avoid calling unavailable block functions bootstd: Avoid depending on BLK buildman: Correct some warnings about regex strings sandbox_spl: Restrict use of UPL when not enabled u_boot_pylib: Support running coverage on selected functions binman: Support getting test-coverage on just one test binman: Add a tutorial on resolving test-coverage bugs video: Add a dark-grey console colour video: Avoid starting a new line to close to the bottom expo: Place menu items to the right of all labels expo: Set the initial next_id to 1 expo: Use standard numbering for save and discard expo: Allow menu items to have values expo: Add a little more cedit CMOS logging expo: Support menu-item values in cedit expo: Drop unneceesary calls to expo_str() expo: Drop scene_title_set() expo: Add forward declaration for udevice to cedit docker: Update coreboot doc: Update coreboot's CI information x86: Enable RTC command by default Tom Rini (1): x86: Make default_print_cpuinfo be a weak alias for print_cpuinfo MAINTAINERS | 1 + arch/sandbox/cpu/spl.c | 5 +- arch/sandbox/dts/cedit.dtsi | 3 + arch/sandbox/dts/sandbox_pmic.dtsi | 1 + arch/x86/cpu/broadwell/cpu.c | 12 - arch/x86/cpu/coreboot/coreboot.c | 12 +- arch/x86/cpu/coreboot/timestamp.c | 11 +- arch/x86/cpu/cpu.c | 8 +- arch/x86/cpu/cpu_x86.c | 1 + arch/x86/cpu/efi/app.c | 5 - arch/x86/cpu/efi/payload.c | 5 - arch/x86/cpu/i386/cpu.c | 99 ++++--- arch/x86/cpu/i386/interrupt.c | 2 +- arch/x86/cpu/ivybridge/cpu.c | 14 - arch/x86/cpu/mtrr.c | 2 +- arch/x86/cpu/qemu/qemu.c | 6 - arch/x86/cpu/quark/quark.c | 6 - arch/x86/cpu/slimbootloader/slimbootloader.c | 5 - arch/x86/cpu/tangier/tangier.c | 5 - arch/x86/cpu/x86_64/cpu.c | 6 + arch/x86/cpu/x86_64/misc.c | 5 - arch/x86/include/asm/cpu.h | 7 + arch/x86/include/asm/u-boot-x86.h | 18 +- arch/x86/lib/bdinfo.c | 7 +- arch/x86/lib/fsp/fsp_common.c | 6 - boot/Kconfig | 2 +- boot/bootdev-uclass.c | 3 + boot/cedit.c | 191 +++++++++---- boot/expo.c | 3 + boot/expo_build.c | 36 ++- boot/scene.c | 61 +++- boot/scene_internal.h | 30 +- boot/scene_menu.c | 26 +- boot/scene_textline.c | 3 +- cmd/Kconfig | 1 + cmd/font.c | 17 +- cmd/x86/Makefile | 2 +- cmd/x86/cpuid.c | 37 +++ cmd/x86/msr.c | 52 ++++ configs/coreboot64_defconfig | 3 + configs/coreboot_defconfig | 5 + configs/gardena-smart-gateway-mt7688_defconfig | 1 + doc/board/coreboot/coreboot.rst | 14 +- doc/develop/binman_tests.rst | 734 ++++++++++++++++++++++++++++++++++++++++++++++++ doc/develop/cedit.rst | 7 +- doc/develop/expo.rst | 26 +- doc/develop/index.rst | 1 + doc/usage/cmd/cedit.rst | 15 +- doc/usage/cmd/cpuid.rst | 68 +++++ doc/usage/cmd/font.rst | 6 +- doc/usage/cmd/msr.rst | 61 ++++ doc/usage/index.rst | 2 + drivers/timer/tsc_timer.c | 18 +- drivers/video/vidconsole-uclass.c | 4 +- drivers/video/video-uclass.c | 3 + drivers/virtio/virtio_blk.c | 91 +++++- drivers/virtio/virtio_blk.h | 47 ++++ include/blk.h | 9 +- include/cedit.h | 1 + include/expo.h | 43 ++- include/test/cedit-test.h | 30 +- include/video.h | 4 +- include/video_console.h | 8 + test/boot/cedit.c | 22 +- test/boot/expo.c | 26 +- test/boot/files/expo_ids.h | 3 +- test/boot/files/expo_layout.dts | 5 +- test/cmd/Makefile | 1 + test/cmd/cpuid.c | 22 ++ test/cmd/font.c | 21 +- test/cmd/msr.c | 38 +++ tools/binman/binman.rst | 10 +- tools/binman/btool/mkimage.py | 5 +- tools/binman/entries.rst | 7 + tools/binman/etype/fit.py | 57 +++- tools/binman/ftest.py | 95 +++++++ tools/binman/main.py | 6 +- tools/binman/test/340_fit_signature.dts | 98 +++++++ tools/binman/test/340_rsa2048.key | 28 ++ tools/binman/test/341_fit_signature.dts | 98 +++++++ tools/binman/test/342_fit_signature.dts | 61 ++++ tools/buildman/builder.py | 6 +- tools/buildman/toolchain.py | 8 +- tools/docker/Dockerfile | 7 +- tools/expo.py | 33 ++- tools/image-host.c | 2 +- tools/u_boot_pylib/test_util.py | 13 +- 87 files changed, 2241 insertions(+), 348 deletions(-) create mode 100644 cmd/x86/cpuid.c create mode 100644 cmd/x86/msr.c create mode 100644 doc/develop/binman_tests.rst create mode 100644 doc/usage/cmd/cpuid.rst create mode 100644 doc/usage/cmd/msr.rst create mode 100644 test/cmd/cpuid.c create mode 100644 test/cmd/msr.c create mode 100644 tools/binman/test/340_fit_signature.dts create mode 100644 tools/binman/test/340_rsa2048.key create mode 100644 tools/binman/test/341_fit_signature.dts create mode 100644 tools/binman/test/342_fit_signature.dts Regards, Simon

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[PATCH v2 0/4] Cleanup dma device in spl and move dma channel[0]
by Prasanth Babu Mantena 18 Oct '24

18 Oct '24

The channel allocation and deallocation for dma copy was happening on every dma transfer. This is a overhead for transactions like NAND, which does page reads recursively for complete data. So, moving the dma allocation to probe and implement corresponding remove function and cleanup dma device while exiting from spl. Enable SPL_DM_DEVICE_REMOVE, for device removal capability in SPL. v2 <==> v1 ========== 1> Improve subject of commit. 2> Add warning on dma device not found. 3> Do channel allocation only for udma and bcdma. Passthrough for all other types. Prasanth Babu Mantena (2): mach-k3: common.c: Remove dma device in spl exit configs: k3: Enable device removal in SPL Santhosh Kumar K (2): dma: ti: k3-udma: Move udma_probe() below all APIs dma: ti: k3-udma: Move DMA channel[0] allocation to probe and add udma_remove() arch/arm/mach-k3/common.c | 25 ++- configs/am62ax_evm_a53_defconfig | 1 + configs/am62ax_evm_r5_defconfig | 1 + configs/am62x_evm_a53_defconfig | 1 + configs/am62x_evm_r5_defconfig | 1 + configs/j7200_evm_a72_defconfig | 1 + configs/j7200_evm_r5_defconfig | 1 + configs/j721e_evm_a72_defconfig | 1 + configs/j721e_evm_r5_defconfig | 1 + configs/j721s2_evm_a72_defconfig | 1 + configs/j721s2_evm_r5_defconfig | 1 + configs/j784s4_evm_a72_defconfig | 1 + configs/j784s4_evm_r5_defconfig | 1 + drivers/dma/ti/k3-udma.c | 333 ++++++++++++++++--------------- 14 files changed, 209 insertions(+), 161 deletions(-) -- 2.34.1

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[PATCH] arm: dts: k3-j722s-binman: Add support for HS-SE
by Jayesh Choudhary 18 Oct '24

18 Oct '24

From: Udit Kumar <u-kumar1(a)ti.com> J722S SOC have two variants as HS-FS and HS-SE. Add binman support for HS-SE variant. Signed-off-by: Udit Kumar <u-kumar1(a)ti.com> [j-choudhary(a)ti.com: Fix load-dm-data entry and indentation] Signed-off-by: Jayesh Choudhary <j-choudhary(a)ti.com> --- arch/arm/dts/k3-j722s-binman.dtsi | 50 +++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm/dts/k3-j722s-binman.dtsi b/arch/arm/dts/k3-j722s-binman.dtsi index 28087a3b6f..6b52116657 100644 --- a/arch/arm/dts/k3-j722s-binman.dtsi +++ b/arch/arm/dts/k3-j722s-binman.dtsi @@ -7,6 +7,56 @@ #if IS_ENABLED(CONFIG_TARGET_J722S_R5_EVM) +&binman { + tiboot3-j722s-hs-evm.bin { + filename = "tiboot3-j722s-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>, + <&combined_dm_cfg>, <&sysfw_inner_cert>; + combined; + dm-data; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl>; + content-sysfw = <&ti_fs_enc>; + content-sysfw-data = <&combined_tifs_cfg>; + content-sysfw-inner-cert = <&sysfw_inner_cert>; + content-dm-data = <&combined_dm_cfg>; + load = <0x43c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x67000>; + load-dm-data = <0x43c7a800>; + }; + + u_boot_spl: u-boot-spl { + no-expanded; + }; + + ti_fs_enc: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + + combined_tifs_cfg: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + + sysfw_inner_cert: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + + combined_dm_cfg: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + &binman { tiboot3-j722s-hs-fs-evm.bin { filename = "tiboot3-j722s-hs-fs-evm.bin"; -- 2.34.1

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[PATCH] arm: mach-k3: j784s4: Add clk and power support for wkup_uart
by Bhavya Kapoor 18 Oct '24

18 Oct '24

Add clk and device data which can be used by wkup_uart driver to configure clocks and PSC. Signed-off-by: Bhavya Kapoor <b-kapoor(a)ti.com> --- arch/arm/mach-k3/r5/j784s4/clk-data.c | 18 +++++++++++++++++- arch/arm/mach-k3/r5/j784s4/dev-data.c | 1 + 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/r5/j784s4/clk-data.c b/arch/arm/mach-k3/r5/j784s4/clk-data.c index 793bcac932..97d969271e 100644 --- a/arch/arm/mach-k3/r5/j784s4/clk-data.c +++ b/arch/arm/mach-k3/r5/j784s4/clk-data.c @@ -67,6 +67,16 @@ static const char * const wkup_i2c_mcupll_bypass_out0_parents[] = { "gluelogic_hfosc0_clkout", }; +static const char * const wkup_usart_clksel_out0_parents[] = { + "hsdiv4_16fft_mcu_1_hsdivout3_clk", + "postdiv3_16fft_main_1_hsdivout5_clk", +}; + +static const char * const wkup_usart_mcupll_bypass_out0_parents[] = { + "wkup_usart_clksel_out0", + "gluelogic_hfosc0_clkout", +}; + static const char * const main_pll_hfosc_sel_out0_parents[] = { "gluelogic_hfosc0_clkout", "board_0_hfosc1_clk_out", @@ -206,7 +216,7 @@ static const struct clk_data clk_list[] = { CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", "wkup_fref_clksel_out0", 0x40d01000, 0, 2400000000), CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_mcu_2_foutvcop_clk", "wkup_fref_clksel_out0", 0x40d02000, 0, 2000000000), CLK_DIV("hsdiv1_16fft_mcu_0_hsdivout0_clk", "pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", 0x40d00080, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout3_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d0108c, 0, 7, 0, 0), + CLK_DIV_DEFFREQ("hsdiv4_16fft_mcu_1_hsdivout3_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d0108c, 0, 7, 0, 0, 96000000), CLK_DIV("hsdiv4_16fft_mcu_1_hsdivout4_clk", "pllfracf2_ssmod_16fft_mcu_1_foutvcop_clk", 0x40d01090, 0, 7, 0, 0), CLK_DIV_DEFFREQ("hsdiv4_16fft_mcu_2_hsdivout4_clk", "pllfracf2_ssmod_16fft_mcu_2_foutvcop_clk", 0x40d02090, 0, 7, 0, 0, 166666666), CLK_MUX_PLLCTRL("k3_pll_ctrl_wrap_wkup_0_sysclkout_clk", k3_pll_ctrl_wrap_wkup_0_sysclkout_clk_parents, 2, 0x42010000, 0), @@ -216,6 +226,8 @@ static const struct clk_data clk_list[] = { CLK_MUX("wkup_gpio0_clksel_out0", wkup_gpio0_clksel_out0_parents, 4, 0x43008070, 0, 2, 0), CLK_MUX("mcu_usart_clksel_out0", mcu_usart_clksel_out0_parents, 2, 0x40f081c0, 0, 1, 0), CLK_MUX("wkup_i2c_mcupll_bypass_out0", wkup_i2c_mcupll_bypass_out0_parents, 2, 0x43008060, 0, 1, 0), + CLK_MUX("wkup_usart_clksel_out0", wkup_usart_clksel_out0_parents, 2, 0x43008064, 0, 1, 0), + CLK_MUX("wkup_usart_mcupll_bypass_out0", wkup_usart_mcupll_bypass_out0_parents, 2, 0x43008060, 0, 1, 0), CLK_MUX("main_pll_hfosc_sel_out0", main_pll_hfosc_sel_out0_parents, 2, 0x43008080, 0, 1, 0), CLK_MUX("main_pll_hfosc_sel_out1", main_pll_hfosc_sel_out1_parents, 2, 0x43008084, 0, 1, 0), CLK_MUX("main_pll_hfosc_sel_out12", main_pll_hfosc_sel_out12_parents, 2, 0x430080b0, 0, 1, 0), @@ -409,6 +421,10 @@ static const struct dev_clk soc_dev_clk_data[] = { DEV_CLK(392, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(395, 0, "usart_programmable_clock_divider_out8"), DEV_CLK(395, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), + DEV_CLK(397, 0, "wkup_usart_mcupll_bypass_out0"), + DEV_CLK(397, 1, "wkup_usart_clksel_out0"), + DEV_CLK(397, 2, "gluelogic_hfosc0_clkout"), + DEV_CLK(397, 7, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"), DEV_CLK(398, 0, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(398, 1, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"), DEV_CLK(398, 2, "postdiv3_16fft_main_1_hsdivout7_clk"), diff --git a/arch/arm/mach-k3/r5/j784s4/dev-data.c b/arch/arm/mach-k3/r5/j784s4/dev-data.c index d66ba8b16e..b32b4ba958 100644 --- a/arch/arm/mach-k3/r5/j784s4/dev-data.c +++ b/arch/arm/mach-k3/r5/j784s4/dev-data.c @@ -62,6 +62,7 @@ static struct ti_dev soc_dev_list[] = { PSC_DEV(149, &soc_lpsc_list[0]), PSC_DEV(167, &soc_lpsc_list[1]), PSC_DEV(279, &soc_lpsc_list[1]), + PSC_DEV(397, &soc_lpsc_list[1]), PSC_DEV(161, &soc_lpsc_list[2]), PSC_DEV(162, &soc_lpsc_list[3]), PSC_DEV(160, &soc_lpsc_list[4]), -- 2.34.1

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[PATCH v1 1/1] cmd: irq: Move do_irqinfo() prototype to a header file
by Andy Shevchenko 18 Oct '24

18 Oct '24

Move do_irqinfo() prototype to a header file, otherwise compiler is not happy: arch/x86/lib/interrupts.c:130:5: warning: no previous prototype for ‘do_irqinfo’ [-Wmissing-prototypes] Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- cmd/irq.c | 3 --- include/irq_func.h | 3 +++ 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cmd/irq.c b/cmd/irq.c index 655aba576a8b..da223b4b2cce 100644 --- a/cmd/irq.c +++ b/cmd/irq.c @@ -29,9 +29,6 @@ U_BOOT_CMD( "[on, off]" ); -/* Implemented in $(CPU)/interrupts.c */ -int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); - U_BOOT_CMD( irqinfo, 1, 1, do_irqinfo, "print information about IRQs", diff --git a/include/irq_func.h b/include/irq_func.h index c7c4babbfc90..28ec0bd83038 100644 --- a/include/irq_func.h +++ b/include/irq_func.h @@ -23,4 +23,7 @@ void reset_timer(void); void enable_interrupts(void); int disable_interrupts(void); +/* Implemented in $(CPU)/interrupts.c */ +int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); + #endif -- 2.43.0.rc1.1336.g36b5255a03ac

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[PATCH] arm: mach-k3: am62: fixup thermal cooling device cpus
by Parth Pancholi 18 Oct '24

18 Oct '24

From: Parth Pancholi <parth.pancholi(a)toradex.com> AM62x devices now support CPU throttling based on thermal alerts with a Linux commit 10e7bfd8114c ("arm64: dts: ti: k3-am62: Enable CPU freq throttling on thermal alert"). However, this functionality does not work correctly across all variants of the AM62x SoCs which have different numbers of Cortex-A CPU cores: AM62x1 (1 core), AM62x2 (2 cores), and AM62x4 (4 cores). On single-core and dual-core AM62x devices, the following error is observed in the Linux kernel: OF: /thermal-zones/main0-thermal/cooling-maps/map0: could not find phandle 94 OF: /thermal-zones/main1-thermal/cooling-maps/map0: could not find phandle 94 This commit adds a fixup to dynamically adjust the cooling-device nodes in the thermal zones based on the actual number of CPU cores available. This resolves the issue of CPU throttling not working correctly on single-core and dual-core AM62x devices, while maintaining the functionality for AM62x quad-core devices. A similar approach is implemented for example on i.MX8MM SoC. Signed-off-by: Parth Pancholi <parth.pancholi(a)toradex.com> --- arch/arm/mach-k3/am62x/am625_fdt.c | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/mach-k3/am62x/am625_fdt.c b/arch/arm/mach-k3/am62x/am625_fdt.c index 8fe200a42318..ab9b573f3cff 100644 --- a/arch/arm/mach-k3/am62x/am625_fdt.c +++ b/arch/arm/mach-k3/am62x/am625_fdt.c @@ -5,6 +5,7 @@ #include <asm/hardware.h> #include <fdt_support.h> +#include <fdtdec.h> #include "../common_fdt.h" @@ -75,12 +76,47 @@ static void fdt_fixup_thermal_zone_nodes_am625(void *blob, int maxc) } } +static void fdt_fixup_thermal_cooling_device_cpus_am625(void *blob, int core_nr) +{ + static const char * const thermal_path[] = { + "/thermal-zones/main0-thermal/cooling-maps/map0", + "/thermal-zones/main1-thermal/cooling-maps/map0" + }; + + int node, cnt, i, ret; + u32 cooling_dev[12]; + + for (i = 0; i < ARRAY_SIZE(thermal_path); i++) { + int new_count = core_nr * 3; /* Each CPU has 3 entries */ + int j; + + node = fdt_path_offset(blob, thermal_path[i]); + if (node < 0) + continue; /* Not found, skip it */ + + cnt = fdtdec_get_int_array_count(blob, node, "cooling-device", + cooling_dev, ARRAY_SIZE(cooling_dev)); + if (cnt < 0) + continue; + + for (j = 0; j < new_count; j++) + cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); + + ret = fdt_setprop(blob, node, "cooling-device", cooling_dev, + new_count * sizeof(u32)); + if (ret < 0) + printf("Error %s, cooling-device setprop failed %d\n", + thermal_path[i], ret); + } +} + int ft_system_setup(void *blob, struct bd_info *bd) { fdt_fixup_cores_nodes_am625(blob, k3_get_core_nr()); fdt_fixup_gpu_nodes_am625(blob, k3_has_gpu()); fdt_fixup_pru_node_am625(blob, k3_has_pru()); fdt_fixup_thermal_zone_nodes_am625(blob, k3_get_max_temp()); + fdt_fixup_thermal_cooling_device_cpus_am625(blob, k3_get_core_nr()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000); -- 2.34.1

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[PATCH] lib: fdtdec: Parse the gzip/lzo headers only when dependencies have met
by Prabhakar 18 Oct '24

18 Oct '24

From: Lad Prabhakar <prabhakar.mahadev-lad.rj(a)bp.renesas.com> It might happen that CONFIG_GZIP and CONFIG_LZO are enabled but we might have CONFIG_MULTI_DTB_FIT_LZO enabled in this case in the code path of uncompress_blob() we parse the gzip headers first which results in `Error: Bad gzipped data` being printed. To avoid this parse the gzip/lzo headers only when dependencies have met. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj(a)bp.renesas.com> --- lib/fdtdec.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 6865f78c70..52f431c197 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1172,10 +1172,10 @@ static int uncompress_blob(const void *src, ulong sz_src, void **dstp) void *dst; int rc; - if (CONFIG_IS_ENABLED(GZIP)) + if (CONFIG_IS_ENABLED(GZIP) && CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP)) if (gzip_parse_header(src, sz_in) >= 0) gzip = 1; - if (CONFIG_IS_ENABLED(LZO)) + if (CONFIG_IS_ENABLED(LZO) && CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)) if (!gzip && lzop_is_valid_header(src)) lzo = 1; -- 2.43.0

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