October 2024 - U-Boot

radxa cm3 2024.01 mmc write error
by Belisko Marek 04 Nov '24

04 Nov '24

Hi, I'm playing with radxa cme and mainline u-boot 2024.01 (present in scarthgap yocto). I realized that mmc write fails all the time like: => md.l $loadaddr 00c00800: ff7ff7eb fffdffff fffffff5 ffff9fff ................ => mmc write $loadaddr 1fc0 10 MMC write: dev # 0, block # 8128, count 16 ... mmc write failed 0 blocks written: ERROR 1fc0 = 8128 is according to rockchip gpt table u-boot env partition. Is there something I'm doing wrong or its regression? Thanks and regards, marek -- as simple and primitive as possible ------------------------------------------------- Marek Belisko - OPEN-NANDRA Freelance Developer Ruska Nova Ves 219 | Presov, 08005 Slovak Republic Tel: +421 915 052 184 skype: marekwhite twitter: #opennandra web: http://open-nandra.com

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[PATCH] mtd: spi-nor: Store stacked memories sizes in parameter array
by Prasad Kummari 04 Nov '24

04 Nov '24

Each flash connected in stacked mode should have a array of integers to the nor structure to store each flash size. This array stores the sizes parameters of each flash connected in a stacked or parallel mode. The current stacked implementation assumes a maximum of two flashes connected in stacked mode, with both flashes being of the same make but potentially differing in size. Thus, except for the sizes, all other flash parameters of both flashes are identical. In the current implementation of stacked mode operation, the full chip erase in stack mode does not work correctly for the upper flash. This problem occurs because spi-nor cannot set the SPI_XFER_U_PAGE flag. It only sets this flag for the lower flash and calls spi_nor_erase_chip(), which erases only the lower flash. Also, spi-nor does not know which chip select values to use. It will select the upper flash if SPI_XFER_U_PAGE is set, otherwise, it will select the lower flash. To fix this issue, spi-nor needs to send the full chip erase command to both the upper and lower flash. Since spi-nor does not know the chip select values, it will determine which flash to erase based on the individual flash sizes stored in array of params. The code changes will loop through the number of flashes and set the SPI_XFER_U_PAGE flag to indicate the upper flash. Using the individual index, spi-nor will call spi_nor_erase_chip() for each flash and wait until the chip is ready. Need to rebase top of this commit: https://lore.kernel.org/u-boot/20241018082644.22495-1-venkatesh.abbarapu@am… Signed-off-by: Prasad Kummari <prasad.kummari(a)amd.com> --- drivers/mtd/spi/spi-nor-core.c | 47 ++++++++++++++++++++++++++++++---- include/linux/mtd/spi-nor.h | 3 +++ 2 files changed, 45 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 2034d84251..0d96373a1e 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1063,7 +1063,7 @@ static int spi_nor_erase_chip(struct spi_nor *nor) if (ret) return ret; - return nor->mtd.size; + return ret; } /* @@ -1104,7 +1104,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) struct spi_nor *nor = mtd_to_spi_nor(mtd); u32 addr, len, rem, offset, max_size; bool addr_known = false; - int ret, err; + int ret, err, idx = 0, rc = 0; dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, (long long)instr->len); @@ -1155,7 +1155,35 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { - ret = spi_nor_erase_chip(nor); + if (nor->flags & SNOR_F_HAS_STACKED) { + + ret = 0; idx = 0; + while (idx < nor->num_flash) { + if (idx == 1) { + nor->spi->flags |= SPI_XFER_U_PAGE; + rc = write_enable(nor); + if (rc < 0) + goto erase_err; + } + rc = spi_nor_erase_chip(nor); + if (rc < 0) + goto erase_err; + + rc = spi_nor_erase_chip_wait_till_ready(nor, + nor->cs_params[idx]); + if (rc) + goto erase_err; + + ret += nor->cs_params[idx]; + idx++; + } + + } else { + ret = spi_nor_erase_chip(nor); + if (ret < 0) + goto erase_err; + ret = nor->mtd.size; + } } else { ret = spi_nor_erase_sector(nor, offset); } @@ -1166,7 +1194,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) len -= ret; if (max_size == mtd->size && - !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { + !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE) && !idx) { ret = spi_nor_erase_chip_wait_till_ready(nor, mtd->size); } else { ret = spi_nor_wait_till_ready(nor); @@ -3204,6 +3232,9 @@ static int spi_nor_init_params(struct spi_nor *nor, spi_nor_post_sfdp_fixups(nor, params); } #if CONFIG_IS_ENABLED(DM_SPI) && CONFIG_IS_ENABLED(SPI_ADVANCE) + + nor->num_flash = 0; + /* * The flashes that are connected in stacked mode should be of same make. * Except the flash size all other properties are identical for all the @@ -3225,6 +3256,7 @@ static int spi_nor_init_params(struct spi_nor *nor, if (!(nor->spi->flags & SPI_XFER_STACKED)) nor->spi->flags |= SPI_XFER_STACKED; } + nor->num_flash++; } i = 0; @@ -3242,13 +3274,18 @@ static int spi_nor_init_params(struct spi_nor *nor, if (!(nor->flags & SNOR_F_HAS_PARALLEL)) nor->flags |= SNOR_F_HAS_PARALLEL; } + nor->num_flash++; } if (nor->flags & (SNOR_F_HAS_STACKED | SNOR_F_HAS_PARALLEL)) { params->size = 0; - for (idx = 0; idx < SNOR_FLASH_CNT_MAX; idx++) + + for (idx = 0; idx < nor->num_flash; idx++) { + nor->cs_params[idx] = flash_size[idx]; params->size += flash_size[idx]; + } } + /* * In parallel-memories the erase operation is * performed on both the flashes simultaneously diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 1ae586b2e5..f0719206c5 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -616,6 +616,9 @@ struct spi_nor { u32 size; u32 sector_size; u32 erase_size; +/* Number of flashes connected in parallel or stacked mode parameters */ + u32 num_flash; + u64 cs_params[SNOR_FLASH_CNT_MAX]; }; #ifndef __UBOOT__ -- 2.25.1

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[PATCH] test/cmd/mem_copy.c: Use CONFIG_SYS_LOAD_ADDR for base
by Tom Rini 03 Nov '24

03 Nov '24

When reading/writing to memory we cannot assume that a base address of 0x0 is correct and functional. So use CONFIG_SYS_LOAD_ADDR as the base from which we add a bit more padding and being our tests. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- test/cmd/mem_copy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/cmd/mem_copy.c b/test/cmd/mem_copy.c index 1ba0cebbbe04..67eca328777a 100644 --- a/test/cmd/mem_copy.c +++ b/test/cmd/mem_copy.c @@ -21,7 +21,7 @@ struct param { static int do_test(struct unit_test_state *uts, const char *suffix, int d, int s, int count) { - const long addr = 0x1000; + const long addr = CONFIG_SYS_LOAD_ADDR + 0x1000; u8 shadow[BUF_SIZE]; u8 *buf; int i, w, bytes; -- 2.43.0

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[PATCH] test/py: spi: prevent overwriting relocation memory
by Padmarao Begari 03 Nov '24

03 Nov '24

Update spi negative test case to prevent SF command from overwriting relocation memory area. Signed-off-by: Padmarao Begari <padmarao.begari(a)amd.com> --- test/py/tests/test_spi.py | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/test/py/tests/test_spi.py b/test/py/tests/test_spi.py index 3160d58540..caca930327 100644 --- a/test/py/tests/test_spi.py +++ b/test/py/tests/test_spi.py @@ -693,4 +693,16 @@ def test_spi_negative(u_boot_console): u_boot_console, 'read', offset, size, addr, 1, error_msg, EXPECTED_READ ) + # Read to relocation address + output = u_boot_console.run_command('bdinfo') + m = re.search('relocaddr\s*= (.+)', output) + res_area = int(m.group(1), 16) + + start = 0 + size = 0x2000 + error_msg = 'ERROR: trying to overwrite reserved memory' + flash_ops( + u_boot_console, 'read', start, size, res_area, 1, error_msg, EXPECTED_READ + ) + i = i + 1 -- 2.25.1

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[PATCH v2] scsi: fix disk capacity too small by one sector
by Julius Lehmann 03 Nov '24

03 Nov '24

SCSI READ CAPACITY reports the address of the last block and the block size. The total number of blocks is thus last block address plus one. This also fixes the corresponding test case. --- This patch fixes the disk size reported by scsi. Up until now, the reported disk size is too small by one sector. Read/Write operations on other sectors have not been affected. Trying to partition scsi backed storage via ums has resulted in "storage too small" errors. doc: https://linux.die.net/man/8/sg_readcap Signed-off-by: Julius Lehmann <lehmanju(a)devpi.de> --- Changes in v2: - fixed corresponding test case - Link to v1: https://lore.kernel.org/r/20241014-fix-scsi-disksize-v1-1-0edb9959b580@devp… --- drivers/scsi/scsi.c | 2 ++ test/boot/bootdev.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 51cacf3479236be6c6ea3e7d15b87e03f10e7f3a..bcdeda95ed1514119057cc67974fec465cf5672c 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -309,6 +309,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, ((unsigned long)pccb->pdata[5] << 16) | ((unsigned long)pccb->pdata[6] << 8) | ((unsigned long)pccb->pdata[7]); + *capacity += 1; return 0; } @@ -332,6 +333,7 @@ static int scsi_read_capacity(struct udevice *dev, struct scsi_cmd *pccb, ((uint64_t)pccb->pdata[5] << 16) | ((uint64_t)pccb->pdata[6] << 8) | ((uint64_t)pccb->pdata[7]); + *capacity += 1; *blksz = ((uint64_t)pccb->pdata[8] << 56) | ((uint64_t)pccb->pdata[9] << 48) | diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c index c635d06ec25d4bf274099f153648d34f5a845436..bc632a3d14124f5f821c4625e5b29b7d352f7161 100644 --- a/test/boot/bootdev.c +++ b/test/boot/bootdev.c @@ -621,7 +621,7 @@ static int bootdev_test_next_label(struct unit_test_state *uts) ut_assertok(bootdev_next_label(&iter, &dev, &mflags)); ut_assert_nextline("scanning bus for devices..."); ut_assert_skip_to_line( - " Capacity: 1.9 MB = 0.0 GB (4095 x 512)"); + " Capacity: 2.0 MB = 0.0 GB (4096 x 512)"); ut_assert_console_end(); ut_assertnonnull(dev); ut_asserteq_str("scsi.id0lun0.bootdev", dev->name); --- base-commit: 29e5dbc55c64c6450f066c55a5bc48bd1717aa1b change-id: 20241014-fix-scsi-disksize-d73a017cadf4 Best regards, -- Julius Lehmann <lehmanju(a)devpi.de>

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[PATCH v2] acpi_table: Fix coverity defect in acpi_write_spcr
by Patrick Rudolph 03 Nov '24

03 Nov '24

Fix "Integer handling issues (SIGN_EXTENSION)" in newly added code: Cast serial_info.reg_offset to u64 to prevent an integer overflow when shifted too many bits to the left. Currently this never happens as the shift is supposed to be less than 4. Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- lib/acpi/acpi_table.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c index 6473d95c10..150f75027a 100644 --- a/lib/acpi/acpi_table.c +++ b/lib/acpi/acpi_table.c @@ -420,7 +420,7 @@ int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, static int acpi_write_spcr(struct acpi_ctx *ctx, const struct acpi_writer *entry) { struct serial_device_info serial_info = {0}; - ulong serial_address, serial_offset; + u64 serial_address, serial_offset; struct acpi_table_header *header; struct acpi_spcr *spcr; struct udevice *dev; @@ -473,7 +473,7 @@ static int acpi_write_spcr(struct acpi_ctx *ctx, const struct acpi_writer *entry } serial_width = serial_info.reg_width * 8; - serial_offset = serial_info.reg_offset << serial_info.reg_shift; + serial_offset = ((u64)serial_info.reg_offset) << serial_info.reg_shift; serial_address = serial_info.addr + serial_offset; /* Encode register access size */ @@ -495,7 +495,7 @@ static int acpi_write_spcr(struct acpi_ctx *ctx, const struct acpi_writer *entry break; } - debug("UART type %u @ %lx\n", spcr->interface_type, serial_address); + debug("UART type %u @ %llx\n", spcr->interface_type, serial_address); /* Fill GAS */ spcr->serial_port.space_id = space_id; -- 2.46.2

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[PATCH 1/1] lmb: remove __maybe_unused from lmb_map_update_notify
by Heinrich Schuchardt 03 Nov '24

03 Nov '24

Function lmb_map_update_notify() is always referenced. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- lib/lmb.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/lib/lmb.c b/lib/lmb.c index eec99c185ee..802fdb84489 100644 --- a/lib/lmb.c +++ b/lib/lmb.c @@ -38,9 +38,7 @@ static bool lmb_should_notify(enum lmb_flags flags) CONFIG_IS_ENABLED(EFI_LOADER); } -static int __maybe_unused lmb_map_update_notify(phys_addr_t addr, - phys_size_t size, - u8 op) +static int lmb_map_update_notify(phys_addr_t addr, phys_size_t size, u8 op) { u64 efi_addr; u64 pages; -- 2.45.2

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[PATCH v6 00/19] labgrid: Provide an integration with Labgrid
by Simon Glass 02 Nov '24

02 Nov '24

Labgrid provides access to a hardware lab in an automated way. It is possible to boot U-Boot on boards in the lab without physically touching them. It relies on relays, USB UARTs and SD muxes, among other things. By way of background, about 4 years ago I wrong a thing called Labman[1] which allowed my lab of about 30 devices to be operated remotely, using tbot for the console and build integration. While it worked OK and I used it for many bisects, I didn't take it any further. It turns out that there was already an existing program, called Labgrid, which I did not know about at time (thank you Tom for telling me). It is more rounded than Labman and has a number of advantages: - does not need udev rules, mostly - has several existing users who rely on it - supports multiple machines exporting their devices It lacks a 'lab check' feature and a few other things, but these can be remedied. On and off over the past several weeks I have been experimenting with Labgrid. I have managed to create an initial U-Boot integration (this series) by adding various features to Labgrid[2] and the U-Boot test hooks. I hope that this might inspire others to set up boards and run tests automatically, rather than relying on infrequent, manual test. Perhaps it may even be possible to have a number of labs available. Included in the integration are a number of simple scripts which make it easy to connect to boards and run tests: ub-int <target> Build and boot on a target, starting an interactive session ub-cli <target> Build and boot on a target, ensure U-Boot starts and provide an interactive session from there ub-smoke <target> Smoke test U-Boot to check that it boots to a prompt on a target ub-bisect <target> Bisect a git tree to locate a failure on a particular target ub-pyt <target> <testspec> Run U-Boot pytests on a target Some of these help to provide the same tbot[4] workflow which I have relied on for several years, albeit much simpler versions. The goal here is to create some sort of script which can collect patches from the mailing list, apply them and test them on a selection of boards. I suspect that script already exists, so please let me know what you suggest. I hope you find this interesting and take a look! [1] https://github.com/sjg20/u-boot/tree/lab6a [2] https://github.com/labgrid-project/labgrid/pull/1411 [3] https://github.com/sjg20/uboot-test-hooks/tree/labgrid [4] https://tbot.tools/index.html Changes in v6: - Rebase without an earlier patch - Avoid doing the special shutdown unless USE_LABGRID is enabled - Drop patch 'test: Pass stderr to stdout' Changes in v5: - Add a few more comments - Comment out the debugging, which might be useful later - Add a patch to support testing with two board-builds Changes in v4: - Expand the commit message Changes in v3: - Split out most patches into two new series and update cover letter Changes in v2: - Only disable echo if a terminal is detected - Avoid running a docker image for skipped lab tests Simon Glass (19): test: Allow signaling that U-Boot is ready test: Use a constant for the test timeout test: Release board after tests complete test: Allow connecting to a running board test: Avoid failing skipped tests test: Create a common function to get the config test: Introduce the concept of a role test: Move the receive code into a function test: Separate out the exception handling test: Detect dead connections test: Tidy up remaining exceptions test: Introduce lab mode test: Improve handling of sending commands test: Fix mulptiplex_log typo test: Avoid double echo when starting up test: Try to shut down the lab console gracefully test: Add a section for closing the connection test: Support testing with two board-builds CI: Allow running tests on sjg lab .gitlab-ci.yml | 153 +++++++++++++++++++++++++ test/py/conftest.py | 119 +++++++++++++++++--- test/py/u_boot_console_base.py | 154 ++++++++++++++++++-------- test/py/u_boot_console_exec_attach.py | 31 ++++-- test/py/u_boot_spawn.py | 124 ++++++++++++++++++--- test/test-main.c | 16 ++- 6 files changed, 506 insertions(+), 91 deletions(-) -- 2.43.0

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[PATCH 0/2] Import environment variables from FIT configuration
by lukas.funke-oss＠weidmueller.com 02 Nov '24

02 Nov '24

From: Lukas Funke <lukas.funke(a)weidmueller.com> This series enables U-Boot to import environment variables from the selectd FIT configuration. One use-case is that the overall build process enriches the FIT configuration node with dm-verity information which should be injected into the kernel commandline. U-Boot will then read these (possibly signed) environment variables and put them into the actual Kernel commandline using variable replacement (see CONFIG_BOOTARGS_SUBST). Example: Config: CONFIG_BOOTARGS_SUBST=y CONFIG_ENV_IMPORT_FIT_CONF=y FIT: configurations { default = "conf-1"; conf-1 { kernel = "kernel-1"; fdt = "fdt-1"; env,dm-verity-args = "dm-mod.create=..."; env,bar = "someothervalue"; }; }; U-Boot cmdline: => env set bootargs="rootfstype=squashfs root=/dev/xyz ${dm-verity-args} ro" => boot Kernel cmdline: Kernel command line: rootfstype=squashfs ... dm-mod.create= ... Lukas Funke (2): env: Add function to import environment variables from FIT conf node test: fit: Add test to check environment extraction from FIT conf node boot/image-fit.c | 4 ++++ configs/sandbox_defconfig | 1 + env/Kconfig | 10 +++++++++ env/common.c | 28 ++++++++++++++++++++++++ include/env.h | 11 ++++++++++ test/py/tests/test_fit.py | 45 +++++++++++++++++++++++++++++++++++++++ 6 files changed, 99 insertions(+) -- 2.30.2

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[PATCH v2] sandbox: Add a build without CMDLINE
by Simon Glass 02 Nov '24

02 Nov '24

Something this breaks, so add a build to keep it working. Since sandbox enables a lot of options, it is a good board to use. The new config is created simply by copying the existing sandbox and turning off CMDLINE Once we have tests for non-CMDLINE operation, this can be adjusted to run those tests. Create a new build which will be picked up by CI. Update the maintainer entry as well. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Create a new build instead of messing with CI MAINTAINERS | 1 + configs/sandbox_nocmdline_defconfig | 365 ++++++++++++++++++++++++++++ 2 files changed, 366 insertions(+) create mode 100644 configs/sandbox_nocmdline_defconfig diff --git a/MAINTAINERS b/MAINTAINERS index 8e375e75e53..2affcd08939 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1544,6 +1544,7 @@ SANDBOX M: Simon Glass <sjg(a)chromium.org> S: Maintained F: arch/sandbox/ +F: configs/sandbox* F: doc/arch/sandbox.rst F: drivers/*/*sandbox*.c F: include/dt-bindings/*/sandbox*.h diff --git a/configs/sandbox_nocmdline_defconfig b/configs/sandbox_nocmdline_defconfig new file mode 100644 index 00000000000..aade1d44236 --- /dev/null +++ b/configs/sandbox_nocmdline_defconfig @@ -0,0 +1,365 @@ +CONFIG_TEXT_BASE=0 +CONFIG_SYS_MALLOC_LEN=0x6000000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_DM_RESET=y +CONFIG_SYS_LOAD_ADDR=0x0 +CONFIG_PRE_CON_BUF_ADDR=0xf0000 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00100000 +CONFIG_SYS_MEMTEST_END=0x00101000 +CONFIG_EFI_SECURE_BOOT=y +CONFIG_EFI_RT_VOLATILE_STORE=y +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y +CONFIG_EFI_CAPSULE_AUTHENTICATE=y +CONFIG_EFI_CAPSULE_CRT_FILE="board/sandbox/capsule_pub_key_good.crt" +CONFIG_BUTTON_CMD=y +CONFIG_FIT=y +CONFIG_FIT_RSASSA_PSS=y +CONFIG_FIT_CIPHER=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTMETH_ANDROID=y +CONFIG_UPL=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_MEASURED_BOOT=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_BOOTSTAGE_FDT=y +CONFIG_BOOTSTAGE_STASH=y +CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Enter password \"a\" in %d seconds to stop autoboot\n" +CONFIG_AUTOBOOT_ENCRYPTION=y +CONFIG_AUTOBOOT_SHA256_FALLBACK=y +CONFIG_AUTOBOOT_NEVER_TIMEOUT=y +CONFIG_AUTOBOOT_STOP_STR_ENABLE=y +CONFIG_AUTOBOOT_STOP_STR_CRYPT="$5$rounds=640000$HrpE65IkB8CM5nCL$BKT3QdF98Bo8fJpTr9tjZLZQyzqPASBY20xuK5Rent9" +CONFIG_IMAGE_PRE_LOAD=y +CONFIG_IMAGE_PRE_LOAD_SIG=y +CONFIG_CEDIT=y +CONFIG_CONSOLE_RECORD=y +CONFIG_CONSOLE_RECORD_OUT_SIZE=0x6000 +CONFIG_PRE_CONSOLE_BUFFER=y +CONFIG_LOG=y +CONFIG_LOG_MAX_LEVEL=9 +CONFIG_LOG_DEFAULT_LEVEL=6 +CONFIG_LOGF_FUNC=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_STACKPROTECTOR=y +CONFIG_CMD_CPU=y +CONFIG_CMD_LICENSE=y +CONFIG_CMD_SMBIOS=y +CONFIG_CMD_BOOTM_PRE_LOAD=y +CONFIG_CMD_BOOTZ=y +CONFIG_BOOTM_OPENRTOS=y +CONFIG_BOOTM_OSE=y +CONFIG_CMD_BOOTEFI_HELLO=y +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_ABOOTIMG=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_ERASEENV=y +CONFIG_CMD_ENV_CALLBACK=y +CONFIG_CMD_ENV_FLAGS=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_NVEDIT_INFO=y +CONFIG_CMD_NVEDIT_LOAD=y +CONFIG_CMD_NVEDIT_SELECT=y +CONFIG_LOOPW=y +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEM_SEARCH=y +CONFIG_CMD_MX_CYCLIC=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DEMO=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPIO_READ=y +CONFIG_CMD_PWM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_IDE=y +CONFIG_CMD_I2C=y +CONFIG_CMD_LOADM=y +CONFIG_CMD_LSBLK=y +CONFIG_CMD_MTD=y +CONFIG_CMD_MUX=y +CONFIG_CMD_OSD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_PCI_MPS=y +CONFIG_CMD_READ=y +CONFIG_CMD_REMOTEPROC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_TEMPERATURE=y +CONFIG_CMD_USB=y +CONFIG_CMD_RKMTD=y +CONFIG_CMD_WDT=y +CONFIG_CMD_WRITE=y +CONFIG_CMD_AXI=y +CONFIG_CMD_CAT=y +CONFIG_CMD_SETEXPR_FMT=y +CONFIG_CMD_XXD=y +CONFIG_CMD_DHCP6=y +CONFIG_BOOTP_DNS2=y +CONFIG_CMD_PCAP=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TFTPSRV=y +CONFIG_CMD_RARP=y +CONFIG_CMD_CDP=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_IPV6_ROUTER_DISCOVERY=y +CONFIG_CMD_ETHSW=y +CONFIG_CMD_2048=y +CONFIG_CMD_BMP=y +CONFIG_CMD_BOOTCOUNT=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_RTC=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PAUSE=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_SOUND=y +CONFIG_CMD_QFW=y +CONFIG_CMD_PSTORE=y +CONFIG_CMD_PSTORE_MEM_ADDR=0x3000000 +CONFIG_CMD_BOOTSTAGE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_AES=y +CONFIG_CMD_TPM=y +CONFIG_CMD_TPM_TEST=y +CONFIG_CMD_SCMI=y +CONFIG_CMD_BTRFS=y +CONFIG_CMD_CBFS=y +CONFIG_CMD_CRAMFS=y +CONFIG_CMD_EROFS=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_STACKPROTECTOR_TEST=y +CONFIG_MAC_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_EXT4=y +CONFIG_ENV_EXT4_INTERFACE="host" +CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0" +CONFIG_ENV_IMPORT_FDT=y +CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_NETCONSOLE=y +CONFIG_IP_DEFRAG=y +CONFIG_BOOTP_SERVERIP=y +CONFIG_IPV6=y +CONFIG_DM_DMA=y +CONFIG_DEBUG_DEVRES=y +CONFIG_SIMPLE_PM_BUS=y +CONFIG_ADC=y +CONFIG_ADC_SANDBOX=y +CONFIG_AXI=y +CONFIG_AXI_SANDBOX=y +CONFIG_BLKMAP=y +CONFIG_SYS_IDE_MAXBUS=1 +CONFIG_SYS_ATA_BASE_ADDR=0x100 +CONFIG_SYS_ATA_STRIDE=4 +CONFIG_SYS_ATA_DATA_OFFSET=0 +CONFIG_SYS_ATA_REG_OFFSET=1 +CONFIG_SYS_ATA_ALT_OFFSET=2 +CONFIG_SYS_ATA_IDE0_OFFSET=0 +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_DM_BOOTCOUNT=y +CONFIG_DM_BOOTCOUNT_RTC=y +CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y +CONFIG_DM_BOOTCOUNT_SYSCON=y +CONFIG_BUTTON_ADC=y +CONFIG_BUTTON_GPIO=y +CONFIG_CLK=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_CLK_K210=y +CONFIG_CLK_K210_SET_RATE=y +CONFIG_SANDBOX_CLK_CCF=y +CONFIG_CLK_SCMI=y +CONFIG_CPU=y +CONFIG_DM_DEMO=y +CONFIG_DM_DEMO_SIMPLE=y +CONFIG_DM_DEMO_SHAPE=y +CONFIG_DFU_SF=y +CONFIG_DMA=y +CONFIG_DMA_CHANNELS=y +CONFIG_SANDBOX_DMA=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_ARM_FFA_TRANSPORT=y +CONFIG_GPIO_HOG=y +CONFIG_DM_GPIO_LOOKUP_LABEL=y +CONFIG_QCOM_PMIC_GPIO=y +CONFIG_SANDBOX_GPIO=y +CONFIG_DM_HWSPINLOCK=y +CONFIG_HWSPINLOCK_SANDBOX=y +CONFIG_I2C_CROS_EC_TUNNEL=y +CONFIG_I2C_CROS_EC_LDO=y +CONFIG_DM_I2C_GPIO=y +CONFIG_I2C_MUX=y +CONFIG_I2C_ARB_GPIO_CHALLENGE=y +CONFIG_CROS_EC_KEYB=y +CONFIG_I8042_KEYB=y +CONFIG_IOMMU=y +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_DM_MAILBOX=y +CONFIG_SANDBOX_MBOX=y +CONFIG_MISC=y +CONFIG_NVMEM=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_I2C=y +CONFIG_CROS_EC_LPC=y +CONFIG_CROS_EC_SANDBOX=y +CONFIG_CROS_EC_SPI=y +CONFIG_P2SB=y +CONFIG_PWRSEQ=y +CONFIG_I2C_EEPROM=y +CONFIG_MMC_PCI=y +CONFIG_MMC_SANDBOX=y +CONFIG_MMC_SDHCI=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_MAX_NAND_DEVICE=8 +CONFIG_SYS_NAND_USE_FLASH_BBT=y +CONFIG_NAND_SANDBOX=y +CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_PAGE_SIZE=0x200 +CONFIG_SPI_FLASH_SANDBOX=y +CONFIG_BOOTDEV_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_NVMXIP_QSPI=y +CONFIG_MULTIPLEXER=y +CONFIG_MUX_MMIO=y +CONFIG_NVME_PCI=y +CONFIG_PCI_REGION_MULTI_ENTRY=y +CONFIG_PCI_FTPCI100=y +CONFIG_PCI_SANDBOX=y +CONFIG_PHY=y +CONFIG_PHY_SANDBOX=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_SANDBOX=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_POWER_DOMAIN=y +CONFIG_SANDBOX_POWER_DOMAIN=y +CONFIG_SCMI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_ACT8846=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_PMIC_MAX77686=y +CONFIG_DM_PMIC_MC34708=y +CONFIG_PMIC_QCOM=y +CONFIG_PMIC_RK8XX=y +CONFIG_PMIC_S2MPS11=y +CONFIG_DM_PMIC_SANDBOX=y +CONFIG_PMIC_S5M8767=y +CONFIG_PMIC_TPS65090=y +CONFIG_DM_REGULATOR=y +CONFIG_REGULATOR_ACT8846=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_MAX77686=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_REGULATOR_S5M8767=y +CONFIG_DM_REGULATOR_SANDBOX=y +CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_REGULATOR_SCMI=y +CONFIG_DM_PWM=y +CONFIG_PWM_CROS_EC=y +CONFIG_PWM_SANDBOX=y +CONFIG_RAM=y +CONFIG_DM_REBOOT_MODE=y +CONFIG_DM_REBOOT_MODE_GPIO=y +CONFIG_DM_REBOOT_MODE_RTC=y +CONFIG_REMOTEPROC_SANDBOX=y +CONFIG_SANDBOX_RESET=y +CONFIG_RESET_SYSCON=y +CONFIG_RESET_SCMI=y +CONFIG_DM_RTC=y +CONFIG_RTC_MAX313XX=y +CONFIG_RTC_RV8803=y +CONFIG_RTC_HT1380=y +CONFIG_SCSI=y +CONFIG_SANDBOX_SERIAL=y +CONFIG_SM=y +CONFIG_SMEM=y +CONFIG_SANDBOX_SMEM=y +CONFIG_SOUND=y +CONFIG_SOUND_DA7219=y +CONFIG_SOUND_MAX98357A=y +CONFIG_SOUND_SANDBOX=y +CONFIG_SOC_DEVICE=y +CONFIG_SANDBOX_SPI=y +CONFIG_SPMI=y +CONFIG_SPMI_SANDBOX=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SANDBOX=y +CONFIG_SYSINFO_GPIO=y +CONFIG_SYSRESET=y +CONFIG_DM_THERMAL=y +CONFIG_TIMER=y +CONFIG_TIMER_EARLY=y +CONFIG_SANDBOX_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_EMUL=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_ETHER=y +CONFIG_USB_ETH_CDC=y +CONFIG_VIDEO=y +CONFIG_VIDEO_FONT_SUN12X22=y +CONFIG_VIDEO_COPY=y +CONFIG_CONSOLE_ROTATION=y +CONFIG_CONSOLE_TRUETYPE=y +CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y +CONFIG_I2C_EDID=y +CONFIG_VIDEO_SANDBOX_SDL=y +CONFIG_VIDEO_DSI_HOST_SANDBOX=y +CONFIG_OSD=y +CONFIG_SANDBOX_OSD=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_SANDBOX=y +# CONFIG_WATCHDOG_AUTOSTART is not set +CONFIG_WDT=y +CONFIG_WDT_GPIO=y +CONFIG_WDT_SANDBOX=y +CONFIG_WDT_ALARM_SANDBOX=y +CONFIG_WDT_FTWDT010=y +CONFIG_FS_CBFS=y +CONFIG_FS_CRAMFS=y +CONFIG_ADDR_MAP=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_MBEDTLS_LIB=y +CONFIG_ECDSA=y +CONFIG_ECDSA_VERIFY=y +CONFIG_TPM=y +CONFIG_ERRNO_STR=y +CONFIG_GETOPT=y +CONFIG_TEST_FDTDEC=y +CONFIG_UNIT_TEST=y +CONFIG_UT_TIME=y +CONFIG_UT_DM=y +# CONFIG_CMDLINE is not set -- 2.43.0

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