September 2023 - U-Boot

[PATCH v4 0/3] Sign Xilinx ZynqMP SPL/FSBL boot images using binman
by lukas.funke-oss＠weidmueller.com 04 Oct '23

04 Oct '23

From: Lukas Funke <lukas.funke(a)weidmueller.com> This series adds one etype to create a verified boot chain for Xilinx ZynqMP devices. The etype 'xilinx-bootgen' is used to create a bootable, signed image for ZynqMP boards using the Xilinx Bootgen tool. The series also contains the corresponding btool for calling 'bootgen'. The following block shows an example on how to use this functionality: spl { filename = "boot.signed.bin"; xilinx-bootgen { psk-key-name-hint = "psk0"; ssk-key-name-hint = "ssk0"; pmufw-filename = "pmu-firmware.elf"; auth-params = "ppk_select=0", "spk_id=0x00000000"; u-boot-spl-nodtb { }; u-boot-spl-pubkey-dtb { algo = "sha384,rsa4096"; required = "conf"; key-name-hint = "dev"; }; }; }; Changes in v4: - Fixed some typos - Add test to check for missing bootgen tool - Renamed etype from "xilinx-fsbl-auth" to "xilinx-bootgen" - Add detection of missing bintool - Promote 'pmufw-filename' to required property Changes in v3: - Fixed an issue where the build result was not found - Fixed an issue where the version string was not reported correctly - Improved test coverage for xilinx-fsbl-auth etype - Changed etype from entry to section - Changed property name "psk-filename" to "psk-key-name-hint" - Changed property name "ssk-filename" to "ssk-key-name-hint" - Decode spl elf file instead of reading start symbol - Improved test coverage - Improved documentation Changes in v2: - Pass additional 'keysrc_enc' parameter to Bootgen - Added more information and terms to documentation - Fixed typo in dts name - Add 'keysrc-enc' property to pass down to Bootgen - Improved documentation - Use predictable output names for intermediated results Lukas Funke (3): binman: btool: Add Xilinx Bootgen btool binman: ftest: Add test for xilinx-bootgen etype binman: etype: Add xilinx-bootgen etype tools/binman/bintools.rst | 2 +- tools/binman/btool/bootgen.py | 137 +++++++++++ tools/binman/entries.rst | 75 ++++++ tools/binman/etype/xilinx_bootgen.py | 225 ++++++++++++++++++ tools/binman/ftest.py | 75 ++++++ tools/binman/test/307_xilinx_bootgen_sign.dts | 22 ++ .../test/308_xilinx_bootgen_sign_enc.dts | 24 ++ 7 files changed, 559 insertions(+), 1 deletion(-) create mode 100644 tools/binman/btool/bootgen.py create mode 100644 tools/binman/etype/xilinx_bootgen.py create mode 100644 tools/binman/test/307_xilinx_bootgen_sign.dts create mode 100644 tools/binman/test/308_xilinx_bootgen_sign_enc.dts -- 2.30.2

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[PATCH v1 0/3] arm: NPCM: fix npcm bmc error
by Jim Liu 04 Oct '23

04 Oct '23

1. fix incorrect ram size with ecc enabld 2. add name for gpio function 3. add baud rate table Jim Liu (3): pinctrl: npcm8xx: add name for gpio function arm: NPCM: modify baud rate table and dram setting arm: npcm8xx: support dcache off arch/arm/mach-npcm/npcm8xx/Kconfig | 4 ++++ arch/arm/mach-npcm/npcm8xx/cpu.c | 12 +++++++++++- board/nuvoton/arbel_evb/arbel_evb.c | 16 ++++++++-------- configs/arbel_evb_defconfig | 1 + drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 1 + include/configs/arbel.h | 4 +++- include/configs/poleg.h | 1 + 7 files changed, 29 insertions(+), 10 deletions(-) -- 2.25.1

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[PATCH 0/3] BOOTP/DHCPv4 enhancements
by seanedmond＠linux.microsoft.com 03 Oct '23

03 Oct '23

From: Sean Edmond <seanedmond(a)microsoft.com> In our datacenter application, a single DHCP server is servicing 36000+ clients. Improvements are required to the DHCPv4 retransmission behavior to align with RFC and ensure less pressure is exerted on the server: - retransmission backoff interval maximum is configurable (environment variable bootpretransmitperiodmax) - initial retransmission backoff interval is configurable (environment variable bootpretransmitperiodinit) - transaction ID is kept the same for each BOOTP/DHCPv4 request (not recreated on each retry) For our application we'll use: - bootpretransmitperiodmax=16000 - bootpretransmitperiodinit=2000 A new configuration BOOTP_RANDOM_XID has been added to enable a randomized BOOTP/DHCPv4 transaction ID. Add functionality for DHCPv4 sending/parsing option 209 (PXE config file). Enabled with Kconfig BOOTP_PXE_DHCP_OPTION. Note, this patch was submitted previously but this latest version has been enhanced to avoid a possible double free(). Sean Edmond (3): net: Get pxe config file from dhcp option 209 net: bootp: BOOTP/DHCPv4 retransmission improvements net: bootp: add config option BOOTP_RANDOM_XID cmd/Kconfig | 11 +++++++ cmd/pxe.c | 10 +++++++ net/bootp.c | 85 +++++++++++++++++++++++++++++++++++++++++++---------- 3 files changed, 91 insertions(+), 15 deletions(-) -- 2.40.0

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[PATCH v1] i2c: nuvoton: add support fast mode
by Jim Liu 03 Oct '23

03 Oct '23

Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- drivers/i2c/npcm_i2c.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/i2c/npcm_i2c.c b/drivers/i2c/npcm_i2c.c index ea4ef53256..b867b6c8e9 100644 --- a/drivers/i2c/npcm_i2c.c +++ b/drivers/i2c/npcm_i2c.c @@ -517,11 +517,6 @@ static int npcm_i2c_init_clk(struct npcm_i2c_bus *bus, u32 bus_freq) u32 sclfrq; u8 hldt, val; - if (bus_freq > I2C_FREQ_100K) { - printf("Support standard mode only\n"); - return -EINVAL; - } - /* SCLFRQ = T(SCL)/4/T(CLK) = FREQ(CLK)/4/FREQ(SCL) */ sclfrq = freq / (bus_freq * 4); if (sclfrq < SCLFRQ_MIN || sclfrq > SCLFRQ_MAX) -- 2.25.1

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[PATCH] MAINTAINERS: ufs: Change Bhupesh's email address
by Bhupesh Sharma 02 Oct '23

02 Oct '23

Set my current personal email in the MAINTAINERS file. Signed-off-by: Bhupesh Sharma <bhupesh.linux(a)gmail.com> --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 536df4a896..b1f5ae0591 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1597,7 +1597,7 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-ubi.git F: drivers/mtd/ubi/ UFS -M: Bhupesh Sharma <bhupesh.sharma(a)linaro.org> +M: Bhupesh Sharma <bhupesh.linux(a)gmail.com> M: Neha Malcom Francis <n-francis(a)ti.com> S: Maintained F: drivers/ufs/ -- 2.38.1

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[PATCH 00/14] arm64: xilinx: Sync with Linux kernel
by Michal Simek 02 Oct '23

02 Oct '23

Hi, this series is syncing DTs with Linux kernel. A lot of patches are simply taken from the Linux kernel and taken to U-Boot. But there are also some new one which are trying to fix violations. There is still some work to happen to be 100% in sync but we are getting closer and closer. Thanks, Michal Laurent Pinchart (2): arm64: dts: zynqmp: zcu106a: Describe DisplayPort connector arm64: dts: zynqmp: Add ports for the DisplayPort subsystem Michal Simek (11): arm64: zynqmp: Describe interrupts by using macros arm64: xilinx: Remove address/size-cells from flash node arm64: xilinx: Use lower case for partition address arm64: zynqmp: Describe bus-width for SD card on KV260 arm64: zynqmp: Fix Siva's email address format arm64: xilinx: Put ethernet phys to mdio node arm64: xilinx: Remove address/size-cells from gem nodes arm64: zynqmp: Convert kv260-revA overlay to ASCII text arm64: zynqmp: Sync licenses with Linux kernel ARM: zynq: Describe nand device in DT arm64: zynqmp: Aligned QSPI configuration with latest spec Tanmay Shah (1): arm64: dts: xilinx: zynqmp: Add RPU subsystem device node arch/arm/dts/avnet-ultra96-rev1.dts | 2 +- arch/arm/dts/bitmain-antminer-s9.dts | 3 + arch/arm/dts/versal-mini-emmc0.dts | 2 +- arch/arm/dts/versal-mini-emmc1.dts | 2 +- arch/arm/dts/versal-mini-ospi.dtsi | 2 +- arch/arm/dts/versal-mini-qspi.dtsi | 2 +- arch/arm/dts/versal-mini.dts | 2 +- arch/arm/dts/zynq-zc770-xm011.dts | 3 + arch/arm/dts/zynqmp-clk-ccf.dtsi | 3 +- arch/arm/dts/zynqmp-dlc21-revA.dts | 10 +- arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 10 +- arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 10 +- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 10 +- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 10 +- arch/arm/dts/zynqmp-mini-emmc0.dts | 2 +- arch/arm/dts/zynqmp-mini-emmc1.dts | 2 +- arch/arm/dts/zynqmp-mini-nand.dts | 2 +- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 10 +- arch/arm/dts/zynqmp-sck-kv-g-revA.dtso | 11 +- arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 5 +- arch/arm/dts/zynqmp-sm-k26-revA.dts | 6 +- arch/arm/dts/zynqmp-zc1254-revA.dts | 4 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 15 +- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 19 +- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 8 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 26 ++- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 10 +- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 7 +- arch/arm/dts/zynqmp-zcu102-revB.dts | 3 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 3 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 5 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 27 ++- arch/arm/dts/zynqmp-zcu111-revA.dts | 7 +- arch/arm/dts/zynqmp-zcu1275-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 4 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 4 +- arch/arm/dts/zynqmp.dtsi | 249 +++++++++++++++-------- arch/arm/mach-versal/mp.c | 2 +- drivers/fpga/zynqmppl.c | 2 +- 43 files changed, 345 insertions(+), 169 deletions(-) -- 2.36.1

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[PATCH] arm64: zynqmp: Remove resetin/out from K24 psu_init
by Michal Simek 02 Oct '23

02 Oct '23

The code is not called that's why remove it. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- .../zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c | 123 ------------------ 1 file changed, 123 deletions(-) diff --git a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c index 45102302dc2c..166e61431ba5 100644 --- a/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-sm-k24-revA/psu_init_gpl.c @@ -602,129 +602,6 @@ static unsigned long psu_peripherals_init_data(void) return 1; } -static unsigned long psu_serdes_init_data(void) -{ - psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U); - psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U); - psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); - psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD402864, 0x00000081U, 0x00000001U); - psu_mask_write(0xFD402868, 0x00000082U, 0x00000002U); - psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); - psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U); - psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U); - psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU); - psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U); - psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U); - psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U); - psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU); - psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U); - psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U); - psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U); - psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); - psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); - psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); - psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); - psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); - psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); - psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); - psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); - psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); - psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); - psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); - psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); - psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); - psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); - psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); - psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); - psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); - psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); - - serdes_illcalib(0, 0, 3, 0, 4, 0, 4, 0); - psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U); - psu_mask_write(0xFD410014, 0x00000007U, 0x00000003U); - psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U); - psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U); - psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U); - psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U); - psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U); - psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U); - psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U); - - return 1; -} - -static unsigned long psu_resetout_init_data(void) -{ - psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); - psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); - psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); - psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); - psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U); - psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U); - psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U); - psu_mask_write(0xFE20C200, 0x00023FFFU, 0x00022457U); - psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); - psu_mask_write(0xFE20C11C, 0x00000600U, 0x00000600U); - psu_mask_write(0xFE20C12C, 0x00004000U, 0x00004000U); - psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); - mask_poll(0xFD4063E4, 0x00000010U); - mask_poll(0xFD40A3E4, 0x00000010U); - - return 1; -} - -static unsigned long psu_resetin_init_data(void) -{ - psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); - psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); - psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU); - psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U); - psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U); - - return 1; -} - static unsigned long psu_afi_config(void) { psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); -- 2.36.1

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[PATCH] arm64: zynqmp: Rename dt overlay file names from dts to dtso
by Michal Simek 02 Oct '23

02 Oct '23

Use dtso suffix instead of dts. Build option was introduced by commit a0f9a77912b2 ("kbuild: Allow DTB overlays to built from .dtso named source files"). Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- .../dts/{zynqmp-sck-kr-g-revA.dts => zynqmp-sck-kr-g-revA.dtso} | 0 .../dts/{zynqmp-sck-kr-g-revB.dts => zynqmp-sck-kr-g-revB.dtso} | 0 .../dts/{zynqmp-sck-kv-g-revA.dts => zynqmp-sck-kv-g-revA.dtso} | 0 .../dts/{zynqmp-sck-kv-g-revB.dts => zynqmp-sck-kv-g-revB.dtso} | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename arch/arm/dts/{zynqmp-sck-kr-g-revA.dts => zynqmp-sck-kr-g-revA.dtso} (100%) rename arch/arm/dts/{zynqmp-sck-kr-g-revB.dts => zynqmp-sck-kr-g-revB.dtso} (100%) rename arch/arm/dts/{zynqmp-sck-kv-g-revA.dts => zynqmp-sck-kv-g-revA.dtso} (100%) rename arch/arm/dts/{zynqmp-sck-kv-g-revB.dts => zynqmp-sck-kv-g-revB.dtso} (100%) diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso similarity index 100% rename from arch/arm/dts/zynqmp-sck-kr-g-revA.dts rename to arch/arm/dts/zynqmp-sck-kr-g-revA.dtso diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso similarity index 100% rename from arch/arm/dts/zynqmp-sck-kr-g-revB.dts rename to arch/arm/dts/zynqmp-sck-kr-g-revB.dtso diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso similarity index 100% rename from arch/arm/dts/zynqmp-sck-kv-g-revA.dts rename to arch/arm/dts/zynqmp-sck-kv-g-revA.dtso diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso similarity index 100% rename from arch/arm/dts/zynqmp-sck-kv-g-revB.dts rename to arch/arm/dts/zynqmp-sck-kv-g-revB.dtso -- 2.36.1

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[PATCH] arm64: zynqmp: Describe assigned-clocks for uarts
by Michal Simek 02 Oct '23

02 Oct '23

Describe assigned-clocks for both uarts. SOM is using this functionality. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/arm/dts/zynqmp-clk-ccf.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 1ae8ea2e43f7..9c0aa073dd94 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -253,10 +253,12 @@ &uart0 { clocks = <&zynqmp_clk UART0_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk UART0_REF>; }; &uart1 { clocks = <&zynqmp_clk UART1_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk UART1_REF>; }; &usb0 { -- 2.36.1

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[PATCH] pinctrl: zynqmp: Display the tristate configuration for all pins
by Venkatesh Yadav Abbarapu 02 Oct '23

02 Oct '23

Read the tristate config for all the pins and display it. ZynqMP> pinmux status MIO1 MIO1: slew:fast bias:enabled pull:up input:cmos drive:12mA volt:1.8 tri_state:enabled Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu(a)amd.com> --- drivers/pinctrl/pinctrl-zynqmp.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c index 02626a7561..d98834b1aa 100644 --- a/drivers/pinctrl/pinctrl-zynqmp.c +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -533,6 +533,8 @@ static int zynqmp_pinctrl_get_pin_muxing(struct udevice *dev, &pinmux.drive_strength); zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_VOLTAGE_STATUS, &pinmux.volt_sts); + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_TRI_STATE, + &pinmux.tri_state); switch (pinmux.drive_strength) { case PM_PINCTRL_DRIVE_STRENGTH_2MA: @@ -553,13 +555,15 @@ static int zynqmp_pinctrl_get_pin_muxing(struct udevice *dev, return -EINVAL; } - snprintf(buf, size, "slew:%s\tbias:%s\tpull:%s\tinput:%s\tdrive:%dmA\tvolt:%s", + snprintf(buf, size, + "slew:%s\tbias:%s\tpull:%s\tinput:%s\tdrive:%dmA\tvolt:%s\ttri_state:%s", pinmux.slew ? "slow" : "fast", pinmux.bias ? "enabled" : "disabled", pinmux.pull_ctrl ? "up" : "down", pinmux.input_type ? "schmitt" : "cmos", pinmux.drive_strength, - pinmux.volt_sts ? "1.8" : "3.3"); + pinmux.volt_sts ? "1.8" : "3.3", + pinmux.tri_state ? "enabled" : "disabled"); return 0; } -- 2.17.1

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