July 2023 - U-Boot

[PATCH 1/2] clk: imx8mp: Update clocks based on kernel 6.4-RC4
by Adam Ford 12 Jul '23

12 Jul '23

There are some newer clocks added to the kernel recently, so to fix prepare for resycing the device trees, update the clock list. Since there are some minor changes to the USB clocks, update which USB clocks are enabled to match with the upstream kernel as well. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 09bef596f2..a21a3ce34b 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -337,7 +337,8 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_UART2_ROOT, imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0)); clk_dm(IMX8MP_CLK_UART3_ROOT, imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0)); clk_dm(IMX8MP_CLK_UART4_ROOT, imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0)); - clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate4("usb_root_clk", "usb_core_ref", base + 0x44d0, 0)); + clk_dm(IMX8MP_CLK_USB_ROOT, imx_clk_gate2("usb_root_clk", "hsio_axi", base + 0x44d0, 0)); + clk_dm(IMX8MP_CLK_USB_SUSP, imx_clk_gate2("usb_suspend_clk", "clock-osc-24m", base + 0x44d0, 0)); clk_dm(IMX8MP_CLK_USB_PHY_ROOT, imx_clk_gate4("usb_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0)); clk_dm(IMX8MP_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); clk_dm(IMX8MP_CLK_USDHC2_ROOT, imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0)); diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index 9d5cc2ddde..3f28ce685f 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -324,8 +324,18 @@ #define IMX8MP_CLK_CLKOUT2_SEL 317 #define IMX8MP_CLK_CLKOUT2_DIV 318 #define IMX8MP_CLK_CLKOUT2 319 - -#define IMX8MP_CLK_END 320 +#define IMX8MP_CLK_USB_SUSP 320 +#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT +#define IMX8MP_CLK_AUDIO_AXI_ROOT 321 +#define IMX8MP_CLK_SAI1_ROOT 322 +#define IMX8MP_CLK_SAI2_ROOT 323 +#define IMX8MP_CLK_SAI3_ROOT 324 +#define IMX8MP_CLK_SAI5_ROOT 325 +#define IMX8MP_CLK_SAI6_ROOT 326 +#define IMX8MP_CLK_SAI7_ROOT 327 +#define IMX8MP_CLK_PDM_ROOT 328 +#define IMX8MP_CLK_MEDIA_LDB_ROOT 329 +#define IMX8MP_CLK_END 330 #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 -- 2.39.2

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[PATCH v1 0/5] verdin-imx8mm/verdin-imx8mp: fix ctrl_sleep_moci# handling
by Marcel Ziswiler 12 Jul '23

12 Jul '23

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> This series first synchronises the device tree to get some fixes thereof from Linux and then goes about fixing the CTRL_SLEEP_MOCI# handling we lately found to be problematic in certain cases (e.g. on the Yavia carrier board). Andrejs Cainikovs (4): configs: verdin-imx8mm: enable spl_gpio_hog arm64: dts: verdin-imx8mm: add ctrl_sleep_moci# hog configs: verdin-imx8mp: enable spl_gpio_hog arm64: dts: verdin-imx8mp: add ctrl_sleep_moci# hog Marcel Ziswiler (1): verdin-imx8mm/verdin-imx8mp: synchronise device trees with linux arch/arm/dts/imx8mm-mx8menlo.dts | 17 +- arch/arm/dts/imx8mm-verdin-dahlia.dtsi | 150 ------------------ arch/arm/dts/imx8mm-verdin-dev.dtsi | 97 ++++++++++- .../dts/imx8mm-verdin-wifi-dev-u-boot.dtsi | 8 + arch/arm/dts/imx8mm-verdin.dtsi | 30 ++-- arch/arm/dts/imx8mp-verdin-dahlia.dtsi | 129 --------------- arch/arm/dts/imx8mp-verdin-dev.dtsi | 125 ++++++++++++++- .../dts/imx8mp-verdin-wifi-dev-u-boot.dtsi | 8 + arch/arm/dts/imx8mp-verdin-wifi.dtsi | 5 + arch/arm/dts/imx8mp-verdin.dtsi | 91 +++++++---- board/toradex/verdin-imx8mm/MAINTAINERS | 1 - board/toradex/verdin-imx8mp/MAINTAINERS | 1 - configs/verdin-imx8mm_defconfig | 1 + configs/verdin-imx8mp_defconfig | 1 + 14 files changed, 327 insertions(+), 337 deletions(-) delete mode 100644 arch/arm/dts/imx8mm-verdin-dahlia.dtsi delete mode 100644 arch/arm/dts/imx8mp-verdin-dahlia.dtsi -- 2.36.1

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[PATCH 1/3] mx28evk: Convert to CONFIG_DM_SERIAL
by Fabio Estevam 12 Jul '23

12 Jul '23

From: Fabio Estevam <festevam(a)denx.de> The conversion to CONFIG_DM_SERIAL is mandatory, so select this option. Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- arch/arm/Kconfig | 1 - arch/arm/mach-imx/mxs/Kconfig | 1 + configs/mx28evk_defconfig | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 17d69d272622..e00c9ee4543f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -919,7 +919,6 @@ config ARCH_MX28 bool "NXP i.MX28 family" select CPU_ARM926EJS select GPIO_EXTRA_HEADER - select PL011_SERIAL if !TARGET_XEA select MACH_IMX select SUPPORT_SPL diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig index b4a281e82d41..0fd4758cc67c 100644 --- a/arch/arm/mach-imx/mxs/Kconfig +++ b/arch/arm/mach-imx/mxs/Kconfig @@ -41,6 +41,7 @@ choice config TARGET_MX28EVK bool "Support mx28evk" + select PL01X_SERIAL select BOARD_EARLY_INIT_F config TARGET_XEA diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index dad8839a6c10..df0cceaea719 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -62,6 +62,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_RTC_MXS=y -CONFIG_CONS_INDEX=0 +CONFIG_DM_SERIAL=y CONFIG_SPI=y CONFIG_USB=y -- 2.34.1

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[PATCH 1/2] config: xea: Disable support for boot methods EXTLINUX and VBE
by Lukasz Majewski 12 Jul '23

12 Jul '23

The XEA system (imx287 based) is not using support for EXTLINUX and VBE. As those configuration options have been enabled by default with modern Kconfig it is safe to explicitly disable them. After that change the u-boot.img size has been reduced by ~16 KiB. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- configs/imx28_xea_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index c6c6a03245..a174bdb939 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -29,6 +29,8 @@ CONFIG_SYS_LOAD_ADDR=0x42000000 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_FIT=y CONFIG_TIMESTAMP=y +# CONFIG_BOOTMETH_EXTLINUX is not set +# CONFIG_BOOTMETH_VBE is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8" -- 2.30.2

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[PATCH v1 0/2] colibri-imx8x: snvs and firmware info
by Andrejs Cainikovs 12 Jul '23

12 Jul '23

This series updates recent Colibri iMX8X support refresh with following: * initialize secure non-volatile storage, aka snvs * print firmware versions during boot Andrejs Cainikovs (2): colibri-imx8x: print firmware versions board: colibri-imx8x: initialize snvs board/toradex/colibri-imx8x/colibri-imx8x.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.34.1

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[PATCH] arm: dts: imx8mp-beacon-kit: Enable USB Power domains
by Adam Ford 12 Jul '23

12 Jul '23

The USB Power domains should not have been removed as it causes the board to hang if the USB is started. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi index 5ca631e9d8..b56f3a2bd2 100644 --- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi @@ -185,12 +185,10 @@ &usb3_0 { dma-ranges = <0x40000000 0x40000000 0xc0000000>; - /delete-property/ power-domains; }; &usb3_1 { dma-ranges = <0x40000000 0x40000000 0xc0000000>; - /delete-property/ power-domains; }; &usb_dwc3_0 { -- 2.39.2

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[PATCH v2 0/5] imx8mn-var-som: fix ethernet for Variscite symphony board and imx8m nano SOM
by Hugo Villeneuve 12 Jul '23

12 Jul '23

From: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> Hello, This patch series fixes bugs and add missing features related to the ethernet PHY on Variscite symphony carrier board with an imx8m nano SOM (P/N VAR-SOM-MX8M-NANO). Ethernet functionality is currently broken for the VAR-SOM-MX8M-NANO. Variscite imx8m nano SOM comes in multiple hardware configuration options. One of this hardware configuration option is called EC: EC: Ethernet Controller PHY assembled on SOM For SOM with the EC configuration, the ethernet PHY is located on the SOM itself, and connected to the CPU ethernet controller. It has a reset line controlled via GPIO1_IO9. In this configuration, the PHY located on the carrier board is not connected to anything and is therefore not used. For SOM without EC configuration, the ethernet PHY on the carrier board is connected to the CPU ethernet controller. It has a reset line controlled via the GPIO expander PCA9534_IO5. Patch 1 add code to read and display the SOM configuration stored in the SOM EEPROM. Part of this patch was submitted and accepted to the Linux kernel (section that adds the EEPROM to the device tree), so that it will be easier to sync the DT between kernel and U-Boot. Patch 2 fixes bugs with the PHY reset properties. Patch 3 fixes a bug with a missing PHY reset deassert delay (also submitted and accepted to kernel). Patch 4 enables automatic read of PHY MAC address from the SOM EEPROM. Patch 5 is used for auto-detecting at runtime the SOM hardware configuration option related to the PHY (EC), and dynamically adjust the device tree to support both SOM PHY options. I have succesfully tested the changes on a Variscite symphony carrier board with a VAR-SOM-MX8M-NANO having the EC configuration option. Unfortunately, I do not have a VAR-SOM-MX8M-NANO with a non-EC configuration option so I couldn't test it on real hardware, altough I simulated it and confirmed that the device tree fixing seems to be correct by using debug/print statements. Thank you. Link: [v1] https://lore.kernel.org/u-boot/20230501200121.3137519-1-hugo@hugovil.com/ Changes for V2: - Resend since I received 0 answers/comments after almost 4 weeks and I have a few minor updates to add: - Update defconfig using savedefconfig - Remove requirement about required patch (now in master) - Update status of patches also sent to the Linux kernel Hugo Villeneuve (5): imx8mn-var-som: read and print SoM infos from eeprom on startup imx8mn-var-som: fix non-applied PHY reset-gpios properties arm: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay imx8mn-var-som: read eth MAC address from EEPROM imx8mn-var-som: adjust PHY reset gpios according to hardware configuration .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 17 ++ arch/arm/dts/imx8mn-var-som-symphony.dts | 4 - arch/arm/dts/imx8mn-var-som.dtsi | 18 +- arch/arm/mach-imx/imx8m/Kconfig | 4 + .../variscite/imx8mn_var_som/imx8mn_var_som.c | 214 ++++++++++++++++++ configs/imx8mn_var_som_defconfig | 4 + 6 files changed, 256 insertions(+), 5 deletions(-) base-commit: 62df7a39442902a71259568c13a4d496d5a514f4 -- 2.30.2

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[RESEND PATCH v2 0/5] imx8mn-var-som: fix ethernet for Variscite symphony board and imx8m nano SOM
by Hugo Villeneuve 12 Jul '23

12 Jul '23

From: Hugo Villeneuve <hvilleneuve(a)dimonoff.com> Hello, This patch series fixes bugs and add missing features related to the ethernet PHY on Variscite symphony carrier board with an imx8m nano SOM (P/N VAR-SOM-MX8M-NANO). Ethernet functionality is currently broken for the VAR-SOM-MX8M-NANO. Variscite imx8m nano SOM comes in multiple hardware configuration options. One of this hardware configuration option is called EC: EC: Ethernet Controller PHY assembled on SOM For SOM with the EC configuration, the ethernet PHY is located on the SOM itself, and connected to the CPU ethernet controller. It has a reset line controlled via GPIO1_IO9. In this configuration, the PHY located on the carrier board is not connected to anything and is therefore not used. For SOM without EC configuration, the ethernet PHY on the carrier board is connected to the CPU ethernet controller. It has a reset line controlled via the GPIO expander PCA9534_IO5. Patch 1 add code to read and display the SOM configuration stored in the SOM EEPROM. Part of this patch was submitted and accepted to the Linux kernel (section that adds the EEPROM to the device tree), so that it will be easier to sync the DT between kernel and U-Boot. Patch 2 fixes bugs with the PHY reset properties. Patch 3 fixes a bug with a missing PHY reset deassert delay (also submitted and accepted to kernel). Patch 4 enables automatic read of PHY MAC address from the SOM EEPROM. Patch 5 is used for auto-detecting at runtime the SOM hardware configuration option related to the PHY (EC), and dynamically adjust the device tree to support both SOM PHY options. I have succesfully tested the changes on a Variscite symphony carrier board with a VAR-SOM-MX8M-NANO having the EC configuration option. Unfortunately, I do not have a VAR-SOM-MX8M-NANO with a non-EC configuration option so I couldn't test it on real hardware, altough I simulated it and confirmed that the device tree fixing seems to be correct by using debug/print statements. Thank you. Link: [v1] https://lore.kernel.org/u-boot/20230501200121.3137519-1-hugo@hugovil.com/ Changes for V2: - Resend since I received 0 answers/comments after almost 4 weeks and I have a few minor updates to add: - Update defconfig using savedefconfig - Remove requirement about required patch (now in master) - Update status of patches also sent to the Linux kernel Hugo Villeneuve (5): imx8mn-var-som: read and print SoM infos from eeprom on startup imx8mn-var-som: fix non-applied PHY reset-gpios properties arm: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay imx8mn-var-som: read eth MAC address from EEPROM imx8mn-var-som: adjust PHY reset gpios according to hardware configuration .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 17 ++ arch/arm/dts/imx8mn-var-som-symphony.dts | 4 - arch/arm/dts/imx8mn-var-som.dtsi | 18 +- arch/arm/mach-imx/imx8m/Kconfig | 4 + .../variscite/imx8mn_var_som/imx8mn_var_som.c | 214 ++++++++++++++++++ configs/imx8mn_var_som_defconfig | 4 + 6 files changed, 256 insertions(+), 5 deletions(-) base-commit: 7876a695468c9bc17a6dc02054da101450468a40 -- 2.30.2

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[PATCH v1 0/2] power: pmic: add TPS65913 support
by Svyatoslav Ryhel 12 Jul '23

12 Jul '23

Existing PALMAS PMIC driver is fully compatible with TI TPS65913 PMIC found in many Tegra 4 devices, like Tegra Note 7 and ASUS TF701T. Add TPS65913 dts compatible with TPS659038 data. Without regulator_autoset PALMAS regulators are just "requested" without actual initial setup (device tree is completely ignored). This causes major issue since voltage is usually set on probing and rarely is changed. Drivers which change voltage will also assume that initial voltage was already set and this was not the case. Svyatoslav Ryhel (2): power: pmic: support TI TPS65913 PMIC power: regulator: palmas: set up voltage on probe drivers/power/pmic/palmas.c | 1 + drivers/power/regulator/palmas_regulator.c | 4 ++++ 2 files changed, 5 insertions(+) -- 2.39.2

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[PATCH] phy: Fix generic_setup_phy return value on power on failure
by Jonas Karlman 12 Jul '23

12 Jul '23

generic_setup_phy may mask a power on failure due to the return value from generic_phy_exit, typically 0, is being used as return value. Fix this by ignoring the return value of the generic_phy_exit call, also remove an unnecessary check for -ENOENT. Fixes: 84e561407a5f ("phy: Add generic_{setup,shutdown}_phy() helpers") Signed-off-by: Jonas Karlman <jonas(a)kwiboo.se> --- drivers/phy/phy-uclass.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index 629ef3aa3de5..afb0e347f76f 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -506,24 +506,22 @@ int generic_phy_power_off_bulk(struct phy_bulk *bulk) int generic_setup_phy(struct udevice *dev, struct phy *phy, int index) { - int ret = 0; + int ret; if (!phy) return 0; ret = generic_phy_get_by_index(dev, index, phy); - if (ret) { - if (ret != -ENOENT) - return ret; - } else { - ret = generic_phy_init(phy); - if (ret) - return ret; + if (ret) + return ret; - ret = generic_phy_power_on(phy); - if (ret) - ret = generic_phy_exit(phy); - } + ret = generic_phy_init(phy); + if (ret) + return ret; + + ret = generic_phy_power_on(phy); + if (ret) + generic_phy_exit(phy); return ret; } -- 2.41.0

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