July 2023 - U-Boot

[PATCH 1/1] part: check CONFIG_IS_ENABLED(ENV_SUPPORT)
by Heinrich Schuchardt 22 Jul '23

22 Jul '23

In SPL environment variables may not be enabled. Suggested-by: Tom Rini <trini(a)konsulko.com> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- disk/part.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/disk/part.c b/disk/part.c index 3a9315c0ab..6a30335a48 100644 --- a/disk/part.c +++ b/disk/part.c @@ -468,9 +468,11 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, #endif /* If no dev_part_str, use bootdevice environment variable */ - if (!dev_part_str || !strlen(dev_part_str) || - !strcmp(dev_part_str, "-")) - dev_part_str = env_get("bootdevice"); + if (CONFIG_IS_ENABLED(ENV_SUPPORT)) { + if (!dev_part_str || !strlen(dev_part_str) || + !strcmp(dev_part_str, "-")) + dev_part_str = env_get("bootdevice"); + } /* If still no dev_part_str, it's an error */ if (!dev_part_str) { -- 2.40.1

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[PATCH v2 0/3] arm: mach-k3: am62: Add core number, gpu and pru autodetection FDT fixups
by Francesco Dolcini 22 Jul '23

22 Jul '23

From: Francesco Dolcini <francesco.dolcini(a)toradex.com> AM62x SoC is available in multiple variant: - CPU cores (Cortex-A) AM62x1 (1 core), AM62x2 (2 cores), AM62x4 (4 cores) - GPU AM625x with GPU, AM623x without GPU - PRU (Programmable RT unit) can be present or not on AM62x2/AM62x4 Remove the relevant FDT nodes by reading the actual configuration from the SoC registers, with that change is possible to have a single dts/dtb file handling the different variant at runtime. While removing GPU node and CPU nodes also the watchdog node in the same Module Domain is removed. A similar approach is implemented for example on i.MX8 and STM32MP1 SoC. Since we start using ft_system_setup on a SoC without msmc ram and fdt_fixup_msmc_ram function fails on those SoC (triggering a reset loop) the first commit fix it by calling that function only on specific SoC. v2: - Moved fdt common functions to to common_fdt.c and ft_system_setup function to specific SoC files (eg. am654_fdt.c) and compile them using relevant configuration - Add GPU and PRU fdt fixup v1: https://lore.kernel.org/all/20230712134730.30229-1-francesco@dolcini.it/ Emanuele Ghidoli (3): arm: k3: Fix ft_system_setup so it can be enabled on any SoC arm: mach-k3: am62: Add CTRLMMR_WKUP_JTAG_DEVICE_ID register definition arm: mach-k3: am62: Fixup CPU core, gpu and pru nodes in fdt arch/arm/mach-k3/Makefile | 7 ++ arch/arm/mach-k3/am625_fdt.c | 71 +++++++++++ arch/arm/mach-k3/am654_fdt.c | 12 ++ arch/arm/mach-k3/common.c | 91 -------------- arch/arm/mach-k3/common_fdt.c | 113 ++++++++++++++++++ arch/arm/mach-k3/common_fdt.h | 11 ++ arch/arm/mach-k3/include/mach/am62_hardware.h | 22 ++++ arch/arm/mach-k3/j721e_fdt.c | 12 ++ arch/arm/mach-k3/j721s2_fdt.c | 12 ++ 9 files changed, 260 insertions(+), 91 deletions(-) create mode 100644 arch/arm/mach-k3/am625_fdt.c create mode 100644 arch/arm/mach-k3/am654_fdt.c create mode 100644 arch/arm/mach-k3/common_fdt.c create mode 100644 arch/arm/mach-k3/common_fdt.h create mode 100644 arch/arm/mach-k3/j721e_fdt.c create mode 100644 arch/arm/mach-k3/j721s2_fdt.c -- 2.25.1

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How to debug u-boot data abort
by qianfan 22 Jul '23

22 Jul '23

Hi: I had a custom AM335X board connected my computer by usbnet. It always report data abort when 'dhcp': Next it the log: U-Boot 2022.01-rc1-00183-gfa5b4e2d19-dirty (Feb 25 2022 - 15:45:02 +0800) CPU : AM335X-GP rev 2.1 Model: WISDOM AM335X CCT DRAM: 512 MiB NAND: 256 MiB MMC: OMAP SD/MMC: 0 Loading Environment from NAND... *** Warning - bad CRC, using default environment Net: Could not get PHY for ethernet@4a100000: addr 0 eth2: ethernet@4a100000, eth3: usb_ether Hit any key to stop autoboot: 0 => setenv autoload no => dhcp using musb-hdrc, OUT ep1out IN ep1in STATUS ep2in MAC de:ad:be:ef:00:01 HOST MAC de:ad:be:ef:00:00 RNDIS ready musb-hdrc: peripheral reset irq lost! high speed config #2: 2 mA, Ethernet Gadget, using RNDIS USB RNDIS network up! BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 DHCP client bound to address 192.168.200.4 (757 ms) data abort pc : [<9fe9b0a2>] lr : [<9febbc3f>] reloc pc : [<808130a2>] lr : [<80833c3f>] sp : 9de53410 ip : 9de53578 fp : 00000001 r10: 9de5345c r9 : 9de67e80 r8 : 9febbae5 r7 : 9de72c30 r6 : 9feec710 r5 : 0000000d r4 : 00000018 r3 : 3fdd8e04 r2 : 00000002 r1 : 9feec728 r0 : 9feec700 Flags: Nzcv IRQs off FIQs on Mode SVC_32 (T) Code: f023 0303 60ca 4403 (6091) 685a Resetting CPU ... resetting ... It's there has any doc about how to debug data abort? Or is the bug is already fixed? Thanks

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Pull request: u-boot-sunxi/master for 2023.10
by Andre Przywara 21 Jul '23

21 Jul '23

Hi Tom, please pull the first part of the sunxi pull request for this cycle: For once this adds USB support for two SoCs: the H616 and the F1C100s series. The rest is support for LPDDR3 DRAM chips on H616 boards. Gitlab CI passed, and I booted that briefly on an H616 and an F1C200s board. I don't have an H616 board with LPDDR3 DRAM, but reportedly that works for Mikhail, and doesn't regress on my DDR3 boards. Thanks, Andre ========================================================= The following changes since commit 0274eb61e1f2a8e053fb028b6c668c67c0b75b9c: Merge tag 'efi-2023-10-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi (2023-07-20 10:19:04 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-sunxi.git master for you to fetch changes up to ecb896cec75e98d6e5f9bcbf0a87976119443985: sunxi: H616: add LPDDR3 DRAM support (2023-07-21 00:54:19 +0100) ---------------------------------------------------------------- Andre Przywara (10): phy: sun4i-usb: Fix of_xlate() argument check phy: sun4i-usb: add Allwinner F1C100s support sunxi: Kconfig: rework PHY_USB_SUN4I selection phy: sun4i-usb: Replace types with explicit quirk flags phy: sun4i-usb: Add H616 USB PHY quirk support phy: sun4i: Add H616 USB PHY support sunxi: H616: enable USB support for H616 boards sunxi: dram: make MBUS configuration functions static sunxi: H616: dram: const-ify DRAM function parameters sunxi: H616: dram: split struct dram_para Mikhail Kalashnikov (2): sunxi: H616: add DRAM type selection sunxi: H616: add LPDDR3 DRAM support arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h | 12 +- arch/arm/mach-sunxi/Kconfig | 29 +- arch/arm/mach-sunxi/dram_sun50i_h6.c | 3 +- arch/arm/mach-sunxi/dram_sun50i_h616.c | 383 +++++++++++++-------- arch/arm/mach-sunxi/dram_sunxi_dw.c | 18 +- arch/arm/mach-sunxi/dram_timings/Makefile | 4 +- arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c | 2 +- arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c | 95 +++++ configs/orangepi_zero2_defconfig | 4 + configs/x96_mate_defconfig | 3 + drivers/phy/allwinner/Kconfig | 5 +- drivers/phy/allwinner/phy-sun4i-usb.c | 111 ++++-- drivers/usb/musb-new/Kconfig | 1 + 13 files changed, 461 insertions(+), 209 deletions(-) create mode 100644 arch/arm/mach-sunxi/dram_timings/h616_lpddr3.c

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[GIT PULL] xilinx patches for v2023.10-rc1 v2
by Michal Simek 21 Jul '23

21 Jul '23

Hi Tom, please pull these patches to your tree. CI is not reporting any issue. The biggest part is adding support for versal-net mini configuration for non volatile memories programming and also DT changes based on our effort to be aligned with dt-schema validation. Thanks, Michal The following changes since commit 7fe5accb4516144b7abb8f183640cdf50423121e: Merge branch '2023-07-20-assorted-CI-updates' (2023-07-20 21:28:59 -0400) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2023.10-rc1-v2 for you to fetch changes up to a1190b4d6a9bf3a45038e3eba4a11de4be2b1cca: event: Add fpga load event (2023-07-21 09:00:39 +0200) ---------------------------------------------------------------- Xilinx changes for v2023.10-rc1 v2 axi_emac: - Change return value if RX packet is not ready cadence_qspi: - Enable flash reset for Versal NET dt: - Various DT syncups with Linux kernel - SOM - reserved pmufw memory location fpga: - Add load event mtd: - Add missing dependency for FLASH_CFI_MTD spi/nand: - Minor cleanup in Xilinx drivers versal-net: - Prioritize boot device in boot_targets - Wire mini ospi/qspi/emmc configurations watchdog: - Use new versal-wwdt property xilinx: - fix sparse warnings in various places ps7_init* - add missing headers - consolidate code around zynqmp_mmio_read/write - switch to amd.com email zynqmp_clk: - Add handling for gem rx/tsu clocks zynq_gem: - Configure mdio clock at run time zynq: - Enable fdt overlay support zynq_sdhci: - Call dll reset only for ZynqMP SOCs ---------------------------------------------------------------- Algapally Santosh Sagar (6): spi: xilinx_spi: Add missing prototype for xilinx_qspi_mem_exec_op xilinx: zynq: Add missing prototype for zynqmp_mmio_write spi: zynq_qspi: Add missing prototype for zynq_qspi_mem_exec_op mtd: nand: zynq_nand: Change datatype of status and ecc_status to int arm: zynq: Pass the missing argument type in function definition xilinx: zynq: Add the missing function prototypes Ashok Reddy Soma (8): arm64: versal-net: spi: Update boot sequence dynamically cadence_qspi: Enable flash reset for Versal NET platform xilinx: versal-net: Add mini qspi configuration xilinx: versal-net: Add mini ospi configuration xilinx: versal-net: Add mini eMMC 5.1 configuration mmc: zynq_sdhci: Dll reset only for ZynqMP platform clk: zynqmp: Add set_rate support for gem rx and tsu clks clk: zynqmp: Add gem rx and tsu clocks to return register Christian Taedcke (1): event: Add fpga load event Harini Katakam (3): arm64: zynqmp: Assign TSU clock frequency for KR260 arm64: zynqmp: Increase reset assert time for TI SGMII PHY arm64: zynqmp: Assign TSU clock frequency for KV and KD boards Maksim Kiselev (1): net: axi_emac: Change return value to -EAGAIN if RX is not ready Manikanta Guntupalli (1): xilinx: dts: Fix open drain warning on Zynq, ZynqMP and Versal Michal Simek (12): watchdog: versal: Use new compatible xlnx,versal-wwdt xilinx: Consolidate zynqmp_mmio_read/write in zynqmp_firmware.h arm64: zynqmp: Switch to amd.com emails mtd: Add missing MTD dependency for cfi_mtd arm64: zynqmp: Fix gpio comment about No of gpios arm64: zynqmp: Record compatible string for kv260 rev2 arm64: zynqmp: Cover K24 revB/1 SOM arm64: zynqmp: Fix usb reset over bootmode pins on zcu100 arm64: zynqmp: Sync node name address with reg (mailbox) arm64: zynqmp: Remove interrupt/reg-names for AMS arm64: zynqmp: Rename ams_ps/pl node names arm64: zynqmp: Remove clock-names from pcap node Parth Gajjar (1): arm64: zynqmp: Update MALI 400 interrupt and clock names Piyush Mehta (1): arm64: zynqmp: remove snps, enable_guctl1_resume_quirk quirk for usb Radhey Shyam Pandey (2): arm64: zynqmp: Add L2 cache nodes arm64: zynqmp: add pmu interrupt-affinity Raju Kumar Pothuraju (1): xilinx: zynq: Enable fdt apply utility for zynq Sharath Kumar Dasari (1): arm64: zynqmp: Fix the memory node for k26/k24 kria som boards Varalaxmi Bingi (1): arm: xilinx: Setting default i2c clock frequency to 400kHz Venkatesh Yadav Abbarapu (1): net: zynq_gem: Don't hardcode the MDC clock divisor arch/arm/dts/Makefile | 3 + arch/arm/dts/avnet-ultra96-rev1.dts | 2 +- arch/arm/dts/versal-mini-emmc0.dts | 4 +- arch/arm/dts/versal-mini-emmc1.dts | 4 +- arch/arm/dts/versal-mini-ospi.dtsi | 4 +- arch/arm/dts/versal-mini-qspi.dtsi | 4 +- arch/arm/dts/versal-mini.dts | 2 +- arch/arm/dts/versal-net-mini-emmc.dts | 64 ++++++++++++++++ arch/arm/dts/versal-net-mini-ospi-single.dts | 19 +++++ arch/arm/dts/versal-net-mini-ospi.dtsi | 78 ++++++++++++++++++++ arch/arm/dts/versal-net-mini-qspi-single.dts | 16 ++++ arch/arm/dts/versal-net-mini-qspi.dtsi | 72 ++++++++++++++++++ arch/arm/dts/zynq-7000.dtsi | 2 + arch/arm/dts/zynq-dlc20-rev1.0.dts | 2 +- arch/arm/dts/zynq-minized.dts | 2 +- arch/arm/dts/zynq-zc702.dts | 5 +- arch/arm/dts/zynqmp-a2197-revA.dts | 2 +- arch/arm/dts/zynqmp-clk-ccf.dtsi | 12 +-- arch/arm/dts/zynqmp-dlc21-revA.dts | 4 +- arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 4 +- arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 8 +- arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4 +- arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 +- arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 +- arch/arm/dts/zynqmp-mini-emmc0.dts | 2 +- arch/arm/dts/zynqmp-mini-emmc1.dts | 2 +- arch/arm/dts/zynqmp-mini-nand.dts | 4 +- arch/arm/dts/zynqmp-mini-qspi.dts | 4 +- arch/arm/dts/zynqmp-mini.dts | 2 +- arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 4 +- arch/arm/dts/zynqmp-r5.dts | 2 +- arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 10 ++- arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 10 ++- arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 7 +- arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 10 ++- arch/arm/dts/zynqmp-sm-k24-revA.dts | 5 +- arch/arm/dts/zynqmp-sm-k26-revA.dts | 19 ++++- arch/arm/dts/zynqmp-smk-k26-revA.dts | 2 +- arch/arm/dts/zynqmp-zc1232-revA.dts | 2 +- arch/arm/dts/zynqmp-zc1254-revA.dts | 4 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 6 +- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 12 +-- arch/arm/dts/zynqmp-zcu100-revC.dts | 8 +- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 2 +- arch/arm/dts/zynqmp-zcu102-rev1.1.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 10 +-- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 6 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 6 +- arch/arm/dts/zynqmp-zcu106-rev1.0.dts | 2 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 10 +-- arch/arm/dts/zynqmp-zcu111-revA.dts | 10 +-- arch/arm/dts/zynqmp-zcu1275-revA.dts | 4 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 4 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 4 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 12 +-- arch/arm/dts/zynqmp-zcu216-revA.dts | 12 +-- arch/arm/dts/zynqmp.dtsi | 35 ++++++--- arch/arm/mach-tegra/arm64-mmu.c | 2 +- arch/arm/mach-versal-net/include/mach/hardware.h | 11 +++ arch/arm/mach-versal-net/include/mach/sys_proto.h | 2 - arch/arm/mach-versal/Makefile | 2 +- arch/arm/mach-versal/clk.c | 2 +- arch/arm/mach-versal/cpu.c | 2 +- arch/arm/mach-versal/include/mach/sys_proto.h | 2 - arch/arm/mach-versal/mp.c | 2 +- arch/arm/mach-zynqmp/Makefile | 2 +- arch/arm/mach-zynqmp/clk.c | 2 +- arch/arm/mach-zynqmp/cpu.c | 2 +- arch/arm/mach-zynqmp/handoff.c | 2 +- arch/arm/mach-zynqmp/include/mach/clk.h | 2 +- arch/arm/mach-zynqmp/include/mach/hardware.h | 2 +- arch/arm/mach-zynqmp/include/mach/sys_proto.h | 5 +- arch/arm/mach-zynqmp/mp.c | 3 +- arch/arm/mach-zynqmp/psu_spl_init.c | 2 +- arch/arm/mach-zynqmp/spl.c | 2 +- arch/microblaze/cpu/spl.c | 2 +- arch/microblaze/cpu/u-boot-spl.lds | 2 +- arch/microblaze/include/asm/spl.h | 2 +- board/xilinx/common/Makefile | 2 +- board/xilinx/common/board.h | 2 +- board/xilinx/common/cpu-info.c | 2 +- board/xilinx/common/fru.h | 2 +- board/xilinx/versal-net/board.c | 24 +++++- board/xilinx/versal/Makefile | 2 +- board/xilinx/versal/board.c | 2 +- board/xilinx/versal/cmds.c | 2 +- board/xilinx/zynq/board.c | 2 + board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c | 4 +- board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c | 4 +- board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c | 4 +- board/xilinx/zynq/zynq-zed/ps7_init_gpl.c | 4 +- board/xilinx/zynqmp/Makefile | 2 +- board/xilinx/zynqmp/cmds.c | 2 +- board/xilinx/zynqmp/zynqmp.c | 2 +- common/event.c | 3 + common/spl/spl_ram.c | 2 +- configs/xilinx_versal_net_mini_emmc_defconfig | 63 ++++++++++++++++ configs/xilinx_versal_net_mini_ospi_defconfig | 71 ++++++++++++++++++ configs/xilinx_versal_net_mini_qspi_defconfig | 75 +++++++++++++++++++ configs/xilinx_zynq_virt_defconfig | 1 + drivers/ata/sata_ceva.c | 2 +- drivers/clk/clk_versal.c | 2 +- drivers/clk/clk_zynqmp.c | 8 ++ drivers/fpga/fpga.c | 20 +++++ drivers/fpga/versalpl.c | 2 +- drivers/fpga/zynqmppl.c | 4 +- drivers/mmc/zynq_sdhci.c | 7 +- drivers/mtd/Kconfig | 2 +- drivers/mtd/nand/raw/zynq_nand.c | 4 +- drivers/net/xilinx_axi_emac.c | 2 +- drivers/net/xilinx_axi_mrmac.c | 2 +- drivers/net/xilinx_axi_mrmac.h | 2 +- drivers/net/zynq_gem.c | 57 ++++++++++++-- drivers/pinctrl/pinctrl-zynqmp.c | 2 +- drivers/soc/soc_xilinx_zynqmp.c | 2 +- drivers/spi/cadence_ospi_versal.c | 3 +- drivers/spi/cadence_qspi.c | 13 ++-- drivers/spi/xilinx_spi.c | 4 +- drivers/spi/zynq_qspi.c | 4 +- drivers/watchdog/xilinx_tb_wdt.c | 2 +- drivers/watchdog/xilinx_wwdt.c | 5 +- include/configs/xilinx_versal.h | 2 +- include/configs/xilinx_versal_mini.h | 4 +- include/configs/xilinx_versal_net.h | 19 +++-- include/configs/xilinx_zynqmp.h | 2 +- include/configs/xilinx_zynqmp_mini.h | 4 +- include/configs/xilinx_zynqmp_mini_nand.h | 4 +- include/event.h | 17 +++++ include/versalpl.h | 2 +- include/zynqmp_firmware.h | 2 + include/zynqmppl.h | 2 +- tools/zynqmp_psu_init_minimize.sh | 2 +- tools/zynqmpimage.c | 2 +- tools/zynqmpimage.h | 2 +- 138 files changed, 867 insertions(+), 249 deletions(-) create mode 100644 arch/arm/dts/versal-net-mini-emmc.dts create mode 100644 arch/arm/dts/versal-net-mini-ospi-single.dts create mode 100644 arch/arm/dts/versal-net-mini-ospi.dtsi create mode 100644 arch/arm/dts/versal-net-mini-qspi-single.dts create mode 100644 arch/arm/dts/versal-net-mini-qspi.dtsi create mode 100644 configs/xilinx_versal_net_mini_emmc_defconfig create mode 100644 configs/xilinx_versal_net_mini_ospi_defconfig create mode 100644 configs/xilinx_versal_net_mini_qspi_defconfig -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs

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[PATCH 1/1] spl: boot always fail on CONFIG_SHOW_ERRORS=y
by Heinrich Schuchardt 21 Jul '23

21 Jul '23

Commit 7d84fbb57312 ("spl: Provide more information on boot failure") left debug code to let boot_from_devices() always fail if CONFIG_SHOW_ERRORS=y. Remove the debug code. Fixes: 7d84fbb57312 ("spl: Provide more information on boot failure") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- common/spl/spl.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index d74acec10b..6305b96b69 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -692,8 +692,6 @@ static int boot_from_devices(struct spl_image_info *spl_image, struct spl_image_loader *loader; int bootdev = spl_boot_list[i]; - if (CONFIG_IS_ENABLED(SHOW_ERRORS)) - ret = -ENXIO; for (loader = drv; loader != drv + n_ents; loader++) { if (bootdev != loader->boot_device) continue; -- 2.40.1

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[PATCH 0/6] binman: Template fixes and improvements
by Simon Glass 21 Jul '23

21 Jul '23

With the basic template feature in place, some problems have come to light. Firstly, keeping the template around while processing entries seems unnecessary and perhaps confusing, so this is removed. Secondly this series aims to support phandles in a more intuitive way, rather than just ignoring them in templates. It includes an experimental patch to copy phandles from template so that it is possible to so something like: template { some_node: some-node { }; }; image { insert-template = <&template>; }; with the some_node phandle being copied to the 'image' node, to result in: image { insert-template = <&template>; some_node: some-node { }; }; Simon Glass (6): binman: Produce a template-file after processing dtoc: Make properties dirty when purging them dtoc: Add some debugging when copying nodes fdt: Allow copying phandles into templates binman: Remove templates after use WIP: binman: Support templates containing phandles tools/binman/binman.rst | 8 +++- tools/binman/control.py | 32 ++++++++++++-- tools/binman/ftest.py | 31 +++++++++++++ tools/binman/test/291_template_phandle.dts | 51 ++++++++++++++++++++++ tools/dtoc/fdt.py | 9 +++- tools/dtoc/test/dtoc_test_copy.dts | 6 ++- tools/dtoc/test_fdt.py | 34 ++++++++++----- 7 files changed, 153 insertions(+), 18 deletions(-) create mode 100644 tools/binman/test/291_template_phandle.dts -- 2.41.0.487.g6d72f3e995-goog

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[PATCH v2 1/1] riscv: define a cache line size for the generic CPU
by Heinrich Schuchardt 21 Jul '23

21 Jul '23

The USB 3.0 driver xhci-mem.c requires CONFIG_SYS_CACHELINE_SIZE to be set. Define the cache line size for QEMU on RISC-V to be 64 bytes. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- v2: Select SYS_CACHE_SHIFT_6 for GENERIC_RISCV and not for TARGET_QEMU_VIRT (as suggested by Bin) --- arch/riscv/cpu/generic/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index 897765c3c6..2baba22992 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -6,6 +6,7 @@ config GENERIC_RISCV bool select BINMAN if SPL select ARCH_EARLY_INIT_R + select SYS_CACHE_SHIFT_6 imply CPU imply CPU_RISCV imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) -- 2.40.1

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[u-boot-test-hooks PATCH 1/1] qemu_arm64_na: enable semihosting
by Heinrich Schuchardt 21 Jul '23

21 Jul '23

For testing semihosting we need to pass parameter -semihosting. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- bin/travis-ci/conf.qemu_arm64_na | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/travis-ci/conf.qemu_arm64_na b/bin/travis-ci/conf.qemu_arm64_na index 14577d8..e195b5e 100644 --- a/bin/travis-ci/conf.qemu_arm64_na +++ b/bin/travis-ci/conf.qemu_arm64_na @@ -24,7 +24,7 @@ console_impl=qemu qemu_machine="virt" qemu_helper_script="swtpm" qemu_binary="qemu-system-aarch64" -qemu_extra_args="-cpu cortex-a57 -nographic -netdev user,id=net0,tftp=${UBOOT_TRAVIS_BUILD_DIR} -device e1000,netdev=net0 -device virtio-rng-pci -chardev socket,id=chrtpm,path=/tmp/tpm/swtpm-sock -tpmdev emulator,id=tpm0,chardev=chrtpm -device tpm-tis-device,tpmdev=tpm0" +qemu_extra_args="-cpu cortex-a57 -nographic -netdev user,id=net0,tftp=${UBOOT_TRAVIS_BUILD_DIR} -device e1000,netdev=net0 -device virtio-rng-pci -semihosting -chardev socket,id=chrtpm,path=/tmp/tpm/swtpm-sock -tpmdev emulator,id=tpm0,chardev=chrtpm -device tpm-tis-device,tpmdev=tpm0" qemu_kernel_args="-bios ${U_BOOT_BUILD_DIR}/u-boot.bin" reset_impl=none flash_impl=none -- 2.39.2

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[PATCH 1/1] riscv: define a cache line size for QEMU
by Heinrich Schuchardt 21 Jul '23

21 Jul '23

The USB 3.0 driver xhci-mem.c requires CONFIG_SYS_CACHELINE_SIZE to be set. Define the cache line size for QEMU on RISC-V to be 64 bytes. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- arch/Kconfig | 1 + arch/riscv/Kconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 867cbcbe74..be6a956bb9 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -16,6 +16,7 @@ config TARGET_MICROCHIP_ICICLE config TARGET_QEMU_VIRT bool "Support QEMU Virt Board" + select SYS_CACHE_SHIFT_6 config TARGET_SIFIVE_UNLEASHED bool "Support SiFive Unleashed Board" -- 2.40.1

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