June 2023 - U-Boot

[PATCH v2 0/7] rockchip: Fix RK3328 USB support
by Jagan Teki 26 Jul '23

26 Jul '23

This series support fixes for RK3328 USB. Changes for v2: - collect Marek RB - update phy driver clockout_ctl for rk3328 - retest on Xavier patches. Any inputs? Jagan. Jagan Teki (7): arm64: dts: rockchip: Drop unused rk3328-xhci node configs: Drop unused XHCI_DWC3 for RK3328 boards usb: dwc3-generic: Restrict single ctrl node for RK3328 configs: Enable DWC3 USB 3.0 on RK3328 boards phy: rockchip-inno-usb2: Add USB2 PHY for RK3328 clk: rockchip: rk3328: Handle usb480m phy clock configs: rockchip: Enable USB2PHY for RK3328 boards arch/arm/dts/rk3328-evb-u-boot.dtsi | 5 --- arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 14 -------- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 5 --- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 15 -------- arch/arm/dts/rk3328-u-boot.dtsi | 11 ------ configs/evb-rk3328_defconfig | 4 ++- configs/nanopi-r2c-rk3328_defconfig | 4 ++- configs/nanopi-r2s-rk3328_defconfig | 4 ++- configs/roc-cc-rk3328_defconfig | 4 ++- configs/rock-pi-e-rk3328_defconfig | 4 ++- configs/rock64-rk3328_defconfig | 4 ++- drivers/clk/rockchip/clk_rk3328.c | 2 ++ drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 34 +++++++++++++++++++ drivers/usb/dwc3/dwc3-generic.c | 2 +- 14 files changed, 55 insertions(+), 57 deletions(-) -- 2.25.1

4 19

[PATCH v2 1/2] rockchip: rk3328: Add support for Orange Pi R1 Plus
by Tianling Shen 26 Jul '23

26 Jul '23

Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong. This device is similar to the NanoPi R2S, and has a 16MB SPI NOR (mx25l12805d). The reset button is changed to directly reset the power supply, another detail is that both network ports have independent MAC addresses. The device tree and description are taken from kernel v6.3-rc1. Reviewed-by: Kever Yang <kever.yang(a)rock-chips.com> Signed-off-by: Tianling Shen <cnsztl(a)gmail.com> --- Changes in v2: * Rebased upon the latest git HEAD * Collected R-b tag. * Removed kernel link from commit message. --- arch/arm/dts/Makefile | 1 + .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 46 +++ arch/arm/dts/rk3328-orangepi-r1-plus.dts | 373 ++++++++++++++++++ board/rockchip/evb_rk3328/MAINTAINERS | 6 + configs/orangepi-r1-plus-rk3328_defconfig | 114 ++++++ 5 files changed, 540 insertions(+) create mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi create mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus.dts create mode 100644 configs/orangepi-r1-plus-rk3328_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 480269fa60..9d189788aa 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -125,6 +125,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \ rk3328-evb.dtb \ rk3328-nanopi-r2c.dtb \ rk3328-nanopi-r2s.dtb \ + rk3328-orangepi-r1-plus.dtb \ rk3328-roc-cc.dtb \ rk3328-rock64.dtb \ rk3328-rock-pi-e.dtb diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi new file mode 100644 index 0000000000..637c70adf1 --- /dev/null +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd + * (C) Copyright 2020 David Bauer + */ + +#include "rk3328-u-boot.dtsi" +#include "rk3328-sdram-ddr4-666.dtsi" +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; + }; +}; + +&gpio0 { + bootph-pre-ram; +}; + +&pinctrl { + bootph-pre-ram; +}; + +&sdmmc0m1_pin { + bootph-pre-ram; +}; + +&pcfg_pull_up_4ma { + bootph-pre-ram; +}; + +/* Need this and all the pinctrl/gpio stuff above to set pinmux */ +&vcc_sd { + bootph-pre-ram; +}; + +&gmac2io { + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; +}; + +&spi0 { + spi_flash: spiflash@0 { + bootph-all; + }; +}; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts new file mode 100644 index 0000000000..dc83d74045 --- /dev/null +++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts @@ -0,0 +1,373 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Based on rk3328-nanopi-r2s.dts, which is: + * Copyright (c) 2020 David Bauer <mail(a)david-bauer.net> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include "rk3328.dtsi" + +/ { + model = "Xunlong Orange Pi R1 Plus"; + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; + + aliases { + ethernet1 = &rtl8153; + mmc0 = &sdmmc; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + gmac_clk: gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_clkin"; + #clock-cells = <0>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-names = "default"; + + led-0 { + function = LED_FUNCTION_LAN; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_RED>; + gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-2 { + function = LED_FUNCTION_WAN; + color = <LED_COLOR_ID_GREEN>; + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + }; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&sdmmc0m1_pin>; + pinctrl-names = "default"; + regulator-name = "vcc_sd"; + regulator-boot-on; + vin-supply = <&vcc_io>; + }; + + vcc_sys: vcc-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vdd_5v_lan: vdd-5v-lan-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&lan_vdd_pin>; + pinctrl-names = "default"; + regulator-name = "vdd_5v_lan"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&cpu1 { + cpu-supply = <&vdd_arm>; +}; + +&cpu2 { + cpu-supply = <&vdd_arm>; +}; + +&cpu3 { + cpu-supply = <&vdd_arm>; +}; + +&display_subsystem { + status = "disabled"; +}; + +&gmac2io { + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; + clock_in_out = "input"; + phy-handle = <&rtl8211e>; + phy-mode = "rgmii"; + phy-supply = <&vcc_io>; + pinctrl-0 = <&rgmiim1_pins>; + pinctrl-names = "default"; + snps,aal; + rx_delay = <0x18>; + tx_delay = <0x24>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + rtl8211e: ethernet-phy@1 { + reg = <1>; + pinctrl-0 = <&eth_phy_reset_pin>; + pinctrl-names = "default"; + reset-assert-us = <10000>; + reset-deassert-us = <50000>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&i2c1 { + status = "okay"; + + rk805: pmic@18 { + compatible = "rockchip,rk805"; + reg = <0x18>; + interrupt-parent = <&gpio1>; + interrupts = <24 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + gpio-controller; + #gpio-cells = <2>; + pinctrl-0 = <&pmic_int_l>; + pinctrl-names = "default"; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_sys>; + + regulators { + vdd_log: DCDC_REG1 { + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_18: LDO_REG1 { + regulator-name = "vcc_18"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_emmc: LDO_REG2 { + regulator-name = "vcc18_emmc"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; +}; + +&io_domains { + pmuio-supply = <&vcc_io>; + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; + vccio4-supply = <&vcc_io>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_io>; + status = "okay"; +}; + +&pinctrl { + gmac2io { + eth_phy_reset_pin: eth-phy-reset-pin { + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + leds { + lan_led_pin: lan-led-pin { + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + sys_led_pin: sys-led-pin { + rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led_pin: wan-led-pin { + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lan { + lan_vdd_pin: lan-vdd-pin { + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pwm2 { + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&u2phy { + status = "okay"; +}; + +&u2phy_host { + status = "okay"; +}; + +&u2phy_otg { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb20_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbdrd3 { + dr_mode = "host"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + /* Second port is for USB 3.0 */ + rtl8153: device@2 { + compatible = "usbbda,8153"; + reg = <2>; + }; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 3c46613ab5..91dc6b58cf 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -18,6 +18,12 @@ F: configs/nanopi-r2s-rk3328_defconfig F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi F: arch/arm/dts/rk3328-nanopi-r2s.dts +ORANGEPI-R1-PLUS-RK3328 +M: Tianling Shen <cnsztl(a)gmail.com> +S: Maintained +F: configs/orangepi-r1-plus-rk3328_defconfig +F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi + ROC-RK3328-CC M: Loic Devulder <ldevulder(a)suse.com> M: Chen-Yu Tsai <wens(a)csie.org> diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig new file mode 100644 index 0000000000..3f62f0588d --- /dev/null +++ b/configs/orangepi-r1-plus-rk3328_defconfig @@ -0,0 +1,114 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus" +CONFIG_DM_RESET=y +CONFIG_ROCKCHIP_RK3328=y +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 +CONFIG_DEBUG_UART_BASE=0xFF130000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_DEBUG_UART=y +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x2000000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_I2C=y +CONFIG_SPL_POWER=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_TPL_OF_PLATDATA=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_TPL_DM=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_BUF_ADDR=0x800800 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_SPL_PMIC_RK8XX=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSINFO=y +CONFIG_SYSRESET=y +# CONFIG_TPL_SYSRESET is not set +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_TPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y -- 2.40.1

2 2

[PATCH V2 0/6] Add Support for RG353PS and Panel Auto Detection
by Chris Morgan 26 Jul '23

26 Jul '23

From: Chris Morgan <macromorgan(a)hotmail.com> Add support for panel auto detection for the Anbernic RGxx3 series. This requires us to probe the DSI and DSI-DPHY controllers so that we may send a MIPI_DCS_GET_DISPLAY_ID command to the panel to find out which panel we are running. This requires creating a kind of "skeleton" driver for the panel so we have just enough information about it to issue the necessary command. Once the panel type is determined the panel type is saved as an environment variable, and additionally the panel compatible string is automatically fixed-up in the devicetree if it is found to be incompatible. There is a table of panel IDs and compatible strings, support for a new panel only requires knowing the ID and the string. Additionally, the device auto detection was changed so that it mimicks the panel auto detection, requiring only defining a few new values to add support for a new compatible board. This is done while also adding a new board, the RG353PS. Tested the auto detection on an RG353P, RG353PS (2nd revision panel), RG353V, RG353V (2nd revision panel), RG353M, and RG503. As long as the correct devicetrees were located in ${boot}/rockchip/. U-Boot was able to automatically detect the correct board and panel and boot each device correctly. Changes since V1: - Split into multiple patches to make it easier to digest. - Updated documentation to note panel detection is now working. Chris Morgan (6): board: rockchip: Correct i2c2 pinctrl for RGxx3 board: rockchip: add DSI and DSI-DPHY for Anbernic RGxx3 board: rockchip: Add support for RG353PS to RGxx3 board: rockchip: Add panel auto-detection for Anbernic RGxx3 configs: Update anbernic-rgxx3_defconfig for panel detection doc: anbernic: Update RGxx3 Docs for panel detection .../arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 10 + board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c | 322 +++++++++++++++--- configs/anbernic-rgxx3_defconfig | 15 + doc/board/anbernic/rgxx3.rst | 31 +- 4 files changed, 327 insertions(+), 51 deletions(-) -- 2.34.1

2 12

[PATCH] rockchip: board: Update Odroid Go2 to Support Additional Revisions
by Chris Morgan 26 Jul '23

26 Jul '23

From: Chris Morgan <macromorgan(a)hotmail.com> Update the board.c file for the Odroid Go Advance to support the Black Edition and the Odroid Go Super. The Odroid Go Advance Black Edition differs from the original model with the addition of 2 extra buttons and an ESP8266 WiFi module. The Odroid Go Super adds an additional 2 buttons compared to the Black Edition, along with a larger panel and larger battery. This change uses the value of ADC0 to determine which of these 3 models it is, and then changes the ${fdtfile} environment variable to match the proper devicetree name in mainline Linux. Tested on an Odroid Go Advance (first revision) and an Odroid Go Super. The correct ${fdtfile} variable was set for each device. Signed-off-by: Chris Morgan <macromorgan(a)hotmail.com> --- board/hardkernel/odroid_go2/go2.c | 103 ++++++++++++++++++++++++++++++ configs/odroid-go2_defconfig | 1 + 2 files changed, 104 insertions(+) diff --git a/board/hardkernel/odroid_go2/go2.c b/board/hardkernel/odroid_go2/go2.c index 29464ae63e..a0338ead3b 100644 --- a/board/hardkernel/odroid_go2/go2.c +++ b/board/hardkernel/odroid_go2/go2.c @@ -2,3 +2,106 @@ /* * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ + +#include <linux/stddef.h> +#include <adc.h> +#include <asm/io.h> +#include <dm.h> +#include <env.h> +#include <stdlib.h> + +#define DTB_DIR "rockchip/" + +struct oga_model { + const u16 adc_value; + const char *board; + const char *board_name; + const char *fdtfile; +}; + +enum oga_device_id { + OGA, + OGA_V11, + OGS, +}; + +/* + * All ADC values from schematic of Odroid Go Advance Black Edition. + * Value for OGS is inferred based on schematic and observed values. + */ +static const struct oga_model oga_model_details[] = { + [OGA] = { + 856, + "rk3326-odroid-go2", + "ODROID-GO Advance", + DTB_DIR "rk3326-odroid-go2.dtb", + }, + [OGA_V11] = { + 677, + "rk3326-odroid-go2-v11", + "ODROID-GO Advance Black Edition", + DTB_DIR "rk3326-odroid-go2-v11.dtb", + }, + [OGS] = { + 85, + "rk3326-odroid-go3", + "ODROID-GO Super", + DTB_DIR "rk3326-odroid-go3.dtb", + }, +}; + +/* Detect which Odroid Go Advance device we are using so as to load the + * correct devicetree for Linux. Set an environment variable once + * found. The detection depends on the value of ADC channel 0. + */ +int oga_detect_device(void) +{ + u32 adc_info; + int ret, i; + int board_id = -ENXIO; + + ret = adc_channel_single_shot("saradc@ff288000", 0, &adc_info); + if (ret) { + printf("Read SARADC failed with error %d\n", ret); + return ret; + } + + /* + * Get the correct device from the table. The ADC value is + * determined by a resistor on ADC channel 0. The manufacturer + * accounted for this with a 5% tolerance, so assume a +- value + * of 50 should be enough. + */ + for (i = 0; i < ARRAY_SIZE(oga_model_details); i++) { + u32 adc_min = oga_model_details[i].adc_value - 50; + u32 adc_max = oga_model_details[i].adc_value + 50; + + if (adc_min < adc_info && adc_max > adc_info) { + board_id = i; + break; + } + } + + if (board_id < 0) + return board_id; + + env_set("board", oga_model_details[board_id].board); + env_set("board_name", + oga_model_details[board_id].board_name); + env_set("fdtfile", oga_model_details[board_id].fdtfile); + + return 0; +} + +int rk_board_late_init(void) +{ + int ret; + + ret = oga_detect_device(); + if (ret) { + printf("Unable to detect device type: %d\n", ret); + return ret; + } + + return 0; +} diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 459ae3d59c..bdc2288af6 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -35,6 +35,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3326-odroid-go2.dtb" # CONFIG_CONSOLE_MUX is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x20000 CONFIG_SPL_PAD_TO=0x7f8000 -- 2.34.1

2 1

[PATCH 1/5] arch: rockchip: rk3588: Fix missing suffix 'A' for Edgeble Neu6A
by Jagan Teki 26 Jul '23

26 Jul '23

Add missing suffix 'A' for Edgeble Neu6A SoM and IO boards. Fixes: <15b2d1fb727> ("board: rockchip: Add Edgeble Neural Compute Module 6") Signed-off-by: Jagan Teki <jagan(a)edgeble.ai> --- arch/arm/mach-rockchip/rk3588/Kconfig | 10 +++++----- doc/board/rockchip/rockchip.rst | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index 3596b82f1f..5eecd26f86 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -10,14 +10,14 @@ config TARGET_RK3588_NEU6 bool "Edgeble Neural Compute Module 6(Neu6) SoM" select BOARD_LATE_INIT help - Neu6: - Neural Compute Module 6A(Neu6a) is a 96boards SoM-CB compute module + Neu6A: + Neural Compute Module 6A(Neu6A) is a 96boards SoM-CB compute module based on Rockchip RK3588 from Edgeble AI. - Neu6-IO: - Neural Compute Module 6(Neu6) IO board is an industrial form factor + Neu6A-IO: + Neural Compute Module 6A(Neu6A) IO board is an industrial form factor IO board and Neu6a needs to mount on top of this IO board in order to - create complete Edgeble Neural Compute Module 6(Neu6) IO platform. + create complete Edgeble Neural Compute Module 6A(Neu6A) IO platform. config TARGET_ROCK5B_RK3588 bool "Radxa ROCK5B RK3588 board" diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 99376fb54c..1f46924a3d 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -98,7 +98,7 @@ List of mainline supported Rockchip boards: * rk3588 - Rockchip EVB (evb-rk3588) - - Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-rk3588) + - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588) - Radxa ROCK 5B (rock5b-rk3588) * rv1108 -- 2.25.1

2 10

[PATCH 0/4] rockchip: rk3588: add USB 3.0 support
by Eugen Hristev 26 Jul '23

26 Jul '23

This series adds preliminary support for USB 3.0 using the Dual Role Devices DRD based on DWC3 controller One controller is in host mode : 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (480 Mb/s, 100mA) TDK LoR TF10 C900587416E2C552 The other is in gadget mode, and to test it out, I enabled rockusb Currently it works to remotely reboot the board e.g. : $ sudo rkdeveloptool ld DevNo=1 Vid=0x2207,Pid=0x350b,LocationID=601 Maskrom $ sudo rkdeveloptool rd Reset Device OK. => rockusb 0 mmc 0 dwc3-generic-peripheral usb@fc000000: request 00000000edf44580 was not queued to ep1in-bulk rockkusb set reboot flag: 0 resetting ... For a typeC to typeC gadget connection, it only works in one orientation. To get orientation flipping support, another patch series is required, for the fairchild fusb driver and type C stack. Current patch series also adds the USB-DP combo phy driver. The DWC3 controllers each have two PHYs, one for USB 2.0 (the inno2 usb2 phy) and the usbdp for USB 3.0 . Eugen Hristev (2): ARM: dts: rockchip: rk3588-rock-5b-u-boot: add USB3 support configs: rock5b-rk3588: enable USB 3.0 controller, command, gadget Frank Wang (1): phy: rockchip: add usbdp combo phy driver Joseph Chen (1): ARM: dts: rockchip: rk3588: add support for USB 3.0 devices arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 197 +++++ arch/arm/dts/rk3588-u-boot.dtsi | 93 +++ arch/arm/dts/rk3588s-u-boot.dtsi | 105 +++ configs/rock5b-rk3588_defconfig | 14 + drivers/phy/rockchip/Kconfig | 7 + drivers/phy/rockchip/Makefile | 1 + drivers/phy/rockchip/phy-rockchip-usbdp.c | 880 ++++++++++++++++++++++ include/linux/usb/phy-rockchip-usbdp.h | 70 ++ 8 files changed, 1367 insertions(+) create mode 100644 drivers/phy/rockchip/phy-rockchip-usbdp.c create mode 100644 include/linux/usb/phy-rockchip-usbdp.h -- 2.34.1

2 8

[PATCH v2 1/6] net: split IP_TCP header into separate IP/IP6 and TCP headers
by Dmitrii Merkurev 26 Jul '23

26 Jul '23

This allows us to reuse TCP logic between IP and IP6 stack. Signed-off-by: Dmitrii Merkurev <dimorinny(a)google.com> Cc: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> Cc: Simon Glass <sjg(a)chromium.org> Сс: Joe Hershberger <joe.hershberger(a)ni.com> Сс: Ramon Fried <rfried.dev(a)gmail.com> --- include/net/tcp.h | 54 ++++++++++++++++-------------------- net/tcp.c | 70 +++++++++++++++++++++++------------------------ test/cmd/wget.c | 48 ++++++++++++++++++-------------- 3 files changed, 85 insertions(+), 87 deletions(-) diff --git a/include/net/tcp.h b/include/net/tcp.h index c29d4ce24a..93ed728dfe 100644 --- a/include/net/tcp.h +++ b/include/net/tcp.h @@ -5,20 +5,16 @@ * Copyright 2017 Duncan Hare, All rights reserved. */ +#ifndef __TCP_H__ +#define __TCP_H__ + #define TCP_ACTIVITY 127 /* Number of packets received */ /* before console progress mark */ + +#define GET_TCP_HDR_LEN_IN_BYTES(x) ((x) >> 2) + /** - * struct ip_tcp_hdr - IP and TCP header - * @ip_hl_v: header length and version - * @ip_tos: type of service - * @ip_len: total length - * @ip_id: identification - * @ip_off: fragment offset field - * @ip_ttl: time to live - * @ip_p: protocol - * @ip_sum: checksum - * @ip_src: Source IP address - * @ip_dst: Destination IP address + * struct tcp_hdr - TCP header * @tcp_src: TCP source port * @tcp_dst: TCP destination port * @tcp_seq: TCP sequence number @@ -28,18 +24,8 @@ * @tcp_win: TCP windows size * @tcp_xsum: Checksum * @tcp_ugr: Pointer to urgent data - */ -struct ip_tcp_hdr { - u8 ip_hl_v; - u8 ip_tos; - u16 ip_len; - u16 ip_id; - u16 ip_off; - u8 ip_ttl; - u8 ip_p; - u16 ip_sum; - struct in_addr ip_src; - struct in_addr ip_dst; +*/ +struct tcp_hdr { u16 tcp_src; u16 tcp_dst; u32 tcp_seq; @@ -51,8 +37,8 @@ struct ip_tcp_hdr { u16 tcp_ugr; } __packed; -#define IP_TCP_HDR_SIZE (sizeof(struct ip_tcp_hdr)) -#define TCP_HDR_SIZE (IP_TCP_HDR_SIZE - IP_HDR_SIZE) +#define TCP_HDR_SIZE (sizeof(struct tcp_hdr)) +#define IP_TCP_HDR_SIZE (IP_HDR_SIZE + TCP_HDR_SIZE) #define TCP_DATA 0x00 /* Data Packet - internal use only */ #define TCP_FIN 0x01 /* Finish flag */ @@ -178,7 +164,8 @@ struct tcp_t_opt { /** * struct ip_tcp_hdr_o - IP + TCP header + TCP options - * @hdr: IP + TCP header + * @ip_hdr: IP + TCP header + * @tcp_hdr: TCP header * @mss: TCP MSS Option * @scale: TCP Windows Scale Option * @sack_p: TCP Sack-Permitted Option @@ -186,7 +173,8 @@ struct tcp_t_opt { * @end: end of options */ struct ip_tcp_hdr_o { - struct ip_tcp_hdr hdr; + struct ip_hdr ip_hdr; + struct tcp_hdr tcp_hdr; struct tcp_mss mss; struct tcp_scale scale; struct tcp_sack_p sack_p; @@ -198,15 +186,17 @@ struct ip_tcp_hdr_o { /** * struct ip_tcp_hdr_s - IP + TCP header + TCP options - * @hdr: IP + TCP header + * @ip_hdr: IP + TCP header + * @tcp_hdr: TCP header * @t_opt: TCP Timestamp Option * @sack_v: TCP SACK Option * @end: end of options */ struct ip_tcp_hdr_s { - struct ip_tcp_hdr hdr; - struct tcp_t_opt t_opt; - struct tcp_sack_v sack_v; + struct ip_hdr ip_hdr; + struct tcp_hdr tcp_hdr; + struct tcp_t_opt t_opt; + struct tcp_sack_v sack_v; u8 end; } __packed; @@ -303,3 +293,5 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int len); u16 tcp_set_pseudo_header(uchar *pkt, struct in_addr src, struct in_addr dest, int tcp_len, int pkt_len); + +#endif // __TCP_H__ diff --git a/net/tcp.c b/net/tcp.c index a713e1dd60..10ce799814 100644 --- a/net/tcp.c +++ b/net/tcp.c @@ -155,7 +155,7 @@ u16 tcp_set_pseudo_header(uchar *pkt, struct in_addr src, struct in_addr dest, */ int net_set_ack_options(union tcp_build_pkt *b) { - b->sack.hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(LEN_B_TO_DW(TCP_HDR_SIZE)); + b->sack.tcp_hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(LEN_B_TO_DW(TCP_HDR_SIZE)); b->sack.t_opt.kind = TCP_O_TS; b->sack.t_opt.len = TCP_OPT_LEN_A; @@ -187,12 +187,12 @@ int net_set_ack_options(union tcp_build_pkt *b) b->sack.sack_v.hill[3].r = TCP_O_NOP; } - b->sack.hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(ROUND_TCPHDR_LEN(TCP_HDR_SIZE + + b->sack.tcp_hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(ROUND_TCPHDR_LEN(TCP_HDR_SIZE + TCP_TSOPT_SIZE + tcp_lost.len)); } else { b->sack.sack_v.kind = 0; - b->sack.hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(ROUND_TCPHDR_LEN(TCP_HDR_SIZE + + b->sack.tcp_hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(ROUND_TCPHDR_LEN(TCP_HDR_SIZE + TCP_TSOPT_SIZE)); } @@ -201,7 +201,7 @@ int net_set_ack_options(union tcp_build_pkt *b) * TCP header to add to the total packet length */ - return GET_TCP_HDR_LEN_IN_BYTES(b->sack.hdr.tcp_hlen); + return GET_TCP_HDR_LEN_IN_BYTES(b->sack.tcp_hdr.tcp_hlen); } /** @@ -213,7 +213,7 @@ void net_set_syn_options(union tcp_build_pkt *b) if (IS_ENABLED(CONFIG_PROT_TCP_SACK)) tcp_lost.len = 0; - b->ip.hdr.tcp_hlen = 0xa0; + b->ip.tcp_hdr.tcp_hlen = 0xa0; b->ip.mss.kind = TCP_O_MSS; b->ip.mss.len = TCP_OPT_LEN_4; @@ -249,9 +249,9 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport, int payload_len, * Header: 5 32 bit words. 4 bits TCP header Length, * 4 bits reserved options */ - b->ip.hdr.tcp_flags = action; + b->ip.tcp_hdr.tcp_flags = action; pkt_hdr_len = IP_TCP_HDR_SIZE; - b->ip.hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(LEN_B_TO_DW(TCP_HDR_SIZE)); + b->ip.tcp_hdr.tcp_hlen = SHIFT_TO_TCPHDRLEN_FIELD(LEN_B_TO_DW(TCP_HDR_SIZE)); switch (action) { case TCP_SYN: @@ -274,7 +274,7 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport, int payload_len, case TCP_SYN | TCP_ACK: case TCP_ACK: pkt_hdr_len = IP_HDR_SIZE + net_set_ack_options(b); - b->ip.hdr.tcp_flags = action; + b->ip.tcp_hdr.tcp_flags = action; debug_cond(DEBUG_DEV_PKT, "TCP Hdr:ACK (%pI4, %pI4, s=%u, a=%u, A=%x)\n", &net_server_ip, &net_ip, tcp_seq_num, tcp_ack_num, @@ -308,7 +308,7 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport, int payload_len, fallthrough; default: pkt_hdr_len = IP_HDR_SIZE + net_set_ack_options(b); - b->ip.hdr.tcp_flags = action | TCP_PUSH | TCP_ACK; + b->ip.tcp_hdr.tcp_flags = action | TCP_PUSH | TCP_ACK; debug_cond(DEBUG_DEV_PKT, "TCP Hdr:dft (%pI4, %pI4, s=%u, a=%u, A=%x)\n", &net_server_ip, &net_ip, @@ -320,10 +320,10 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport, int payload_len, tcp_ack_edge = tcp_ack_num; /* TCP Header */ - b->ip.hdr.tcp_ack = htonl(tcp_ack_edge); - b->ip.hdr.tcp_src = htons(sport); - b->ip.hdr.tcp_dst = htons(dport); - b->ip.hdr.tcp_seq = htonl(tcp_seq_num); + b->ip.tcp_hdr.tcp_ack = htonl(tcp_ack_edge); + b->ip.tcp_hdr.tcp_src = htons(sport); + b->ip.tcp_hdr.tcp_dst = htons(dport); + b->ip.tcp_hdr.tcp_seq = htonl(tcp_seq_num); /* * TCP window size - TCP header variable tcp_win. @@ -340,13 +340,13 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport, int payload_len, * it is, then the u-boot tftp or nfs kernel netboot should be * considered. */ - b->ip.hdr.tcp_win = htons(PKTBUFSRX * TCP_MSS >> TCP_SCALE); + b->ip.tcp_hdr.tcp_win = htons(PKTBUFSRX * TCP_MSS >> TCP_SCALE); - b->ip.hdr.tcp_xsum = 0; - b->ip.hdr.tcp_ugr = 0; + b->ip.tcp_hdr.tcp_xsum = 0; + b->ip.tcp_hdr.tcp_ugr = 0; - b->ip.hdr.tcp_xsum = tcp_set_pseudo_header(pkt, net_ip, net_server_ip, - tcp_len, pkt_len); + b->ip.tcp_hdr.tcp_xsum = tcp_set_pseudo_header(pkt, net_ip, net_server_ip, + tcp_len, pkt_len); net_set_ip_header((uchar *)&b->ip, net_server_ip, net_ip, pkt_len, IPPROTO_TCP); @@ -638,7 +638,7 @@ static u8 tcp_state_machine(u8 tcp_flags, u32 tcp_seq_num, int payload_len) void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) { int tcp_len = pkt_len - IP_HDR_SIZE; - u16 tcp_rx_xsum = b->ip.hdr.ip_sum; + u16 tcp_rx_xsum = b->ip.ip_hdr.ip_sum; u8 tcp_action = TCP_DATA; u32 tcp_seq_num, tcp_ack_num; int tcp_hdr_len, payload_len; @@ -646,11 +646,11 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) /* Verify IP header */ debug_cond(DEBUG_DEV_PKT, "TCP RX in RX Sum (to=%pI4, from=%pI4, len=%d)\n", - &b->ip.hdr.ip_src, &b->ip.hdr.ip_dst, pkt_len); + &b->ip.ip_hdr.ip_src, &b->ip.ip_hdr.ip_dst, pkt_len); - b->ip.hdr.ip_src = net_server_ip; - b->ip.hdr.ip_dst = net_ip; - b->ip.hdr.ip_sum = 0; + b->ip.ip_hdr.ip_src = net_server_ip; + b->ip.ip_hdr.ip_dst = net_ip; + b->ip.ip_hdr.ip_sum = 0; if (tcp_rx_xsum != compute_ip_checksum(b, IP_HDR_SIZE)) { debug_cond(DEBUG_DEV_PKT, "TCP RX IP xSum Error (%pI4, =%pI4, len=%d)\n", @@ -659,10 +659,10 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) } /* Build pseudo header and verify TCP header */ - tcp_rx_xsum = b->ip.hdr.tcp_xsum; - b->ip.hdr.tcp_xsum = 0; - if (tcp_rx_xsum != tcp_set_pseudo_header((uchar *)b, b->ip.hdr.ip_src, - b->ip.hdr.ip_dst, tcp_len, + tcp_rx_xsum = b->ip.tcp_hdr.tcp_xsum; + b->ip.tcp_hdr.tcp_xsum = 0; + if (tcp_rx_xsum != tcp_set_pseudo_header((uchar *)b, b->ip.ip_hdr.ip_src, + b->ip.ip_hdr.ip_dst, tcp_len, pkt_len)) { debug_cond(DEBUG_DEV_PKT, "TCP RX TCP xSum Error (%pI4, %pI4, len=%d)\n", @@ -670,7 +670,7 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) return; } - tcp_hdr_len = GET_TCP_HDR_LEN_IN_BYTES(b->ip.hdr.tcp_hlen); + tcp_hdr_len = GET_TCP_HDR_LEN_IN_BYTES(b->ip.tcp_hdr.tcp_hlen); payload_len = tcp_len - tcp_hdr_len; if (tcp_hdr_len > TCP_HDR_SIZE) @@ -680,11 +680,11 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) * Incoming sequence and ack numbers are server's view of the numbers. * The app must swap the numbers when responding. */ - tcp_seq_num = ntohl(b->ip.hdr.tcp_seq); - tcp_ack_num = ntohl(b->ip.hdr.tcp_ack); + tcp_seq_num = ntohl(b->ip.tcp_hdr.tcp_seq); + tcp_ack_num = ntohl(b->ip.tcp_hdr.tcp_ack); /* Packets are not ordered. Send to app as received. */ - tcp_action = tcp_state_machine(b->ip.hdr.tcp_flags, + tcp_action = tcp_state_machine(b->ip.tcp_hdr.tcp_flags, tcp_seq_num, payload_len); tcp_activity_count++; @@ -698,8 +698,8 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) "TCP Notify (action=%x, Seq=%u,Ack=%u,Pay%d)\n", tcp_action, tcp_seq_num, tcp_ack_num, payload_len); - (*tcp_packet_handler) ((uchar *)b + pkt_len - payload_len, b->ip.hdr.tcp_dst, - b->ip.hdr.ip_src, b->ip.hdr.tcp_src, tcp_seq_num, + (*tcp_packet_handler) ((uchar *)b + pkt_len - payload_len, b->ip.tcp_hdr.tcp_dst, + b->ip.ip_hdr.ip_src, b->ip.tcp_hdr.tcp_src, tcp_seq_num, tcp_ack_num, tcp_action, payload_len); } else if (tcp_action != TCP_DATA) { @@ -711,8 +711,8 @@ void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int pkt_len) * Warning: Incoming Ack & Seq sequence numbers are transposed * here to outgoing Seq & Ack sequence numbers */ - net_send_tcp_packet(0, ntohs(b->ip.hdr.tcp_src), - ntohs(b->ip.hdr.tcp_dst), + net_send_tcp_packet(0, ntohs(b->ip.tcp_hdr.tcp_src), + ntohs(b->ip.tcp_hdr.tcp_dst), (tcp_action & (~TCP_PUSH)), tcp_ack_num, tcp_ack_edge); } diff --git a/test/cmd/wget.c b/test/cmd/wget.c index ed83fc94a5..e2c11d3e76 100644 --- a/test/cmd/wget.c +++ b/test/cmd/wget.c @@ -52,9 +52,11 @@ static int sb_syn_handler(struct udevice *dev, void *packet, { struct eth_sandbox_priv *priv = dev_get_priv(dev); struct ethernet_hdr *eth = packet; - struct ip_tcp_hdr *tcp = packet + ETHER_HDR_SIZE; + struct ip_hdr *ip = packet + ETHER_HDR_SIZE; + struct tcp_hdr *tcp = (void *)ip + IP_HDR_SIZE; struct ethernet_hdr *eth_send; - struct ip_tcp_hdr *tcp_send; + struct ip_hdr *ip_send; + struct tcp_hdr *tcp_send; /* Don't allow the buffer to overrun */ if (priv->recv_packets >= PKTBUFSRX) @@ -64,7 +66,8 @@ static int sb_syn_handler(struct udevice *dev, void *packet, memcpy(eth_send->et_dest, eth->et_src, ARP_HLEN); memcpy(eth_send->et_src, priv->fake_host_hwaddr, ARP_HLEN); eth_send->et_protlen = htons(PROT_IP); - tcp_send = (void *)eth_send + ETHER_HDR_SIZE; + ip_send = (void *)eth_send + ETHER_HDR_SIZE; + tcp_send = (void *)ip_send + IP_HDR_SIZE; tcp_send->tcp_src = tcp->tcp_dst; tcp_send->tcp_dst = tcp->tcp_src; tcp_send->tcp_seq = htonl(0); @@ -74,14 +77,14 @@ static int sb_syn_handler(struct udevice *dev, void *packet, tcp_send->tcp_win = htons(PKTBUFSRX * TCP_MSS >> TCP_SCALE); tcp_send->tcp_xsum = 0; tcp_send->tcp_ugr = 0; - tcp_send->tcp_xsum = tcp_set_pseudo_header((uchar *)tcp_send, - tcp->ip_src, - tcp->ip_dst, + tcp_send->tcp_xsum = tcp_set_pseudo_header((uchar *)ip_send, + ip->ip_src, + ip->ip_dst, TCP_HDR_SIZE, IP_TCP_HDR_SIZE); - net_set_ip_header((uchar *)tcp_send, - tcp->ip_src, - tcp->ip_dst, + net_set_ip_header((uchar *)ip_send, + ip->ip_src, + ip->ip_dst, IP_TCP_HDR_SIZE, IPPROTO_TCP); @@ -97,9 +100,11 @@ static int sb_ack_handler(struct udevice *dev, void *packet, { struct eth_sandbox_priv *priv = dev_get_priv(dev); struct ethernet_hdr *eth = packet; - struct ip_tcp_hdr *tcp = packet + ETHER_HDR_SIZE; + struct ip_hdr *ip = packet + ETHER_HDR_SIZE; + struct tcp_hdr *tcp = (void *)ip + IP_HDR_SIZE; struct ethernet_hdr *eth_send; - struct ip_tcp_hdr *tcp_send; + struct ip_hdr *ip_send; + struct tcp_hdr *tcp_send; void *data; int pkt_len; int payload_len = 0; @@ -115,10 +120,11 @@ static int sb_ack_handler(struct udevice *dev, void *packet, memcpy(eth_send->et_dest, eth->et_src, ARP_HLEN); memcpy(eth_send->et_src, priv->fake_host_hwaddr, ARP_HLEN); eth_send->et_protlen = htons(PROT_IP); - tcp_send = (void *)eth_send + ETHER_HDR_SIZE; + ip_send = (void *)eth_send + ETHER_HDR_SIZE; + tcp_send = (void *)ip_send + IP_HDR_SIZE; + data = (void *)tcp_send + TCP_HDR_SIZE; tcp_send->tcp_src = tcp->tcp_dst; tcp_send->tcp_dst = tcp->tcp_src; - data = (void *)tcp_send + IP_TCP_HDR_SIZE; if (ntohl(tcp->tcp_seq) == 1 && ntohl(tcp->tcp_ack) == 1) { tcp_send->tcp_seq = htonl(ntohl(tcp->tcp_ack)); @@ -138,14 +144,14 @@ static int sb_ack_handler(struct udevice *dev, void *packet, tcp_send->tcp_xsum = 0; tcp_send->tcp_ugr = 0; pkt_len = IP_TCP_HDR_SIZE + payload_len; - tcp_send->tcp_xsum = tcp_set_pseudo_header((uchar *)tcp_send, - tcp->ip_src, - tcp->ip_dst, + tcp_send->tcp_xsum = tcp_set_pseudo_header((uchar *)ip_send, + ip->ip_src, + ip->ip_dst, pkt_len - IP_HDR_SIZE, pkt_len); - net_set_ip_header((uchar *)tcp_send, - tcp->ip_src, - tcp->ip_dst, + net_set_ip_header((uchar *)ip_send, + ip->ip_src, + ip->ip_dst, pkt_len, IPPROTO_TCP); @@ -163,14 +169,14 @@ static int sb_http_handler(struct udevice *dev, void *packet, { struct ethernet_hdr *eth = packet; struct ip_hdr *ip; - struct ip_tcp_hdr *tcp; + struct tcp_hdr *tcp; if (ntohs(eth->et_protlen) == PROT_ARP) { return sb_arp_handler(dev, packet, len); } else if (ntohs(eth->et_protlen) == PROT_IP) { ip = packet + ETHER_HDR_SIZE; if (ip->ip_p == IPPROTO_TCP) { - tcp = packet + ETHER_HDR_SIZE; + tcp = packet + ETHER_HDR_SIZE + IP_HDR_SIZE; if (tcp->tcp_flags == TCP_SYN) return sb_syn_handler(dev, packet, len); else if (tcp->tcp_flags & TCP_ACK && !(tcp->tcp_flags & TCP_SYN)) -- 2.40.1.606.ga4b1b128d6-goog

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[PATCH] drivers: led: bcm6858: do not use null label to find the top
by Philippe Reynes 25 Jul '23

25 Jul '23

This driver considers that a node with an empty label is the top. But the led class has changed, if a label is not provided for a led, the label is filed with the node name. So we update this driver to use a wrapper to manage the top led node. Signed-off-by: Philippe Reynes <philippe.reynes(a)softathome.com> --- drivers/led/led_bcm6858.c | 122 ++++++++++++++++++++------------------ 1 file changed, 64 insertions(+), 58 deletions(-) diff --git a/drivers/led/led_bcm6858.c b/drivers/led/led_bcm6858.c index 6b3698674b..397dc0d869 100644 --- a/drivers/led/led_bcm6858.c +++ b/drivers/led/led_bcm6858.c @@ -180,63 +180,71 @@ static const struct led_ops bcm6858_led_ops = { static int bcm6858_led_probe(struct udevice *dev) { - struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); - - /* Top-level LED node */ - if (!uc_plat->label) { - void __iomem *regs; - u32 set_bits = 0; - - regs = dev_remap_addr(dev); - if (!regs) - return -EINVAL; - - if (dev_read_bool(dev, "brcm,serial-led-msb-first")) - set_bits |= LED_CTRL_SERIAL_LED_MSB_FIRST; - if (dev_read_bool(dev, "brcm,serial-led-en-pol")) - set_bits |= LED_CTRL_SERIAL_LED_EN_POL; - if (dev_read_bool(dev, "brcm,serial-led-clk-pol")) - set_bits |= LED_CTRL_SERIAL_LED_CLK_POL; - if (dev_read_bool(dev, "brcm,serial-led-data-ppol")) - set_bits |= LED_CTRL_SERIAL_LED_DATA_PPOL; - if (dev_read_bool(dev, "brcm,led-test-mode")) - set_bits |= LED_CTRL_LED_TEST_MODE; - - clrsetbits_32(regs + LED_CTRL_REG, ~0, set_bits); - } else { - struct bcm6858_led_priv *priv = dev_get_priv(dev); - void __iomem *regs; - unsigned int pin, brightness; - - regs = dev_remap_addr(dev_get_parent(dev)); - if (!regs) - return -EINVAL; - - pin = dev_read_u32_default(dev, "reg", LEDS_MAX); - if (pin >= LEDS_MAX) - return -EINVAL; - - priv->regs = regs; - priv->pin = pin; - - /* this led is managed by software */ - clrbits_32(regs + LED_HW_LED_EN_REG, 1 << pin); - - /* configure the polarity */ - if (dev_read_bool(dev, "active-low")) - clrbits_32(regs + LED_PLED_OP_PPOL_REG, 1 << pin); - else - setbits_32(regs + LED_PLED_OP_PPOL_REG, 1 << pin); + struct bcm6858_led_priv *priv = dev_get_priv(dev); + void __iomem *regs; + unsigned int pin, brightness; + + regs = dev_remap_addr(dev_get_parent(dev)); + if (!regs) + return -EINVAL; + + pin = dev_read_u32_default(dev, "reg", LEDS_MAX); + if (pin >= LEDS_MAX) + return -EINVAL; + + priv->regs = regs; + priv->pin = pin; + + /* this led is managed by software */ + clrbits_32(regs + LED_HW_LED_EN_REG, 1 << pin); - brightness = dev_read_u32_default(dev, "default-brightness", + /* configure the polarity */ + if (dev_read_bool(dev, "active-low")) + clrbits_32(regs + LED_PLED_OP_PPOL_REG, 1 << pin); + else + setbits_32(regs + LED_PLED_OP_PPOL_REG, 1 << pin); + + brightness = dev_read_u32_default(dev, "default-brightness", LEDS_MAX_BRIGHTNESS); - led_set_brightness(dev, brightness); - } + led_set_brightness(dev, brightness); return 0; } -static int bcm6858_led_bind(struct udevice *parent) +U_BOOT_DRIVER(bcm6858_led) = { + .name = "bcm6858-led", + .id = UCLASS_LED, + .probe = bcm6858_led_probe, + .priv_auto = sizeof(struct bcm6858_led_priv), + .ops = &bcm6858_led_ops, +}; + +static int bcm6858_led_wrap_probe(struct udevice *dev) +{ + void __iomem *regs; + u32 set_bits = 0; + + regs = dev_remap_addr(dev); + if (!regs) + return -EINVAL; + + if (dev_read_bool(dev, "brcm,serial-led-msb-first")) + set_bits |= LED_CTRL_SERIAL_LED_MSB_FIRST; + if (dev_read_bool(dev, "brcm,serial-led-en-pol")) + set_bits |= LED_CTRL_SERIAL_LED_EN_POL; + if (dev_read_bool(dev, "brcm,serial-led-clk-pol")) + set_bits |= LED_CTRL_SERIAL_LED_CLK_POL; + if (dev_read_bool(dev, "brcm,serial-led-data-ppol")) + set_bits |= LED_CTRL_SERIAL_LED_DATA_PPOL; + if (dev_read_bool(dev, "brcm,led-test-mode")) + set_bits |= LED_CTRL_LED_TEST_MODE; + + clrsetbits_32(regs + LED_CTRL_REG, ~0, set_bits); + + return 0; +} + +static int bcm6858_led_wrap_bind(struct udevice *parent) { ofnode node; @@ -259,12 +267,10 @@ static const struct udevice_id bcm6858_led_ids[] = { { /* sentinel */ } }; -U_BOOT_DRIVER(bcm6858_led) = { - .name = "bcm6858-led", - .id = UCLASS_LED, +U_BOOT_DRIVER(bcm6858_led_wrap) = { + .name = "bcm6858_led_wrap", + .id = UCLASS_NOP, .of_match = bcm6858_led_ids, - .bind = bcm6858_led_bind, - .probe = bcm6858_led_probe, - .priv_auto = sizeof(struct bcm6858_led_priv), - .ops = &bcm6858_led_ops, + .probe = bcm6858_led_wrap_probe, + .bind = bcm6858_led_wrap_bind, }; -- 2.25.1

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[PATCH] mailbox: k3-sec-proxy: Fill non-message tx data fields with 0x0
by Nishanth Menon 25 Jul '23

25 Jul '23

Sec proxy data buffer is 60 bytes with the last of the registers indicating transmission completion. This however poses a bit of a challenge. The backing memory for sec_proxy is regular memory, and all sec proxy does is to trigger a burst of all 60 bytes of data over to the target thread backing ring accelerator. It doesn't do a memory scrub when it moves data out in the burst. When we transmit multiple messages, remnants of previous message is also transmitted which results in some random data being set in TISCI fields of messages that have been expanded forward. The entire concept of backward compatibility hinges on the fact that the unused message fields remain 0x0 allowing for 0x0 value to be specially considered when backward compatibility of message extension is done. So, instead of just writing the completion register, we continue to fill the message buffer up with 0x0 (note: for partial message involving completion, we already do this). This allows us to scale and introduce ABI changes back also work with other boot stages that may have left data in the internal memory. While at this, drop the unused accessor function. Fixes: f9aa41023bd9 ("mailbox: Introduce K3 Secure Proxy Driver") Signed-off-by: Nishanth Menon <nm(a)ti.com> --- drivers/mailbox/k3-sec-proxy.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c index a862e55bc391..815808498f2e 100644 --- a/drivers/mailbox/k3-sec-proxy.c +++ b/drivers/mailbox/k3-sec-proxy.c @@ -94,11 +94,6 @@ static inline u32 sp_readl(void __iomem *addr, unsigned int offset) return readl(addr + offset); } -static inline void sp_writel(void __iomem *addr, unsigned int offset, u32 data) -{ - writel(data, addr + offset); -} - /** * k3_sec_proxy_of_xlate() - Translation of phandle to channel * @chan: Mailbox channel @@ -241,15 +236,20 @@ static int k3_sec_proxy_send(struct mbox_chan *chan, const void *data) /* Ensure all unused data is 0 */ data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes)); writel(data_trail, data_reg); - data_reg++; + data_reg += sizeof(u32); } /* * 'data_reg' indicates next register to write. If we did not already * write on tx complete reg(last reg), we must do so for transmit + * In addition, we also need to make sure all intermediate data + * registers(if any required), are reset to 0 for TISCI backward + * compatibility to be maintained. */ - if (data_reg <= (spt->data + spm->desc->data_end_offset)) - sp_writel(spt->data, spm->desc->data_end_offset, 0); + while (data_reg <= (spt->data + spm->desc->data_end_offset)) { + writel(0x0, data_reg); + data_reg += sizeof(u32); + } debug("%s: Message successfully sent on thread %ld\n", __func__, chan->id); -- 2.40.0

2 1

[PATCH 0/8] Some fixes for the rockchip dw_mipi_dsi driver
by megi＠xff.cz 25 Jul '23

25 Jul '23

From: Ondrej Jirman <megi(a)xff.cz> These are just random fixes for bugs I found while eyeballing the code and porting it to work with RK3399. Please take a look. Thank you and regards, Ondrej Jirman Ondrej Jirman (8): video: rockchip: vop: Fix whitespace video: dw_mipi_dsi: Fix hsync/vsync settings video: rockchip: dw_mipi_dsi: Fix external phy existnece check video: rockchip: dw_mipi_dsi: Fix error path checks in probe function video: rockchip: dw_mipi_dsi: Return 0 from dsi_phy_init on success video: rockchip: dw_mipi_dsi: Fix best_rate calculation video: rockchip: dw_mipi_dsi: Correct check for lacking phy phandle video: rockchip: dw_mipi_dsi: Fix GRF access drivers/video/dw_mipi_dsi.c | 4 +- drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 38 +++++++++++-------- drivers/video/rockchip/rk_vop.c | 2 +- 3 files changed, 25 insertions(+), 19 deletions(-) -- 2.40.1

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