March 2023 - U-Boot

[PATCH v1 0/5] board: verdin-imx8mp: ddr updates
by Marcel Ziswiler 29 Mar '23

29 Mar '23

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> This series contains the following DDR updates: - update ddrc config for different lpddr4 memories - fix lpddr4 refresh timing - update lpddr4 configuration and training - compact slight different lpddr4 configuration - change prints in spl_dram_init function Emanuele Ghidoli (5): board: verdin-imx8mp: update ddrc config for different lpddr4 memories board: verdin-imx8mp: fix lpddr4 refresh timing board: verdin-imx8mp: update lpddr4 configuration and training board: verdin-imx8mp: compact slight different lpddr4 configuration board: verdin-imx8mp: change prints in spl_dram_init function board/toradex/verdin-imx8mp/lpddr4_timing.c | 423 ++++---------------- board/toradex/verdin-imx8mp/lpddr4_timing.h | 11 + board/toradex/verdin-imx8mp/spl.c | 19 +- 3 files changed, 106 insertions(+), 347 deletions(-) create mode 100644 board/toradex/verdin-imx8mp/lpddr4_timing.h -- 2.36.1

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[PATCH v4 0/5] FMP versioning support
by Masahisa Kojima 29 Mar '23

29 Mar '23

Firmware version management is not implemented in the current FMP implementation. This series aims to add the versioning support in FMP. EDK II reference implementation utilizes the FMP Payload Header inserted right before the capsule payload. With this series, U-Boot also follows the EDK II implementation. Currently, there is no way to know the current running firmware version through the EFI interface. FMP->GetImageInfo() returns always 0 for the version number. So a user can not know that expected firmware is running after the capsule update. With this series applied, version number can be specified in the capsule file generation with mkeficapsule tool, then user can know the running firmware version through FMP->GetImageInfo() and ESRT. Note that this series does not mandate the FMP Payload Header, compatible with boards that are already using the existing U-Boot FMP implementation. If no FMP Payload Header is found in the capsule file, fw_version, lowest supported version, last attempt version and last attempt status is set to 0 and this is the same behavior as existing FMP implementation. Major Changes in v4: - add python-based test Major Changes in v3: - exclude CONFIG_FWU_MULTI_BANK_UPDATE case Masahisa Kojima (5): efi_loader: store firmware version into FmpState variable efi_loader: versioning support in GetImageInfo efi_loader: check lowest supported version in capsule update mkeficapsule: add FMP Payload Header test/py: efi_capsule: test for FMP versioning doc/mkeficapsule.1 | 16 + lib/efi_loader/efi_firmware.c | 328 ++++++++++++++++-- test/py/tests/test_efi_capsule/conftest.py | 58 ++++ .../test_capsule_firmware_fit.py | 187 ++++++++++ .../test_capsule_firmware_raw.py | 199 +++++++++++ .../test_capsule_firmware_signed_fit.py | 159 +++++++++ .../test_capsule_firmware_signed_raw.py | 169 +++++++++ tools/eficapsule.h | 31 ++ tools/mkeficapsule.c | 51 ++- 9 files changed, 1161 insertions(+), 37 deletions(-) -- 2.17.1

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[PATCH] Series-to: Fred Bloggs <f.blogs@napier.co.nz> Series-cc: Sean O'Brien <seobrien@chromium.org> HID: input: Restore missing cursor for digitizer devices
by Torsha Banerjee 29 Mar '23

29 Mar '23

From: Jora Jacobi <jora(a)google.com> A previously committed patch to remove cursors for HID Digitizer-Pen devices also removed the cursors for some tablets which have incorrect HID descriptors. These devices should enumerate with Usage ID "Digitizer" instead of Usage ID "Pen". Patch which introduced the issue: commit 8473a93d1ba5 ("HID: input: Set INPUT_PROP_-property for HID_UP_DIGITIZERS") Changes- Add HID quirk HID_QUIRK_DEVICE_IS_DIGITIZER Quirk will force INPUT_PROP_POINTER for HID Digitizers Apply quirk to Huion tablets Apply quirk to UGEE/XP-Pen tablets based on device ID Signed-off-by: Torsha Banerjee <torsha(a)google.com> --- drivers/hid/hid-input.c | 3 ++- drivers/hid/hid-quirks.c | 9 +++++++++ include/linux/hid.h | 2 ++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c index 7fc967964dd8..f0c67baddc8d 100644 --- a/drivers/hid/hid-input.c +++ b/drivers/hid/hid-input.c @@ -927,7 +927,8 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel break; case HID_UP_DIGITIZER: - if ((field->application & 0xff) == 0x01) /* Digitizer */ + if (((field->application & 0xff) == 0x01) || + (device->quirks & HID_QUIRK_DEVICE_IS_DIGITIZER)) /* Digitizer */ __set_bit(INPUT_PROP_POINTER, input->propbit); else if ((field->application & 0xff) == 0x02) /* Pen */ __set_bit(INPUT_PROP_DIRECT, input->propbit); diff --git a/drivers/hid/hid-quirks.c b/drivers/hid/hid-quirks.c index 66e64350f138..094fe4c4f3b3 100644 --- a/drivers/hid/hid-quirks.c +++ b/drivers/hid/hid-quirks.c @@ -102,6 +102,8 @@ static const struct hid_device_id hid_quirks[] = { { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0941), HID_QUIRK_ALWAYS_POLL }, { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0641), HID_QUIRK_ALWAYS_POLL }, { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_1f4a), HID_QUIRK_ALWAYS_POLL }, + { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_HS64), HID_QUIRK_DEVICE_IS_DIGITIZER }, + { HID_USB_DEVICE(USB_VENDOR_ID_HUION, USB_DEVICE_ID_HUION_TABLET), HID_QUIRK_DEVICE_IS_DIGITIZER }, { HID_USB_DEVICE(USB_VENDOR_ID_IDEACOM, USB_DEVICE_ID_IDEACOM_IDC6680), HID_QUIRK_MULTI_INPUT }, { HID_USB_DEVICE(USB_VENDOR_ID_INNOMEDIA, USB_DEVICE_ID_INNEX_GENESIS_ATARI), HID_QUIRK_MULTI_INPUT }, { HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X), HID_QUIRK_MULTI_INPUT }, @@ -1298,6 +1300,13 @@ unsigned long hid_lookup_quirk(const struct hid_device *hdev) quirks = hid_gets_squirk(hdev); mutex_unlock(&dquirks_lock); + /* + * UGEE/XP-Pen HID Pen devices which have 0x0-0x9 as the low nibble + * of the device ID are actually digitizers, not HID Pen devices + */ + if (hdev->vendor == USB_VENDOR_ID_UGEE && (hdev->product & 0x0F) <= 0x09) + quirks |= HID_QUIRK_DEVICE_IS_DIGITIZER; + return quirks; } EXPORT_SYMBOL_GPL(hid_lookup_quirk); diff --git a/include/linux/hid.h b/include/linux/hid.h index 1ea8c7a3570b..c9cc81e85a33 100644 --- a/include/linux/hid.h +++ b/include/linux/hid.h @@ -352,8 +352,10 @@ struct hid_item { /* BIT(9) reserved for backward compatibility, was NO_INIT_INPUT_REPORTS */ #define HID_QUIRK_ALWAYS_POLL BIT(10) #define HID_QUIRK_INPUT_PER_APP BIT(11) + #define HID_QUIRK_X_INVERT BIT(12) #define HID_QUIRK_Y_INVERT BIT(13) +#define HID_QUIRK_DEVICE_IS_DIGITIZER BIT(14) #define HID_QUIRK_SKIP_OUTPUT_REPORTS BIT(16) #define HID_QUIRK_SKIP_OUTPUT_REPORT_ID BIT(17) #define HID_QUIRK_NO_OUTPUT_REPORTS_ON_INTR_EP BIT(18) -- 2.40.0.348.gf938b09366-goog

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[PATCH] clk: change log_err() to log_info() to make it quiet with clk_register_fixed_rate()
by notfound405 28 Mar '23

28 Mar '23

clk_register_fixed_rate() calls clk_register() with the fourth argument(parent_name) being NULL, making it output error message. Change to log_info() to fix it. Signed-off-by: notfound405 <forbidden405(a)foxmail.com> --- drivers/clk/clk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index a5a3461b66..0619937cee 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -24,7 +24,7 @@ int clk_register(struct clk *clk, const char *drv_name, ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent); if (ret) { - log_err("%s: failed to get %s device (parent of %s)\n", + log_info("%s: failed to get %s device (parent of %s)\n", __func__, parent_name, name); } else { log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, -- 2.39.2

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[PULL next] u-boot-at91-2023.07-a
by Eugen Hristev 28 Mar '23

28 Mar '23

Hello Tom, Please pull tag u-boot-at91-2023.07-a , the first set of at91 features for the next cycle 2023.07 . This feature set includes the clock changes required for sam9x60 SoC to support USB host. Thanks, Eugen The following changes since commit fde439219ff53a46bdd5dff69e049ccd4be57310: Merge tag 'efi-next-20230325' of https://source.denx.de/u-boot/custodians/u-boot-efi into next (2023-03-25 17:34:34 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-at91.git tags/u-boot-at91-2023.07-a for you to fetch changes up to ad59148ff53bc5c38ef2d2cdb7039559ff91a954: configs: at91: sam9x60: Add required configs for the USB clock (2023-03-27 14:27:37 +0300) ---------------------------------------------------------------- First set of u-boot-at91 features for the 2023.07 cycle ---------------------------------------------------------------- Claudiu Beznea (1): clk: at91: pmc: export clock setup to pmc Sergiu Moga (4): clk: at91: Add support for sam9x60 USB clock clk: at91: sam9x60: Register the required clocks for USB clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates configs: at91: sam9x60: Add required configs for the USB clock configs/sam9x60_curiosity_mmc1_defconfig | 1 + configs/sam9x60_curiosity_mmc_defconfig | 1 + configs/sam9x60ek_mmc_defconfig | 1 + configs/sam9x60ek_nandflash_defconfig | 1 + configs/sam9x60ek_qspiflash_defconfig | 1 + drivers/clk/at91/Kconfig | 7 ++ drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-sam9x60-usb.c | 157 +++++++++++++++++++++++++++++++ drivers/clk/at91/pmc.c | 42 +++++++++ drivers/clk/at91/pmc.h | 27 ++++++ drivers/clk/at91/sam9x60.c | 63 +++++++++++++ drivers/clk/at91/sama7g5.c | 48 ++-------- 12 files changed, 308 insertions(+), 42 deletions(-) create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c

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RE: Re: How to add eth1 to test device tree?
by Ehsan Mohandesi 28 Mar '23

28 Mar '23

Hi Simon, > -----Original Message----- > From: Simon Glass <sjg(a)chromium.org <mailto:sjg@chromium.org>> > Sent: Monday, March 27, 2023 3:15 PM > To: Ehsan Mohandesi <emohandesi(a)linux.microsoft.com <mailto:emohandesi@linux.microsoft.com>> > Cc: u-boot(a)lists.denx.de <mailto:u-boot@lists.denx.de>; swarren(a)nvidia.com <mailto:swarren@nvidia.com>; michal.simek(a)xilinx.com <mailto:michal.simek@xilinx.com>; > guillaume.gardet(a)free.fr <mailto:guillaume.gardet@free.fr> > Subject: [EXTERNAL] Re: How to add eth1 to test device tree? > > Hi Ehsan, > > On Tue, 28 Mar 2023 at 08:58, Ehsan Mohandesi > <emohandesi(a)linux.microsoft.com <mailto:emohandesi@linux.microsoft.com>> wrote: > > > > Hi All, > > > > When running the sandbox tests, I want to know how to enable eth1 in > > order to be able to test network features. > > > > The following command is used to run sandbox tests. > > > > ./test/py/test.py -k testname.py > > > > I am specifically interested in running the network tests. > > > > ./test/py/test.py -k test_net.py > > > > These Python tests use test.dts device tree which does not have eth1 > > in it. I can replace the test.dts file with sandbox.dts to enable > > eth1 and run the network tests; however, I think there should be a > > better way to do it. > > > > Can anyone help me with this issue? > > > > When running U-Boot, the -T option could be used to tell it to use > > the test.dts or -D to use sandbox.dts; however, there is no such > > option when running test.py. > > > > Eth1 is needed in order to enable the network. Enabling the sandbox > > network is explained after line 250 in doc/arch/sandbox.rst. > > > > For more information, the following is the list of network > > interfaces when each device tree is used. > > > > ** > > > > *arch/sandbox/dts/sandbox.dts** > > *Net:eth0: host_lo, *eth1: host_eth0*, eth2: host_br1, eth3: eth@10002000 > > > > *arch/sandbox/dts/test.dts* > > > > Net:eth0: eth@10002000, eth5: eth@10003000, eth3: sbe5, eth6: > > eth@10004000, eth4: dsa-test-eth, eth2: lan0, eth7: lan1 > > > > You should write tests in C where possible. See [1]. > > If you are just trying to try something out locally, then you can run > a sandbox test without Python. See [2]. You can use the -D flag as > usual. Of course you can't > > Network tests should generate their own traffic and check it > internally, rather than relying on the real network features of the > host machine. You can see test/dm/eth.c for that > > For local hacking you can change u_boot_console_sandbox.py.get_spawn() > to pass -D instead of the -d xxx it currently does. > > So it depends on what you are trying to do. > > Regards, > Simon > > [1] > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fu- > boot.readthedocs.io%2Fen%2Flatest%2Fdevelop%2Ftests_writing.html&data= > 0 5%7C01%7Cemohandesi%40microsoft.com%7Ccb2205b7fa56490d6b0008db2ef > ff21e%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C63815544908078 > 1196%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzI > iLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=qi8G4i64eXd > S4VpzMz9F5LL3BcEh0C87%2BvsTBg4IRic%3D&reserved=0 > [2] > https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fu- > boot.readthedocs.io%2Fen%2Flatest%2Fdevelop%2Ftests_sandbox.html%23run > ning-sandbox-tests- > directly&data=05%7C01%7Cemohandesi%40microsoft.com%7Ccb2205b7fa564 > 90d6b0008db2efff21e%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C > 638155449080781196%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD > AiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&s > data=YiBTpwZ4sjvKAu9H%2B4%2BBGFJUjoe3zT5pERDtBA5oDms%3D&reserved > =0 Let me add a little bit of information on my change and how I want to test it. I have implemented the IPv6 network discovery and have sent it upstream. Now I am working on writing the sandbox tests. I have implemented some tests in C and one in Python when using C was not possible. Tests written in C are in test/dm/eth.c and they use fake networks as you have instructed. Test written in Python is in test/py/tests/test_net.py. The Python test is similar to the DHCP and TFTP tests where they deal with real network traffic. My question is how those tests succeed. Do they use eth1? For them to succeed, they need to be connected to a DHCP server or other servers. How do the users run such tests?

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[PATCH] imx6sx-udoo-neo-basic: Introduce the u-boot.dtsi
by Fabio Estevam 28 Mar '23

28 Mar '23

From: Fabio Estevam <festevam(a)denx.de> After the conversion to DM_SERIAL in commit 01f372d8d62b ("udoo_neo: Select DM_SERIAL and drop iomux board level init") the SPL log is gone and the U-Boot proper log becomes incomplete: Core: 80 devices, 18 uclasses, devicetree: separate MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: eth0: ethernet@2188000 Hit any key to stop autoboot: 0 Introduce the u-boot.dtsi file that passes the u-boot,dm-pre-reloc properties to the relevant nodes so that UART can be used early in SPL. With this change, the complete SPL and U-Boot messages are seen again. Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi diff --git a/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi b/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi new file mode 100644 index 000000000000..cb9e83fde6b7 --- /dev/null +++ b/arch/arm/dts/imx6sx-udoo-neo-basic-u-boot.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ + +&soc { + u-boot,dm-pre-reloc; +}; + +&aips1 { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart1 { + u-boot,dm-pre-reloc; +}; + +&uart1 { + u-boot,dm-pre-reloc; +}; -- 2.34.1

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[PATCH 1/7] mmc: msm_sdhci: Match clocks through "clocks" property
by Konrad Dybcio 28 Mar '23

28 Mar '23

"clocks" is the standard property used in Linux, "clock" seems to be an U-Boot invention. Use the one that's more standardized. Signed-off-by: Konrad Dybcio <konrad.dybcio(a)linaro.org> --- drivers/mmc/msm_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 604f9c3ff99c..174435f01f68 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -63,7 +63,7 @@ static int msm_sdc_clk_init(struct udevice *dev) struct clk clk; int ret; - ret = fdtdec_get_int_array(gd->fdt_blob, node, "clock", clkd, 2); + ret = fdtdec_get_int_array(gd->fdt_blob, node, "clocks", clkd, 2); if (ret) return ret; -- 2.40.0

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[PATCH v4 00/17] Basic StarFive JH7110 RISC-V SoC support
by Yanhong Wang 28 Mar '23

28 Mar '23

This series of patches base on the latest branch/master, and add support for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for this to be achieved, the respective DT nodes have been added, and the required defconfigs have been added to the boards' defconfig. What is more, the basic required DM drivers have been added, such as reset, clock, pinctrl, uart, ram etc. Note that the register base address of reset controller is same with the clock controller. Therefore, there is no device tree node alone for reset driver. It binds device node in the clock driver. The u-boot-spl and u-boot has been tested on the StarFive VisionFive 2 1.2A and 1.3B boards which equip with JH7110 SoC and works normally. For more information and support, you can visit RVspace wiki[1]. [1] https://wiki.rvspace.org/ v4: - Replace compatible string "starfive,jh7110-ccache" with "sifive,ccache0". - Added 'gmac0_tx_inv','gmac1_tx_inv','gmac1_rx' clock registration. - Added enable_caches() call to enable L2 cache in board_init() function. - Moved 'S7_0' device node from board dts to SoC -u-boot.dtsi. - Added 'i2cx' device node to board dts to consistent with linux. - Renamed device node 'sdcard1_pins' to 'mmc1_pins'. v3: - Added doc/board/starfive/visionfive2.rst file. - Added support booting from SD. - Added support pinctrl in SPL. - Reworded dts to consistent with linux. - Added CFG_EXTRA_ENV_SETTINGS configuration. - Reworded starfive_visionfive2_defconfig. - Reworded the clock driver. - Renamed 'starfive-jh7110.h' to 'starfive,jh7110-crg.h'. - Separated 'starfive_visionfive2.dts' to 'jh7110-starfive-visionfive-2-v1.3b.dts' and 'jh7110-starfive-visionfive-2-v1.2a.dts' to consistent with linux. - Added pinmux_property_set callback function implementation in 'pinctrl-starfive.c'. v2: - Renamed file 'jh7110-regs.h' to 'regs.h'. - Reworded the clear L2 LIM memory code in C. - Removed flash init call in 'spl_soc_init' function. - Reworded the clock driver. - Rename the macro 'SET_DIV' to 'ASSIGNED_CLOCK_PARENTS' in 'spl.c'. - Moved the device tree node 'dmc@15700000' from 'jh7110-u-boot.dtsi' to 'starfive_visionfive2-u-boot.dtsi' Previous versions: v1 - https://patchwork.ozlabs.org/project/uboot/cover/20221212025020.23778-1-yan… v2 - https://patchwork.ozlabs.org/project/uboot/cover/20230118081132.31403-1-yan… v3 - https://patchwork.ozlabs.org/project/uboot/patch/20230303032432.7837-2-yanh… Jianlong Huang (1): dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions Kuan Lim Lee (1): pinctrl: starfive: Add StarFive JH7110 driver Yanhong Wang (15): riscv: cpu: jh7110: Add support for jh7110 SoC cache: starfive: Add StarFive JH7110 support dt-bindings: reset: Add StarFive JH7110 reset definitions reset: starfive: jh7110: Add reset driver for StarFive JH7110 SoC dt-bindings: clock: Add StarFive JH7110 clock definitions clk: starfive: Add StarFive JH7110 clock driver ram: starfive: add ddr driver board: starfive: add StarFive VisionFive v2 board support riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC board: starfive: Add Kconfig for StarFive VisionFive v2 Board board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig riscv: dts: jh7110: Add initial StarFive JH7110 device tree riscv: dts: jh7110: Add initial u-boot device tree riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree configs: starfive: add starfive_visionfive2_defconfig arch/riscv/Kconfig | 5 + arch/riscv/cpu/jh7110/Kconfig | 28 + arch/riscv/cpu/jh7110/Makefile | 10 + arch/riscv/cpu/jh7110/cpu.c | 23 + arch/riscv/cpu/jh7110/dram.c | 38 + arch/riscv/cpu/jh7110/spl.c | 64 + arch/riscv/dts/Makefile | 3 +- ...10-starfive-visionfive-2-v1.2a-u-boot.dtsi | 69 + .../jh7110-starfive-visionfive-2-v1.2a.dts | 12 + ...10-starfive-visionfive-2-v1.3b-u-boot.dtsi | 69 + .../jh7110-starfive-visionfive-2-v1.3b.dts | 12 + .../dts/jh7110-starfive-visionfive-2.dtsi | 319 +++ arch/riscv/dts/jh7110-u-boot.dtsi | 99 + arch/riscv/dts/jh7110.dtsi | 582 +++++ arch/riscv/include/asm/arch-jh7110/regs.h | 19 + arch/riscv/include/asm/arch-jh7110/spl.h | 12 + board/starfive/visionfive2/Kconfig | 53 + board/starfive/visionfive2/MAINTAINERS | 7 + board/starfive/visionfive2/Makefile | 7 + board/starfive/visionfive2/spl.c | 87 + .../visionfive2/starfive_visionfive2.c | 40 + configs/starfive_visionfive2_defconfig | 79 + doc/board/starfive/index.rst | 9 + doc/board/starfive/visionfive2.rst | 492 +++++ drivers/cache/cache-sifive-ccache.c | 1 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/starfive/Kconfig | 17 + drivers/clk/starfive/Makefile | 4 + drivers/clk/starfive/clk-jh7110-pll.c | 321 +++ drivers/clk/starfive/clk-jh7110.c | 603 +++++ drivers/clk/starfive/clk.h | 57 + drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/starfive/Kconfig | 28 + drivers/pinctrl/starfive/Makefile | 6 + drivers/pinctrl/starfive/pinctrl-jh7110-aon.c | 113 + drivers/pinctrl/starfive/pinctrl-jh7110-sys.c | 399 ++++ drivers/pinctrl/starfive/pinctrl-starfive.c | 382 ++++ drivers/pinctrl/starfive/pinctrl-starfive.h | 55 + drivers/ram/Kconfig | 1 + drivers/ram/Makefile | 4 +- drivers/ram/starfive/Kconfig | 5 + drivers/ram/starfive/Makefile | 11 + drivers/ram/starfive/ddrcsr_boot.c | 339 +++ drivers/ram/starfive/ddrphy_start.c | 279 +++ drivers/ram/starfive/ddrphy_train.c | 383 ++++ drivers/ram/starfive/ddrphy_utils.c | 1955 +++++++++++++++++ drivers/ram/starfive/starfive_ddr.c | 161 ++ drivers/ram/starfive/starfive_ddr.h | 65 + drivers/reset/Kconfig | 16 + drivers/reset/Makefile | 1 + drivers/reset/reset-jh7110.c | 158 ++ include/configs/starfive-visionfive2.h | 49 + .../dt-bindings/clock/starfive,jh7110-crg.h | 257 +++ .../pinctrl/pinctrl-starfive-jh7110.h | 427 ++++ .../dt-bindings/reset/starfive,jh7110-crg.h | 183 ++ 57 files changed, 8420 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/cpu/jh7110/Kconfig create mode 100644 arch/riscv/cpu/jh7110/Makefile create mode 100644 arch/riscv/cpu/jh7110/cpu.c create mode 100644 arch/riscv/cpu/jh7110/dram.c create mode 100644 arch/riscv/cpu/jh7110/spl.c create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts create mode 100644 arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi create mode 100644 arch/riscv/dts/jh7110-u-boot.dtsi create mode 100644 arch/riscv/dts/jh7110.dtsi create mode 100644 arch/riscv/include/asm/arch-jh7110/regs.h create mode 100644 arch/riscv/include/asm/arch-jh7110/spl.h create mode 100644 board/starfive/visionfive2/Kconfig create mode 100644 board/starfive/visionfive2/MAINTAINERS create mode 100644 board/starfive/visionfive2/Makefile create mode 100644 board/starfive/visionfive2/spl.c create mode 100644 board/starfive/visionfive2/starfive_visionfive2.c create mode 100644 configs/starfive_visionfive2_defconfig create mode 100644 doc/board/starfive/index.rst create mode 100644 doc/board/starfive/visionfive2.rst create mode 100644 drivers/clk/starfive/Kconfig create mode 100644 drivers/clk/starfive/Makefile create mode 100644 drivers/clk/starfive/clk-jh7110-pll.c create mode 100644 drivers/clk/starfive/clk-jh7110.c create mode 100644 drivers/clk/starfive/clk.h create mode 100644 drivers/pinctrl/starfive/Kconfig create mode 100644 drivers/pinctrl/starfive/Makefile create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-aon.c create mode 100644 drivers/pinctrl/starfive/pinctrl-jh7110-sys.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.c create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive.h create mode 100644 drivers/ram/starfive/Kconfig create mode 100644 drivers/ram/starfive/Makefile create mode 100644 drivers/ram/starfive/ddrcsr_boot.c create mode 100644 drivers/ram/starfive/ddrphy_start.c create mode 100644 drivers/ram/starfive/ddrphy_train.c create mode 100644 drivers/ram/starfive/ddrphy_utils.c create mode 100644 drivers/ram/starfive/starfive_ddr.c create mode 100644 drivers/ram/starfive/starfive_ddr.h create mode 100644 drivers/reset/reset-jh7110.c create mode 100644 include/configs/starfive-visionfive2.h create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h create mode 100644 include/dt-bindings/pinctrl/pinctrl-starfive-jh7110.h create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h base-commit: 88e08fc5f6e508eac46cd1dfb0379b11ae032c0a -- 2.17.1

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[PATCH] xilinx: Enable virtio mmio transport and devices
by Michal Simek 28 Mar '23

28 Mar '23

Qemu can create virtio mmio transports and passing devices through it that's why enable virtio by default on all arm64 based SoCs. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- configs/xilinx_versal_net_virt_defconfig | 7 ++++++- configs/xilinx_versal_virt_defconfig | 7 ++++++- configs/xilinx_zynqmp_virt_defconfig | 6 +++++- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index edd946339794..4c461d580eb1 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-net-virt" CONFIG_SYS_PROMPT="Versal NET> " +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_CMD_FRU=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -47,6 +48,7 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_EXT4_WRITE=y @@ -108,6 +110,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -133,4 +136,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y -CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 7e38fd41562e..78c98d4091ea 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_SYS_PROMPT="Versal> " +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ENV_OFFSET_REDUND=0x7F00000 CONFIG_CMD_FRU=y @@ -47,6 +48,7 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_EXT4_WRITE=y @@ -111,6 +113,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -137,4 +140,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y -CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index d29df93f43f8..3b89b3c9bae8 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_LEN=0x4040000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK=0xfffffffc @@ -90,6 +91,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y CONFIG_CMD_GETTIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_SMC=y @@ -229,10 +231,12 @@ CONFIG_SPLASH_SCREEN=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y -CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -- 2.36.1

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