December 2023 - U-Boot

[PATCH] test: dm: clk_ccf: fix building error
by Yang Xiwen via B4 Relay 15 Dec '23

15 Dec '23

From: Yang Xiwen <forbidden405(a)outlook.com> Fix unused variable error produced by building tests Fixes: d3061824 (test: dm: clk_ccf: test ccf_clk_ops) Signed-off-by: Yang Xiwen <forbidden405(a)outlook.com> --- it's detected by u-boot gitlab CI. --- test/dm/clk_ccf.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c index b8be6d6572..5a3c58c6b5 100644 --- a/test/dm/clk_ccf.c +++ b/test/dm/clk_ccf.c @@ -18,11 +18,12 @@ /* Tests for Common Clock Framework driver */ static int dm_test_clk_ccf(struct unit_test_state *uts) { - struct clk *clk, *pclk, clk_ccf; + struct clk *clk, *pclk; struct udevice *dev, *test_dev; long long rate; int ret; #if CONFIG_IS_ENABLED(CLK_CCF) + struct clk clk_ccf; const char *clkname; int clkid, i; #endif --- base-commit: c9945276f77921feb8df7be75cced3338d08e8d4 change-id: 20231216-b4-fix_build-d05f2b26c8a7 Best regards, -- Yang Xiwen <forbidden405(a)outlook.com>

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[PATCH v7 0/8] clk: Switch from soc_clk_dump to clk_ops function
by Igor Prusov 15 Dec '23

15 Dec '23

Currently clock providers may override default implementation of soc_clk_dump function to replace clk dump command output. This causes confusing behaviour when u-boot is built with one of such drivers enabled but still has clocks defined using CCF. For example, enabling CMD_CLK and using clk dump on sandbox target will not show CCF clocks because k210 driver overrides common soc_clk_dump. Changelog: v1 -> v2: - Add missing static to dump functions v2 -> v3: - Make soc_clk_dump in cmd/clk.c static instead of removing __weak v3 -> v4: - Rebase and refactor dump for new Amlogic A1 clock controller driver v4 -> v5: - Add docs for dump() function in clk_ops - Print driver and device names before calling corresponding dump() v5 -> v6: - dump() return type changed to void - meson_clk_dump() and helper functions moved under CONFIG_CMD_CLK to fix unused-function diagnostic v6 -> v7: - fix return type of k210_clk_dump() - fix clk_ops dump() docs since it returns void now Igor Prusov (8): clk: zynq: Move soc_clk_dump to Zynq clock driver clk: ast2600: Move soc_clk_dump function clk: k210: Move soc_clk_dump function clk: amlogic: Move driver and ops structs clk: Add dump operation to clk_ops cmd: clk: Use dump function from clk_ops clk: treewide: switch to clock dump from clk_ops cmd: clk: Make soc_clk_dump static arch/arm/mach-zynq/clk.c | 57 -------------- arch/mips/mach-pic32/cpu.c | 23 ------ cmd/clk.c | 13 +++- drivers/clk/aspeed/clk_ast2600.c | 83 ++++++++++---------- drivers/clk/clk_k210.c | 104 ++++++++++++------------- drivers/clk/clk_pic32.c | 37 +++++++++ drivers/clk/clk_versal.c | 9 ++- drivers/clk/clk_zynq.c | 52 +++++++++++++ drivers/clk/clk_zynqmp.c | 22 +++--- drivers/clk/imx/clk-imx8.c | 13 +--- drivers/clk/meson/a1.c | 58 ++++++-------- drivers/clk/mvebu/armada-37xx-periph.c | 20 +++-- drivers/clk/stm32/clk-stm32mp1.c | 31 ++------ include/clk-uclass.h | 13 ++++ include/clk.h | 2 - 15 files changed, 269 insertions(+), 268 deletions(-) -- 2.34.1

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[PATCH v3] clk: nuvoton: add read only feature for clk driver
by Jim Liu 15 Dec '23

15 Dec '23

Add a flag to set ahb/apb/fiu/spi clock divider as read-only The spi clock setting is related to booting flash, it is setup by early bootloader. It just protects the clock source and can't modify it in uboot. Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- Changes for v3: - add commit message Changes for v2: - add commit message --- drivers/clk/nuvoton/clk_npcm.c | 15 ++++++++++++--- drivers/clk/nuvoton/clk_npcm.h | 1 + drivers/clk/nuvoton/clk_npcm8xx.c | 12 ++++++------ 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/drivers/clk/nuvoton/clk_npcm.c b/drivers/clk/nuvoton/clk_npcm.c index 8d71f2a24b..18cb9cddbf 100644 --- a/drivers/clk/nuvoton/clk_npcm.c +++ b/drivers/clk/nuvoton/clk_npcm.c @@ -135,7 +135,7 @@ static u32 npcm_clk_get_div(struct clk *clk) return div; } -static u32 npcm_clk_set_div(struct clk *clk, u32 div) +static int npcm_clk_set_div(struct clk *clk, u32 div) { struct npcm_clk_priv *priv = dev_get_priv(clk->dev); struct npcm_clk_div *divider; @@ -145,6 +145,9 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div) if (!divider) return -EINVAL; + if (divider->flags & DIV_RO) + return 0; + if (divider->flags & PRE_DIV2) div = div >> 1; @@ -153,6 +156,12 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div) else clkdiv = ilog2(div); + if (clkdiv > (divider->mask >> (ffs(divider->mask) - 1))) { + printf("clkdiv(%d) for clk(%ld) is over limit\n", + clkdiv, clk->id); + return -EINVAL; + } + val = readl(priv->base + divider->reg); val &= ~divider->mask; val |= (clkdiv << (ffs(divider->mask) - 1)) & divider->mask; @@ -253,8 +262,8 @@ static ulong npcm_clk_set_rate(struct clk *clk, ulong rate) if (ret) return ret; - debug("%s: rate %lu, new rate (%lu / %u)\n", __func__, rate, parent_rate, div); - return (parent_rate / div); + debug("%s: rate %lu, new rate %lu\n", __func__, rate, npcm_clk_get_rate(clk)); + return npcm_clk_get_rate(clk); } static int npcm_clk_set_parent(struct clk *clk, struct clk *parent) diff --git a/drivers/clk/nuvoton/clk_npcm.h b/drivers/clk/nuvoton/clk_npcm.h index 06b60dc8b8..b4726d8381 100644 --- a/drivers/clk/nuvoton/clk_npcm.h +++ b/drivers/clk/nuvoton/clk_npcm.h @@ -50,6 +50,7 @@ #define PRE_DIV2 BIT(2) /* Pre divisor = 2 */ #define POST_DIV2 BIT(3) /* Post divisor = 2 */ #define FIXED_PARENT BIT(4) /* clock source is fixed */ +#define DIV_RO BIT(5) /* divider is read-only */ /* Parameters of PLL configuration */ struct npcm_clk_pll { diff --git a/drivers/clk/nuvoton/clk_npcm8xx.c b/drivers/clk/nuvoton/clk_npcm8xx.c index 27e3cfcf55..d1b32e3237 100644 --- a/drivers/clk/nuvoton/clk_npcm8xx.c +++ b/drivers/clk/nuvoton/clk_npcm8xx.c @@ -45,12 +45,12 @@ static struct npcm_clk_select npcm8xx_clk_selectors[] = { }; static struct npcm_clk_div npcm8xx_clk_dividers[] = { - {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2}, - {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2}, - {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2}, - {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1}, - {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1}, - {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1}, + {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2 | DIV_RO}, + {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2 | DIV_RO}, + {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2 | DIV_RO}, + {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1 | DIV_RO}, + {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1 | DIV_RO}, + {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1 | DIV_RO}, {NPCM8XX_CLK_SPIX, CLKDIV3, SPIXCKDIV, DIV_TYPE1}, {NPCM8XX_CLK_UART, CLKDIV1, UARTDIV1, DIV_TYPE1}, {NPCM8XX_CLK_UART2, CLKDIV3, UARTDIV2, DIV_TYPE1}, -- 2.25.1

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[PATCH v2 0/6] board: siemens: clean up subfolders
by Enrico Leto 15 Dec '23

15 Dec '23

This serie depends on the serie: [PATCH 0/6] siemens,am335x: clean up the draco board family The common folder was initialially created for the common parts of the products based on draco-am355x board family. We have the product lines 'pxm2', 'rut' and the base line unfortunately named 'draco'! Adding the new capricorn-imx8 board family, the files were enhanced without cleanup. Simplify first EEPROM probe and access that implements both i2c with & without driver model. Use abstraction functions for this. Move all am355x specifics to a new file 'board_am335x'. Clean-up includes, config checks, maintainer. Signed-off-by: Enrico Leto <enrico.leto(a)siemens.com> --- Changes for v2: - fix wrong value in CONFIG_IS_ENABLED Enrico Leto (6): siemens: eeprom: clean up definitions siemens: eeprom: simplify setup & read siemens draco: i2c: use driver model for u-boot siemens: board: clean up draco products vs common siemens: board: clean up includes siemens: factoryset: use correct config for soc specific implementation board/siemens/capricorn/board.c | 5 +- board/siemens/common/board.c | 110 ++++++++++++---------------- board/siemens/common/board.h | 24 ++++++ board/siemens/common/board_am335x.c | 58 +++++++++++++++ board/siemens/common/board_am335x.h | 38 ++++++++++ board/siemens/common/factoryset.c | 82 ++++----------------- board/siemens/draco/Makefile | 2 + board/siemens/draco/board.c | 59 ++++----------- board/siemens/draco/board.h | 32 ++------ board/siemens/draco/mux.c | 6 +- board/siemens/pxm2/MAINTAINERS | 2 +- board/siemens/pxm2/Makefile | 2 + board/siemens/pxm2/board.c | 34 +++------ board/siemens/pxm2/board.h | 21 ------ board/siemens/pxm2/mux.c | 6 +- board/siemens/rut/MAINTAINERS | 2 +- board/siemens/rut/Makefile | 2 + board/siemens/rut/board.c | 33 ++------- board/siemens/rut/board.h | 21 ------ board/siemens/rut/mux.c | 5 +- configs/draco-etamin_defconfig | 4 +- configs/draco-rastaban_defconfig | 4 +- configs/draco-thuban_defconfig | 4 +- include/configs/draco-etamin.h | 3 - include/configs/draco-rastaban.h | 3 - include/configs/draco-thuban.h | 3 - 26 files changed, 245 insertions(+), 320 deletions(-) create mode 100644 board/siemens/common/board.h create mode 100644 board/siemens/common/board_am335x.c create mode 100644 board/siemens/common/board_am335x.h delete mode 100644 board/siemens/pxm2/board.h delete mode 100644 board/siemens/rut/board.h -- 2.30.2

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[PATCH v1 0/1] Fix clk-gpio driver
by Svyatoslav Ryhel 15 Dec '23

15 Dec '23

Existing gpio-gate-clock driver acts like a simple GPIO switch without any effect on gated clock. Add actual clock actions into enable/disable ops and implement get_rate op by passing gated clock if it is enabled. Testing current driver implementation shows that it is not fully capable and lacks gated clock manipulations. Svyatoslav Ryhel (1): clk: clk-gpio: add actual gated clock drivers/clk/clk-gpio.c | 47 +++++++++++++++++++++++++++++++++++------- 1 file changed, 40 insertions(+), 7 deletions(-) -- 2.40.1

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[PULL] Pull request for u-boot next / v2024.04 = u-boot-stm32-20231215
by Patrice CHOTARD 15 Dec '23

15 Dec '23

Hi Tom Please pull the STM32 related patches for u-boot/next, v2024.04: u-boot-stm32-20231215 CI status: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/18947 The following changes since commit fa3f19aa56c519d6345cc774187b7a8fdc053d71: Merge tag 'xilinx-for-v2024.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next (2023-12-14 13:27:11 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-stm.git tags/u-boot-stm32-20231215 for you to fetch changes up to 395507e50d7137e0bcfce74e1b4122e49d9984cb: configs: stm32: Apply savedefconfig (2023-12-15 15:41:23 +0100) ---------------------------------------------------------------- _ run savedefconfig on all STM32 defconfig STM32 MCU: _ Sync stm32f469-disco DT with Linux 6.5 _ rework ltdc node for stm32f769-disco _ clk: stm32f: Fix settings for LCD_CLK _ Support display on stm32f469-disco board STM32 MPU: _ stm32mp_dfu : Fix board_get_alt_info_mtd() _ stm32mp_dfu : Simplify MTD device parsing ---------------------------------------------------------------- Dario Binacchi (9): ARM: dts: stm32f769-disco: rework ltdc node clk: stm32f: fix setting of division factor for LCD_CLK clk: stm32f: fix setting of LCD clock ARM: dts: stm32f469-disco: sync with Linux 6.5 ARM: dts: stm32: make the LTDC clock usable by the clock driver ARM: dts: stm32: make the DSI clock usable by the clock driver ARM: dts: stm32: support MIPI DSI on stm32f469-disco board board: stm32f469-disco: add support to display board: stm32f469-disco: add splash screen with stmicroelectronics logo Patrice Chotard (3): board: st: common: Fix board_get_alt_info_mtd() board: st: common: simplify MTD device parsing configs: stm32: Apply savedefconfig arch/arm/dts/stm32f469-disco-u-boot.dtsi | 13 +++++++++++++ arch/arm/dts/stm32f469-disco.dts | 4 ++-- arch/arm/dts/stm32f769-disco-u-boot.dtsi | 23 +++++++++-------------- arch/arm/dts/stm32f769-disco.dts | 4 ++++ board/st/common/stm32mp_dfu.c | 28 ++++------------------------ configs/stm32746g-eval_defconfig | 4 ++-- configs/stm32f429-discovery_defconfig | 2 +- configs/stm32f429-evaluation_defconfig | 4 ++-- configs/stm32f469-discovery_defconfig | 19 +++++++++++++++++-- configs/stm32f746-disco_defconfig | 4 ++-- configs/stm32f769-disco_defconfig | 4 ++-- configs/stm32h743-disco_defconfig | 4 ++-- configs/stm32mp13_defconfig | 2 +- drivers/clk/stm32/clk-stm32f.c | 25 ++++++++++++++----------- drivers/video/stm32/stm32_ltdc.c | 31 +++++++++++++++++++++++++++++++ include/configs/stm32f469-discovery.h | 2 ++ tools/logos/stm32f469-discovery.bmp | Bin 0 -> 18532 bytes 17 files changed, 108 insertions(+), 65 deletions(-) create mode 100644 tools/logos/stm32f469-discovery.bmp

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[PATCH 0/3] cmd: acpi: fix list_fadt()
by Heinrich Schuchardt 15 Dec '23

15 Dec '23

Fields X_FIRMWARE and X_DSDT in the FADT table must be 64bit. Fix the definition in our include. The 64bit fields X_FIRMWARE and X_DSDT take precedence over the respective 32bit fields. Don't fill unused fields FIRMWAE and DSDT. Write an error if the hardware reduce flag is not set for non-x86 systems. Heinrich Schuchardt (3): acpi: fix FADT table cmd: acpi: fix listing DSDT and FACS cmd: acpi: check HW reduced flag in acpi list arch/x86/cpu/baytrail/acpi.c | 8 ++------ arch/x86/cpu/quark/acpi.c | 8 ++------ arch/x86/cpu/tangier/acpi.c | 8 ++------ arch/x86/lib/acpi_table.c | 9 ++------- cmd/acpi.c | 12 ++++++++++-- include/acpi/acpi_table.h | 6 ++---- 6 files changed, 20 insertions(+), 31 deletions(-) -- 2.40.1

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[PATCH] arm: dts: imx8mm_evk: Fix PMIC definition
by Alexander Koch 15 Dec '23

15 Dec '23

Newer revisions of the i.MX8MM EVK are equipped with a different PMIC than the initial ones (PCA9540 instead of BD71847), which has already been reflected in 4c07a21e5. These changes have been reverted implicitly as part of the device tree re-sync with the Linux kernel done in 24a7a3c1c. This lead to an inconsistent state: while the device tree describes the old PMIC again the code in board/freescale/imx8mm_evk/spl.c tries to initialize the new PMIC: ret = pmic_get("pca9450@25", &dev); if (ret == -ENODEV) { puts("No pmic\n"); return 0; } This leads to the expected error message from SPL: U-Boot SPL 2023.07.02 (Sep 04 2023 - 15:57:57 +0200) -> No pmic SEC0: RNG instantiated WDT: Started watchdog@30280000 with servicing every 1000ms (60s timeout) Trying to boot from NOR NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.6-0-g15e8ff164 NOTICE: BL31: Built : 13:51:09, Sep 4 2023 Fix by re-applying the device tree changes from 4c07a21e5. Signed-off-by: Alexander Koch <akoch(a)initse.com> --- arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 +- arch/arm/dts/imx8mm-evk.dtsi | 126 ++++++++++++++-------------- 2 files changed, 67 insertions(+), 63 deletions(-) diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 13688ec0d0..1bc7e4a38b 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -121,11 +121,11 @@ bootph-pre-ram; }; -&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} { +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25} { bootph-pre-ram; }; -&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} { +&{/soc@0/bus@30800000/i2c@30a20000/pca9450@25/regulators} { bootph-pre-ram; }; diff --git a/arch/arm/dts/imx8mm-evk.dtsi b/arch/arm/dts/imx8mm-evk.dtsi index 7d6317d95b..f2c15bf0ff 100644 --- a/arch/arm/dts/imx8mm-evk.dtsi +++ b/arch/arm/dts/imx8mm-evk.dtsi @@ -183,114 +183,118 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - pmic@4b { - compatible = "rohm,bd71847"; - reg = <0x4b>; - pinctrl-names = "default"; + pmic: pca9450@25 { + reg = <0x25>; + compatible = "nxp,pca9450a"; + /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */ pinctrl-0 = <&pinctrl_pmic>; - interrupt-parent = <&gpio1>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - rohm,reset-snvs-powered; - - #clock-cells = <0>; - clocks = <&osc_32k 0>; - clock-output-names = "clk-32k-out"; + gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>; regulators { - buck1_reg: BUCK1 { - regulator-name = "buck1"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; + #address-cells = <1>; + #size-cells = <0>; + + pca9450,pmic-buck2-uses-i2c-dvs; + /* Run/Standby voltage */ + pca9450,pmic-buck2-dvs-voltage = <950000>, <850000>; + + buck1_reg: regulator@0 { + reg = <0>; + regulator-compatible = "buck1"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; regulator-boot-on; regulator-always-on; - regulator-ramp-delay = <1250>; + regulator-ramp-delay = <3125>; }; - buck2_reg: BUCK2 { - regulator-name = "buck2"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1300000>; + buck2_reg: regulator@1 { + reg = <1>; + regulator-compatible = "buck2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; regulator-boot-on; regulator-always-on; - regulator-ramp-delay = <1250>; - rohm,dvs-run-voltage = <1000000>; - rohm,dvs-idle-voltage = <900000>; + regulator-ramp-delay = <3125>; }; - buck3_reg: BUCK3 { - // BUCK5 in datasheet - regulator-name = "buck3"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1350000>; + buck3_reg: regulator@2 { + reg = <2>; + regulator-compatible = "buck3"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; regulator-boot-on; regulator-always-on; }; - buck4_reg: BUCK4 { - // BUCK6 in datasheet - regulator-name = "buck4"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; + buck4_reg: regulator@3 { + reg = <3>; + regulator-compatible = "buck4"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; regulator-boot-on; regulator-always-on; }; - buck5_reg: BUCK5 { - // BUCK7 in datasheet - regulator-name = "buck5"; - regulator-min-microvolt = <1605000>; - regulator-max-microvolt = <1995000>; + buck5_reg: regulator@4 { + reg = <4>; + regulator-compatible = "buck5"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; regulator-boot-on; regulator-always-on; }; - buck6_reg: BUCK6 { - // BUCK8 in datasheet - regulator-name = "buck6"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1400000>; + buck6_reg: regulator@5 { + reg = <5>; + regulator-compatible = "buck6"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; regulator-boot-on; regulator-always-on; }; - ldo1_reg: LDO1 { - regulator-name = "ldo1"; + ldo1_reg: regulator@6 { + reg = <6>; + regulator-compatible = "ldo1"; regulator-min-microvolt = <1600000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; - ldo2_reg: LDO2 { - regulator-name = "ldo2"; + ldo2_reg: regulator@7 { + reg = <7>; + regulator-compatible = "ldo2"; regulator-min-microvolt = <800000>; - regulator-max-microvolt = <900000>; + regulator-max-microvolt = <1150000>; regulator-boot-on; regulator-always-on; }; - ldo3_reg: LDO3 { - regulator-name = "ldo3"; - regulator-min-microvolt = <1800000>; + ldo3_reg: regulator@8 { + reg = <8>; + regulator-compatible = "ldo3"; + regulator-min-microvolt = <800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; - ldo4_reg: LDO4 { - regulator-name = "ldo4"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1800000>; + ldo4_reg: regulator@9 { + reg = <9>; + regulator-compatible = "ldo4"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; - ldo6_reg: LDO6 { - regulator-name = "ldo6"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; + ldo5_reg: regulator@10 { + reg = <10>; + regulator-compatible = "ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; }; }; }; -- 2.42.0

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[PATCH 0/2] Fix NULL dereference in clk_composite_set_rate()
by Igor Prusov 15 Dec '23

15 Dec '23

On sandbox it's possible to trigger NULL dereference when setting rate of a composite clock. It happens because sandbox composite divider does not implement set_rate() operation. This series adds NULL check and a test cases for clk_set_rate(). Igor Prusov (2): clk: Check that composite clock's div has set_rate() dm: test: clk: Add test for ccf clk_set_rate() drivers/clk/clk-composite.c | 2 +- test/dm/clk_ccf.c | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) -- 2.34.1

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[PATCH v2] clk: check parent_name in clk_register to avoid confusing log_error() output
by Yang Xiwen via B4 Relay 15 Dec '23

15 Dec '23

From: Yang Xiwen <forbidden405(a)outlook.com> For some gate clocks and fixed clocks without a parent, calling clk_register will print an useless error message indicating that parent is missing. Fix that by gaurding log_xxx() with an if-statement. Signed-off-by: Yang Xiwen <forbidden405(a)outlook.com> Suggested-by: Sean Anderson <seanga2(a)gmail.com> --- It's found during my development for HiSilicon clock driver. --- Changes in v2: - drop the commit which exports clk_mux_register. - drop the commit which is already merged - drop ccf enable_count fix as it'll be in another patchset - use Anderson's patch for clk_register() - Link to v1: https://lore.kernel.org/r/20230809-clk-fix-v1-0-808dbae54e5e@outlook.com --- drivers/clk/clk.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index a5a3461b66..6ede1b4d4d 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -18,17 +18,19 @@ int clk_register(struct clk *clk, const char *drv_name, const char *name, const char *parent_name) { - struct udevice *parent; + struct udevice *parent = NULL; struct driver *drv; int ret; - ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent); - if (ret) { - log_err("%s: failed to get %s device (parent of %s)\n", - __func__, parent_name, name); - } else { - log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, - parent->name, parent); + if (parent_name) { + ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent); + if (ret) { + log_err("%s: failed to get %s device (parent of %s)\n", + __func__, parent_name, name); + } else { + log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, + parent->name, parent); + } } drv = lists_driver_lookup_name(drv_name); --- base-commit: 580eb31199be8a822e62f20965854a242f895d03 change-id: 20230807-clk-fix-17e895f79817 Best regards, -- Yang Xiwen <forbidden405(a)outlook.com>

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