December 2023 - U-Boot

[PATCH v2 0/2] fix auto-generated boot options
by Masahisa Kojima 11 Jan '24

11 Jan '24

This series aims to get aligned to the EDK II reference implementation for auto-generated boot options, and tries to address the following issue. https://source.denx.de/u-boot/custodians/u-boot-efi/-/issues/13 This series is based on the efi-next-20231217 tag. [Changelog] v1 -> v2 - fix make htmldocs error - fix bootmenu python test failure Masahisa Kojima (2): efi_loader: auto-generate boot option for each blkio device efi_loader: auto-generate removable media boot option first lib/efi_loader/efi_bootmgr.c | 121 +++++++++++++++++++++++++++-------- 1 file changed, 94 insertions(+), 27 deletions(-) -- 2.34.1

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[PATCH 00/13] arm: exynos: Add E850-96 board
by Sam Protsenko 11 Jan '24

11 Jan '24

NOTE: This patch series depends on "pinctrl: exynos: Prepare for other SoCs support" series [1]. It should be applied first. Add Exynos850 SoC and WinLink's E850-96 board support. A short overview of series additions and modifications: * USI driver: configures UART block * PMU driver: connects AP UART lines to uart1 pins) * Exynos850 clock driver: generates UART clocks * Exynos850 pinctrl driver: mux UART pins * serial_s5p: UART driver * Exynos850 SoC: dtsi files and MMU maps * E850-96 board: dts files, defconfig, board file and doc Most of the code was borrowed from mainline Linux kernel (where this board is already enabled) and adapted for U-Boot. Preliminary preparation for this series includes next patches / series (already merged): * commit 585a2aaac2ac ("arm: exynos: Include missing CPU header in soc.c") * commit c9ab9f30c8e4 ("arm: exynos: Include missing CPU header in gpio.h") * commit 11bd2787deff ("watchdog: s5p_wdt: Include missing CPU header") * commit 08cfa971a717 ("exynos: Avoid duplicate reset_cpu with SYSRESET enabled") * commit f655090901dc ("clk: exynos: Add header guard for clk-pll.h") * commit 2227f4c0afed ("serial: s5p: Fix clk_get_by_index() error code check") * commit a0615ffc99a5 ("serial: s5p: Remove common.h inclusion") * commit 5ad21de6bae0 ("serial: s5p: Use livetree API to get "id" property") * commit e79f630dbf67 ("serial: s5p: Use named constants for register values") * commit a627f2802a71 ("serial: s5p: Improve coding style") * commit 33e7ca5a9b6a ("serial: s5p: Use dev_read_addr_ptr() to get base address") * commit 6219b47c4d91 ("board: samsung: Fix SYS_CONFIG_NAME configs in axy17lte Kconfig") * commit 470682ace1e0 ("configs: Remove unneeded SYS_CONFIG_NAME from a*y17lte defconfigs") and series [1] (dependency) is still pending. For more detailed description please see the board documentation (added in PATCH #12) and corresponding commit messages. [1] https://lists.denx.de/pipermail/u-boot/2023-November/539033.html Sam Protsenko (13): dt-bindings: soc: samsung: Add Exynos USI dt-bindings: soc: samsung: Add Exynos PMU dt-bindings: clock: Add Exynos850 clock controller soc: samsung: Add Exynos USI driver soc: samsung: Add Exynos PMU driver clk: exynos: Move pll code into clk-exynos7420 clk: exynos: Add Samsung clock framework clk: exynos: Add Exynos850 clock driver pinctrl: exynos: Add pinctrl support for Exynos850 serial: s5p: Add Exynos850 compatible arm: exynos: Add Exynos850 SoC support board: samsung: Add support for E850-96 board MAINTAINERS: Add new Samsung subsystems MAINTAINERS | 25 + arch/arm/dts/Makefile | 1 + arch/arm/dts/exynos-pinctrl.h | 79 + arch/arm/dts/exynos850-e850-96-u-boot.dtsi | 37 + arch/arm/dts/exynos850-e850-96.dts | 273 ++++ arch/arm/dts/exynos850-pinctrl.dtsi | 663 +++++++++ arch/arm/dts/exynos850.dtsi | 809 +++++++++++ arch/arm/mach-exynos/Kconfig | 28 +- arch/arm/mach-exynos/mmu-arm64.c | 34 + board/samsung/e850-96/Kconfig | 16 + board/samsung/e850-96/MAINTAINERS | 9 + board/samsung/e850-96/Makefile | 6 + board/samsung/e850-96/e850-96.c | 22 + configs/e850-96_defconfig | 21 + doc/board/samsung/e850-96.rst | 87 ++ .../img/exynos850-boot-architecture.svg | 1283 +++++++++++++++++ doc/board/samsung/index.rst | 1 + .../clock/samsung,exynos850-clock.yaml | 307 ++++ .../soc/samsung/exynos-pmu.yaml | 85 ++ .../soc/samsung/exynos-usi.yaml | 162 +++ drivers/clk/exynos/Kconfig | 7 + drivers/clk/exynos/Makefile | 11 +- drivers/clk/exynos/clk-exynos7420.c | 25 +- drivers/clk/exynos/clk-exynos850.c | 189 +++ drivers/clk/exynos/clk-pll.c | 167 ++- drivers/clk/exynos/clk-pll.h | 16 +- drivers/clk/exynos/clk.c | 121 ++ drivers/clk/exynos/clk.h | 228 +++ drivers/pinctrl/exynos/Kconfig | 8 + drivers/pinctrl/exynos/Makefile | 1 + drivers/pinctrl/exynos/pinctrl-exynos850.c | 125 ++ drivers/serial/serial_s5p.c | 1 + drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/samsung/Kconfig | 33 + drivers/soc/samsung/Makefile | 4 + drivers/soc/samsung/exynos-pmu.c | 102 ++ drivers/soc/samsung/exynos-usi.c | 218 +++ include/configs/e850-96.h | 12 + include/dt-bindings/clock/exynos850.h | 337 +++++ include/dt-bindings/soc/samsung,exynos-usi.h | 17 + 41 files changed, 5548 insertions(+), 24 deletions(-) create mode 100644 arch/arm/dts/exynos-pinctrl.h create mode 100644 arch/arm/dts/exynos850-e850-96-u-boot.dtsi create mode 100644 arch/arm/dts/exynos850-e850-96.dts create mode 100644 arch/arm/dts/exynos850-pinctrl.dtsi create mode 100644 arch/arm/dts/exynos850.dtsi create mode 100644 board/samsung/e850-96/Kconfig create mode 100644 board/samsung/e850-96/MAINTAINERS create mode 100644 board/samsung/e850-96/Makefile create mode 100644 board/samsung/e850-96/e850-96.c create mode 100644 configs/e850-96_defconfig create mode 100644 doc/board/samsung/e850-96.rst create mode 100644 doc/board/samsung/img/exynos850-boot-architecture.svg create mode 100644 doc/device-tree-bindings/clock/samsung,exynos850-clock.yaml create mode 100644 doc/device-tree-bindings/soc/samsung/exynos-pmu.yaml create mode 100644 doc/device-tree-bindings/soc/samsung/exynos-usi.yaml create mode 100644 drivers/clk/exynos/clk-exynos850.c create mode 100644 drivers/clk/exynos/clk.c create mode 100644 drivers/clk/exynos/clk.h create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos850.c create mode 100644 drivers/soc/samsung/Kconfig create mode 100644 drivers/soc/samsung/Makefile create mode 100644 drivers/soc/samsung/exynos-pmu.c create mode 100644 drivers/soc/samsung/exynos-usi.c create mode 100644 include/configs/e850-96.h create mode 100644 include/dt-bindings/clock/exynos850.h create mode 100644 include/dt-bindings/soc/samsung,exynos-usi.h -- 2.39.2

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[PATCH v2 0/1] Fix clk-gpio driver
by Svyatoslav Ryhel 10 Jan '24

10 Jan '24

Existing gpio-gate-clock driver acts like a simple GPIO switch without any effect on gated clock. Add actual clock actions into enable/disable ops and implement get_rate op by passing gated clock if it is enabled. Testing current driver implementation shows that it is not fully capable and lacks gated clock manipulations. --- Changes from v1 - added comments for priv struct members - return gatet clock rate unconditionally - switch log_err > log_debug on of_to_plat --- Svyatoslav Ryhel (1): clk: clk-gpio: add actual gated clock drivers/clk/clk-gpio.c | 44 ++++++++++++++++++++++++++++++++++-------- 1 file changed, 36 insertions(+), 8 deletions(-) -- 2.40.1

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[PATCH v3 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate function
by Robert Marko 10 Jan '24

10 Jan '24

Currently, Esspresobin FDT is being fixed up directly in ft_board_setup() which makes it hard to add support for any other board to be fixed up. So, lets just move the FDT fixup code to a separate function and call it if compatible matches, there should be no functional change. Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> Reviewed-by: Stefan Roese <sr(a)denx.de> --- board/Marvell/mvebu_armada-37xx/board.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c index 04124d8014..1471caa9a6 100644 --- a/board/Marvell/mvebu_armada-37xx/board.c +++ b/board/Marvell/mvebu_armada-37xx/board.c @@ -363,18 +363,14 @@ EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); #endif #ifdef CONFIG_OF_BOARD_SETUP -int ft_board_setup(void *blob, struct bd_info *bd) +static int espressobin_fdt_setup(void *blob) { -#ifdef CONFIG_ENV_IS_IN_SPI_FLASH int ret; int spi_off; int parts_off; int part_off; /* Fill SPI MTD partitions for Linux kernel on Espressobin */ - if (!of_machine_is_compatible("globalscale,espressobin")) - return 0; - spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor"); if (spi_off < 0) return 0; @@ -459,6 +455,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } + return 0; +} + +int ft_board_setup(void *blob, struct bd_info *bd) +{ +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH + if (of_machine_is_compatible("globalscale,espressobin")) + return espressobin_fdt_setup(blob); #endif return 0; } -- 2.43.0

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[PATCH] arm: mvebu: AC5: Use finer grained memory map
by Chris Packham 10 Jan '24

10 Jan '24

The ATF implementation for AC5/AC5X ends up with bl31 living in some internal SRAM. This is in the middle of the large MMIO region that we were using. Adjust this to be finer grained blocks based on the address map from the AC5X Family Control and Management Subsystem Functional Datasheet. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- arch/arm/mach-mvebu/alleycat5/cpu.c | 66 ++++++++++++++++++++++------- 1 file changed, 51 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-mvebu/alleycat5/cpu.c b/arch/arm/mach-mvebu/alleycat5/cpu.c index 8204d9627515..0f72ae1709be 100644 --- a/arch/arm/mach-mvebu/alleycat5/cpu.c +++ b/arch/arm/mach-mvebu/alleycat5/cpu.c @@ -16,7 +16,10 @@ DECLARE_GLOBAL_DATA_PTR; -#define RAM_SIZE SZ_1G +#define AC5_PTE_BLOCK_DEVICE \ + (PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | \ + PTE_BLOCK_NON_SHARE | \ + PTE_BLOCK_PXN | PTE_BLOCK_UXN) static struct mm_region ac5_mem_map[] = { { @@ -31,30 +34,63 @@ static struct mm_region ac5_mem_map[] = { .phys = 0x00000000, .virt = 0xa0000000, .size = 0x100000, - - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN + .attrs = AC5_PTE_BLOCK_DEVICE, }, { /* MMIO regions */ .phys = 0x100000, .virt = 0x100000, .size = 0x3ff00000, - - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN + .attrs = AC5_PTE_BLOCK_DEVICE, }, { - /* MMIO regions */ .phys = 0x7F000000, .virt = 0x7F000000, - .size = 0x21000000, - - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | - PTE_BLOCK_NON_SHARE | - PTE_BLOCK_PXN | PTE_BLOCK_UXN + .size = SZ_8M, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + { + .phys = 0x7F800000, + .virt = 0x7F800000, + .size = SZ_4M, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + { + .phys = 0x7FC00000, + .virt = 0x7FC00000, + .size = SZ_512K, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + { + .phys = 0x7FC80000, + .virt = 0x7FC80000, + .size = SZ_512K, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + { + .phys = 0x7FD00000, + .virt = 0x7FD00000, + .size = SZ_512K, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + /* ATF region 0x7FE00000-0x7FE20000 not mapped */ + { + .phys = 0x7FE80000, + .virt = 0x7FE80000, + .size = SZ_512K, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + { + .phys = 0x7FFF0000, + .virt = 0x7FFF0000, + .size = SZ_1M, + .attrs = AC5_PTE_BLOCK_DEVICE, + }, + { + .phys = 0x80000000, + .virt = 0x80000000, + .size = SZ_2G, + .attrs = AC5_PTE_BLOCK_DEVICE, }, { 0, -- 2.42.0

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[RFC PATCH 00/16] Introduce ICSSG Ethernet driver
by MD Danish Anwar 10 Jan '24

10 Jan '24

Introduce ICSSG PRUETH support in uboot. The ICSSG driver is used in TI AM654 SR2.0. The ICSSG PRU Sub-system runs on EMAC firmware. This series Introduces support for ICSSG driver in uboot. This series also adds the driver's dependencies. The ICSSG2 node is added in device tree overlay so that it remains in sync with linux kernel. The series introduces device tree and config changes and AM65x to enable ICSSG driver. The series also enables SPL_LOAD_FIT_APPLY_OVERLAY for AM65x in order to load overlay over spl. This series has been tested on AM65x SR2.0, and the ICSSG interface is able to ping / dhcp and boot kernel using tftp in uboot. To use ICSSG2 ethernet, the ICSSG firmware needs to be loaded to PRU RPROC cores and RPROC cores need to be booted with the firmware. This step is done inside driver in kernel as kernel supports APIs like rproc_set_firmware() and rproc_fw_boot(). But as u-boot doesn't have these APIs, the same needs to be done via u-boot cmds. To make sure icssg-eth works we need to do below steps. 1. Initialize rproc cores i.e. rproc_init() 2. Load $firmware_file from partition '1:2' (root) on device (mmc in this example) 3. Load the firmware file to rproc cores passing. i.e. rproc_load() taking rproc_id, loadaddr and file size as arguments. 4. Start rproc cores. i.e. rproc_start() taking rproc_id as arguments The above steps are done by running the below commands at u-boot prompt. => setenv start_icssg2 'rproc start 14; rproc start 15; rproc start 16; rproc start 17; rproc start 18; rproc start 19' => setenv stop_icssg2 'rproc stop 14; rproc stop 15; rproc stop 16; rproc stop 17; rproc stop 18; rproc stop 19' => setenv firmware_dir '/lib/firmware/ti-pruss' => setenv get_firmware_mmc 'load mmc ${bootpart} ${loadaddr} ${firmware_dir}/${firmware_file}' => setenv init_icssg2 'setenv ethact icssg2-eth; setenv autoload no; rproc init; setenv loadaddr 0x80000000; \ setenv firmware_file am65x-sr2-pru0-prueth-fw.elf; run get_firmware_mmc; rproc load 14 0x80000000 ${filesize}; \ setenv loadaddr 0x89000000; setenv firmware_file am65x-sr2-rtu0-prueth-fw.elf; run get_firmware_mmc; rproc load 15 0x89000000 ${filesize}; \ setenv loadaddr 0x90000000; setenv firmware_file am65x-sr2-txpru0-prueth-fw.elf; run get_firmware_mmc; rproc load 16 0x90000000 ${filesize}; \ setenv loadaddr 0x80000000; setenv firmware_file am65x-sr2-pru1-prueth-fw.elf; run get_firmware_mmc; rproc load 17 0x80000000 ${filesize}; \ setenv loadaddr 0x89000000; setenv firmware_file am65x-sr2-rtu1-prueth-fw.elf; run get_firmware_mmc; rproc load 18 0x89000000 ${filesize}; \ setenv loadaddr 0x90000000; setenv firmware_file am65x-sr2-txpru1-prueth-fw.elf; run get_firmware_mmc; rproc load 19 0x90000000 ${filesize}; \ run start_icssg2;' => run init_icssg2 => dhcp k3-navss-ringacc ringacc@3c000000: Ring Accelerator probed rings:818, gp-rings[304,100] sci-dev-id:187 k3-navss-ringacc ringacc@3c000000: dma-ring-reset-quirk: disabled prueth icssg2-eth: K3 ICSSG: rflow_id_base: 8, chn_name = rx0 link up on port 0, speed 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 DHCP client bound to address 192.168.4.58 (1020 ms) Thanks and Regards, MD Danish Anwar MD Danish Anwar (16): dma: ti: k3-udma: Use ring_idx to pair k3 nav rings net: ti: icssg: Add Firmware Interface for ICSSG Ethernet driver. net: ti: icssg: Add Firmware config and classification APIs. net: ti: icssg: Add icssg queues APIs and macros net: ti: icssg: Add ICSSG ethernet driver net: ti: icssg: Add support sending FDB command to update rx_flow_id net: ti: icssg: Enforce pinctrl state on the MDIO child node arm: dts: k3-am65: Add additional regs for DMA components arm: dts: k3-am65: Add cfg reg region to ringacc node arm: dts: k3-am65-main: Add ICSSG IEP nodes arm: dts: k3-am654-base-board: Add ICSSG2 Ethernet support arm: dts: k3-am65x-binman: Add ICSSG2 overlay and configuration configs: am65x_evm_a53: Enable ICSSG Driver configs: am65x_evm_a53_defconfig: add SPL_LOAD_FIT_APPLY_OVERLAY tools/fdtgrep: Include __symbols__ table board: ti: am65x: Add check for k3-am654-icssg2 in board_fit_config_match() arch/arm/dts/Makefile | 3 +- arch/arm/dts/k3-am65-main.dtsi | 49 ++- arch/arm/dts/k3-am65-mcu.dtsi | 13 +- arch/arm/dts/k3-am654-icssg2.dtso | 145 +++++++ arch/arm/dts/k3-am65x-binman.dtsi | 85 ++++ board/ti/am65x/evm.c | 11 +- configs/am65x_evm_a53_defconfig | 4 + drivers/dma/ti/k3-udma.c | 11 +- drivers/net/ti/Kconfig | 9 + drivers/net/ti/Makefile | 1 + drivers/net/ti/icss_mii_rt.h | 192 +++++++++ drivers/net/ti/icssg_classifier.c | 376 +++++++++++++++++ drivers/net/ti/icssg_config.c | 469 +++++++++++++++++++++ drivers/net/ti/icssg_config.h | 195 +++++++++ drivers/net/ti/icssg_prueth.c | 654 ++++++++++++++++++++++++++++++ drivers/net/ti/icssg_prueth.h | 89 ++++ drivers/net/ti/icssg_queues.c | 51 +++ drivers/net/ti/icssg_switch_map.h | 209 ++++++++++ tools/fdtgrep.c | 8 + 19 files changed, 2559 insertions(+), 15 deletions(-) create mode 100644 arch/arm/dts/k3-am654-icssg2.dtso create mode 100644 drivers/net/ti/icss_mii_rt.h create mode 100644 drivers/net/ti/icssg_classifier.c create mode 100644 drivers/net/ti/icssg_config.c create mode 100644 drivers/net/ti/icssg_config.h create mode 100644 drivers/net/ti/icssg_prueth.c create mode 100644 drivers/net/ti/icssg_prueth.h create mode 100644 drivers/net/ti/icssg_queues.c create mode 100644 drivers/net/ti/icssg_switch_map.h base:commit: a6f86132e30a407c7f96461df53c62fbe52e2b54 -- 2.34.1

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[PATCH v2 00/17] video: dw_hdmi: Support Vendor PHY
by Jagan Teki 10 Jan '24

10 Jan '24

From: Jagan Teki <jagan(a)edgeble.ai> Unlike RK3399, Sunxi/Meson DW HDMI the new Rockchip SoC Rk3328 would support external vendor PHY with DW HDMI chip. Support this vendor PHY by adding new platform PHY ops via DW HDMI driver and call the respective generic phy from platform driver code. This series tested in RK3328 with 1080p (1920x1080) resolution. Patch 0001/0005: Support Vendor PHY Patch 0006/0008: VOP extension for win, dsp offsets Patch 0009/0010: RK3328 VOP, HDMI clocks Patch 0011: Rockchip Inno HDMI PHY Patch 0012: RK3328 HDMI driver Patch 0013: RK3328 VOP driver Patch 0014/0017: Enable HDMI Out for RK3328 Changes for v2: - Use proper cfg function for meson - Add VOP cleanup code. - Add DCLK get rate Linux VOP/HDMI out issues seems resolved with explicit VOP cleanup. V1: https://patchwork.ozlabs.org/project/uboot/cover/20231211085939.5478-1-jaga… Any inputs? Jagan. Jagan Teki (17): video: rockchip: hdmi: Detect hpd after controller init video: dw_hdmi: Add Vendor PHY handling video: dw_hdmi: Extend the HPD detection video: dw_hdmi: Add read_hpd hook video: dw_hdmi: Add setup_hpd hook video: rockchip: vop: Simplify rkvop_enable video: rockchip: vop: Add win offset support video: rockchip: vop: Add dsp offset support clk: rockchip: rk3328: Add VOP clk support clk: rk3328: Add get hdmiphy clock phy: rockchip: Add Rockchip INNO HDMI PHY driver video: rockchip: Add rk3328 hdmi support video: rockchip: Add rk3328 vop support ARM: dts: rk3328: Enable VOP for bootph-all rockchip: Enable preconsole for rk3328 configs: evb-rk3328: Enable vidconsole for rk3328 configs: Enable HDMI Out for ROC-RK3328-CC arch/arm/dts/rk3328-u-boot.dtsi | 4 + .../include/asm/arch-rockchip/cru_rk3328.h | 34 + arch/arm/mach-rockchip/Kconfig | 1 + common/Kconfig | 2 +- configs/roc-cc-rk3328_defconfig | 5 + drivers/clk/rockchip/clk_rk3328.c | 105 ++- drivers/phy/rockchip/Kconfig | 7 + drivers/phy/rockchip/Makefile | 1 + drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 885 ++++++++++++++++++ drivers/video/dw_hdmi.c | 48 +- drivers/video/meson/meson_dw_hdmi.c | 11 +- drivers/video/rockchip/Makefile | 2 + drivers/video/rockchip/rk3328_hdmi.c | 131 +++ drivers/video/rockchip/rk3328_vop.c | 83 ++ drivers/video/rockchip/rk3399_hdmi.c | 8 +- drivers/video/rockchip/rk_hdmi.c | 12 +- drivers/video/rockchip/rk_hdmi.h | 3 + drivers/video/rockchip/rk_vop.c | 44 +- drivers/video/rockchip/rk_vop.h | 4 + drivers/video/sunxi/sunxi_dw_hdmi.c | 19 +- include/configs/evb_rk3328.h | 5 + include/configs/rk3328_common.h | 1 + include/dw_hdmi.h | 17 +- 23 files changed, 1393 insertions(+), 39 deletions(-) create mode 100644 drivers/phy/rockchip/phy-rockchip-inno-hdmi.c create mode 100644 drivers/video/rockchip/rk3328_hdmi.c create mode 100644 drivers/video/rockchip/rk3328_vop.c -- 2.25.1

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[PATCH] arm: socfpga: stratix10: SPI clock support
by dinesh.maniyam＠intel.com 10 Jan '24

10 Jan '24

From: Dinesh Maniyam <dinesh.maniyam(a)intel.com> This patch is to add SPI clock support for stratix10. Get clock rate function always returning 0 because the DW-SPI driver get the rate from clock node in dts but Stratix10 does not support device tree clock node.To overcome this spi will get the clock_rate directly from spi clock controller override the weaker function. Signed-off-by: Dinesh Maniyam <dinesh.maniyam(a)intel.com> --- arch/arm/mach-socfpga/clock_manager_s10.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c index 4b4f0749db..45300336d5 100644 --- a/arch/arm/mach-socfpga/clock_manager_s10.c +++ b/arch/arm/mach-socfpga/clock_manager_s10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * Copyright (C) 2016-2023 Intel Corporation <www.intel.com> * */ @@ -399,6 +399,21 @@ unsigned int cm_get_l4_sys_free_clk_hz(void) return cm_get_l3_main_clk_hz() / 4; } +/* + * Override weak dw_spi_get_clk implementation in designware_spi.c driver + */ + +int dw_spi_get_clk(struct udevice *bus, ulong *rate) +{ + *rate = cm_get_spi_controller_clk_hz(); + if (!*rate) { + printf("SPI: clock rate is zero"); + return -EINVAL; + } + + return 0; +} + void cm_print_clock_quick_summary(void) { printf("MPU %d kHz\n", (u32)(cm_get_mpu_clk_hz() / 1000)); -- 2.26.2

2 1

[PATCH v3 0/8] An effort to bring DT bindings compliance within U-Boot
by Sumit Garg 09 Jan '24

09 Jan '24

Changes in v3: -------------- - Patch #4: Minor commit message update - Patch #5: Replace CONFIG_* with Kconfig options - Patch #7: Dropped Makefile portion and enabled OF_UPSTREAM for SoC instead. - Patch #1, #3, #6 and #8: Picked up review tags Changes in v2: -------------- - Patch #1: excluded gitab CI config check and added commit description. - Patch #3: s/UBOOT_DTSI_LOC/u_boot_dtsi_loc/ - Patch #4: s/DEVICE_TREE_LOC/dt_dir/ and s/U-boot/U-Boot/ - Patch #5: s/U-boot/U-Boot/ - Patch #6 and #7: Picked up review tags Prerequisite ------------ This patch series requires devicetree-rebasing git repo to be added as a subtree to the main U-Boot repo via: $ git subtree add --prefix devicetree-rebasing \ git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasin… \ v6.6-dts --squash Background ---------- This effort started while I was reviewing patch series corresponding to Qcom platforms [1] which was about to import modified devicetree source files from Linux kernel. I suppose keeping devicetree files sync with Linux kernel without any DT bindings schema validation has been a pain for U-Boot SoC/platform maintainers. There has been past discussions about a single DT repo but that hasn't come up and Linux kernel remained the place where DT source files as well as bindings are placed and maintained. However, Linux kernel DT maintainers proposed [2] for U-Boot to rather use devicetree-rebasing repo [3] which is a forked copy from Linux kernel for DT source files as well as bindings. It is tagged at every Linux kernel major release or intermideate release candidates. So here I have tried to reuse that to bring DT bingings compliance as well as a standard way to maintain a regular sync of DT source files with Linux kernel. In order to maintain devicetree files sync, U-Boot will maintains a Git subtree for devicetee-rebasing repo as `devicetee-rebasing/` sub-directory. It will be regularly updated with every new kernel major release via subtree pull as follows: $ git subtree pull --prefix devicetree-rebasing \ git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasin… \ <release-tag> --squash The RFC/prototype for this series has been discussed with Linux DT maintainers as well as U-Boot maintainers here [4]. Now we would like to reach out to wider U-Boot community to seek feedback. [1] https://lore.kernel.org/all/CAFA6WYMLUD9cnkr=R0Uur+1UeTMkKjM2zDdMJtXb3nmrLk… [2] https://lore.kernel.org/all/CAL_JsqKEjv2tSGmT+0ZiO7_qbBfhTycbGnhJhYpKDFzfO9… [3] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebas… [4] https://github.com/u-boot/u-boot/pull/451 Changes ------- Traditionally, U-Boot placed copies of devicetree source files from Linux kernel into `arch/<arch>/dts/<name>.dts`, which can be selected via: CONFIG_DEFAULT_DEVICE_TREE "<name>" SoC/board maintainers are encouraged to migrate to using mirrored copies from `devicetree-rebasing/` into `dts/arch/<arch>/<vendor>` via: CONFIG_OF_UPSTREAM=y CONFIG_DEFAULT_DEVICE_TREE "<vendor>/<name>" An example have been shown for Amlogic meson-gxbb SoC and corresponding derived boards via patch #7 and #8. Devicetree bindings schema checks --------------------------------- With devicetee-rebasing Git subtree, the devicetree bindings are also regularly synced with Linux kernel as `devicetree-rebasing/Bindings/` sub-directory. This allows U-Boot to run devicetree bindings schema checks which will bring compliance to U-Boot core/drivers regarding usage of devicetree. Dependencies ------------ The DT schema project must be installed in order to validate the DT schema binding documents and validate DTS files using the DT schema. The DT schema project can be installed with pip: $ pip3 install dtschema Note that 'dtschema' installation requires 'swig' and Python development files installed first. On Debian/Ubuntu systems: $ apt install swig python3-dev Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be installed. Ensure they are in your PATH (~/.local/bin by default). Recommended is also to install yamllint (used by dtschema when present). Running checks -------------- In order to perform validation of DTB files, use the ``dtbs_check`` target: $ make dtbs_check It is also possible to run checks with a subset of matching schema files by setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or patterns (partial match of a fixed string). Each file or pattern should be separated by ':'. $ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml $ make dtbs_check DT_SCHEMA_FILES=/gpio/ $ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml Sumit Garg (8): CI: Exclude devicetree-rebasing subtree for CONFIG checks Makefile: Add support for DT bindings schema checks scripts/Makefile.lib: Statically define *-u-boot.dtsi files location dts: Add alternative location for upstream DTB builds doc: devicetree: Updates for devicetree-rebasing subtree MAINTAINERS: Add myself as devicetree-rebasing maintainer dts: meson-gxbb: Switch to using upstream DT dts: meson-gxbb: Drop redundant devicetree files .azure-pipelines.yml | 3 +- .gitlab-ci.yml | 3 +- MAINTAINERS | 6 + Makefile | 20 +- arch/arm/dts/Makefile | 8 - arch/arm/dts/meson-gxbb-kii-pro.dts | 140 ---- arch/arm/dts/meson-gxbb-nanopi-k2.dts | 415 ------------ arch/arm/dts/meson-gxbb-odroidc2.dts | 418 ------------ arch/arm/dts/meson-gxbb-p200.dts | 100 --- arch/arm/dts/meson-gxbb-p201.dts | 26 - arch/arm/dts/meson-gxbb-p20x.dtsi | 250 ------- arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 -- arch/arm/dts/meson-gxbb-wetek-play2.dts | 119 ---- arch/arm/dts/meson-gxbb-wetek.dtsi | 292 -------- arch/arm/dts/meson-gxbb.dtsi | 856 ------------------------ arch/arm/mach-meson/Kconfig | 1 + configs/nanopi-k2_defconfig | 2 +- configs/odroid-c2_defconfig | 2 +- configs/p200_defconfig | 2 +- configs/p201_defconfig | 2 +- configs/videostrong-kii-pro_defconfig | 2 +- configs/wetek-hub_defconfig | 2 +- configs/wetek-play2_defconfig | 2 +- doc/develop/devicetree/control.rst | 131 +++- dts/Kconfig | 11 + dts/Makefile | 17 +- dts/arch/arm64/Makefile | 14 + dts/arch/arm64/amlogic | 1 + scripts/Makefile.lib | 42 +- 29 files changed, 201 insertions(+), 2744 deletions(-) delete mode 100644 arch/arm/dts/meson-gxbb-kii-pro.dts delete mode 100644 arch/arm/dts/meson-gxbb-nanopi-k2.dts delete mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts delete mode 100644 arch/arm/dts/meson-gxbb-p200.dts delete mode 100644 arch/arm/dts/meson-gxbb-p201.dts delete mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi delete mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts delete mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts delete mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi delete mode 100644 arch/arm/dts/meson-gxbb.dtsi create mode 100644 dts/arch/arm64/Makefile create mode 120000 dts/arch/arm64/amlogic -- 2.34.1

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[PATCH v6 0/6] Implement fastboot multiresponce
by Svyatoslav Ryhel 09 Jan '24

09 Jan '24

Currently u-boot fastboot can only send one message back to host, so if there is a need to print more than one line messages must be kept sending until all the required data is obtained. This behavior can be adjusted using multiresponce ability (getting multiple lines of response) proposed in this patch set. Implementation of multiresponce leads to ability to dump content of console buffer which, with use of "oem run", allows to entirely avoid need in UART. --- Changes in v6: - remove prev console changes - add console_record_isempty helper - set record flag on init Changes in v5: - restored membuff_readline behavior changed in v4 Changes in v4: - adjust membuff_readline behavior with overflow Changes in v3: - fix missing function calls if CONFIG_CONSOLE_RECORD is not enabled Changes in v2: - changed variables to static - fixed multiresponce for udp - documented use of "MORE" - converted #if to if (...) --- Ion Agorria (6): fastboot: multiresponse support fastboot: implement "getvar all" common: console: introduce console_record_isempty helper common: console: record console from the beginning lib: membuff: fix readline not returning line in case of overflow fastboot: add oem console command support boot/bootmeth_extlinux.c | 2 +- common/console.c | 10 +++- doc/android/fastboot-protocol.rst | 3 ++ doc/android/fastboot.rst | 1 + drivers/fastboot/Kconfig | 7 +++ drivers/fastboot/fb_command.c | 52 +++++++++++++++++++++ drivers/fastboot/fb_getvar.c | 77 +++++++++++++++++++++++++------ drivers/usb/gadget/f_fastboot.c | 29 ++++++++++++ include/console.h | 13 ++++++ include/fastboot-internal.h | 7 +++ include/fastboot.h | 19 ++++++++ include/membuff.h | 5 +- lib/membuff.c | 4 +- net/fastboot_udp.c | 29 +++++++++--- 14 files changed, 233 insertions(+), 25 deletions(-) -- 2.40.1

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