December 2023 - U-Boot

[PATCH v3 0/4] Add DFU and usb boot for TI am62x
by Sjoerd Simons 14 Dec '23

14 Dec '23

Previous version of this patchset went out back in April and got delayed for various reasons. As some parts were merge this is a somewhat smaller set then before. Patches against u-boot/next to take advantage of the latest dts sync from linux v6.7-rc1 0: https://lists.denx.de/pipermail/u-boot/2023-April/514642.html Changes in v3: - Add dfu via environment rather then config headers - Enable usb nodes in all boot phases - Run savedefconfig to adjust to more recent u-boot Changes in v2: - Switch dwc3 glue to a seperate driver rather then in dwc-generic - Minimize config changes to just DFU configuration - Only enable usb port 0 DFU in SPL - Create a seperate defconfig for R5 Sjoerd Simons (4): usb: dwc3: Add dwc3 glue driver for am62 board: ti: am62x: am62x: include env for DFU arm: dts: k3-am625-sk: Enable usb ports in u-boot configs: am62x_evm_*: Enable USB and DFU support arch/arm/dts/k3-am625-sk-u-boot.dtsi | 9 ++ board/ti/am62x/am62x.env | 1 + configs/am62x_evm_a53_defconfig | 31 ++++++- configs/am62x_evm_r5_usbdfu_defconfig | 111 +++++++++++++++++++++++ drivers/usb/dwc3/Kconfig | 14 +++ drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/dwc3-am62.c | 125 ++++++++++++++++++++++++++ 7 files changed, 291 insertions(+), 1 deletion(-) create mode 100644 configs/am62x_evm_r5_usbdfu_defconfig create mode 100644 drivers/usb/dwc3/dwc3-am62.c -- 2.43.0

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[PATCH] arm64: imx8mp: Enable TCP, IPv6, wget on Data Modul i.MX8M eDM SBC
by Marek Vasut 14 Dec '23

14 Dec '23

Enable support for TCP protocol, wget, and IPv6 on this platform. The former two allow users download payload into the U-Boot from a web server, which may be more convenient or easier to set up than TFTP server. The later is enabled to future proof the IP stack on this platform. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> --- configs/imx8mm_data_modul_edm_sbc_defconfig | 5 +++++ configs/imx8mp_data_modul_edm_sbc_defconfig | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index b015707ccec..3b76207227e 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -108,6 +108,9 @@ CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_WGET=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_PXE=y @@ -148,6 +151,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_SPL_DM=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig index ae1a48c6812..7ee454076c6 100644 --- a/configs/imx8mp_data_modul_edm_sbc_defconfig +++ b/configs/imx8mp_data_modul_edm_sbc_defconfig @@ -114,6 +114,9 @@ CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_DHCP=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_WGET=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_PXE=y @@ -155,6 +158,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_TSIZE=y +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_SPL_DM=y CONFIG_REGMAP=y CONFIG_SYSCON=y -- 2.42.0

2 2

[PATCH 1/2] arm: imx6: Enable TCP, IPv6, wget on DH i.MX6 DHCOM
by Marek Vasut 14 Dec '23

14 Dec '23

Enable support for TCP protocol, wget, and IPv6 on this platform. The former two allow users download payload into the U-Boot from a web server, which may be more convenient or easier to set up than TFTP server. The later is enabled to future proof the IP stack on this platform. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Andreas Geisreiter <ageisreiter(a)dh-electronics.de> Cc: Christoph Niedermaier <cniedermaier(a)dh-electronics.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: u-boot(a)dh-electronics.com --- configs/dh_imx6_defconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 5a83b6a08a2..8d2d46ab659 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -55,6 +55,9 @@ CONFIG_CMD_SATA=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_WDT=y +CONFIG_CMD_DHCP6=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_WGET=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -71,6 +74,10 @@ CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_VERSION_VARIABLE=y CONFIG_ARP_TIMEOUT=200 +CONFIG_IP_DEFRAG=y +CONFIG_TFTP_TSIZE=y +CONFIG_PROT_TCP_SACK=y +CONFIG_IPV6=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y -- 2.42.0

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[PATCH V3 1/2] drivers: watchdog: add andes atcwdt200 support
by Randolph 14 Dec '23

14 Dec '23

This patch adds an implementation of the Andes watchdog ATCWDT200 driver. Signed-off-by: CL Wang <cl634(a)andestech.com> Signed-off-by: Randolph <randolph(a)andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang(a)andestech.com> --- drivers/watchdog/Kconfig | 6 + drivers/watchdog/Makefile | 1 + drivers/watchdog/atcwdt200_wdt.c | 220 +++++++++++++++++++++++++++++++ 3 files changed, 227 insertions(+) create mode 100644 drivers/watchdog/atcwdt200_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 569726119c..8318fd77a3 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -130,6 +130,12 @@ config WDT_AT91 Select this to enable Microchip watchdog timer, which can be found on some AT91 devices. +config WDT_ATCWDT200 + bool "Andes watchdog timer support" + depends on WDT + help + Select this to enable Andes ATCWDT200 watchdog timer + config WDT_BCM6345 bool "BCM6345 watchdog timer support" depends on WDT && (ARCH_BMIPS || BCM6856 || \ diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 5520d3d9ae..7b39adcf0f 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_WDT_ARM_SMC) += arm_smc_wdt.o obj-$(CONFIG_WDT_ARMADA_37XX) += armada-37xx-wdt.o obj-$(CONFIG_WDT_ASPEED) += ast_wdt.o obj-$(CONFIG_WDT_AST2600) += ast2600_wdt.o +obj-$(CONFIG_WDT_ATCWDT200) += atcwdt200_wdt.o obj-$(CONFIG_WDT_BCM2835) += bcm2835_wdt.o obj-$(CONFIG_WDT_BCM6345) += bcm6345_wdt.o obj-$(CONFIG_WDT_BOOKE) += booke_wdt.o diff --git a/drivers/watchdog/atcwdt200_wdt.c b/drivers/watchdog/atcwdt200_wdt.c new file mode 100644 index 0000000000..c6a8e4e054 --- /dev/null +++ b/drivers/watchdog/atcwdt200_wdt.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Andes Technology Corporation. + * + */ + +#include <asm/io.h> +#include <dm.h> +#include <hang.h> +#include <linux/bitops.h> +#include <wdt.h> + +#define NODE_NOT_FOUND 0xFFFFFFFF + +#define WDT_WP_MAGIC 0x5aa5 +#define WDT_RESTART_MAGIC 0xcafe + +/* Control Register */ +#define REG_WDT_ID 0x00 +#define REG_WDT_CFG 0x10 +#define REG_WDT_RS 0x14 +#define REG_WDT_WE 0x18 +#define REG_WDT_STA 0x1C + +#define RST_TIME_OFF 8 +#define RST_TIME_MSK (0x7 << RST_TIME_OFF) +#define RST_CLK_128 (0 << RST_TIME_OFF) +#define RST_CLK_256 (1 << RST_TIME_OFF) +#define RST_CLK_512 (2 << RST_TIME_OFF) +#define RST_CLK_1024 (3 << RST_TIME_OFF) +#define INT_TIME_OFF 4 +#define INT_TIME_MSK (0xf << INT_TIME_OFF) +#define INT_CLK_2_6 (0 << INT_TIME_OFF) /* clk period*2^6 */ +#define INT_CLK_2_8 (1 << INT_TIME_OFF) /* clk period*2^8 */ +#define INT_CLK_2_10 (2 << INT_TIME_OFF) /* clk period*2^10 */ +#define INT_CLK_2_11 (3 << INT_TIME_OFF) /* clk period*2^11 */ +#define INT_CLK_2_12 (4 << INT_TIME_OFF) /* clk period*2^12 */ +#define INT_CLK_2_13 (5 << INT_TIME_OFF) /* clk period*2^13 */ +#define INT_CLK_2_14 (6 << INT_TIME_OFF) /* clk period*2^14 */ +#define INT_CLK_2_15 (7 << INT_TIME_OFF) /* clk period*2^15 */ +#define INT_CLK_2_17 (8 << INT_TIME_OFF) /* clk period*2^17 */ +#define INT_CLK_2_19 (9 << INT_TIME_OFF) /* clk period*2^19 */ +#define INT_CLK_2_21 (10 << INT_TIME_OFF) /* clk period*2^21 */ +#define INT_CLK_2_23 (11 << INT_TIME_OFF) /* clk period*2^23 */ +#define INT_CLK_2_25 (12 << INT_TIME_OFF) /* clk period*2^25 */ +#define INT_CLK_2_27 (13 << INT_TIME_OFF) /* clk period*2^27 */ +#define INT_CLK_2_29 (14 << INT_TIME_OFF) /* clk period*2^29 */ +#define INT_CLK_2_31 (15 << INT_TIME_OFF) /* clk period*2^31 */ +#define INT_CLK_MIN 0x0 +#define INT_CLK_MAX_16B 0x7 +#define INT_CLK_MAX_32B 0xF +#define RST_EN BIT(3) +#define INT_EN BIT(2) +#define CLK_PCLK BIT(1) +#define WDT_EN BIT(0) +#define INT_EXPIRED BIT(0) + +#define INT_TIME_ARRAY 16 +#define RST_TIME_ARRAY 8 + +struct wdt_priv { + void __iomem *base; + u32 wdt_clk_src; + u32 clk_freq; + u8 max_clk; +}; + +static inline u8 atcwdt_get_2_power_of_n(u8 index, u8 type) +{ + const u8 div_int[INT_TIME_ARRAY] = {6, 8, 10, 11, 12, 13, 14, 15, + 17, 19, 21, 23, 25, 27, 29, 31}; + const u8 div_rst[RST_TIME_ARRAY] = {7, 8, 9, 10, 11, 12, 13, 14}; + u8 *pdiv; + + if (type == RST_TIME_ARRAY) + pdiv = div_rst; + else + pdiv = div_int; + + if (index >= type) + index = type - 1; + + return pdiv[index]; +} + +static u8 atcwdt_search_msb(u64 freq_ms, u8 type) +{ + u64 result; + u64 freq_sec; + u8 index; + + freq_sec = freq_ms / 1000; + for (index = 0; index < type; index++) { + result = freq_sec >> atcwdt_get_2_power_of_n(index, type); + + if (result <= 1) + break; + } + + return index; +} + +static int atcwdt_wdt_start(struct udevice *dev, u64 timeout, ulong flags) +{ + struct wdt_priv *priv = dev_get_priv(dev); + u64 rst_max_count; + u32 rst_max_time_ms; + u64 rst_time_ms; + u64 int_time_ms; + u8 rst_time; + u8 int_time; + + rst_max_count = 1 << atcwdt_get_2_power_of_n(RST_TIME_ARRAY, RST_TIME_ARRAY); + rst_max_time_ms = (rst_max_count * 1000) / priv->clk_freq; + + if (timeout > rst_max_time_ms) { + int_time_ms = timeout - rst_max_time_ms; + rst_time_ms = rst_max_time_ms; + } else { + int_time_ms = 0; + rst_time_ms = timeout; + } + + rst_time = atcwdt_search_msb(rst_time_ms * priv->clk_freq, RST_TIME_ARRAY); + + if (int_time_ms) { + int_time = atcwdt_search_msb(int_time_ms * priv->clk_freq, INT_TIME_ARRAY); + if (int_time > priv->max_clk) + int_time = priv->max_clk; + } else { + int_time = 0; + } + + writel(WDT_WP_MAGIC, priv->base + REG_WDT_WE); + writel(((rst_time << RST_TIME_OFF) & RST_TIME_MSK) | ((int_time << INT_TIME_OFF) & + INT_TIME_MSK) | INT_EN | RST_EN | priv->wdt_clk_src | WDT_EN, + priv->base + REG_WDT_CFG); + + return 0; +} + +static int atcwdt_wdt_stop(struct udevice *dev) +{ + struct wdt_priv *priv = dev_get_priv(dev); + + writel(WDT_WP_MAGIC, priv->base + REG_WDT_WE); + writel(0, priv->base + REG_WDT_CFG); + + return 0; +} + +static int atcwdt_wdt_restart(struct udevice *dev) +{ + struct wdt_priv *priv = dev_get_priv(dev); + + writel(WDT_WP_MAGIC, priv->base + REG_WDT_WE); + writel(WDT_RESTART_MAGIC, priv->base + REG_WDT_RS); + setbits_le32(priv->base + REG_WDT_STA, INT_EXPIRED); + + return 0; +} + +static int atcwdt_wdt_expire_now(struct udevice *dev, ulong flags) +{ + atcwdt_wdt_start(dev, 0, 0); + hang(); + + return 0; +} + +static int atcwdt_wdt_probe(struct udevice *dev) +{ + struct wdt_priv *priv = dev_get_priv(dev); + int timer_16bit; + + priv->base = dev_remap_addr_index(dev, 0); + if (!priv->base) + return -EFAULT; + + priv->wdt_clk_src = dev_read_u32_default(dev, "clock-source", NODE_NOT_FOUND); + if (priv->wdt_clk_src == NODE_NOT_FOUND || priv->wdt_clk_src > 1) + priv->wdt_clk_src = CLK_PCLK; + + timer_16bit = dev_read_u32_default(dev, "16bit_timer", NODE_NOT_FOUND); + if (timer_16bit == 1 || timer_16bit == NODE_NOT_FOUND) + priv->max_clk = INT_CLK_MAX_16B; + else + priv->max_clk = INT_CLK_MAX_32B; + + priv->clk_freq = dev_read_u32_default(dev, "clock-frequency", NODE_NOT_FOUND); + if (priv->clk_freq == NODE_NOT_FOUND) { + printf("atcwdt200: Please provide a valid \"clock-frequency\" in DTB\n"); + return -EINVAL; + } + + atcwdt_wdt_stop(dev); + + return 0; +} + +static const struct wdt_ops atcwdt_wdt_ops = { + .start = atcwdt_wdt_start, + .reset = atcwdt_wdt_restart, + .stop = atcwdt_wdt_stop, + .expire_now = atcwdt_wdt_expire_now, +}; + +static const struct udevice_id atcwdt_wdt_ids[] = { + {.compatible = "andestech,atcwdt200"}, + {} +}; + +U_BOOT_DRIVER(atcwdt) = { + .name = "atcwdt200 + .id = UCLASS_WDT, + .probe = atcwdt_wdt_probe, + .of_match = atcwdt_wdt_ids, + .ops = &atcwdt_wdt_ops, + .priv_auto = sizeof(struct wdt_priv), +}; -- 2.34.1

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[PATCH 1/1] pico-imx7d: add baseboard SD card boot detect
by egyszeregy＠freemail.hu 14 Dec '23

14 Dec '23

From: Benjamin Szőke <egyszeregy(a)freemail.hu> Technexion PICO-IMX7 SoM is supporting USDHC3 (eMMC or micro SD on SoM) and USDHC1 (SD on carrier board) to use on any carrier board like PICO-NYMPH. Based on the U-Boot version from Technexion it adds baseboard SD card boot detect to able to boot from selected USDHC1 or USDHC3 boot devices. - Add baseboard SD card boot detect from Technexion's U-Boot. - Implement board_mmc_get_env_dev() for pico-imx7d SoM. - Implement mmc_map_to_kernel_blk() for pico-imx7d SoM. - Add board_late_mmc_env_init() to use from common freescale functions to able to provide "mmcdev" and "mmcroot" variables in environment of U-boot. - Add "mmc1" alias to use for usdhc1 in imx7d-pico-pi-u-boot.dtsi. - In default environment set "mmcautodetect=yes" to use boot detection. Signed-off-by: Benjamin Szőke <egyszeregy(a)freemail.hu> --- arch/arm/dts/imx7d-pico-pi-u-boot.dtsi | 1 + board/technexion/pico-imx7d/Makefile | 2 +- board/technexion/pico-imx7d/pico-imx7d.c | 63 ++++++++++++++++ board/technexion/pico-imx7d/spl.c | 91 ++++++++++++++++++++++-- include/configs/pico-imx7d.h | 4 +- 5 files changed, 152 insertions(+), 9 deletions(-) diff --git a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi index 843b4583e5..6289a76486 100644 --- a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi +++ b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi @@ -3,6 +3,7 @@ /{ aliases { mmc0 = &usdhc3; + mmc1 = &usdhc1; usb0 = &usbotg1; display0 = &lcdif; }; diff --git a/board/technexion/pico-imx7d/Makefile b/board/technexion/pico-imx7d/Makefile index 4ae3d606b5..61b55fcc55 100644 --- a/board/technexion/pico-imx7d/Makefile +++ b/board/technexion/pico-imx7d/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0+ # (C) Copyright 2017 NXP Semiconductors -obj-y := pico-imx7d.o spl.o +obj-y := pico-imx7d.o spl.o ../../freescale/common/mmc.o diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index 6e98b85b28..edd66ac7ac 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -13,6 +13,7 @@ #include <asm/global_data.h> #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> #include <miiphy.h> @@ -25,6 +26,11 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) +#define PICO_MMC0 0 +#define PICO_MMC0_BLK 2 +#define PICO_MMC1 1 +#define PICO_MMC1_BLK 0 + int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -176,6 +182,12 @@ int board_late_init(void) set_wdog_reset(wdog); +#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX) +#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) || CONFIG_IS_ENABLED(ENV_IS_NOWHERE) + board_late_mmc_env_init(); +#endif /* CONFIG_ENV_IS_IN_MMC or CONFIG_ENV_IS_NOWHERE */ +#endif + /* * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4), * since we use PMIC_PWRON to reset the board. @@ -210,3 +222,54 @@ int board_ehci_hcd_init(int port) } return 0; } + +#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX) +#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) || CONFIG_IS_ENABLED(ENV_IS_NOWHERE) +int board_mmc_get_env_dev(int devno) +{ + int dev_env = 0; + (void)(devno); + + switch (get_boot_device()) { + case SD3_BOOT: + case MMC3_BOOT: + env_set("bootdev", "MMC3"); + dev_env = PICO_MMC0; + break; + case SD1_BOOT: + env_set("bootdev", "SD1"); + dev_env = PICO_MMC1; + break; + default: + printf("Wrong boot device!"); + } + + return dev_env; +} + +int mmc_map_to_kernel_blk(int dev_no) +{ + int blk_no = 0; + + switch (dev_no) { + case PICO_MMC0: + blk_no = PICO_MMC0_BLK; + break; + case PICO_MMC1: + blk_no = PICO_MMC1_BLK; + break; + default: + printf("Invalid MMC device!"); + } + + return blk_no; +} +#endif + +#if CONFIG_IS_ENABLED(ENV_IS_NOWHERE) +int mmc_get_env_dev(void) +{ + return board_mmc_get_env_dev(0); +} +#endif +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index c6b21aaa42..0192eafbaa 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -15,6 +15,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch-mx7/mx7-ddr.h> #include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> #include <asm/gpio.h> #include <asm/sections.h> #include <fsl_esdhc_imx.h> @@ -159,7 +160,20 @@ void reset_cpu(void) #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM) -static iomux_v3_cfg_t const usdhc3_pads[] = { +#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 0) +/* EMMC/SD */ +static const iomux_v3_cfg_t usdhc1_pads[] = { + MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#define USDHC3_CD_GPIO IMX_GPIO_NR(1, 14) +static const iomux_v3_cfg_t usdhc3_emmc_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -173,20 +187,83 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -static struct fsl_esdhc_cfg usdhc_cfg[1] = { +static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, + {USDHC1_BASE_ADDR}, }; int board_mmc_getcd(struct mmc *mmc) { - /* Assume uSDHC3 emmc is always present */ - return 1; + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC3_CD_GPIO); + break; + } + + return ret; } int board_mmc_init(struct bd_info *bis) { - imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); + int ret; + u32 index; + + /* + * Following map is done: + * (USDHC) (Physical Port) + * usdhc3 SOM MicroSD/MMC + * usdhc1 Carrier board MicroSD + * Always set boot USDHC as mmc0 + */ + + imx_iomux_v3_setup_multiple_pads(usdhc3_emmc_pads, + ARRAY_SIZE(usdhc3_emmc_pads)); + gpio_direction_input(USDHC3_CD_GPIO); + + imx_iomux_v3_setup_multiple_pads(usdhc1_pads, + ARRAY_SIZE(usdhc1_pads)); + gpio_direction_input(USDHC1_CD_GPIO); + + switch (get_boot_device()) { + case SD1_BOOT: + usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + case MMC3_BOOT: + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 8; + usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + case SD3_BOOT: + default: + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR; + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + } + + for (index = 0; index < CFG_SYS_FSL_USDHC_NUM; ++index) { + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + if (ret) + return ret; + } + + return 0; } #endif diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 096e5bbe66..e7a8cb20df 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -13,7 +13,7 @@ #define CFG_MXC_UART_BASE UART5_IPS_BASE_ADDR /* MMC Config */ -#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ @@ -79,9 +79,11 @@ "name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \ "fastboot_partition_alias_system=rootfs\0" \ "setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \ + "mmcautodetect=yes\0" \ PICO_BOOT_ENV #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ func(PXE, pxe, na) \ -- 2.42.0.windows.2

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[PATCH] imx: imx-hab: Select SPL_DRIVERS_MISC in the SPL case
by Fabio Estevam 14 Dec '23

14 Dec '23

From: Fabio Estevam <festevam(a)denx.de> Selecting CONFIG_IMX_HAB=y on a SPL target, such as apalis_imx6_defconfig, for example, leads to the following build error: /usr/bin/arm-linux-gnueabihf-ld.bfd: arch/arm/mach-imx/hab.o: in function `imx_hab_is_enabled': arch/arm/mach-imx/hab.c:879: undefined reference to `fuse_read' fuse_read() comes from SPL_MXC_OCOTP, which depends on SPL_DRIVERS_MISC, since commit 251a3053b1e6 ("misc: imx: remove DM dependency for ocotp driver in SPL"). Select SPL_DRIVERS_MISC in the SPL case to fix this build issue. Reported-by: Lisandro Pérez Meyer <lpmeyer(a)ics.com> Signed-off-by: Fabio Estevam <festevam(a)denx.de> --- arch/arm/mach-imx/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index abd48d42583a..c34bc25c0bfb 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -54,6 +54,7 @@ config IMX_HAB bool "Support i.MX HAB features" depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 || ARCH_IMX8M || ARCH_MX7ULP select FSL_CAAM if HAS_CAAM + select SPL_DRIVERS_MISC if SPL imply CMD_DEKBLOB if HAS_CAAM help This option enables the support for secure boot (HAB). -- 2.34.1

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[PATCH] tools: mxsboot: pre-fill buffer with 0xff, not 0
by Alessandro Rubini 14 Dec '23

14 Dec '23

The tool works for me, with imx28 and NAND memory, but the resulting blocks are reported as bad, both by u-boot and the kernel. This makes it impossible to erase from Linux (for an upgrade without console access, for example -- u-boot can "nand scrub" but linux can't). pre-filling with 0xff creates a proper boot loader image, but no bad-block marker is there when written to flash. Signed-off-by: Alessandro Rubini <rubini(a)gnudd.com> --- tools/mxsboot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/mxsboot.c b/tools/mxsboot.c index 04d86f87a8..8f4018aa56 100644 --- a/tools/mxsboot.c +++ b/tools/mxsboot.c @@ -478,7 +478,7 @@ static int mx28_create_nand_image(int infd, int outfd) goto err0; } - memset(buf, 0, size); + memset(buf, 0xff, size); fcb = mx28_nand_get_fcb(MAX_BOOTSTREAM_SIZE); if (!fcb) { -- 2.30.2

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[PATCH v2] arm: mxs: Clear CPSR V bit to activate low vectors
by Marek Vasut 14 Dec '23

14 Dec '23

The MXS starts with CPSR V bit set, which makes the CPU jump to high vectors in case of an exception. Those high vectors are located at 0xffff0000, which is where the BootROM exception table is located as well. U-Boot should handle exceptions on its own using its own exception handling code, which is located at 0x0, i.e. at low vectors. Clear the CPSR V bit, so that the CPU would jump to low vectors on exception instead, and therefore run the U-Boot exception handling code. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: "NXP i.MX U-Boot Team" <uboot-imx(a)nxp.com> Cc: Fabio Estevam <festevam(a)gmail.com> Cc: Lukasz Majewski <lukma(a)denx.de> Cc: Stefano Babic <sbabic(a)denx.de> --- V2: Mark both get_cr()/set_cr() callsites as __attribute__((target("arm"))) and noinline to force generation of ARM version of those functions, as this core cannot run mrc/mcr in Thumb mode. This is truly hideous workaround right here. --- arch/arm/cpu/arm926ejs/mxs/mxs.c | 4 ++++ arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 8 +++++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index 6d6166cb839..4f3cb63c56d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -71,6 +71,7 @@ void reset_cpu(void) * actually 0x20, this the associated <destination address>. Loading the PC * register with an address performs a jump to that address. */ +noinline __attribute__((target("arm"))) void mx28_fixup_vt(uint32_t start_addr) { /* ldr pc, [pc, #0x18] */ @@ -85,6 +86,9 @@ void mx28_fixup_vt(uint32_t start_addr) /* cppcheck-suppress nullPointer */ vt[i + 8] = start_addr + (4 * i); } + + /* Make sure ARM core points to low vectors */ + set_cr(get_cr() & ~CR_V); } #ifdef CONFIG_ARCH_MISC_INIT diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 5e7bdb78be1..249f8de8fbe 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -17,6 +17,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/sections.h> +#include <asm/system.h> #include <linux/compiler.h> #include "mxs_init.h" @@ -93,7 +94,9 @@ static uint8_t mxs_get_bootmode_index(void) return i; } -static void mxs_spl_fixup_vectors(void) +static noinline +__attribute__((target("arm"))) +void mxs_spl_fixup_vectors(void) { /* * Copy our vector table to 0x0, since due to HAB, we cannot @@ -104,6 +107,9 @@ static void mxs_spl_fixup_vectors(void) /* cppcheck-suppress nullPointer */ memcpy(0x0, _start, 0x60); + + /* Make sure ARM core points to low vectors */ + set_cr(get_cr() & ~CR_V); } static void mxs_spl_console_init(void) -- 2.42.0

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Re: [PATCH v2 1/3] drivers: rtc: add pcf2131 rtc driver
by Fabio Estevam 14 Dec '23

14 Dec '23

Hi Joy, In Linux, the pcf2131 rtc is handled by the pcf2127 driver. I suggest we do the same in U-Boot. Thanks

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Please pull u-boot-dm/next
by Simon Glass 14 Dec '23

14 Dec '23

Hi Tom, This is for the -next branch https://source.denx.de/u-boot/custodians/u-boot-dm/-/commit/39e7e039b02e1cf… https://dev.azure.com/simon0972/u-boot/_build/results?buildId=56&view=resul… The following changes since commit 9565771076c2d4b0193f1741b3990695ac33c1f3: Merge patch series "bootm: Refactoring to reduce reliance on CMDLINE (part A)" (2023-12-13 11:51:53 -0500) are available in the Git repository at: git://git.denx.de/u-boot-dm.git tags/dm-next-13dec23 for you to fetch changes up to 39e7e039b02e1cf8b04ea668e2bfe2cd2ef0e14d: test: vboot: Using variable 'old_dtb' before assignment (2023-12-13 13:20:20 -0700) ---------------------------------------------------------------- minor improvements to test, acpi updates for new PyPl release ---------------------------------------------------------------- Dario Binacchi (1): binman: doc: fix typo Heinrich Schuchardt (11): acpi: move acpi_get_rsdp_addr() to acpi/acpi_table.h acpi: cannot have RSDT above 4 GiB acpi: simplify acpi_write_ssdt() acpi: consider XSDT in acpi_find_table() test: unit test for acpi_find_table() acpi: fix struct acpi_xsdt cmd: acpi: fix acpi list command cmd: check argc for acpi dump binman: elf: Using variable 'old_val' before assignment test: fit: Using variable 'old_dtb' before assignment test: vboot: Using variable 'old_dtb' before assignment Ilias Apalodimas (1): bootstd: Fix a memory leak in the efi manager bootflow Neha Malcom Francis (3): binman: etype: dm: Add entry type for TI DM arm: dts: k3-*-binman: Move to using ti-dm entry type doc: board: ti: k3: Mention TI_DM argument Simon Glass (28): test: Add a new suite for commands test: Add helper to skip to partial console line test: Make UT_LIB_ASN1 depend on sandbox test: Run bootstd tests only on sandbox test: Handle use of stack pointer in bdinfo test: bdinfo: Add missing asserts test: fdt: Add a special case for real boards test: font: Add dependencies on fonts test: event: Only run test_event_probe() on sandbox test: lmb: Move tests into the lib suite test: print: Skip test on x86 video: Add a function to clear the display sandbox: Add a dummy booti command bootstd: Add a menu option to bootflow scan boot: Drop size parameter from image_setup_libfdt() fdt: Check for a valid fdt in oftree_ensure() fdt: Improve the comment for fdt_shrink_to_minimum() fdt: ppc: Drop extra size for ramdisk boot: Move adding initrd earlier in image_setup_libfdt() fdt: Drop the confusing casts in lmb_free() fdt: Move ft_verify_fdt() before the final fixups doc: Update documentation URL u_boot_pylib: Correct readme formatting tools: Keep test_util and patman test files in the pip release u_boot_pylib: Correct files used for pip release tools/make_pip: Add mention of u_boot_pylib in tool list patman: Update the run script tools: Move python tools to version 0.0.6 MAINTAINERS | 2 +- Makefile | 1 + README | 2 +- arch/arm/dts/k3-am625-sk-binman.dtsi | 4 +- arch/arm/dts/k3-am625-verdin-wifi-dev-binman.dtsi | 4 +- arch/arm/dts/k3-am62a-sk-binman.dtsi | 4 +- arch/arm/dts/k3-j7200-binman.dtsi | 4 +- arch/arm/dts/k3-j721e-binman.dtsi | 4 +- arch/arm/dts/k3-j721s2-binman.dtsi | 4 +- arch/mips/lib/bootm.c | 4 +- arch/sandbox/lib/bootm.c | 7 +++ arch/x86/include/asm/acpi_table.h | 9 ---- boot/bootmeth_efi_mgr.c | 2 + boot/fdt_support.c | 1 - boot/image-board.c | 2 +- boot/image-fdt.c | 27 ++++++------ cmd/Kconfig | 2 +- cmd/acpi.c | 67 ++++++++++++++++------------- cmd/bootefi.c | 2 +- cmd/bootflow.c | 27 ++++++++++-- cmd/booti.c | 2 +- cmd/cls.c | 25 ++--------- common/console.c | 31 ++++++++++++++ configs/tools-only_defconfig | 1 + doc/board/ti/k3.rst | 7 +++ doc/build/documentation.rst | 2 +- doc/usage/cmd/bootflow.rst | 5 +++ drivers/core/ofnode.c | 5 +++ drivers/misc/qfw.c | 1 + include/acpi/acpi_table.h | 11 ++++- include/console.h | 10 +++++ include/fdt_support.h | 24 ++++++++++- include/image.h | 3 +- include/test/cmd.h | 15 +++++++ include/test/suites.h | 1 + include/test/ut.h | 30 +++++++++++++ lib/acpi/acpi.c | 20 +++++++-- lib/acpi/base.c | 23 +++++++--- lib/acpi/ssdt.c | 3 +- lib/efi_loader/efi_dt_fixup.c | 2 +- scripts/make_pip.sh | 14 +++++- test/Kconfig | 6 +++ test/Makefile | 2 +- test/boot/bootflow.c | 82 ++++++++++++++++++++++++++++++++++++ test/cmd/Makefile | 2 + test/cmd/bdinfo.c | 23 ++++++++-- test/cmd/cmd_ut_cmd.c | 21 +++++++++ test/cmd/fdt.c | 8 +++- test/cmd/font.c | 6 ++- test/cmd_ut.c | 8 +++- test/common/event.c | 3 ++ test/dm/acpi.c | 124 ++++++++++++++++++++++++++++++++++++++++++++++++++---- test/lib/lmb.c | 36 ++++++---------- test/print_ut.c | 8 ++++ test/py/tests/test_fit.py | 6 +-- test/py/tests/test_vboot.py | 6 +-- test/ut.c | 27 ++++++++++++ tools/binman/binman.rst | 2 +- tools/binman/elf_test.py | 8 ++-- tools/binman/entries.rst | 14 ++++++ tools/binman/etype/ti_dm.py | 22 ++++++++++ tools/binman/ftest.py | 7 +++ tools/binman/pyproject.toml | 6 +-- tools/binman/test/225_ti_dm.dts | 13 ++++++ tools/buildman/pyproject.toml | 6 +-- tools/dtoc/pyproject.toml | 6 +-- tools/patman/pyproject.toml | 8 ++-- tools/u_boot_pylib/README.rst | 2 +- tools/u_boot_pylib/pyproject.toml | 9 ++-- 69 files changed, 691 insertions(+), 194 deletions(-) create mode 100644 include/test/cmd.h create mode 100644 test/cmd/cmd_ut_cmd.c create mode 100644 tools/binman/etype/ti_dm.py create mode 100644 tools/binman/test/225_ti_dm.dts Regards, Simon

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