October 2023 - U-Boot

[PATCH] Makefile: make u-boot-initial-env target depend explicitly on scripts_basic
by Rasmus Villemoes 11 Oct '23

11 Oct '23

We're seeing sporadic errors like ENVC include/generated/env.txt HOSTCC scripts/basic/fixdep ENVP include/generated/env.in ENVT include/generated/environment.h HOSTCC tools/printinitialenv /bin/sh: 1: scripts/basic/fixdep: not found make[1]: *** [scripts/Makefile.host:95: tools/printinitialenv] Error 127 make[1]: *** Deleting file 'tools/printinitialenv' make: *** [Makefile:2446: u-boot-initial-env] Error 2 make: *** Waiting for unfinished jobs.... where sometimes the "fixdep: not found" is instead "fixdep: Permission denied" and the Error 127 becomes 126. This smells like a race condition, and indeed it is: Currently, u-boot-initial-env is a prerequisite of the envtools target, which also lists scripts_basic as a prerequisite: envtools: u-boot-initial-env scripts_basic $(version_h) $(timestamp_h) tools/version.h $(Q)$(MAKE) $(build)=tools/env However, the u-boot-initial-env rule involves building the printinitialenv helper, which in turn is built using an if_changed_dep rule. That means we must ensure scripts/basic/fixdep is built and ready before trying to build printinitialenv, i.e. the u-boot-initial-env rule itself must depend on the phony scripts_basic target. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 8af1fa9468..069c03696a 100644 --- a/Makefile +++ b/Makefile @@ -2447,7 +2447,7 @@ cmd_genenv = \ sed -e '/^\s*$$/d' | \ sort -t '=' -k 1,1 -s -o $@ -u-boot-initial-env: $(env_h) FORCE +u-boot-initial-env: scripts_basic $(env_h) FORCE $(Q)$(MAKE) $(build)=tools $(objtree)/tools/printinitialenv $(call if_changed,genenv) -- 2.40.1.1.g1c60b9335d

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[PATCH v3 1/1] input: avoid NULL dereference
by Heinrich Schuchardt 11 Oct '23

11 Oct '23

Before using the result of env_get("stdin") we must check if it is NULL. Avoid #if. This resolves the -Wunused-but-set-variable issue and we don't need a dummy assignment in the else branch. Anyway this warning is disabled in the Makefile. For sake of readability use an early return after the configuration check. Checking CONFIG_SPL_BUILD is incorrect as env_get() is only defined if CONFIG_$(SPL_TPL)ENV_SUPPORT=y. Fixes: 985ca3945fa3 ("spl: input: Allow input in SPL and TPL") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- v2: avoid #if v3: use an early return after configuration check remove CONFIG_SPL_BUILD check --- drivers/input/input.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/drivers/input/input.c b/drivers/input/input.c index a4341e8c7c..743ba89f77 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c @@ -669,17 +669,22 @@ int input_stdio_register(struct stdio_dev *dev) int error; error = stdio_register(dev); -#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(ENV_SUPPORT) - /* check if this is the standard input device */ - if (!error && strcmp(env_get("stdin"), dev->name) == 0) { - /* reassign the console */ - if (OVERWRITE_CONSOLE || - console_assign(stdin, dev->name)) - return -1; + + if (!CONFIG_IS_ENABLED(ENV_SUPPORT)) + return 0; + + if (!error) { + const char *cstdin; + + /* check if this is the standard input device */ + cstdin = env_get("stdin"); + if (cstdin && !strcmp(cstdin, dev->name)) { + /* reassign the console */ + if (OVERWRITE_CONSOLE || + console_assign(stdin, dev->name)) + return -1; + } } -#else - error = error; -#endif return 0; } -- 2.40.1

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[PATCH] ARM: psci: move GIC address override to Kconfig
by Andre Przywara 11 Oct '23

11 Oct '23

As the code to switch an ARM core from secure to the non-secure state needs to know the base address of the Generic Interrupt Controller (GIC), we read an Arm Cortex defined system register that is supposed to hold that base address. However there are SoCs out there that get this wrong, and this CBAR register either reads as 0 or points to the wrong address. To accommodate those systems, so far we use a macro defined in some platform specific header files, for affected boards. To simplify future extensions, replace that macro with a Kconfig variable that holds this override address, and define a default value for SoCs that need it. Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> --- Hi, this only affects the Arndale board so far, though actually the defconfig doesn't enable the non-secure and PSCI code. I keep it anyway since people could manually enable it, and we need the code for the new Allwinner T113s SoC [1]. Cheers, Andre [1] https://lore.kernel.org/u-boot/20230930183424.806520-1-CFSworks@gmail.com/T… arch/arm/cpu/armv7/Kconfig | 10 ++++++++++ arch/arm/cpu/armv7/nonsec_virt.S | 4 ++-- arch/arm/cpu/armv7/virt-v7.c | 4 ++-- include/configs/arndale.h | 3 --- 4 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index ccc2f208677..f015d133cb0 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -58,6 +58,16 @@ config ARMV7_SECURE_MAX_SIZE default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3 default 0x10000 +config ARM_GIC_BASE_ADDRESS + hex + depends on ARMV7_NONSEC + depends on ARCH_EXYNOS5 + default 0x10480000 if ARCH_EXYNOS5 + help + Override the GIC base address if the Arm Cortex defined + CBAR/PERIPHBASE system register holds the wrong value. + Used by the PSCI code to configure the secure side of the GIC. + config ARMV7_VIRT bool "Enable support for hardware virtualization" if EXPERT depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 9004074da2c..bed40fa3d99 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -112,8 +112,8 @@ ENTRY(_do_nonsec_entry) ENDPROC(_do_nonsec_entry) .macro get_cbar_addr addr -#ifdef CFG_ARM_GIC_BASE_ADDRESS - ldr \addr, =CFG_ARM_GIC_BASE_ADDRESS +#ifdef CONFIG_ARM_GIC_BASE_ADDRESS + ldr \addr, =CONFIG_ARM_GIC_BASE_ADDRESS #else mrc p15, 4, \addr, c15, c0, 0 @ read CBAR bfc \addr, #0, #15 @ clear reserved bits diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c index c82b215b6f9..5ffeca13d91 100644 --- a/arch/arm/cpu/armv7/virt-v7.c +++ b/arch/arm/cpu/armv7/virt-v7.c @@ -26,8 +26,8 @@ static unsigned int read_id_pfr1(void) static unsigned long get_gicd_base_address(void) { -#ifdef CFG_ARM_GIC_BASE_ADDRESS - return CFG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET; +#ifdef CONFIG_ARM_GIC_BASE_ADDRESS + return CONFIG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET; #else unsigned periphbase; diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b56effcd411..fa642564f4b 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -18,7 +18,4 @@ #define CFG_SMP_PEN_ADDR 0x02020000 -/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ -#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000 - #endif /* __CONFIG_H */ -- 2.35.8

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[PATCH] misc: fs_loader: Fix alignment of fs_loader driver
by Sean Anderson 11 Oct '23

11 Oct '23

DM_DRIVER_GET will redeclare the fs_loader driver without the correct alignment. This causes GCC to use the default section alignment of 32 bytes. This in turn creates a gap in the linker list due to the padding required to achieve the correct alignment, corrupting all further entries. Use DM_DRIVER_REF instead, which doesn't redeclare anything. Fixes: 0998a20cfc6 ("misc: fs_loader: Add function to get the chosen loader") Signed-off-by: Sean Anderson <seanga2(a)gmail.com> --- drivers/misc/fs_loader.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/misc/fs_loader.c b/drivers/misc/fs_loader.c index ccf5c7a8037..1ffc199ba1e 100644 --- a/drivers/misc/fs_loader.c +++ b/drivers/misc/fs_loader.c @@ -316,7 +316,7 @@ int get_fs_loader(struct udevice **dev) return ret; /* Just create a new device */ - ret = device_bind(dm_root(), DM_DRIVER_GET(fs_loader), "default-loader", + ret = device_bind(dm_root(), DM_DRIVER_REF(fs_loader), "default-loader", &default_plat, ofnode_null(), dev); if (ret) return ret; -- 2.37.1

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[PATCH 1/2] riscv: cpu: Rename EVENT_SPY to EVENT_SPY_SIMPLE
by Marek Vasut 11 Oct '23

11 Oct '23

Fix up cpu.c and align it with commit 6c4cad7438 ("event: Rename EVENT_SPY to EVENT_SPY_FULL") Signed-off-by: Marek Vasut <marek.vasut+renesas(a)mailbox.org> --- Cc: Chanho Park <chanho61.park(a)samsung.com> Cc: Leo <ycliang(a)andestech.com> Cc: Nikita Shubin <n.shubin(a)yadro.com> Cc: Padmarao Begari <padmarao.begari(a)microchip.com> Cc: Rick Chen <rick(a)andestech.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Yu Chien Peter Lin <peterlin(a)andestech.com> --- arch/riscv/cpu/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index d64aa330f20..15beec29875 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -66,7 +66,7 @@ static inline bool supports_extension(char ext) #endif /* CONFIG_CPU */ } -static int riscv_cpu_probe(void *ctx, struct event *event) +static int riscv_cpu_probe(void) { #ifdef CONFIG_CPU int ret; @@ -79,7 +79,7 @@ static int riscv_cpu_probe(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT_R, riscv_cpu_probe); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, riscv_cpu_probe); /* * This is called on secondary harts just after the IPI is init'd. Currently @@ -96,7 +96,7 @@ int riscv_cpu_setup(void) { int ret; - ret = riscv_cpu_probe(ctx, event); + ret = riscv_cpu_probe(); if (ret) return ret; -- 2.40.1

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[PATCH] env: Improve ENV_OFFSET help message
by Paul Barker 11 Oct '23

11 Oct '23

When reading Kconfig help messages to understand ENV_OFFSET and ENV_OFFSET_REDUND, developers may not realise that they need to also look at the chosen ENV_IS_IN_* options to see how the offsets will be interpreted. Signed-off-by: Paul Barker <paul.barker.ct(a)bp.renesas.com> --- env/Kconfig | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/env/Kconfig b/env/Kconfig index 13e32104b4c1..66a918c6fe5f 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -576,7 +576,12 @@ config ENV_OFFSET default 0x260000 if ARCH_OMAP2PLUS default 0x1080000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH help - Offset from the start of the device (or partition) + Offset from the start of the device (or partition). + + This offset may be interpreted differently depending on the chosen + ENV_IS_IN_* options. For example, for ENV_IS_IN_MMC=y, this offset may + be negative to indicate an offset backwards from the end of the + partition. See the relevant help messages for more details. config ENV_OFFSET_REDUND hex "Redundant environment offset" @@ -588,6 +593,11 @@ config ENV_OFFSET_REDUND Offset from the start of the device (or partition) of the redundant environment location. + This offset may be interpreted differently depending on the chosen + ENV_IS_IN_* options. For example, for ENV_IS_IN_MMC=y, this offset may + be negative to indicate an offset backwards from the end of the + partition. See the relevant help messages for more details. + config ENV_SIZE hex "Environment Size" default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP -- 2.34.1

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[PATCH] driver: rng: Add DM_RNG interface for ARMv8.5 RNDR registers
by Andre Przywara 11 Oct '23

11 Oct '23

The ARMv8.5 architecture extension defines architectural RNDR/RNDRRS system registers, that provide 64 bits worth of randomness on every read. Since it's an extension, and implementing it is optional, there is a field in the ID_AA64ISAR0_EL1 ID register to query the availability of those registers. Add a UCLASS_RNG driver that returns entropy via repeated reads from those system registers, if the extension is implemented. The driver always binds, but checks the availability in the probe() routine. This helps systems which suffer from low boot entropy, since U-Boot can provide entropy via the generic UEFI entropy gathering protocol to the OS, at an early stage. Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> --- Hi Simon, not sure if this is the expected way to model a driver which autodetects its device at runtime. It somewhat works, but always lists the bound device, even if the registers are not supported. If I do the check in bind instead, it fails booting when this returns -ENODEV, since it expects the fixed device to always bind successfully, I guess? Is there any other way of modeling this? And before you say your favourite two letters: this is not a DT job, since it can be safely auto-detected in an architectural way. Thanks, Andre arch/arm/include/asm/system.h | 1 + drivers/rng/Kconfig | 6 +++ drivers/rng/Makefile | 1 + drivers/rng/arm_rndr.c | 82 +++++++++++++++++++++++++++++++++++ 4 files changed, 90 insertions(+) create mode 100644 drivers/rng/arm_rndr.c diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 87d1c77e8b1..0eae857e73a 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -84,6 +84,7 @@ #define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */ #define HCR_EL2_AMO_EL2 (1 << 5) /* Route SErrors to EL2 */ +#define ID_AA64ISAR0_EL1_RNDR (0xFUL << 60) /* RNDR random registers */ /* * ID_AA64ISAR1_EL1 bits definitions */ diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index 5deb5db5b71..72788d479cc 100644 --- a/drivers/rng/Kconfig +++ b/drivers/rng/Kconfig @@ -76,6 +76,12 @@ config RNG_SMCCC_TRNG Enable random number generator for platforms that support Arm SMCCC TRNG interface. +config RNG_ARM_RNDR + bool "Generic ARMv8.5 RNDR register" + depends on DM_RNG && ARM64 + help + Use the ARMv8.5 RNDR register to provide random numbers. + config TPM_RNG bool "Enable random number generator on TPM device" depends on TPM diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile index 78f61051acf..572fa7a0c66 100644 --- a/drivers/rng/Makefile +++ b/drivers/rng/Makefile @@ -13,4 +13,5 @@ obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o +obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o obj-$(CONFIG_TPM_RNG) += tpm_rng.o diff --git a/drivers/rng/arm_rndr.c b/drivers/rng/arm_rndr.c new file mode 100644 index 00000000000..55989743eae --- /dev/null +++ b/drivers/rng/arm_rndr.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023, Arm Ltd. + * + * Use the (optional) ARMv8.5 RNDR register to provide random numbers to + * U-Boot's UCLASS_RNG users. + * Detection is done at runtime using the CPU ID registers. + */ + +#define LOG_CATEGORY UCLASS_RNG + +#include <common.h> +#include <dm.h> +#include <linux/kernel.h> +#include <rng.h> +#include <asm/system.h> + +#define DRIVER_NAME "arm-rndr" + +static bool cpu_has_rndr(void) +{ + uint64_t reg; + + __asm__ volatile("mrs %0, ID_AA64ISAR0_EL1\n" : "=r" (reg)); + return !!(reg & ID_AA64ISAR0_EL1_RNDR); +} + +/* + * The system register name is RNDR, but this isn't widely known among older + * toolchains, and also triggers errors because of it being an architecture + * extension. Since we check the availability of the register before, it's + * fine to use here, though. + */ +#define RNDR "S3_3_C2_C4_0" + +static uint64_t read_rndr(void) +{ + uint64_t reg; + + __asm__ volatile("mrs %0, " RNDR "\n" : "=r" (reg)); + + return reg; +} + +static int arm_rndr_read(struct udevice *dev, void *data, size_t len) +{ + uint64_t random; + + while (len) { + int tocopy = min(sizeof(uint64_t), len); + + random = read_rndr(); + memcpy(data, &random, tocopy); + len -= tocopy; + data += tocopy; + } + + return 0; +} + +static const struct dm_rng_ops arm_rndr_ops = { + .read = arm_rndr_read, +}; + +static int arm_rndr_probe(struct udevice *dev) +{ + if (!cpu_has_rndr()) + return -ENODEV; + + return 0; +} + +U_BOOT_DRIVER(arm_rndr) = { + .name = DRIVER_NAME, + .id = UCLASS_RNG, + .ops = &arm_rndr_ops, + .probe = arm_rndr_probe, +}; + +U_BOOT_DRVINFO(cpu_arm_rndr) = { + .name = DRIVER_NAME, +}; -- 2.25.1

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[PATCH] bootstd: Drop some TODOs
by Simon Glass 11 Oct '23

11 Oct '23

The existing TODOs are done, so remove them. Add another that came up today. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- doc/develop/bootstd.rst | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/doc/develop/bootstd.rst b/doc/develop/bootstd.rst index ec3136535783..3e566e994d6c 100644 --- a/doc/develop/bootstd.rst +++ b/doc/develop/bootstd.rst @@ -752,9 +752,7 @@ To do Some things that need to be done to completely replace the distro-boot scripts: -- add bootdev drivers for dhcp, sata, scsi, ide, virtio -- PXE boot for EFI -- support for loading U-Boot scripts +- implement extensions (devicetree overlays with add-on boards) Other ideas: -- 2.42.0.rc1.204.g551eb34607-goog

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[PATCH] spi: mtk_spim: prevent global pll clock override
by Nicolò Veronese 11 Oct '23

11 Oct '23

With commit 793e6230118032a099ec42a1ea67f434721edcc0 a new system to calculate the SPI clocks has been added. Unfortunately, the do_div macro overrides the global priv->pll_clk_rate field. This will cause to have a reduced clock rate on each subsequent SPI call. Signed-off-by: Valerio 'ftp21' Mancini <ftp21(a)ftp21.eu> Signed-off-by: Nicolò Veronese <nicveronese(a)gmail.com> --- drivers/spi/mtk_spim.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/spi/mtk_spim.c b/drivers/spi/mtk_spim.c index 418e586b91..90f4c3cecb 100644 --- a/drivers/spi/mtk_spim.c +++ b/drivers/spi/mtk_spim.c @@ -409,7 +409,7 @@ static int mtk_spim_transfer_wait(struct spi_slave *slave, { struct udevice *bus = dev_get_parent(slave->dev); struct mtk_spim_priv *priv = dev_get_priv(bus); - u32 sck_l, sck_h, clk_count, reg; + u32 pll_clk, sck_l, sck_h, clk_count, reg; ulong us = 1; int ret = 0; @@ -418,11 +418,12 @@ static int mtk_spim_transfer_wait(struct spi_slave *slave, else clk_count = op->data.nbytes; + pll_clk = priv->pll_clk_rate; sck_l = readl(priv->base + SPI_CFG2_REG) >> SPI_CFG2_SCK_LOW_OFFSET; sck_h = readl(priv->base + SPI_CFG2_REG) & SPI_CFG2_SCK_HIGH_MASK; - do_div(priv->pll_clk_rate, sck_l + sck_h + 2); + do_div(pll_clk, sck_l + sck_h + 2); - us = CLK_TO_US(priv->pll_clk_rate, clk_count * 8); + us = CLK_TO_US(pll_clk, clk_count * 8); us += 1000 * 1000; /* 1s tolerance */ if (us > UINT_MAX) -- 2.30.2

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[PATCH v1 0/1] virtio-blk support for xen board
by Andrii Chepurnyi 11 Oct '23

11 Oct '23

Hello. This patch adds the ability to use virtio-blk in the guest domain under Xen hypervisor. To do such you need to build U-boot with xenguest_arm64_virtio_defconfig. The patch was tested on a specific build for rcar-gen3 hardware, with multiple Linux domains running under Xen and QEMU as a block backend. Andrii Chepurnyi (1): board: xen: introduce virtio-blk support board/xen/xenguest_arm64/xenguest_arm64.c | 108 +++++++++++++++++++++- configs/xenguest_arm64_virtio_defconfig | 63 +++++++++++++ doc/board/xen/xenguest_arm64.rst | 2 + include/configs/xenguest_arm64.h | 10 +- 4 files changed, 180 insertions(+), 3 deletions(-) create mode 100644 configs/xenguest_arm64_virtio_defconfig -- 2.25.1

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