January 2023 - U-Boot

[PATCH 1/3] ARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file
by Patrick Delaunay 12 Jan '23

12 Jan '23

The include file stm32mp1-clksrc.h is not necessary for the SCMI STM32MP15 dtsi files as the clock tree is not defined in the U-Boot SCMI device tree; these SCMI device tree only support TFABOOT with stm32mp15_defconfig, SPL with the basic boot defconfig is not supported. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi | 1 - arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi | 1 - 2 files changed, 2 deletions(-) diff --git a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi index 1209dfe009c9..92fdf0987200 100644 --- a/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-scmi-u-boot.dtsi @@ -3,7 +3,6 @@ * Copyright : STMicroelectronics 2022 */ -#include <dt-bindings/clock/stm32mp1-clksrc.h> #include "stm32mp15-scmi-u-boot.dtsi" / { diff --git a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi index c265745ff107..63948ef4930e 100644 --- a/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-scmi-u-boot.dtsi @@ -3,7 +3,6 @@ * Copyright : STMicroelectronics 2022 */ -#include <dt-bindings/clock/stm32mp1-clksrc.h> #include "stm32mp15-scmi-u-boot.dtsi" / { -- 2.25.1

2 8

[PATCH] adc: stm32mp15: add calibration support
by Olivier Moysan 12 Jan '23

12 Jan '23

Add support of offset and linear calibration for STM32MP15. The calibration is performed once at probe. The ADC is set in power on state for calibration. It remains in this state after calibration, to give to the kernel the opportunity to retrieve calibration data, directly from the ADC. Signed-off-by: Olivier Moysan <olivier.moysan(a)foss.st.com> --- drivers/adc/stm32-adc.c | 134 ++++++++++++++++++++++++++++++++++------ 1 file changed, 116 insertions(+), 18 deletions(-) diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c index 85efc119dbf1..1fba707c6f7d 100644 --- a/drivers/adc/stm32-adc.c +++ b/drivers/adc/stm32-adc.c @@ -33,8 +33,11 @@ #define STM32H7_ADRDY BIT(0) /* STM32H7_ADC_CR - bit fields */ +#define STM32H7_ADCAL BIT(31) +#define STM32H7_ADCALDIF BIT(30) #define STM32H7_DEEPPWD BIT(29) #define STM32H7_ADVREGEN BIT(28) +#define STM32H7_ADCALLIN BIT(16) #define STM32H7_BOOST BIT(8) #define STM32H7_ADSTART BIT(2) #define STM32H7_ADDIS BIT(1) @@ -65,47 +68,72 @@ struct stm32_adc { const struct stm32_adc_cfg *cfg; }; -static int stm32_adc_stop(struct udevice *dev) +static void stm32_adc_enter_pwr_down(struct udevice *dev) { struct stm32_adc *adc = dev_get_priv(dev); - setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADDIS); clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_BOOST); /* Setting DEEPPWD disables ADC vreg and clears ADVREGEN */ setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_DEEPPWD); - adc->active_channel = -1; - - return 0; } -static int stm32_adc_start_channel(struct udevice *dev, int channel) +static int stm32_adc_exit_pwr_down(struct udevice *dev) { - struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); struct stm32_adc_common *common = dev_get_priv(dev_get_parent(dev)); struct stm32_adc *adc = dev_get_priv(dev); int ret; u32 val; + /* return immediately if ADC is not in deep power down mode */ + if (!(readl(adc->regs + STM32H7_ADC_CR) & STM32H7_DEEPPWD)) + return 0; + /* Exit deep power down, then enable ADC voltage regulator */ clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_DEEPPWD); setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADVREGEN); + if (common->rate > STM32H7_BOOST_CLKRATE) setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_BOOST); /* Wait for startup time */ if (!adc->cfg->has_vregready) { udelay(20); - } else { - ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, - val & STM32MP1_VREGREADY, - STM32_ADC_TIMEOUT_US); - if (ret < 0) { - stm32_adc_stop(dev); - dev_err(dev, "Failed to enable vreg: %d\n", ret); - return ret; - } + return 0; + } + + ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, + val & STM32MP1_VREGREADY, + STM32_ADC_TIMEOUT_US); + if (ret < 0) { + stm32_adc_enter_pwr_down(dev); + dev_err(dev, "Failed to enable vreg: %d\n", ret); } + return ret; +} + +static int stm32_adc_stop(struct udevice *dev) +{ + struct stm32_adc *adc = dev_get_priv(dev); + + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADDIS); + stm32_adc_enter_pwr_down(dev); + adc->active_channel = -1; + + return 0; +} + +static int stm32_adc_start_channel(struct udevice *dev, int channel) +{ + struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); + struct stm32_adc *adc = dev_get_priv(dev); + int ret; + u32 val; + + ret = stm32_adc_exit_pwr_down(dev); + if (ret < 0) + return ret; + /* Only use single ended channels */ writel(0, adc->regs + STM32H7_ADC_DIFSEL); @@ -162,6 +190,64 @@ static int stm32_adc_channel_data(struct udevice *dev, int channel, return 0; } +/** + * Fixed timeout value for ADC calibration. + * worst cases: + * - low clock frequency (0.12 MHz min) + * - maximum prescalers + * Calibration requires: + * - 16384 ADC clock cycle for the linear calibration + * - 20 ADC clock cycle for the offset calibration + * + * Set to 100ms for now + */ +#define STM32H7_ADC_CALIB_TIMEOUT_US 100000 + +static int stm32_adc_selfcalib(struct udevice *dev) +{ + struct stm32_adc *adc = dev_get_priv(dev); + int ret; + u32 val; + + /* + * Select calibration mode: + * - Offset calibration for single ended inputs + * - No linearity calibration. Done in next step. + */ + clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADCALDIF | STM32H7_ADCALLIN); + + /* Start calibration, then wait for completion */ + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADCAL); + ret = readl_poll_sleep_timeout(adc->regs + STM32H7_ADC_CR, val, + !(val & STM32H7_ADCAL), 100, + STM32H7_ADC_CALIB_TIMEOUT_US); + if (ret) { + dev_err(dev, "calibration failed\n"); + goto out; + } + + /* + * Select calibration mode, then start calibration: + * - Offset calibration for differential input + * - Linearity calibration (needs to be done only once for single/diff) + * will run simultaneously with offset calibration. + */ + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADCALDIF | STM32H7_ADCALLIN); + + /* Start calibration, then wait for completion */ + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADCAL); + ret = readl_poll_sleep_timeout(adc->regs + STM32H7_ADC_CR, val, + !(val & STM32H7_ADCAL), 100, + STM32H7_ADC_CALIB_TIMEOUT_US); + if (ret) + dev_err(dev, "calibration failed\n"); + +out: + clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADCALDIF | STM32H7_ADCALLIN); + + return ret; +} + static int stm32_adc_get_legacy_chan_count(struct udevice *dev) { int ret; @@ -272,7 +358,7 @@ static int stm32_adc_probe(struct udevice *dev) struct adc_uclass_plat *uc_pdata = dev_get_uclass_plat(dev); struct stm32_adc_common *common = dev_get_priv(dev_get_parent(dev)); struct stm32_adc *adc = dev_get_priv(dev); - int offset; + int offset, ret; offset = dev_read_u32_default(dev, "reg", -ENODATA); if (offset < 0) { @@ -287,7 +373,19 @@ static int stm32_adc_probe(struct udevice *dev) uc_pdata->vdd_microvolts = common->vref_uv; uc_pdata->vss_microvolts = 0; - return stm32_adc_chan_of_init(dev); + ret = stm32_adc_chan_of_init(dev); + if (ret < 0) + return ret; + + ret = stm32_adc_exit_pwr_down(dev); + if (ret < 0) + return ret; + + ret = stm32_adc_selfcalib(dev); + if (ret) + stm32_adc_enter_pwr_down(dev); + + return ret; } static const struct adc_ops stm32_adc_ops = { -- 2.25.1

3 3

[PATCH] Use `grep -E` or plain `grep` instead of `egrep`
by Ville Skyttä 12 Jan '23

12 Jan '23

`egrep` has been deprecated in GNU grep since 2007, and since 3.8 it emits obsolescence warnings: https://git.savannah.gnu.org/cgit/grep.git/commit/?id=a9515624709865d480e31… --- arch/arm/mach-socfpga/qts-filter-a10.sh | 16 ++++++++-------- arch/arm/mach-socfpga/qts-filter.sh | 2 +- doc/board/intel/edison.rst | 2 +- scripts/build-whitelist.sh | 2 +- scripts/coccicheck | 2 +- test/fs/fs-test.sh | 10 +++++----- 6 files changed, 17 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-socfpga/qts-filter-a10.sh b/arch/arm/mach-socfpga/qts-filter-a10.sh index 57d77e8e12..ab16522add 100755 --- a/arch/arm/mach-socfpga/qts-filter-a10.sh +++ b/arch/arm/mach-socfpga/qts-filter-a10.sh @@ -10,7 +10,7 @@ fix_newlines_in_macros() { #filter out only what we need from a10 hps.xml grep_a10_hps_config() { - egrep "clk_hz|i_clk_mgr|i_io48_pin_mux|AXI_SLAVE|AXI_MASTER" + grep -E "clk_hz|i_clk_mgr|i_io48_pin_mux|AXI_SLAVE|AXI_MASTER" } # @@ -35,35 +35,35 @@ EOF echo "/* Clocks */" fix_newlines_in_macros \ - ${hps_xml} | egrep "clk_hz" | + ${hps_xml} | grep "clk_hz" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/\.[0-9]//' | sed 's/I_CLK_MGR_//' | sort fix_newlines_in_macros \ - ${hps_xml} | egrep "i_clk_mgr_mainpll" | + ${hps_xml} | grep "i_clk_mgr_mainpll" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/\.[0-9]//' | sed 's/I_CLK_MGR_//' | sort fix_newlines_in_macros \ - ${hps_xml} | egrep "i_clk_mgr_perpll" | + ${hps_xml} | grep "i_clk_mgr_perpll" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/\.[0-9]//' | sed 's/I_CLK_MGR_//' | sort fix_newlines_in_macros \ - ${hps_xml} | egrep "i_clk_mgr_clkmgr" | + ${hps_xml} | grep "i_clk_mgr_clkmgr" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/\.[0-9]//' | sed 's/I_CLK_MGR_//' | sort fix_newlines_in_macros \ - ${hps_xml} | egrep "i_clk_mgr_alteragrp" | + ${hps_xml} | grep "i_clk_mgr_alteragrp" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/\.[0-9]//' | @@ -77,7 +77,7 @@ EOF echo echo "/* Pin Mux Configuration */" fix_newlines_in_macros \ - ${hps_xml} | egrep "i_io48_pin_mux" | + ${hps_xml} | grep "i_io48_pin_mux" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/I_IO48_PIN_MUX_//' | @@ -90,7 +90,7 @@ EOF echo echo "/* Bridge Configuration */" fix_newlines_in_macros \ - ${hps_xml} | egrep "AXI_SLAVE|AXI_MASTER" | + ${hps_xml} | grep -E "AXI_SLAVE|AXI_MASTER" | awk -F"'" '{ gsub("\\.","_",$2) ; \ print "#define" " " toupper($2) " " $4}' | sed 's/true/1/' | diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh index 6416252d4e..1610c89a48 100755 --- a/arch/arm/mach-socfpga/qts-filter.sh +++ b/arch/arm/mach-socfpga/qts-filter.sh @@ -128,7 +128,7 @@ EOF # Filter out only the macros which are actually used by the code # grep_sdram_config() { - egrep "#define (CFG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE|CFG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL|CFG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER|CFG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT|CFG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT|CFG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT|CFG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES|CFG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES|CFG_HPS_SDR_CTRLCFG_DRAMODT_READ|CFG_HPS_SDR_CTRLCFG_DRAMODT_WRITE|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS|CFG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH|CFG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH|CFG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN|CFG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK|CFG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL|CFG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA|CFG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH|CFG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH|CFG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP|CFG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP|CFG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP|CFG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP|CFG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR|CFG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN|CFG_HPS_SDR_CTRLCFG_FPGAPORTRST|CFG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE|CFG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC|CFG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46|CFG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0|CFG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0|CFG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32|CFG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0|CFG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4|CFG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36|CFG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0|CFG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32|CFG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64|RW_MGR_ACTIVATE_0_AND_1|RW_MGR_ACTIVATE_0_AND_1_WAIT1|RW_MGR_ACTIVATE_0_AND_1_WAIT2|RW_MGR_ACTIVATE_1|RW_MGR_CLEAR_DQS_ENABLE|RW_MGR_EMR_OCD_ENABLE|RW_MGR_EMR|RW_MGR_EMR2|RW_MGR_EMR3|RW_MGR_GUARANTEED_READ|RW_MGR_GUARANTEED_READ_CONT|RW_MGR_GUARANTEED_WRITE|RW_MGR_GUARANTEED_WRITE_WAIT0|RW_MGR_GUARANTEED_WRITE_WAIT1|RW_MGR_GUARANTEED_WRITE_WAIT2|RW_MGR_GUARANTEED_WRITE_WAIT3|RW_MGR_IDLE|RW_MGR_IDLE_LOOP1|RW_MGR_IDLE_LOOP2|RW_MGR_INIT_RESET_0_CKE_0|RW_MGR_INIT_RESET_1_CKE_0|RW_MGR_INIT_CKE_0|RW_MGR_LFSR_WR_RD_BANK_0|RW_MGR_LFSR_WR_RD_BANK_0_DATA|RW_MGR_LFSR_WR_RD_BANK_0_DQS|RW_MGR_LFSR_WR_RD_BANK_0_NOP|RW_MGR_LFSR_WR_RD_BANK_0_WAIT|RW_MGR_LFSR_WR_RD_BANK_0_WL_1|RW_MGR_LFSR_WR_RD_DM_BANK_0|RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA|RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS|RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP|RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT|RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1|RW_MGR_MR_CALIB|RW_MGR_MR_USER|RW_MGR_MR_DLL_RESET|RW_MGR_MRS0_DLL_RESET|RW_MGR_MRS0_DLL_RESET_MIRR|RW_MGR_MRS0_USER|RW_MGR_MRS0_USER_MIRR|RW_MGR_MRS1|RW_MGR_MRS1_MIRR|RW_MGR_MRS2|RW_MGR_MRS2_MIRR|RW_MGR_MRS3|RW_MGR_MRS3_MIRR|RW_MGR_NOP|RW_MGR_PRECHARGE_ALL|RW_MGR_READ_B2B|RW_MGR_READ_B2B_WAIT1|RW_MGR_READ_B2B_WAIT2|RW_MGR_REFRESH|RW_MGR_REFRESH_ALL|RW_MGR_RETURN|RW_MGR_SGLE_READ|RW_MGR_ZQCL|RW_MGR_TRUE_MEM_DATA_MASK_WIDTH|RW_MGR_MEM_ADDRESS_MIRRORING|RW_MGR_MEM_DATA_MASK_WIDTH|RW_MGR_MEM_DATA_WIDTH|RW_MGR_MEM_DQ_PER_READ_DQS|RW_MGR_MEM_DQ_PER_WRITE_DQS|RW_MGR_MEM_IF_READ_DQS_WIDTH|RW_MGR_MEM_IF_WRITE_DQS_WIDTH|RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM|RW_MGR_MEM_NUMBER_OF_RANKS|RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS|RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS|IO_DELAY_PER_DCHAIN_TAP|IO_DELAY_PER_DQS_EN_DCHAIN_TAP|IO_DELAY_PER_OPA_TAP|IO_DLL_CHAIN_LENGTH|IO_DQDQS_OUT_PHASE_MAX|IO_DQS_EN_DELAY_MAX|IO_DQS_EN_DELAY_OFFSET|IO_DQS_EN_PHASE_MAX|IO_DQS_IN_DELAY_MAX|IO_DQS_IN_RESERVE|IO_DQS_OUT_RESERVE|IO_IO_IN_DELAY_MAX|IO_IO_OUT1_DELAY_MAX|IO_IO_OUT2_DELAY_MAX|IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS|AFI_RATE_RATIO|AFI_CLK_FREQ|CALIB_LFIFO_OFFSET|CALIB_VFIFO_OFFSET|ENABLE_SUPER_QUICK_CALIBRATION|MAX_LATENCY_COUNT_WIDTH|READ_VALID_FIFO_SIZE|REG_FILE_INIT_SEQ_SIGNATURE|TINIT_CNTR0_VAL|TINIT_CNTR1_VAL|TINIT_CNTR2_VAL|TRESET_CNTR0_VAL|TRESET_CNTR1_VAL|TRESET_CNTR2_VAL|CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR|CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC|CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP)[[:space:]]" + grep -E "#define (CFG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE|CFG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL|CFG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER|CFG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT|CFG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN|CFG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW|CFG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR|CFG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD|CFG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT|CFG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT|CFG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES|CFG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES|CFG_HPS_SDR_CTRLCFG_DRAMODT_READ|CFG_HPS_SDR_CTRLCFG_DRAMODT_WRITE|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS|CFG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS|CFG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH|CFG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH|CFG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN|CFG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK|CFG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL|CFG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA|CFG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH|CFG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH|CFG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP|CFG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP|CFG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP|CFG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP|CFG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR|CFG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN|CFG_HPS_SDR_CTRLCFG_FPGAPORTRST|CFG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE|CFG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC|CFG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14|CFG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46|CFG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0|CFG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0|CFG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32|CFG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0|CFG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4|CFG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36|CFG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0|CFG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32|CFG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64|RW_MGR_ACTIVATE_0_AND_1|RW_MGR_ACTIVATE_0_AND_1_WAIT1|RW_MGR_ACTIVATE_0_AND_1_WAIT2|RW_MGR_ACTIVATE_1|RW_MGR_CLEAR_DQS_ENABLE|RW_MGR_EMR_OCD_ENABLE|RW_MGR_EMR|RW_MGR_EMR2|RW_MGR_EMR3|RW_MGR_GUARANTEED_READ|RW_MGR_GUARANTEED_READ_CONT|RW_MGR_GUARANTEED_WRITE|RW_MGR_GUARANTEED_WRITE_WAIT0|RW_MGR_GUARANTEED_WRITE_WAIT1|RW_MGR_GUARANTEED_WRITE_WAIT2|RW_MGR_GUARANTEED_WRITE_WAIT3|RW_MGR_IDLE|RW_MGR_IDLE_LOOP1|RW_MGR_IDLE_LOOP2|RW_MGR_INIT_RESET_0_CKE_0|RW_MGR_INIT_RESET_1_CKE_0|RW_MGR_INIT_CKE_0|RW_MGR_LFSR_WR_RD_BANK_0|RW_MGR_LFSR_WR_RD_BANK_0_DATA|RW_MGR_LFSR_WR_RD_BANK_0_DQS|RW_MGR_LFSR_WR_RD_BANK_0_NOP|RW_MGR_LFSR_WR_RD_BANK_0_WAIT|RW_MGR_LFSR_WR_RD_BANK_0_WL_1|RW_MGR_LFSR_WR_RD_DM_BANK_0|RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA|RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS|RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP|RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT|RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1|RW_MGR_MR_CALIB|RW_MGR_MR_USER|RW_MGR_MR_DLL_RESET|RW_MGR_MRS0_DLL_RESET|RW_MGR_MRS0_DLL_RESET_MIRR|RW_MGR_MRS0_USER|RW_MGR_MRS0_USER_MIRR|RW_MGR_MRS1|RW_MGR_MRS1_MIRR|RW_MGR_MRS2|RW_MGR_MRS2_MIRR|RW_MGR_MRS3|RW_MGR_MRS3_MIRR|RW_MGR_NOP|RW_MGR_PRECHARGE_ALL|RW_MGR_READ_B2B|RW_MGR_READ_B2B_WAIT1|RW_MGR_READ_B2B_WAIT2|RW_MGR_REFRESH|RW_MGR_REFRESH_ALL|RW_MGR_RETURN|RW_MGR_SGLE_READ|RW_MGR_ZQCL|RW_MGR_TRUE_MEM_DATA_MASK_WIDTH|RW_MGR_MEM_ADDRESS_MIRRORING|RW_MGR_MEM_DATA_MASK_WIDTH|RW_MGR_MEM_DATA_WIDTH|RW_MGR_MEM_DQ_PER_READ_DQS|RW_MGR_MEM_DQ_PER_WRITE_DQS|RW_MGR_MEM_IF_READ_DQS_WIDTH|RW_MGR_MEM_IF_WRITE_DQS_WIDTH|RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM|RW_MGR_MEM_NUMBER_OF_RANKS|RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS|RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS|IO_DELAY_PER_DCHAIN_TAP|IO_DELAY_PER_DQS_EN_DCHAIN_TAP|IO_DELAY_PER_OPA_TAP|IO_DLL_CHAIN_LENGTH|IO_DQDQS_OUT_PHASE_MAX|IO_DQS_EN_DELAY_MAX|IO_DQS_EN_DELAY_OFFSET|IO_DQS_EN_PHASE_MAX|IO_DQS_IN_DELAY_MAX|IO_DQS_IN_RESERVE|IO_DQS_OUT_RESERVE|IO_IO_IN_DELAY_MAX|IO_IO_OUT1_DELAY_MAX|IO_IO_OUT2_DELAY_MAX|IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS|AFI_RATE_RATIO|AFI_CLK_FREQ|CALIB_LFIFO_OFFSET|CALIB_VFIFO_OFFSET|ENABLE_SUPER_QUICK_CALIBRATION|MAX_LATENCY_COUNT_WIDTH|READ_VALID_FIFO_SIZE|REG_FILE_INIT_SEQ_SIGNATURE|TINIT_CNTR0_VAL|TINIT_CNTR1_VAL|TINIT_CNTR2_VAL|TRESET_CNTR0_VAL|TRESET_CNTR1_VAL|TRESET_CNTR2_VAL|CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR|CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC|CFG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP)[[:space:]]" } # diff --git a/doc/board/intel/edison.rst b/doc/board/intel/edison.rst index 5a65673d1e..782d75a674 100644 --- a/doc/board/intel/edison.rst +++ b/doc/board/intel/edison.rst @@ -90,7 +90,7 @@ If you want to check if the board is ready, type: .. code-block:: none - lsusb | egrep "8087|8086" + lsusb | grep -E "8087|8086" Bus 001 Device 004: ID 8086:e005 Intel Corp. If you see a device with the same ID as above, the board is waiting for your diff --git a/scripts/build-whitelist.sh b/scripts/build-whitelist.sh index 37630c0271..f958f8b864 100755 --- a/scripts/build-whitelist.sh +++ b/scripts/build-whitelist.sh @@ -14,7 +14,7 @@ export LC_ALL=C LC_COLLATE=C # defconfig files. # git grep CONFIG_ | \ - egrep -vi "(Kconfig:|defconfig:|README|\.py|\.pl:)" \ + grep -Evi "(Kconfig:|defconfig:|README|\.py|\.pl:)" \ | tr ' \t' '\n\n' \ | sed -n 's/^$CONFIG_[A-Za-z0-9_]*$.*/\1/p' \ |sort |uniq >scripts/config_whitelist.txt.tmp1; diff --git a/scripts/coccicheck b/scripts/coccicheck index dccaea38e3..00b22e662d 100755 --- a/scripts/coccicheck +++ b/scripts/coccicheck @@ -54,7 +54,7 @@ FLAGS="--very-quiet" # inspected there. # # --profile will not output if --very-quiet is used, so avoid it. -echo $SPFLAGS | egrep -e "--profile|--show-trying" 2>&1 > /dev/null +echo $SPFLAGS | grep -Ee "--profile|--show-trying" 2>&1 > /dev/null if [ $? -eq 0 ]; then FLAGS="--quiet" fi diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh index b87748106c..dec2634de3 100755 --- a/test/fs/fs-test.sh +++ b/test/fs/fs-test.sh @@ -462,22 +462,22 @@ function check_results() { FAIL=0 # Check if the ls is showing correct results for 2.5 gb file - grep -A7 "Test Case 1 " "$1" | egrep -iq "2621440000 *$4" + grep -A7 "Test Case 1 " "$1" | grep -Eiq "2621440000 *$4" pass_fail "TC1: ls of $4" # Check if the ls is showing correct results for 1 mb file - grep -A7 "Test Case 1 " "$1" | egrep -iq "1048576 *$3" + grep -A7 "Test Case 1 " "$1" | grep -Eiq "1048576 *$3" pass_fail "TC1: ls of $3" # Check size command on 1MB.file - egrep -A3 "Test Case 2a " "$1" | grep -q "filesize=100000" + grep -A3 "Test Case 2a " "$1" | grep -q "filesize=100000" pass_fail "TC2: size of $3" # Check size command on 1MB.file via a path using '..' - egrep -A3 "Test Case 2b " "$1" | grep -q "filesize=100000" + grep -A3 "Test Case 2b " "$1" | grep -q "filesize=100000" pass_fail "TC2: size of $3 via a path using '..'" # Check size command on 2.5GB.file - egrep -A3 "Test Case 3 " "$1" | grep -q "filesize=9c400000" + grep -A3 "Test Case 3 " "$1" | grep -q "filesize=9c400000" pass_fail "TC3: size of $4" # Check read full mb of 1MB.file -- 2.25.1

3 2

[PATCH 1/1] Kconfig: move NXP specific stuff into a sub-menu
by Heinrich Schuchardt 12 Jan '23

12 Jan '23

Having NXP specific items in the main menu is confusing. Especially the comment line *** Other functionality shared between NXP SoCs *** is simply misleading. Move all NXP stuff into a separate sub-menu. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- arch/Kconfig.nxp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index 8c5a6f63a9..e0c89799cd 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -1,3 +1,5 @@ +menu "Functionality shared between NXP SoCs" + config NXP_ESBC bool "NXP ESBC (secure boot) functionality" help @@ -125,8 +127,6 @@ config KEY_REVOCATION endmenu -comment "Other functionality shared between NXP SoCs" - config DEEP_SLEEP bool "Enable SoC deep sleep feature" depends on ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A @@ -251,3 +251,5 @@ config QIXIS_I2C_ACCESS config HAS_FSL_DR_USB def_bool y depends on USB_EHCI_HCD && PPC + +endmenu -- 2.37.2

2 1

[PATCH v2 1/1] Kconfig: clean up skipping low-level initialization
by Heinrich Schuchardt 12 Jan '23

12 Jan '23

Put all entries for skipping low-level initialization into a sub-menu. Use different titles for main U-Boot, SPL, TPL. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- v2: adjust the placement of the words SPL and TPL in the titles --- arch/Kconfig | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 102956d24c..112dcfe00f 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -381,9 +381,11 @@ config SYS_IMMR Address for the Internal Memory-Mapped Registers (IMMR) window used to configure the features of many Freescale / NXP SoCs. -config SKIP_LOWLEVEL_INIT - bool "Skip the calls to certain low level initialization functions" +menu "Skipping low level initialization functions" depends on ARM || MIPS || RISCV + +config SKIP_LOWLEVEL_INIT + bool "Skip calls to certain low level initialization functions" help If enabled, then certain low level initializations (like setting up the memory controller) are omitted and/or U-Boot does not relocate @@ -393,8 +395,8 @@ config SKIP_LOWLEVEL_INIT debugger which performs these initializations itself. config SPL_SKIP_LOWLEVEL_INIT - bool "Skip the calls to certain low level initialization functions" - depends on SPL && (ARM || MIPS || RISCV) + bool "Skip calls to certain low level initialization functions in SPL" + depends on SPL help If enabled, then certain low level initializations (like setting up the memory controller) are omitted and/or U-Boot does not relocate @@ -404,7 +406,7 @@ config SPL_SKIP_LOWLEVEL_INIT debugger which performs these initializations itself. config TPL_SKIP_LOWLEVEL_INIT - bool "Skip the calls to certain low level initialization functions" + bool "Skip calls to certain low level initialization functions in TPL" depends on SPL && ARM help If enabled, then certain low level initializations (like setting up @@ -415,7 +417,7 @@ config TPL_SKIP_LOWLEVEL_INIT debugger which performs these initializations itself. config SKIP_LOWLEVEL_INIT_ONLY - bool "Skip the call to lowlevel_init during early boot ONLY" + bool "Skip call to lowlevel_init during early boot ONLY" depends on ARM help This allows just the call to lowlevel_init() to be skipped. The @@ -423,7 +425,7 @@ config SKIP_LOWLEVEL_INIT_ONLY performed. config SPL_SKIP_LOWLEVEL_INIT_ONLY - bool "Skip the call to lowlevel_init during early boot ONLY" + bool "Skip call to lowlevel_init during early SPL boot ONLY" depends on SPL && ARM help This allows just the call to lowlevel_init() to be skipped. The @@ -431,13 +433,15 @@ config SPL_SKIP_LOWLEVEL_INIT_ONLY performed. config TPL_SKIP_LOWLEVEL_INIT_ONLY - bool "Skip the call to lowlevel_init during early boot ONLY" + bool "Skip call to lowlevel_init during early TPL boot ONLY" depends on TPL && ARM help This allows just the call to lowlevel_init() to be skipped. The normal CP15 init (such as enabling the instruction cache) is still performed. +endmenu + config SYS_HAS_NONCACHED_MEMORY bool "Enable reserving a non-cached memory area for drivers" depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH) -- 2.37.2

2 2

[PATCH 1/1] Dockerfile: add package texinfo
by Heinrich Schuchardt 12 Jan '23

12 Jan '23

In preparation of adding the infodocs target to our CI install the prerequisite texinfo software package. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- tools/docker/Dockerfile | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index 42ab81283d..2f566d3fb3 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -109,6 +109,7 @@ RUN apt-get update && apt-get install -y \ srecord \ sudo \ swig \ + texinfo \ util-linux \ uuid-dev \ virtualenv \ -- 2.37.2

2 1

[PATCH u-boot] ata: Fix dependency for CONFIG_SATA_SIL
by Pali Rohár 12 Jan '23

12 Jan '23

sata_sil.c is PCI driver and without CONFIG_PCI is building of U-Boot failing: LD u-boot ld.bfd: drivers/ata/sata_sil.o: in function `sil_exec_cmd': drivers/ata/sata_sil.c:148: undefined reference to `dm_pci_phys_to_bus' ld.bfd: drivers/ata/sata_sil.o: in function `sil_pci_probe': drivers/ata/sata_sil.c:687: undefined reference to `dm_pci_get_bdf' ld.bfd: drivers/ata/sata_sil.c:691: undefined reference to `dm_pci_read_config16' ld.bfd: drivers/ata/sata_sil.c:701: undefined reference to `dm_pci_map_bar' ld.bfd: drivers/ata/sata_sil.c:704: undefined reference to `dm_pci_map_bar' ld.bfd: drivers/ata/sata_sil.c:713: undefined reference to `dm_pci_write_config16' ld.bfd: drivers/ata/sata_sil.c:717: undefined reference to `dm_pci_read_config16' ld.bfd: drivers/ata/sata_sil.o: in function `sil_cmd_identify_device': drivers/ata/sata_sil.c:256: undefined reference to `dm_pci_phys_to_bus' ld.bfd: drivers/ata/sata_sil.o: in function `sil_sata_rw_cmd': drivers/ata/sata_sil.c:330: undefined reference to `dm_pci_phys_to_bus' ld.bfd: drivers/ata/sata_sil.o: in function `sil_sata_rw_cmd_ext': drivers/ata/sata_sil.c:377: undefined reference to `dm_pci_phys_to_bus' make: *** [Makefile:1778: u-boot] Error 1 Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/ata/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index a063b221cd1f..3fe53d6d4f3a 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -135,6 +135,7 @@ config SATA_MV config SATA_SIL bool "Enable Silicon Image SIL3131 / SIL3132 / SIL3124 SATA driver support" + depends on PCI select AHCI select LIBATA help -- 2.20.1

4 3

[PATCH 1/2] test: compression: check with trailing garbage in input
by Brandon Maier 12 Jan '23

12 Jan '23

The Linux kernel appends 4 bytes to the end of compressed kernel Images containing the uncompressed image size. They are used to make self-decompressing Images easier. However for archs that don't support self-decompression, like ARM64, U-Boot must be able to decompress the image with the garbage data. The existing decompressors already support this. This unit test was added while working on zstd support as upstream zstd will error if there is garbage data in the input buffer, and special care was needed to support this. Signed-off-by: Brandon Maier <brandon.maier(a)collins.com> --- test/compression.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/test/compression.c b/test/compression.c index 82e29c9b86b..6c2a43fbed7 100644 --- a/test/compression.c +++ b/test/compression.c @@ -350,6 +350,15 @@ static int run_test_internal(struct unit_test_state *uts, char *name, buf->orig_size) == 0); errcheck(((char *)buf->uncompressed_buf)[buf->orig_size] == 'A'); + /* Uncompresses with trailing garbage in input buffer. */ + memset(buf->uncompressed_buf, 'A', TEST_BUFFER_SIZE); + errcheck(uncompress(uts, buf->compressed_buf, buf->compressed_size + 4, + buf->uncompressed_buf, buf->uncompressed_size, + &buf->uncompressed_size) == 0); + errcheck(buf->uncompressed_size == buf->orig_size); + errcheck(memcmp(buf->orig_buf, buf->uncompressed_buf, + buf->orig_size) == 0); + /* Make sure compression does not over-run. */ memset(buf->compare_buf, 'A', TEST_BUFFER_SIZE); ret = compress(uts, buf->orig_buf, buf->orig_size, -- 2.39.0

3 5

[PATCH] fs/squashfs: Only use export table if available
by David Oberhollenzer 12 Jan '23

12 Jan '23

For a squashfs filesystem, the fragment table is followed by the following tables: NFS export table, ID table, xattr table. The export and xattr tables are both completely optional, but the ID table is mandatory. The Linux implementation refuses to mount the image if the ID table is missing. Tables that are no present have their location in the super block set to 0xFFFFFFFFFFFFFFFF. The u-boot implementation previously assumed that it can always rely on the export table location as an upper bound for the fragment table, trying (and failing) to read past filesystem bounds if it is not present. This patch changes the driver to use the ID table instead and only use the export table location if it lies between the two. Signed-off-by: David Oberhollenzer <goliath(a)infraroot.at> --- fs/squashfs/sqfs.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 74ca70c3ff..0099462db5 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -100,7 +100,7 @@ static int sqfs_calc_n_blks(__le64 start, __le64 end, u64 *offset) static int sqfs_frag_lookup(u32 inode_fragment_index, struct squashfs_fragment_block_entry *e) { - u64 start, n_blks, src_len, table_offset, start_block; + u64 start, end, exp_tbl, n_blks, src_len, table_offset, start_block; unsigned char *metadata_buffer, *metadata, *table; struct squashfs_fragment_block_entry *entries; struct squashfs_super_block *sblk = ctxt.sblk; @@ -115,11 +115,17 @@ static int sqfs_frag_lookup(u32 inode_fragment_index, if (inode_fragment_index >= get_unaligned_le32(&sblk->fragments)) return -EINVAL; - start = get_unaligned_le64(&sblk->fragment_table_start) / - ctxt.cur_dev->blksz; + start = get_unaligned_le64(&sblk->fragment_table_start); + end = get_unaligned_le64(&sblk->id_table_start); + exp_tbl = get_unaligned_le64(&sblk->export_table_start); + + if (exp_tbl > start && exp_tbl < end) + end = exp_tbl; + n_blks = sqfs_calc_n_blks(sblk->fragment_table_start, - sblk->export_table_start, - &table_offset); + cpu_to_le64(end), &table_offset); + + start /= ctxt.cur_dev->blksz; /* Allocate a proper sized buffer to store the fragment index table */ table = malloc_cache_aligned(n_blks * ctxt.cur_dev->blksz); -- 2.38.1

3 2

[PATCH] ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
by Fabrice Gasnier 12 Jan '23

12 Jan '23

phy-stm32-usbphyc bindings uses a connector node with vbus-supply property. [backport from linux 43e55d778a6b] Signed-off-by: Fabrice Gasnier <fabrice.gasnier(a)foss.st.com> --- arch/arm/dts/stm32mp157c-ev1.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts index 07bcd7c50672..2d5db41ed67b 100644 --- a/arch/arm/dts/stm32mp157c-ev1.dts +++ b/arch/arm/dts/stm32mp157c-ev1.dts @@ -393,6 +393,10 @@ st,tune-squelch-level = <3>; st,tune-hs-rx-offset = <2>; st,no-lsfs-sc; + connector { + compatible = "usb-a-connector"; + vbus-supply = <&vbus_sw>; + }; }; &usbphyc_port1 { -- 2.25.1

3 4