September 2022 - U-Boot

[PATCH] mmc: fsl_esdhc: fix problem when using clk driver
by Marek Vasut 21 Oct '22

21 Oct '22

From: Ye Li <ye.li(a)nxp.com> Move init_clk_usdhc to non-clk driver case, since assigned-clocks properties will initialize the clocks by clk driver. Signed-off-by: Ye Li <ye.li(a)nxp.com> Signed-off-by: Marek Vasut <marex(a)denx.de> --- NOTE: Was MLK-21848-5 fsl_esdhc: fix problem when using clk driver NOTE: Fixes SD SDR104 mode instability on MX8MP --- Cc: Fabio Estevam <festevam(a)denx.de> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Cc: Max Krummenacher <max.krummenacher(a)toradex.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/mmc/fsl_esdhc_imx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 9befb190bdf..92b152fc979 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1519,8 +1519,6 @@ static int fsl_esdhc_probe(struct udevice *dev) * work as expected. */ - init_clk_usdhc(dev_seq(dev)); - #if CONFIG_IS_ENABLED(CLK) /* Assigned clock already set clock */ ret = clk_get_by_name(dev, "per", &priv->per_clk); @@ -1536,6 +1534,8 @@ static int fsl_esdhc_probe(struct udevice *dev) priv->sdhc_clk = clk_get_rate(&priv->per_clk); #else + init_clk_usdhc(dev_seq(dev)); + priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev_seq(dev)); if (priv->sdhc_clk <= 0) { dev_err(dev, "Unable to get clk for %s\n", dev->name); -- 2.35.1

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[PATCH v1] verdin-imx8mm: verdin-imx8mp: drop obsolete net/phy configs
by Marcel Ziswiler 21 Oct '22

21 Oct '22

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Drop obsolete networking/PHY related configuration defines. Signed-off-by: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> --- include/configs/verdin-imx8mm.h | 3 --- include/configs/verdin-imx8mp.h | 8 -------- 2 files changed, 11 deletions(-) diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 4d20b86591f..1dae9919789 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -67,9 +67,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -/* ENET */ -#define CONFIG_FEC_MXC_PHYADDR 7 - /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 9b8db223bb2..69235cb42cb 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -25,14 +25,6 @@ #define CONFIG_SYS_I2C #endif /* CONFIG_SPL_BUILD */ -/* ENET Config */ -/* ENET1 */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 7 - -#define PHY_ANEG_TIMEOUT 20000 -#endif /* CONFIG_CMD_NET */ - #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x50200000\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ -- 2.35.1

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[PATCH v2] arm: dts: imx8mm-venice-gw7903: add dig1_ctl and dig2_ctl gpios
by Tim Harvey 21 Oct '22

21 Oct '22

The GW7903 revision B adds two additional GPIO's to control the direction of the 2 isolated digital I/O circuits. Define them as: - dig1_ctl - dig2_ctl Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- v2: fix commit log s/gw7902/gw7903 --- arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi | 14 ++++++++++++++ arch/arm/dts/imx8mm-venice-gw7903.dts | 4 +++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi index 896e5d4edde3..ff9b12a83408 100644 --- a/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw7903-u-boot.dtsi @@ -43,6 +43,20 @@ line-name = "dig2_out#"; }; + dig2ctl { + gpio-hog; + output-low; + gpios = <2 GPIO_ACTIVE_HIGH>; + line-name = "dig2_ctl"; + }; + + dig1ctl { + gpio-hog; + output-low; + gpios = <6 GPIO_ACTIVE_HIGH>; + line-name = "dig1_ctl"; + }; + dig1out { gpio-hog; output-high; diff --git a/arch/arm/dts/imx8mm-venice-gw7903.dts b/arch/arm/dts/imx8mm-venice-gw7903.dts index a7dae9bd4c11..1b69ac0e12b0 100644 --- a/arch/arm/dts/imx8mm-venice-gw7903.dts +++ b/arch/arm/dts/imx8mm-venice-gw7903.dts @@ -250,7 +250,7 @@ }; &gpio2 { - gpio-line-names = "dig2_in", "dig2_out#", "", "", "", "", "", "", + gpio-line-names = "dig2_in", "dig2_out#", "dig2_ctl", "", "", "", "dig1_ctl", "", "dig1_out#", "dig1_in", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""; @@ -630,6 +630,8 @@ MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* RS232# */ MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x40000041 /* DIG1_IN */ MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* DIG1_OUT */ + MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40000041 /* DIG1_CTL */ + MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x40000041 /* DIG2_CTL */ MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x40000041 /* DIG2_IN */ MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x40000041 /* DIG2_OUT */ MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7 0x40000041 /* SIM1DET# */ -- 2.25.1

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[PATCH v4] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
by Gaurav Jain 21 Oct '22

21 Oct '22

From: Ye Li <ye.li(a)nxp.com> issue: CAAM fails with key error when perform Modular Exponentiation using PKHA Block in CAAM Fix: add flush and invalidate dcache for keys, signature and output decrypted data processed by CAAM. Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver) Signed-off-by: Ye Li <ye.li(a)nxp.com> Reviewed-by: Gaurav Jain <gaurav.jain(a)nxp.com> Acked-by: Peng Fan <peng.fan(a)nxp.com> --- changes in v4: - upgrade to latest. changes in v3: - fix warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration] drivers/crypto/fsl/fsl_rsa.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c index 897ee855ea..335b7fe25a 100644 --- a/drivers/crypto/fsl/fsl_rsa.c +++ b/drivers/crypto/fsl/fsl_rsa.c @@ -6,6 +6,7 @@ #include <config.h> #include <common.h> +#include <cpu_func.h> #include <dm.h> #include <log.h> #include <asm/types.h> @@ -36,12 +37,21 @@ int fsl_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, inline_cnstr_jobdesc_pkha_rsaexp(desc, &pkin, out, sig_len); + flush_dcache_range((ulong)sig, (ulong)sig + sig_len); + flush_dcache_range((ulong)prop->modulus, (ulong)(prop->modulus) + keylen); + flush_dcache_range((ulong)prop->public_exponent, + (ulong)(prop->public_exponent) + prop->exp_len); + flush_dcache_range((ulong)desc, (ulong)desc + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE)); + flush_dcache_range((ulong)out, (ulong)out + sig_len); + ret = run_descriptor_jr(desc); if (ret) { debug("%s: RSA failed to verify: %d\n", __func__, ret); return -EFAULT; } + invalidate_dcache_range((ulong)out, (ulong)out + sig_len); + return 0; } -- 2.25.1

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[PATCH] arm: dts: imx8mp-venice-gw74xx: update M2 gpio hogs
by Tim Harvey 21 Oct '22

21 Oct '22

Update the M2 socket gpio hogs such that they are not active on boot by flagging them as GPIO_ACTIVE_HIGH so that 'output-high' drives high. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi index 920246d577ed..caee3f66954b 100644 --- a/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-venice-gw74xx-u-boot.dtsi @@ -86,21 +86,21 @@ m2_dis2_hog { gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; + gpios = <0 GPIO_ACTIVE_HIGH>; output-high; line-name = "m2_gdis#"; }; m2rst_hog { gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; + gpios = <6 GPIO_ACTIVE_HIGH>; output-high; line-name = "m2_rst#"; }; m2_off_hog { gpio-hog; - gpios = <14 GPIO_ACTIVE_LOW>; + gpios = <14 GPIO_ACTIVE_HIGH>; output-high; line-name = "m2_off#"; }; @@ -111,7 +111,7 @@ m2_dis1_hog { gpio-hog; - gpios = <18 GPIO_ACTIVE_LOW>; + gpios = <18 GPIO_ACTIVE_HIGH>; output-high; line-name = "m2_wdis#"; }; -- 2.25.1

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[PATCH] board: gateworks: venice: rename eeprom_init
by Tim Harvey 21 Oct '22

21 Oct '22

rename eeprom_init to avoid build failure when using CMD_EEPROM. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- board/gateworks/venice/eeprom.c | 2 +- board/gateworks/venice/eeprom.h | 2 +- board/gateworks/venice/spl.c | 2 +- board/gateworks/venice/venice.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/gateworks/venice/eeprom.c b/board/gateworks/venice/eeprom.c index ac52cc0a9ec9..6aea60ad05c7 100644 --- a/board/gateworks/venice/eeprom.c +++ b/board/gateworks/venice/eeprom.c @@ -299,7 +299,7 @@ static int eeprom_info(bool verbose) return 0; } -int eeprom_init(int quiet) +int venice_eeprom_init(int quiet) { char rev_pcb; int rev_bom; diff --git a/board/gateworks/venice/eeprom.h b/board/gateworks/venice/eeprom.h index 8ea7318d7dfc..bb7a5fa9ad1f 100644 --- a/board/gateworks/venice/eeprom.h +++ b/board/gateworks/venice/eeprom.h @@ -24,7 +24,7 @@ struct venice_board_info { u8 chksum[2]; /* 0x4E */ }; -int eeprom_init(int quiet); +int venice_eeprom_init(int quiet); const char *eeprom_get_model(void); const char *eeprom_get_baseboard_model(void); const char *eeprom_get_dtb_name(int level, char *buf, int len); diff --git a/board/gateworks/venice/spl.c b/board/gateworks/venice/spl.c index ae460296cb99..14241e5e2fb6 100644 --- a/board/gateworks/venice/spl.c +++ b/board/gateworks/venice/spl.c @@ -280,7 +280,7 @@ void board_init_f(ulong dummy) break; mdelay(1); } - dram_sz = eeprom_init(0); + dram_sz = venice_eeprom_init(0); /* PMIC */ power_init_board(); diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c index 32b25ffd3edf..d94f6b8a577d 100644 --- a/board/gateworks/venice/venice.c +++ b/board/gateworks/venice/venice.c @@ -111,7 +111,7 @@ int board_phy_config(struct phy_device *phydev) int board_init(void) { - eeprom_init(1); + venice_eeprom_init(1); if (IS_ENABLED(CONFIG_FEC_MXC)) setup_fec(); -- 2.25.1

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[PATCH v3 00/19] imx: kontron-sl-mx8mm: Improvements and OSM board support
by Frieder Schrempf 21 Oct '22

21 Oct '22

From: Frieder Schrempf <frieder.schrempf(a)kontron.de> This set contains several improvements for the kontron-sl-mx8mm board configuration (patches 1-17, 19) and support for a new SoM (patch 18, including baseboard) that complies to the Open Standard Module (OSM) 1.0 hardware specification, size S (https://sget.org/standards/osm). This also syncs the devicetrees with the pending changes in Linux (see [1]). Changes in v3: * add Fabio's R-b tags (Thanks!) * fix OSM-S SoM name to match official name * fix docs to match official board names * adjust devicetree names and compatibles * fix printing of RAM size * add missing Makefile entry for new dtb * fix hex numbers and unit addresses in SPI NOR partitions Changes in v2: * rebase on u-boot-imx/master * new patches 2-5, 19 * fix printf warning in board/kontron/sl-mx8mm/spl.c * remove unused pinmux definitions in board/kontron/sl-mx8mm/spl.c * describe SPI NOR partitions in devicetree * move environment to end of SPI NOR * Add tags [1] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220822080357.… Frieder Schrempf (19): imx: kontron-sl-mx8mm: Remove LVDS board type and devicetrees imx: kontron-sl-mx8mm: Add support for loading from SPI NOR in SPL imx: kontron-sl-mx8mm: Remove custom board_boot_order() workaround imx: kontron-sl-mx8mm: Increase CONFIG_SYS_CBSIZE to 2K imx: kontron-sl-mx8mm: Enable MTD command imx: kontron-sl-mx8mm: Add redundant environment and SPI NOR partitions imx: kontron-sl-mx8mm: Enable environment in MMC imx: kontron-sl-mx8mm: Migrate to use CONFIG_EXTRA_ENV_TEXT imx: kontron-sl-mx8mm: Enable bootaux command imx: kontron-sl-mx8mm: lpddr4_timing.c: Add spaces for proper alignment imx: kontron-sl-mx8mm: Remove 100mt DDR setpoint imx: kontron-sl-mx8mm: Use new LPDDR4 config parameters imx: kontron-sl-mx8mm: Prepare for other i.MX8MM SoM types imx: kontron-sl-mx8mm: Adjust devicetree names, compatibles and model strings imx: kontron-sl-mx8mm: Use the VSELECT signal to switch SD card IO voltage imx: kontron-sl-mx8mm: Use voltage rail names from schematic for PMIC regulator-names imx: kontron-sl-mx8mm: Simplify code in spl.c imx: kontron-sl-mx8mm: Add support for Kontron Electronics SoM SL i.MX8MM OSM-S imx: kontron-sl-mx8mm: Prepare for I2C display detection in environment script arch/arm/dts/Makefile | 4 +- ...i => imx8mm-kontron-bl-common-u-boot.dtsi} | 21 +- .../dts/imx8mm-kontron-bl-osm-s-u-boot.dtsi | 14 + arch/arm/dts/imx8mm-kontron-bl-osm-s.dts | 376 ++++ arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi | 14 + ...tron-n801x-s.dts => imx8mm-kontron-bl.dts} | 9 +- .../imx8mm-kontron-n801x-s-lvds-u-boot.dtsi | 6 - arch/arm/dts/imx8mm-kontron-n801x-s-lvds.dts | 117 - .../dts/imx8mm-kontron-n801x-s-u-boot.dtsi | 6 - arch/arm/dts/imx8mm-kontron-osm-s.dtsi | 330 +++ ...-n801x-som.dtsi => imx8mm-kontron-sl.dtsi} | 53 +- board/kontron/sl-mx8mm/MAINTAINERS | 2 +- board/kontron/sl-mx8mm/lpddr4_timing.c | 1969 ++++++++--------- board/kontron/sl-mx8mm/sl-mx8mm.c | 45 + board/kontron/sl-mx8mm/sl-mx8mm.env | 7 + board/kontron/sl-mx8mm/spl.c | 115 +- configs/kontron-sl-mx8mm_defconfig | 19 +- doc/board/kontron/sl-mx8mm.rst | 13 +- include/configs/kontron-sl-mx8mm.h | 16 +- 19 files changed, 1810 insertions(+), 1326 deletions(-) rename arch/arm/dts/{imx8mm-kontron-n801x-u-boot.dtsi => imx8mm-kontron-bl-common-u-boot.dtsi} (83%) create mode 100644 arch/arm/dts/imx8mm-kontron-bl-osm-s-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-kontron-bl-osm-s.dts create mode 100644 arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi rename arch/arm/dts/{imx8mm-kontron-n801x-s.dts => imx8mm-kontron-bl.dts} (96%) delete mode 100644 arch/arm/dts/imx8mm-kontron-n801x-s-lvds-u-boot.dtsi delete mode 100644 arch/arm/dts/imx8mm-kontron-n801x-s-lvds.dts delete mode 100644 arch/arm/dts/imx8mm-kontron-n801x-s-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mm-kontron-osm-s.dtsi rename arch/arm/dts/{imx8mm-kontron-n801x-som.dtsi => imx8mm-kontron-sl.dtsi} (87%) create mode 100644 board/kontron/sl-mx8mm/sl-mx8mm.env -- 2.37.2

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[PATCH v4 0/2] Support SPL for i.MX7ULP
by Oleksandr Suvorov 21 Oct '22

21 Oct '22

I've just realized this patch was not applied from the original patchset "Support SPL for i.MX7ULP". Please apply this patch to fix the code as now "include/configs/mx7ulp_com.h" refers to non-existent "include/configs/imx7ulp_spl.h". This supersedes the patchset https://patchwork.ozlabs.org/project/uboot/list/?series=309021 Changes in v4: - rebase to the current master - fix a reference to a non-existent option SPL_MMC_SUPPORT - add a small fix for imx spl. Changes in v3: - rebase the patch to the current codebase Oleksandr Suvorov (1): imx: spl: fix a comment adding IMX9 Ricardo Salveti (1): mx7ulp: add base SPL support for mx7ulp arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/mx7ulp/soc.c | 2 +- arch/arm/mach-imx/spl.c | 6 ++++-- include/configs/imx7ulp_spl.h | 39 ++++++++++++++++++++++++++++++++++ 4 files changed, 45 insertions(+), 4 deletions(-) create mode 100644 include/configs/imx7ulp_spl.h -- 2.37.1

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[PATCH] ARM: imx: Enable btrfs support on DHSOM
by Marek Vasut 21 Oct '22

21 Oct '22

The btrfs filesystem provides advanced functionality like copy-on-write and snapshots, as well as metadata and data duplication and checksumming. Enable btrfs in U-Boot to permit even the primary partition to be btrfs and let system boot from it. Signed-off-by: Marek Vasut <marex(a)denx.de> --- Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- configs/dh_imx6_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 4b6776ea9c8..025cbaf0e49 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -54,6 +54,7 @@ CONFIG_CMD_WDT=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y CONFIG_OF_LIST="imx6q-dhcom-pdk2 imx6dl-dhcom-pdk2 imx6s-dhcom-drc02 imx6dl-dhcom-picoitx" diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index e78b9a1569e..68e4653d8e7 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -117,6 +117,7 @@ CONFIG_CMD_SYSBOOT=y CONFIG_CMD_UUID=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y +CONFIG_CMD_BTRFS=y CONFIG_CMD_HASH=y CONFIG_CMD_SMC=y CONFIG_HASH_VERIFY=y -- 2.35.1

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[PATCH] board: gateworks: gw_ventana: fix mmc env dev
by Tim Harvey 21 Oct '22

21 Oct '22

Fix the MMC env device for boards with eMMC by adding a board_mmc_get_env_dev override to return the boot device as the MMC env device. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- board/gateworks/gw_ventana/gw_ventana.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 99f52b9953e2..68fcc0b1e4fb 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -1281,3 +1281,8 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } #endif /* CONFIG_OF_BOARD_SETUP */ + +int board_mmc_get_env_dev(int devno) +{ + return devno; +} -- 2.25.1

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