July 2022 - U-Boot

[PATCH v3] xilinx: zynqmp: Do not use 0 as spl bss start address
by Stefan Herbrechtsmeier 15 Jul '22

15 Jul '22

From: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> Do not use 0 as address for memory because of the special meaning for pointers (null pointer). Change the spl bss start address to the second page. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> --- Changes in v3: - Switch to Kconfig Changes in v2: - Rework commit message and replace address null by 0 common/spl/Kconfig | 3 ++- configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig | 2 -- configs/xilinx_zynqmp_mini_emmc0_defconfig | 2 -- configs/xilinx_zynqmp_mini_emmc1_defconfig | 2 -- configs/xilinx_zynqmp_mini_qspi_defconfig | 2 -- configs/xilinx_zynqmp_virt_defconfig | 2 -- 6 files changed, 2 insertions(+), 11 deletions(-) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 931619c366..6ecf517333 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -107,7 +107,7 @@ config SPL_PAD_TO config SPL_HAS_BSS_LINKER_SECTION depends on SPL_FRAMEWORK bool "Use a specific address for the BSS via the linker script" - default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV + default y if ARCH_SUNXI || ARCH_MX6 || ARCH_OMAP2PLUS || MIPS || RISCV || ARCH_ZYNQMP config SPL_BSS_START_ADDR hex "Link address for the BSS within the SPL binary" @@ -118,6 +118,7 @@ config SPL_BSS_START_ADDR default 0x81f80000 if ARCH_SUNXI && MACH_SUNIV default 0x4ff80000 if ARCH_SUNXI && !(MACH_SUN9I || MACH_SUNIV) default 0x2ff80000 if ARCH_SUNXI && MACH_SUN9I + default 0x1000 if ARCH_ZYNQMP choice prompt "Enforce SPL BSS limit" diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 0574ee95e4..f04fa64450 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -27,8 +27,6 @@ CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index a248cbf3a3..c481a6917f 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -25,8 +25,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index df0365ba77..b02fec64d1 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -25,8 +25,6 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 82510f1904..49e2758d64 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -24,8 +24,6 @@ CONFIG_REMAKE_ELF=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 89622d18f8..6776bd9d5d 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -32,8 +32,6 @@ CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x0 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xfffffffc -- 2.30.2

2 1

[PATCH] tools: relocate-rela: Fix ELF decoding on big-endian hosts
by Samuel Holland 15 Jul '22

15 Jul '22

The new ELF decoding logic assumed that the target binary has the same endianness as the host, which broke building ARM64 firmware binaries on big-endian machines. This commit fixes the ELF64 decoding to be host-endianness-neutral, and applies the same changes to the ELF32 decoding. It does not fix the microblaze-specific dynamic symbol decoding. It also corrects the functions used for byte swapping in rela_elf64() and rela_elf32(). The result is the same, but semantically the code is converting bytes read from a foreign-endianness file to host byte order. Fixes: 4c9e2d643460 ("tools: relocate-rela: Read rela start/end directly from ELF") Fixes: a1405d9cfedb ("tools: relocate-rela: Check that relocation works only for EM_AARCH64") Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- tools/relocate-rela.c | 125 +++++++++++++++++++++++------------------- 1 file changed, 68 insertions(+), 57 deletions(-) diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 090fb1acb20c..fcf3fb201f07 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -60,7 +60,9 @@ static int decode_elf64(FILE *felf, char **argv) { size_t size; Elf64_Ehdr header; - uint64_t section_header_base, section_header_size, sh_offset, sh_size; + uint64_t section_header_base, section_header_size; + uint64_t sh_addr, sh_offset, sh_size; + Elf64_Half sh_index, sh_num; Elf64_Shdr *sh_table; /* Elf symbol table */ int ret, i, machine; char *sh_str; @@ -76,7 +78,7 @@ static int decode_elf64(FILE *felf, char **argv) return 25; } - machine = header.e_machine; + machine = le16_to_cpu(header.e_machine); debug("Machine\t%d\n", machine); if (machine != EM_AARCH64) { @@ -84,9 +86,10 @@ static int decode_elf64(FILE *felf, char **argv) return 30; } - text_base = header.e_entry; - section_header_base = header.e_shoff; - section_header_size = header.e_shentsize * header.e_shnum; + text_base = le64_to_cpu(header.e_entry); + section_header_base = le64_to_cpu(header.e_shoff); + section_header_size = le16_to_cpu(header.e_shentsize) * + le16_to_cpu(header.e_shnum); sh_table = malloc(section_header_size); if (!sh_table) { @@ -114,9 +117,9 @@ static int decode_elf64(FILE *felf, char **argv) return 27; } - sh_size = sh_table[header.e_shstrndx].sh_size; - debug("e_shstrndx\t0x%08x\n", header.e_shstrndx); - debug("sh_size\t\t0x%08lx\n", sh_size); + sh_index = le16_to_cpu(header.e_shstrndx); + sh_size = le64_to_cpu(sh_table[sh_index].sh_size); + debug("e_shstrndx %x, sh_size %lx\n", sh_index, sh_size); sh_str = malloc(sh_size); if (!sh_str) { @@ -130,9 +133,8 @@ static int decode_elf64(FILE *felf, char **argv) * Specifies the byte offset from the beginning of the file * to the first byte in the section. */ - sh_offset = sh_table[header.e_shstrndx].sh_offset; - - debug("sh_offset\t0x%08x\n", header.e_shnum); + sh_offset = le64_to_cpu(sh_table[sh_index].sh_offset); + sh_num = le16_to_cpu(header.e_shnum); ret = fseek(felf, sh_offset, SEEK_SET); if (ret) { @@ -153,18 +155,22 @@ static int decode_elf64(FILE *felf, char **argv) return 30; } - for (i = 0; i < header.e_shnum; i++) { - /* fprintf(stderr, "%s\n", sh_str + sh_table[i].sh_name); Debug only */ - if (!strcmp(".rela.dyn", (sh_str + sh_table[i].sh_name))) { + for (i = 0; i < sh_num; i++) { + char *sh_name = sh_str + le32_to_cpu(sh_table[i].sh_name); + + debug("%s\n", sh_name); + + sh_addr = le64_to_cpu(sh_table[i].sh_addr); + sh_offset = le64_to_cpu(sh_table[i].sh_offset); + sh_size = le64_to_cpu(sh_table[i].sh_size); + + if (!strcmp(".rela.dyn", sh_name)) { debug("Found section\t\".rela_dyn\"\n"); - debug(" at addr\t0x%08x\n", - (unsigned int)sh_table[i].sh_addr); - debug(" at offset\t0x%08x\n", - (unsigned int)sh_table[i].sh_offset); - debug(" of size\t0x%08x\n", - (unsigned int)sh_table[i].sh_size); - rela_start = sh_table[i].sh_addr; - rela_end = rela_start + sh_table[i].sh_size; + debug(" at addr\t0x%08x\n", sh_addr); + debug(" at offset\t0x%08x\n", sh_offset); + debug(" of size\t0x%08x\n", sh_size); + rela_start = sh_addr; + rela_end = rela_start + sh_size; break; } } @@ -188,7 +194,9 @@ static int decode_elf32(FILE *felf, char **argv) { size_t size; Elf32_Ehdr header; - uint64_t section_header_base, section_header_size, sh_offset, sh_size; + uint64_t section_header_base, section_header_size; + uint32_t sh_addr, sh_offset, sh_size; + Elf32_Half sh_index, sh_num; Elf32_Shdr *sh_table; /* Elf symbol table */ int ret, i, machine; char *sh_str; @@ -204,7 +212,7 @@ static int decode_elf32(FILE *felf, char **argv) return 25; } - machine = header.e_machine; + machine = le16_to_cpu(header.e_machine); debug("Machine %d\n", machine); if (machine != EM_MICROBLAZE) { @@ -212,14 +220,10 @@ static int decode_elf32(FILE *felf, char **argv) return 30; } - text_base = header.e_entry; - section_header_base = header.e_shoff; - - debug("Section header base %x\n", section_header_base); - - section_header_size = header.e_shentsize * header.e_shnum; - - debug("Section header size %d\n", section_header_size); + text_base = le32_to_cpu(header.e_entry); + section_header_base = le32_to_cpu(header.e_shoff); + section_header_size = le16_to_cpu(header.e_shentsize) * + le16_to_cpu(header.e_shnum); sh_table = malloc(section_header_size); if (!sh_table) { @@ -247,8 +251,9 @@ static int decode_elf32(FILE *felf, char **argv) return 27; } - sh_size = sh_table[header.e_shstrndx].sh_size; - debug("e_shstrndx %x, sh_size %lx\n", header.e_shstrndx, sh_size); + sh_index = le16_to_cpu(header.e_shstrndx); + sh_size = le32_to_cpu(sh_table[sh_index].sh_size); + debug("e_shstrndx %x, sh_size %lx\n", sh_index, sh_size); sh_str = malloc(sh_size); if (!sh_str) { @@ -262,9 +267,8 @@ static int decode_elf32(FILE *felf, char **argv) * Specifies the byte offset from the beginning of the file * to the first byte in the section. */ - sh_offset = sh_table[header.e_shstrndx].sh_offset; - - debug("sh_offset %x\n", header.e_shnum); + sh_offset = le32_to_cpu(sh_table[sh_index].sh_offset); + sh_num = le16_to_cpu(header.e_shnum); ret = fseek(felf, sh_offset, SEEK_SET); if (ret) { @@ -277,7 +281,7 @@ static int decode_elf32(FILE *felf, char **argv) size = fread(sh_str, 1, sh_size, felf); if (size != sh_size) { - fprintf(stderr, "%s: Can't read section: %lx/%lx\n", + fprintf(stderr, "%s: Can't read section: %lx/%x\n", argv[0], size, sh_size); free(sh_str); free(sh_table); @@ -285,22 +289,29 @@ static int decode_elf32(FILE *felf, char **argv) return 30; } - for (i = 0; i < header.e_shnum; i++) { - debug("%s\n", sh_str + sh_table[i].sh_name); - if (!strcmp(".rela.dyn", (sh_str + sh_table[i].sh_name))) { + for (i = 0; i < sh_num; i++) { + char *sh_name = sh_str + le32_to_cpu(sh_table[i].sh_name); + + debug("%s\n", sh_name); + + sh_addr = le64_to_cpu(sh_table[i].sh_addr); + sh_offset = le64_to_cpu(sh_table[i].sh_offset); + sh_size = le64_to_cpu(sh_table[i].sh_size); + + if (!strcmp(".rela.dyn", sh_name)) { debug("Found section\t\".rela_dyn\"\n"); - debug(" at addr\t0x%08x\n", (unsigned int)sh_table[i].sh_addr); - debug(" at offset\t0x%08x\n", (unsigned int)sh_table[i].sh_offset); - debug(" of size\t0x%08x\n", (unsigned int)sh_table[i].sh_size); - rela_start = sh_table[i].sh_addr; - rela_end = rela_start + sh_table[i].sh_size; + debug(" at addr\t0x%08x\n", sh_addr); + debug(" at offset\t0x%08x\n", sh_offset); + debug(" of size\t0x%08x\n", sh_size); + rela_start = sh_addr; + rela_end = rela_start + sh_size; } - if (!strcmp(".dynsym", (sh_str + sh_table[i].sh_name))) { + if (!strcmp(".dynsym", sh_name)) { debug("Found section\t\".dynsym\"\n"); - debug(" at addr\t0x%08x\n", (unsigned int)sh_table[i].sh_addr); - debug(" at offset\t0x%08x\n", (unsigned int)sh_table[i].sh_offset); - debug(" of size\t0x%08x\n", (unsigned int)sh_table[i].sh_size); - dyn_start = sh_table[i].sh_addr; + debug(" at addr\t0x%08x\n", sh_addr); + debug(" at offset\t0x%08x\n", sh_offset); + debug(" of size\t0x%08x\n", sh_size); + dyn_start = sh_addr; } } @@ -386,9 +397,9 @@ static int rela_elf64(char **argv, FILE *f) return 4; } - swrela.r_offset = cpu_to_le64(rela.r_offset); - swrela.r_info = cpu_to_le64(rela.r_info); - swrela.r_addend = cpu_to_le64(rela.r_addend); + swrela.r_offset = le64_to_cpu(rela.r_offset); + swrela.r_info = le64_to_cpu(rela.r_info); + swrela.r_addend = le64_to_cpu(rela.r_addend); if (!supported_rela(&swrela)) continue; @@ -487,9 +498,9 @@ static int rela_elf32(char **argv, FILE *f) PRIu32 " r_addend:\t%" PRIx32 "\n", rela.r_offset, rela.r_info, rela.r_addend); - swrela.r_offset = cpu_to_le32(rela.r_offset); - swrela.r_info = cpu_to_le32(rela.r_info); - swrela.r_addend = cpu_to_le32(rela.r_addend); + swrela.r_offset = le32_to_cpu(rela.r_offset); + swrela.r_info = le32_to_cpu(rela.r_info); + swrela.r_addend = le32_to_cpu(rela.r_addend); debug("SWRela:\toffset:\t%" PRIx32 " r_info:\t%" PRIu32 " r_addend:\t%" PRIx32 "\n", -- 2.35.1

2 1

[PATCH] mtd: decommission the NAND museum
by Michael Trimarchi 15 Jul '22

15 Jul '22

Upstream commit f7025a43a9da26fb79684c6b75ddfe6b1b5986bf The MTD subsystem has its own small museum of ancient NANDs in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page and up to 8MiB page size. It is with great sorrow that I inform you that the museum is being decommissioned. The MTD subsystem is out of budget for Kconfig options and already has too many of them, and there is a general kernel trend to simplify the configuration menu. We remove the stone age exhibits along with closing the museum, but some of the iron age ones are transferred to the regular NAND depot. Namely, only those which have unique device IDs are transferred, and the ones which have conflicting device IDs are removed. Signed-off-by: Artem Bityutskiy <artem.bityutskiy(a)linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse(a)intel.com> Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- drivers/mtd/nand/raw/nand_ids.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index 7602dd30f1..4dece1b206 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -24,16 +24,6 @@ * extended chip ID. */ struct nand_flash_dev nand_flash_ids[] = { -#ifdef CONFIG_MTD_NAND_MUSEUM_IDS - LEGACY_ID_NAND("NAND 1MiB 5V 8-bit", 0x6e, 1, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 2MiB 5V 8-bit", 0x64, 2, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xe8, 1, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 1MiB 3,3V 8-bit", 0xec, 1, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 2MiB 3,3V 8-bit", 0xea, 2, SZ_4K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xd5, 4, SZ_8K, SP_OPTIONS), - - LEGACY_ID_NAND("NAND 8MiB 3,3V 8-bit", 0xe6, 8, SZ_8K, SP_OPTIONS), -#endif /* * Some incompatible NAND chips share device ID's and so must be * listed by full ID. We list them first so that we can easily identify -- 2.34.1

1 0

[PATCH 1/2] phy: sun4i-usb: Do not drive VBUS with external VBUS present
by Samuel Holland 15 Jul '22

15 Jul '22

It is possible to use host-side USB with externally-provided VBUS. For example, some USB OTG cables have an extra power input which powers both the board and the USB peripheral. To support this setup, skip enabling the VBUS switch/regulator if VBUS voltage is already present. This behavior matches the Linux PHY driver. Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- drivers/phy/allwinner/phy-sun4i-usb.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index aef2cb8f6f82..e1b01e732515 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -224,6 +224,12 @@ static int sun4i_usb_phy_power_on(struct phy *phy) initial_usb_scan_delay = 0; } + /* For phy0 only turn on Vbus if we don't have an ext. Vbus */ + if (phy->id == 0 && sun4i_usb_phy_vbus_detect(phy)) { + dev_warn(phy->dev, "External vbus detected, not enabling our own vbus\n"); + return 0; + } + if (dm_gpio_is_valid(&usb_phy->gpio_vbus)) dm_gpio_set_value(&usb_phy->gpio_vbus, 1); -- 2.35.1

1 1

[PATCH v4 0/2] usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
by Angus Ainslie 14 Jul '22

14 Jul '22

Changes since v3: Rebased onto usb/master. Changes since v2: Add a second patch to deal with CI failures due to the new options. Changes since v1: Updated Kconfig depends Angus Ainslie (2): usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC configs/am43xx_evm_defconfig | 2 ++ configs/am43xx_evm_usbhost_boot_defconfig | 2 ++ configs/am43xx_hs_evm_defconfig | 2 ++ configs/am57xx_hs_evm_usb_defconfig | 2 ++ configs/am65x_evm_a53_defconfig | 2 ++ configs/am65x_evm_r5_usbdfu_defconfig | 2 ++ configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_usb_defconfig | 2 ++ drivers/usb/dwc3/Kconfig | 7 +++++++ drivers/usb/dwc3/Makefile | 2 +- 11 files changed, 26 insertions(+), 1 deletion(-) -- 2.34.1

2 4

[PULL] u-boot-mips for v2022.10
by Daniel Schwierzeck 14 Jul '22

14 Jul '22

Hi Tom, this time with all Kconfig migrations from -next included ;) Gitlab CI: https://source.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/12740 Azure: https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=31&vi… The following changes since commit 357fa8bb4d40abf411a6cca70f5a2dd6413028ea: Merge tag 'u-boot-stm32-20220712' of https://source.denx.de/u-boot/custodians/u-boot-stm (2022-07-13 08:09:20 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-mips.git/ tags/mips-pull-2022-07-13 for you to fetch changes up to dd6bf539e88aff1b8caeeccbe9af59b2191a178b: MAINTAINERS: update maintainer for MediaTek MIPS platform (2022-07-13 23:03:37 +0200) ---------------------------------------------------------------- - MIPS: add drivers and board support for Mediatek MT7621 SoC ---------------------------------------------------------------- Weijie Gao (25): mips: add asm/mipsmtregs.h for MIPS multi-threading mips: add more definitions for asm/cm.h mips: add __image_copy_len for SPL linker script mips: add support for noncached_alloc() mips: mtmips: add support for MediaTek MT7621 SoC mips: mtmips: add two reference boards for mt7621 doc: mediatek: add documentation for mt7621 reference boards clk: mtmips: add clock driver for MediaTek MT7621 SoC reset: mtmips: add reset controller support for MediaTek MT7621 SoC pinctrl: mtmips: add support for MediaTek MT7621 SoC usb: xhci-mtk: add support for MediaTek MT7621 SoC phy: mtk-tphy: add support for MediaTek MT7621 SoC spi: add support for MediaTek MT7621 SoC gpio: add support for MediaTek MT7621 SoC watchdog: add support for MediaTek MT7621 SoC mmc: mediatek: add support for MediaTek MT7621 SoC net: mediatek: remap iobase address net: mediatek: use regmap api to modify ethsys registers net: mediatek: add support for MediaTek MT7621 SoC nand: raw: add support for MediaTek MT7621 SoC spl: allow using nand base without standard nand driver spl: spl_legacy: fix the use of SPL_COPY_PAYLOAD_ONLY spl: nand: support loading legacy image with payload compressed tools: mtk_image: add support for MT7621 NAND images MAINTAINERS: update maintainer for MediaTek MIPS platform MAINTAINERS | 8 + arch/mips/Makefile | 5 + arch/mips/cpu/u-boot-spl.lds | 3 + arch/mips/dts/Makefile | 2 + arch/mips/dts/mediatek,mt7621-nand-rfb.dts | 67 ++ arch/mips/dts/mediatek,mt7621-rfb.dts | 82 ++ arch/mips/dts/mt7621-u-boot.dtsi | 111 +++ arch/mips/dts/mt7621.dtsi | 349 +++++++ arch/mips/include/asm/cm.h | 67 ++ arch/mips/include/asm/mipsmtregs.h | 142 +++ arch/mips/include/asm/system.h | 20 + arch/mips/lib/cache.c | 43 + arch/mips/mach-mtmips/Kconfig | 49 +- arch/mips/mach-mtmips/Makefile | 4 + arch/mips/mach-mtmips/cpu.c | 2 +- arch/mips/mach-mtmips/mt7621/Kconfig | 115 +++ arch/mips/mach-mtmips/mt7621/Makefile | 14 + arch/mips/mach-mtmips/mt7621/init.c | 246 +++++ arch/mips/mach-mtmips/mt7621/mt7621.h | 229 +++++ arch/mips/mach-mtmips/mt7621/serial.c | 23 + arch/mips/mach-mtmips/mt7621/spl/Makefile | 9 + arch/mips/mach-mtmips/mt7621/spl/cps.c | 153 +++ arch/mips/mach-mtmips/mt7621/spl/dram.c | 153 +++ arch/mips/mach-mtmips/mt7621/spl/dram.h | 39 + arch/mips/mach-mtmips/mt7621/spl/launch.c | 100 ++ arch/mips/mach-mtmips/mt7621/spl/launch.h | 52 + arch/mips/mach-mtmips/mt7621/spl/launch_ll.S | 339 +++++++ arch/mips/mach-mtmips/mt7621/spl/serial.c | 24 + arch/mips/mach-mtmips/mt7621/spl/spl.c | 96 ++ arch/mips/mach-mtmips/mt7621/spl/start.S | 226 +++++ arch/mips/mach-mtmips/mt7621/sram_init.S | 22 + arch/mips/mach-mtmips/mt7621/tpl/Makefile | 4 + arch/mips/mach-mtmips/mt7621/tpl/start.S | 161 ++++ arch/mips/mach-mtmips/mt7621/tpl/tpl.c | 144 +++ board/mediatek/mt7621/MAINTAINERS | 8 + board/mediatek/mt7621/Makefile | 3 + board/mediatek/mt7621/board.c | 6 + common/spl/Kconfig | 2 +- common/spl/spl_legacy.c | 21 +- common/spl/spl_nand.c | 27 + configs/mt7621_nand_rfb_defconfig | 89 ++ configs/mt7621_rfb_defconfig | 86 ++ doc/board/index.rst | 1 + doc/board/mediatek/index.rst | 9 + doc/board/mediatek/mt7621.rst | 48 + drivers/clk/mtmips/Makefile | 1 + drivers/clk/mtmips/clk-mt7621.c | 288 ++++++ drivers/gpio/Kconfig | 2 +- drivers/mmc/mtk-sd.c | 13 + drivers/mtd/nand/raw/Kconfig | 17 +- drivers/mtd/nand/raw/Makefile | 2 + drivers/mtd/nand/raw/mt7621_nand.c | 1205 ++++++++++++++++++++++++ drivers/mtd/nand/raw/mt7621_nand.h | 29 + drivers/mtd/nand/raw/mt7621_nand_spl.c | 237 +++++ drivers/net/mtk_eth.c | 45 +- drivers/phy/Kconfig | 2 +- drivers/pinctrl/mtmips/Kconfig | 9 + drivers/pinctrl/mtmips/Makefile | 1 + drivers/pinctrl/mtmips/pinctrl-mt7621.c | 306 ++++++ drivers/pinctrl/mtmips/pinctrl-mtmips-common.c | 4 +- drivers/pinctrl/mtmips/pinctrl-mtmips-common.h | 12 + drivers/spi/Kconfig | 2 +- drivers/usb/host/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- include/configs/mt7621.h | 43 + include/dt-bindings/clock/mt7621-clk.h | 46 + include/dt-bindings/reset/mt7621-reset.h | 38 + tools/mtk_image.c | 182 ++++ tools/mtk_image.h | 24 + 69 files changed, 5879 insertions(+), 36 deletions(-) create mode 100644 arch/mips/dts/mediatek,mt7621-nand-rfb.dts create mode 100644 arch/mips/dts/mediatek,mt7621-rfb.dts create mode 100644 arch/mips/dts/mt7621-u-boot.dtsi create mode 100644 arch/mips/dts/mt7621.dtsi create mode 100644 arch/mips/include/asm/mipsmtregs.h create mode 100644 arch/mips/mach-mtmips/mt7621/Kconfig create mode 100644 arch/mips/mach-mtmips/mt7621/Makefile create mode 100644 arch/mips/mach-mtmips/mt7621/init.c create mode 100644 arch/mips/mach-mtmips/mt7621/mt7621.h create mode 100644 arch/mips/mach-mtmips/mt7621/serial.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/Makefile create mode 100644 arch/mips/mach-mtmips/mt7621/spl/cps.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/dram.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/dram.h create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch.h create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch_ll.S create mode 100644 arch/mips/mach-mtmips/mt7621/spl/serial.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/spl.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/start.S create mode 100644 arch/mips/mach-mtmips/mt7621/sram_init.S create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/Makefile create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/start.S create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/tpl.c create mode 100644 board/mediatek/mt7621/MAINTAINERS create mode 100644 board/mediatek/mt7621/Makefile create mode 100644 board/mediatek/mt7621/board.c create mode 100644 configs/mt7621_nand_rfb_defconfig create mode 100644 configs/mt7621_rfb_defconfig create mode 100644 doc/board/mediatek/index.rst create mode 100644 doc/board/mediatek/mt7621.rst create mode 100644 drivers/clk/mtmips/clk-mt7621.c create mode 100644 drivers/mtd/nand/raw/mt7621_nand.c create mode 100644 drivers/mtd/nand/raw/mt7621_nand.h create mode 100644 drivers/mtd/nand/raw/mt7621_nand_spl.c create mode 100644 drivers/pinctrl/mtmips/pinctrl-mt7621.c create mode 100644 include/configs/mt7621.h create mode 100644 include/dt-bindings/clock/mt7621-clk.h create mode 100644 include/dt-bindings/reset/mt7621-reset.h

2 1

[PATCH v3 0/2] usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
by Angus Ainslie 14 Jul '22

14 Jul '22

Changes since v2: Add a second patch to deal with CI failures due to the new options. Changes since v1: Updated Kconfig depends Angus Ainslie (2): usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver configs: get rid of build warnings due to SPL_USB_DWC3_GENERIC configs/am43xx_evm_defconfig | 2 ++ configs/am43xx_evm_usbhost_boot_defconfig | 2 ++ configs/am43xx_hs_evm_defconfig | 2 ++ configs/am57xx_hs_evm_usb_defconfig | 2 ++ configs/am65x_evm_a53_defconfig | 2 ++ configs/am65x_evm_r5_usbdfu_defconfig | 2 ++ configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_usb_defconfig | 2 ++ drivers/usb/dwc3/Kconfig | 7 +++++++ drivers/usb/dwc3/Makefile | 2 +- 11 files changed, 26 insertions(+), 1 deletion(-) -- 2.34.1

2 9

[PATCH 00/11] Port manufacturer specific initialization
by Michael Trimarchi 14 Jul '22

14 Jul '22

In preparation of re-sync of mtd stack, I opt to move the current stack slowly in order to have a more easy sync and test. I would like to prepare uboot to support no-jedec and no-onfi compliant nand so I need to clean up a bit the code we have now and upstream some of the support. In this series we expect no functional change Tested on: - imx6ull Micron MT29F2G08ABAGAH4 Michael Trimarchi (11): mtd: nand: Get rid of busw parameter mtd: nand: Store nand ID in struct nand_chip mtd: nand: Add manufacturer specific initialization/detection steps mtd: nand: Get rid of mtd variable in function calls mtd: nand: Export symbol nand_decode_ext_id mtd: nand: Move Samsung specific init/detection logic in nand_samsung.c mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c mtd: nand: Move Micron specific init logic in nand_micron.c mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c mtd: nand: Move Macronix specific initialization in nand_macronix.c drivers/mtd/nand/raw/Makefile | 10 +- drivers/mtd/nand/raw/nand_amd.c | 53 ++++ drivers/mtd/nand/raw/nand_base.c | 359 ++++++++++----------------- drivers/mtd/nand/raw/nand_hynix.c | 86 +++++++ drivers/mtd/nand/raw/nand_ids.c | 14 +- drivers/mtd/nand/raw/nand_macronix.c | 32 +++ drivers/mtd/nand/raw/nand_micron.c | 88 +++++++ drivers/mtd/nand/raw/nand_samsung.c | 90 +++++++ drivers/mtd/nand/raw/nand_toshiba.c | 53 ++++ include/linux/mtd/rawnand.h | 78 ++++-- 10 files changed, 599 insertions(+), 264 deletions(-) create mode 100644 drivers/mtd/nand/raw/nand_amd.c create mode 100644 drivers/mtd/nand/raw/nand_hynix.c create mode 100644 drivers/mtd/nand/raw/nand_macronix.c create mode 100644 drivers/mtd/nand/raw/nand_micron.c create mode 100644 drivers/mtd/nand/raw/nand_samsung.c create mode 100644 drivers/mtd/nand/raw/nand_toshiba.c -- 2.34.1

1 0

[PATCH 11/11] mtd: nand: Move Macronix specific initialization in nand_macronix.c
by Michael Trimarchi 14 Jul '22

14 Jul '22

Upstream commit 3b5206f4be9b65d2f0f85b3239cf117a1d0de7ce Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon(a)free-electrons.com> Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- drivers/mtd/nand/raw/Makefile | 4 +++- drivers/mtd/nand/raw/nand_base.c | 11 ---------- drivers/mtd/nand/raw/nand_ids.c | 2 +- drivers/mtd/nand/raw/nand_macronix.c | 32 ++++++++++++++++++++++++++++ include/linux/mtd/rawnand.h | 1 + 5 files changed, 37 insertions(+), 13 deletions(-) create mode 100644 drivers/mtd/nand/raw/nand_macronix.c diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index e1d511c12c..c8317a1078 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -14,7 +14,8 @@ obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o -obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_amd.o nand_hynix.o nand_micron.o \ +obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_amd.o nand_hynix.o \ + nand_macronix.o nand_micron.o \ nand_samsung.o nand_toshiba.o obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o obj-$(CONFIG_TPL_NAND_INIT) += nand.o @@ -34,6 +35,7 @@ obj-y += nand_ecc.o obj-y += nand_base.o obj-y += nand_amd.o obj-y += nand_hynix.o +obj-y += nand_macronix.o obj-y += nand_micron.o obj-y += nand_samsung.o obj-y += nand_toshiba.o diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index f79e57b9fb..a38cc4d135 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4218,22 +4218,11 @@ static void nand_decode_id(struct nand_chip *chip, static void nand_decode_bbm_options(struct mtd_info *mtd, struct nand_chip *chip) { - int maf_id = chip->id.data[0]; - /* Set the bad block position */ if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) chip->badblockpos = NAND_LARGE_BADBLOCK_POS; else chip->badblockpos = NAND_SMALL_BADBLOCK_POS; - - /* - * Bad block marker is stored in the last page of each block on Samsung - * and Hynix MLC devices; stored in first two pages of each block on - * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, - * AMD/Spansion, and Macronix. All others scan only the first page. - */ - if (nand_is_slc(chip) && maf_id == NAND_MFR_MACRONIX) - chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; } static inline bool is_full_id_nand(struct nand_flash_dev *type) diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index c78f2e0880..7602dd30f1 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -197,7 +197,7 @@ struct nand_manufacturers nand_manuf_ids[] = { {NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops}, {NAND_MFR_MICRON, "Micron", &micron_nand_manuf_ops}, {NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops}, - {NAND_MFR_MACRONIX, "Macronix"}, + {NAND_MFR_MACRONIX, "Macronix", &macronix_nand_manuf_ops}, {NAND_MFR_EON, "Eon"}, {NAND_MFR_SANDISK, "SanDisk"}, {NAND_MFR_INTEL, "Intel"}, diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c new file mode 100644 index 0000000000..3cccb5869a --- /dev/null +++ b/drivers/mtd/nand/raw/nand_macronix.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2017 Free Electrons + * Copyright (C) 2017 NextThing Co + * + * Author: Boris Brezillon <boris.brezillon(a)free-electrons.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/bug.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/rawnand.h> + +static int macronix_nand_init(struct nand_chip *chip) +{ + if (nand_is_slc(chip)) + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; + + return 0; +} + +const struct nand_manufacturer_ops macronix_nand_manuf_ops = { + .init = macronix_nand_init, +}; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index bb1a359a9c..aa45558b3d 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1143,6 +1143,7 @@ extern const struct nand_manufacturer_ops samsung_nand_manuf_ops; extern const struct nand_manufacturer_ops hynix_nand_manuf_ops; extern const struct nand_manufacturer_ops micron_nand_manuf_ops; extern const struct nand_manufacturer_ops amd_nand_manuf_ops; +extern const struct nand_manufacturer_ops macronix_nand_manuf_ops; int nand_default_bbt(struct mtd_info *mtd); int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs); -- 2.34.1

1 0

[PATCH 10/11] mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.c
by Michael Trimarchi 14 Jul '22

14 Jul '22

Upstream commit 229204da53b31d576fcc1c93a33626943ea8202c Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon(a)free-electrons.com> Acked-by: Richard Weinberger <richard(a)nod.at> Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- drivers/mtd/nand/raw/Makefile | 4 ++- drivers/mtd/nand/raw/nand_amd.c | 53 ++++++++++++++++++++++++++++++++ drivers/mtd/nand/raw/nand_base.c | 17 +--------- drivers/mtd/nand/raw/nand_ids.c | 2 +- include/linux/mtd/rawnand.h | 1 + 5 files changed, 59 insertions(+), 18 deletions(-) create mode 100644 drivers/mtd/nand/raw/nand_amd.c diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index e8fb451076..e1d511c12c 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -14,7 +14,8 @@ obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o -obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_hynix.o nand_micron.o nand_samsung.o nand_toshiba.o +obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_amd.o nand_hynix.o nand_micron.o \ + nand_samsung.o nand_toshiba.o obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o obj-$(CONFIG_TPL_NAND_INIT) += nand.o ifeq ($(CONFIG_SPL_ENV_SUPPORT),y) @@ -31,6 +32,7 @@ obj-y += nand_ids.o obj-y += nand_util.o obj-y += nand_ecc.o obj-y += nand_base.o +obj-y += nand_amd.o obj-y += nand_hynix.o obj-y += nand_micron.o obj-y += nand_samsung.o diff --git a/drivers/mtd/nand/raw/nand_amd.c b/drivers/mtd/nand/raw/nand_amd.c new file mode 100644 index 0000000000..f11166f361 --- /dev/null +++ b/drivers/mtd/nand/raw/nand_amd.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2017 Free Electrons + * Copyright (C) 2017 NextThing Co + * + * Author: Boris Brezillon <boris.brezillon(a)free-electrons.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/bug.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/rawnand.h> + +static void amd_nand_decode_id(struct nand_chip *chip) +{ + struct mtd_info *mtd = nand_to_mtd(chip); + + nand_decode_ext_id(chip); + + /* + * Check for Spansion/AMD ID + repeating 5th, 6th byte since + * some Spansion chips have erasesize that conflicts with size + * listed in nand_ids table. + * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) + */ + if (chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 && + chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 && + mtd->writesize == 512) { + mtd->erasesize = 128 * 1024; + mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1); + } +} + +static int amd_nand_init(struct nand_chip *chip) +{ + if (nand_is_slc(chip)) + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; + + return 0; +} + +const struct nand_manufacturer_ops amd_nand_manuf_ops = { + .detect = amd_nand_decode_id, + .init = amd_nand_init, +}; diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index d2079c73fb..f79e57b9fb 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4201,7 +4201,6 @@ static void nand_decode_id(struct nand_chip *chip, struct nand_flash_dev *type) { struct mtd_info *mtd = &chip->mtd; - int maf_id = chip->id.data[0]; mtd->erasesize = type->erasesize; mtd->writesize = type->pagesize; @@ -4209,19 +4208,6 @@ static void nand_decode_id(struct nand_chip *chip, /* All legacy ID NAND are small-page, SLC */ chip->bits_per_cell = 1; - - /* - * Check for Spansion/AMD ID + repeating 5th, 6th byte since - * some Spansion chips have erasesize that conflicts with size - * listed in nand_ids table. - * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) - */ - if (maf_id == NAND_MFR_AMD && chip->id.data[4] != 0x00 && chip->id.data[5] == 0x00 - && chip->id.data[6] == 0x00 && chip->id.data[7] == 0x00 - && mtd->writesize == 512) { - mtd->erasesize = 128 * 1024; - mtd->erasesize <<= ((chip->id.data[3] & 0x03) << 1); - } } /* @@ -4246,8 +4232,7 @@ static void nand_decode_bbm_options(struct mtd_info *mtd, * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, * AMD/Spansion, and Macronix. All others scan only the first page. */ - if (nand_is_slc(chip) && - (maf_id == NAND_MFR_AMD || maf_id == NAND_MFR_MACRONIX)) + if (nand_is_slc(chip) && maf_id == NAND_MFR_MACRONIX) chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; } diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index bb5ac8337f..c78f2e0880 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -196,7 +196,7 @@ struct nand_manufacturers nand_manuf_ids[] = { {NAND_MFR_STMICRO, "ST Micro"}, {NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops}, {NAND_MFR_MICRON, "Micron", &micron_nand_manuf_ops}, - {NAND_MFR_AMD, "AMD/Spansion"}, + {NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops}, {NAND_MFR_MACRONIX, "Macronix"}, {NAND_MFR_EON, "Eon"}, {NAND_MFR_SANDISK, "SanDisk"}, diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index ec0f77b24b..bb1a359a9c 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1142,6 +1142,7 @@ extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops; extern const struct nand_manufacturer_ops samsung_nand_manuf_ops; extern const struct nand_manufacturer_ops hynix_nand_manuf_ops; extern const struct nand_manufacturer_ops micron_nand_manuf_ops; +extern const struct nand_manufacturer_ops amd_nand_manuf_ops; int nand_default_bbt(struct mtd_info *mtd); int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs); -- 2.34.1

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