July 2022 - U-Boot

[PATCH v2 3/5] Adapt soft reset to other protocols in Rock Pi 4 rev 1.4
by Xavier Drudis Ferran 15 Jul '22

15 Jul '22

XTX25F32B does not use octal mode and accepts soft reset, despite its SFDP tables. Soft reset at U-Boot exit seems to be required to write to /dev/mtd0 from flashrom in linux. Soft reset at U-Boot start seems to help booting from SPI (at least with the dts properties I'm using). The first soft reset is done before the flash id is read and the fixups can be called, and v1 of this patch would now fail in Rock Pi 4 because of unsupported operation if tried with SNOR_PROTO_8_8_8_DTR. This was since commit 5752d6ae8daa ("spi: spi-mem: add spi_mem_dtr_supports_op()") by Pratyush Yadav. So try a few modes until SNOR_PROTO_1_1_1 works and then remember the reset_proto. This tries to be useful for other boards, but I still don't know any other that needs it and what would work there. Changes from v1: - Generalization. First soft reset with SNOR_PROTO_8_8_8_DTR stopped working since the improvement by Pratyush Yadav. Instead of trying 8_8_8_DTR always at first reset, and force 1_1_1 once XTX25F32B is detected (so, for last reset) do a generic loop for any chip trying protocols until one is supported and starting by the 8_8_8_DTR protocol (the one previously used). This leverages the fixed supports_op() to take into account controller and device. Signed-off-by: Xavier Drudis Ferran <xdrudis(a)tinet.cat> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Vignesh R <vigneshr(a)ti.com> --- drivers/mtd/spi/spi-nor-core.c | 98 ++++++++++++++++++++++++++++++---- include/linux/mtd/spi-nor.h | 5 ++ 2 files changed, 92 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3b7c817c02..dcf4f0c921 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3526,6 +3526,18 @@ static struct spi_nor_fixups mt35xu512aba_fixups = { }; #endif /* CONFIG_SPI_FLASH_MT35XU */ +#ifdef CONFIG_SPI_FLASH_XTX +static void xtx25f32b_post_sfdp_fixup(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) +{ + nor->flags |= SNOR_F_SOFT_RESET; +} + +static struct spi_nor_fixups xtx25f32b_fixups = { + .post_sfdp = xtx25f32b_post_sfdp_fixup, +}; +#endif + /** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed * @nor: pointer to a 'struct spi_nor' * @@ -3603,6 +3615,53 @@ static int spi_nor_init(struct spi_nor *nor) } #ifdef CONFIG_SPI_FLASH_SOFT_RESET +/** + * spi_nor_soft_reset_setup_op() - Initial setup of op for soft + * reset. Initializes nor->reset_proto iff needed. + * + * @nor: the spi_nor structure nor->reset_proto will be used or if + * null, it'll be assigned the used protocol, from a few + * protocols that get tried for device and controller + * support. + * + * @opcode operation code for soft reset (or soft reset enable, + * we currently assume they work the same in all systems) + * + * @op: pointer to operation struct to set up for reset or reset + * enable. + */ +static void spi_nor_soft_reset_setup_op(struct spi_nor *nor, u16 opcode, struct spi_mem_op *op) +{ + enum spi_nor_protocol reset_proto; + /** + * admitedly arbitrary list, to be improved if there's + * new knowledge of what works in different systems + */ + enum spi_nor_protocol reset_proto_candidates[] = { + SNOR_PROTO_8_8_8_DTR, SNOR_PROTO_1_1_1_DTR, SNOR_PROTO_8_8_8, + SNOR_PROTO_4_4_4, SNOR_PROTO_2_2_2, SNOR_PROTO_1_1_1 + }; + + if (nor->reset_proto) { + *op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DATA); + spi_nor_setup_op(nor, op, nor->reset_proto); + } else { + for (int i = 0; i < ARRAY_SIZE(reset_proto_candidates) && !nor->reset_proto ; i++) { + reset_proto = reset_proto_candidates[i]; + *op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_NO_ADDR, + SPI_MEM_OP_NO_DATA); + spi_nor_setup_op(nor, op, reset_proto); + if (spi_mem_supports_op(nor->spi, op)) + nor->reset_proto = reset_proto; + } + } +} + /** * spi_nor_soft_reset() - perform the JEDEC Software Reset sequence * @nor: the spi_nor structure @@ -3621,11 +3680,7 @@ static int spi_nor_soft_reset(struct spi_nor *nor) ext = nor->cmd_ext_type; nor->cmd_ext_type = SPI_NOR_EXT_REPEAT; - op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_NO_ADDR, - SPI_MEM_OP_NO_DATA); - spi_nor_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR); + spi_nor_soft_reset_setup_op(nor, SPINOR_OP_SRSTEN, &op); ret = spi_mem_exec_op(nor->spi, &op); if (ret) { dev_warn(nor->dev, "Software reset enable failed: %d\n", ret); @@ -3636,7 +3691,7 @@ static int spi_nor_soft_reset(struct spi_nor *nor) SPI_MEM_OP_NO_DUMMY, SPI_MEM_OP_NO_ADDR, SPI_MEM_OP_NO_DATA); - spi_nor_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR); + spi_nor_setup_op(nor, &op, nor->reset_proto); ret = spi_mem_exec_op(nor->spi, &op); if (ret) { dev_warn(nor->dev, "Software reset failed: %d\n", ret); @@ -3654,18 +3709,34 @@ out: nor->cmd_ext_type = ext; return ret; } -#endif /* CONFIG_SPI_FLASH_SOFT_RESET */ + +static bool flash_supports_proto(const struct flash_info *flash, enum spi_nor_protocol proto) +{ + switch (spi_nor_get_protocol_data_nbits(proto)) { + case 8: + return flash->flags & (spi_nor_protocol_is_dtr(proto) + ? SPI_NOR_OCTAL_DTR_READ + : SPI_NOR_OCTAL_READ); + case 4: return flash->flags & SPI_NOR_QUAD_READ; + case 2: return flash->flags & SPI_NOR_DUAL_READ; + default: + return 1; + } +} int spi_nor_remove(struct spi_nor *nor) { -#ifdef CONFIG_SPI_FLASH_SOFT_RESET - if (nor->info->flags & SPI_NOR_OCTAL_DTR_READ && + if (flash_supports_proto(nor->info, nor->reset_proto) && nor->flags & SNOR_F_SOFT_RESET) return spi_nor_soft_reset(nor); -#endif - return 0; } +#else /* !CONFIG_SPI_FLASH_SOFT_RESET */ +int spi_nor_remove(struct spi_nor *nor) +{ + return 0; +} +#endif /* CONFIG_SPI_FLASH_SOFT_RESET */ void spi_nor_set_fixups(struct spi_nor *nor) { @@ -3696,6 +3767,11 @@ void spi_nor_set_fixups(struct spi_nor *nor) if (!strcmp(nor->info->name, "mt35xu512aba")) nor->fixups = &mt35xu512aba_fixups; #endif + +#ifdef CONFIG_SPI_FLASH_XTX + if (!strcmp(nor->info->name, "xt25f32b")) + nor->fixups = &xtx25f32b_fixups; +#endif } int spi_nor_scan(struct spi_nor *nor) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 4ceeae623d..550527ab0c 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -490,6 +490,8 @@ struct spi_flash { * @read_proto: the SPI protocol for read operations * @write_proto: the SPI protocol for write operations * @reg_proto the SPI protocol for read_reg/write_reg/erase operations + * @reset_proto: The SPI protocol for soft reset to return to state expected + * by OS before running the OS (at remove time) or at sf probe * @cmd_buf: used by the write_reg * @cmd_ext_type: the command opcode extension for DTR mode. * @fixups: flash-specific fixup hooks. @@ -535,6 +537,9 @@ struct spi_nor { enum spi_nor_protocol read_proto; enum spi_nor_protocol write_proto; enum spi_nor_protocol reg_proto; +#ifdef CONFIG_SPI_FLASH_SOFT_RESET + enum spi_nor_protocol reset_proto; +#endif bool sst_write_second; u32 flags; u8 cmd_buf[SPI_NOR_MAX_CMD_SIZE]; -- 2.20.1

1 0

[PATCH v2 2/5] Add XTX SPI NOR 4MiB Flash chip in Rock Pi 4 boards from rev 1.4 on.
by Xavier Drudis Ferran 15 Jul '22

15 Jul '22

Configure Rock Pi 4 to boot from SPI NOR Flash. Based on flash chip, board documentation and tests, this is the fastest I could use it. This seems to be the minimum necessary configuration for Rock Pi 4 to be able to boot from SPI NOR Flash. With the next patch, it works to sf probe 1:0, sf read, sf erase, sf write, sf read and then boot linux and flashrom can write to it. Sometimes flashrom seems to fail to write when at U-Boot stage there was no sf read or write, not sure why. Changes from v1: - include CONFIG_SF_DEFAULT_BUS=1 now that numeration will be unified between U-Boot and SPL (at patch 5/5) Signed-off-by: Xavier Drudis Ferran <xdrudis(a)tinet.cat> Cc: Simon Glass <sjg(a)chromium.org> Cc: Philipp Tomsich <philipp.tomsich(a)vrull.eu> Cc: Kever Yang <kever.yang(a)rock-chips.com> --- arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 18 ++++++++++++++++++ configs/rock-pi-4-rk3399_defconfig | 22 ++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi index c17e769f64..4c2fe8f6bc 100644 --- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi @@ -15,3 +15,21 @@ &vdd_log { regulator-init-microvolt = <950000>; }; + +&spi1 { + status = "okay"; + spi-max-frequency = <40000000>; + spi-activate-delay = <12000>; /* 12 ms */ + + norflash: flash@0 { + compatible = "rockchip,spidev", "jedec,spi-nor"; + reg = <0>; + + spi-max-frequency = <40000000>; + spi-cpha; + spi-cpol; + + status = "okay"; + u-boot,dm-pre-reloc; + }; +}; diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index eb5778dc17..93a8d3fd23 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -13,6 +13,8 @@ CONFIG_BOOTSTAGE_STASH_ADDR=0x3fbd0000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_ENV_OFFSET_REDUND=0x3e0000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -36,6 +38,11 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0xb0000 CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y @@ -57,21 +64,36 @@ CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SF_DEFAULT_MODE=0x3 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_NVME_PCI=y CONFIG_PCI=y +CONFIG_SPL_PHY=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y +CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y +CONFIG_SPL_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_RK3399_LPDDR4=y CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y -- 2.20.1

1 0

[PATCH v2 1/5] mtd: si: spi-nor: Add Rock pi 4b new flash chip
by Xavier Drudis Ferran 15 Jul '22

15 Jul '22

Radxa Rock Pi 4B from version 1.4 on carries a 4MiB XTX Technology Inc 25F32B SPI NOR Flash. (previous versions had pads where users could solder different chips). Add its parameters to spi-nor-ids.c so U-Boot can discover it and (after further changes) we can boot from SPI. Note that the Flash is declared to be dual and quad capable because the datasheet [4] says so but I couldn't try it because in Rock Pi 4 it is not wired for QuadSPI, and rk3399 does not seem to support dual SPI either (or I couldn't find any register to configure spi1tx and spi1rx as bidirectional). But the same Flash part could be used as in quad or dual model in some other board. Likewise locks are in the datasheet but untested. Changes from v1: none (just retested with current next) The part has been added to downstream U-Boot [1] and linux [2] [3]: Link: [1] https://github.com/armbian/build/commit/c41cb4c454570127ad3238f6b901fbf3aa7… Link: [2] https://github.com/radxa/kernel/blob/release-4.4-rockpi4/drivers/mtd/spi-no… Link: [3] https://github.com/radxa/kernel/commit/8216f17965de7bc7ced7092aab0e2bfe1683… Link: [4] https://www.xtxtech.com/download/?AId=157 Signed-off-by: Xavier Drudis Ferran <xdrudis(a)tinet.cat> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Vignesh R <vigneshr(a)ti.com> --- drivers/mtd/spi/spi-nor-ids.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 67278c40e3..b8df694202 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -425,6 +425,9 @@ const struct flash_info spi_nor_ids[] = { #ifdef CONFIG_SPI_FLASH_XTX /* XTX Technology (Shenzhen) Limited */ { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("xt25f32b", 0x0b4016, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ + | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_SST26LOCK) }, #endif { }, }; -- 2.20.1

1 0

[PATCH v6 0/7] tpm: rng: Move TPM RNG functionality to driver model
by Sughosh Ganu 15 Jul '22

15 Jul '22

The TPM device provides the random number generator(RNG) functionality, whereby sending a command to the TPM device results in the TPM device responding with random bytes. There was a discussion on the mailing list earlier[1], where it was explained that platforms with a TPM device can install the EFI_RNG_PROTOCOL for getting the random bytes instead of populating the dtb with the kaslr-seed property. That would make it possible to measure the dtb. The TPM uclass driver adds the RNG child device as part of it's post_probe function. Some additional changes have also been made to facilitate the use of the RNG devices, including extending the 'rng' command to take the RNG device as one of the command-line parameters. This series depends on a patch[2] from Simon Glass for moving the TPM device version detection functions to the tpm_api.h header as static inline functions. These patches were under discussion earlier, specifically the patch to add the RNG functionality under the TPM device as a child, either through manual binding or through the device tree. Ilias had commented on the discussion last[3]. The discussion can be resumed through this version. I have dropped certain patches which were changing some of the TPM API functions to return an int instead of the current u32. These patches have been dropped due to review comments from Simon[4]. This work can be taken up separately, if desired. [1] - https://lore.kernel.org/u-boot/20220103120738.47835-1-ilias.apalodimas@lina… [2] - https://lore.kernel.org/u-boot/20220301001125.1554442-2-sjg@chromium.org/T/… [3] - https://lists.denx.de/pipermail/u-boot/2022-April/481708.html [4] - https://lists.denx.de/pipermail/u-boot/2022-March/477883.html Simon Glass (1): tpm: Export the TPM-version functions Sughosh Ganu (6): tpm: rng: Add driver model interface for TPM RNG device tpm: Add the RNG child device cmd: rng: Add support for selecting RNG device cmd: rng: Use a statically allocated array for random bytes doc: rng: Add documentation for the rng command test: rng: Add a UT testcase for the rng command cmd/Kconfig | 1 + cmd/rng.c | 42 +++++++++++------ doc/usage/cmd/rng.rst | 26 +++++++++++ doc/usage/index.rst | 1 + drivers/rng/Kconfig | 11 +++++ drivers/rng/Makefile | 1 + drivers/rng/tpm_rng.c | 23 ++++++++++ drivers/tpm/tpm-uclass.c | 37 +++++++++++++-- include/tpm_api.h | 10 ++++ lib/Kconfig | 1 + lib/tpm-v1.c | 13 +++--- lib/tpm-v2.c | 6 +-- lib/tpm_api.c | 98 ++++++++++++++++++---------------------- test/dm/rng.c | 29 ++++++++++++ 14 files changed, 217 insertions(+), 82 deletions(-) create mode 100644 doc/usage/cmd/rng.rst create mode 100644 drivers/rng/tpm_rng.c -- 2.25.1

5 29

[PATCH 0/9] enable menu-driven UEFI variable maintenance
by Masahisa Kojima 15 Jul '22

15 Jul '22

This series adds the menu-driven UEFI boot variable maintenance through the "eficonfig" new command. This series also adds the removable media support in bootmenu. The python based test will follow this series. Source code can be cloned with: $ git clone https://git.linaro.org/people/masahisa.kojima/u-boot.git -b efi_menu_upstream_v9_0715 [Major Changes] - rebased efi-2022-10-rc1 - there is detailed changelog in each commit Masahisa Kojima (9): efi_loader: move udevice pointer into struct efi_object eficonfig: menu-driven addition of UEFI boot option eficonfig: add "Edit Boot Option" menu entry menu: add KEY_PLUS and KEY_MINUS handling eficonfig: add "Change Boot Order" menu entry eficonfig: add "Delete Boot Option" menu entry bootmenu: add removable media entries doc:bootmenu: add description for UEFI boot support doc:eficonfig: add documentation for eficonfig command cmd/Kconfig | 7 + cmd/Makefile | 1 + cmd/bootmenu.c | 103 +- cmd/eficonfig.c | 1992 +++++++++++++++++++++++++++++++++ common/menu.c | 6 + doc/usage/cmd/bootmenu.rst | 74 ++ doc/usage/cmd/eficonfig.rst | 49 + doc/usage/index.rst | 1 + include/efi_config.h | 91 ++ include/efi_loader.h | 71 ++ include/menu.h | 2 + lib/efi_loader/efi_bootmgr.c | 7 + lib/efi_loader/efi_boottime.c | 52 +- lib/efi_loader/efi_console.c | 70 ++ lib/efi_loader/efi_disk.c | 66 +- lib/efi_loader/efi_file.c | 75 +- 16 files changed, 2608 insertions(+), 59 deletions(-) create mode 100644 cmd/eficonfig.c create mode 100644 doc/usage/cmd/eficonfig.rst create mode 100644 include/efi_config.h -- 2.17.1

1 9

[PATCH v8 0/9] enable menu-driven UEFI variable maintenance
by Masahisa Kojima 15 Jul '22

15 Jul '22

This series add the menu-driven UEFI boot variable maintenance and removable media support in bootmenu. Different from previous version, thie series adds a new U-Boot command "efimenu" to invoke the UEFI boot-related variable maintenance menu. Note that menu-driven UEFI Secure Boot key management patch series will follow. Source code can be cloned with: $ git clone https://git.linaro.org/people/masahisa.kojima/u-boot.git -b kojima/efi_menu_upstream_v8_0618 [Major Changes] - command name is changed from "efimenu" to "eficonfig" - there is detailed chang Masahisa Kojima (9): efi_loader: expose END device path node eficonfig: menu-driven addition of UEFI boot option eficonfig: add "Edit Boot Option" menu entry menu: add KEY_PLUS and KEY_MINUS handling eficonfig: add "Change Boot Order" menu entry eficonfig: add "Delete Boot Option" menu entry bootmenu: add removable media entries doc:bootmenu: add description for UEFI boot support doc:eficonfig: add documentation for eficonfig command cmd/Kconfig | 7 + cmd/Makefile | 1 + cmd/bootmenu.c | 99 +- cmd/eficonfig.c | 1872 ++++++++++++++++++++++++++++++ common/menu.c | 6 + doc/usage/cmd/bootmenu.rst | 74 ++ doc/usage/cmd/eficonfig.rst | 50 + doc/usage/index.rst | 1 + include/efi_config.h | 91 ++ include/efi_loader.h | 63 + include/menu.h | 2 + lib/efi_loader/efi_bootmgr.c | 4 + lib/efi_loader/efi_boottime.c | 52 +- lib/efi_loader/efi_console.c | 78 ++ lib/efi_loader/efi_device_path.c | 2 +- lib/efi_loader/efi_disk.c | 11 + lib/efi_loader/efi_file.c | 75 +- 17 files changed, 2437 insertions(+), 51 deletions(-) create mode 100644 cmd/eficonfig.c create mode 100644 doc/usage/cmd/eficonfig.rst create mode 100644 include/efi_config.h -- 2.17.1

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[v3 1/4] doc: Add statistics page for v2022.07
by Tom Rini 15 Jul '22

15 Jul '22

Our statistics pages have always been generated by gitdm. After patching gitdm to generate an acceptable Sphinx output for tables, include that and some other basic formatting here. Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Changes in v3: - Reword the commit message and page title Changes in v2: - Include :orphan: this time - Use .. table and auto-width as suggested by Heinrich --- .../statistics/u-boot-stats-v2022.07.rst | 805 ++++++++++++++++++ 1 file changed, 805 insertions(+) create mode 100644 doc/develop/statistics/u-boot-stats-v2022.07.rst diff --git a/doc/develop/statistics/u-boot-stats-v2022.07.rst b/doc/develop/statistics/u-boot-stats-v2022.07.rst new file mode 100644 index 000000000000..c1b627cd8681 --- /dev/null +++ b/doc/develop/statistics/u-boot-stats-v2022.07.rst @@ -0,0 +1,805 @@ +:orphan: + +Release Statistics for U-Boot v2022.07 +====================================== + +* Processed 1696 csets from 183 developers + +* 27 employers found + +* A total of 148026 lines added, 56440 removed (delta 91586) + +.. table:: Developers with the most changesets + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Tom Rini 164 (9.7%) + Simon Glass 141 (8.3%) + Pali Rohár 114 (6.7%) + Marek Vasut 94 (5.5%) + Peng Fan 61 (3.6%) + Sean Anderson 59 (3.5%) + Heinrich Schuchardt 57 (3.4%) + Samuel Holland 49 (2.9%) + Michal Simek 49 (2.9%) + Johan Jonker 45 (2.7%) + Aaron Williams 40 (2.4%) + AKASHI Takahiro 38 (2.2%) + Marek Behún 36 (2.1%) + Tim Harvey 33 (1.9%) + Philippe Reynes 29 (1.7%) + Andre Przywara 28 (1.7%) + Andrew Scull 27 (1.6%) + Patrice Chotard 26 (1.5%) + Patrick Delaunay 25 (1.5%) + Fabio Estevam 24 (1.4%) + Gaurav Jain 20 (1.2%) + Ye Li 20 (1.2%) + Ashok Reddy Soma 16 (0.9%) + Stefan Roese 13 (0.8%) + Sughosh Ganu 12 (0.7%) + Masahisa Kojima 12 (0.7%) + Michael Trimarchi 11 (0.6%) + Paweł Anikiel 11 (0.6%) + Adam Ford 11 (0.6%) + Marcel Ziswiler 11 (0.6%) + Dave Gerlach 11 (0.6%) + Philip Oberfichtner 11 (0.6%) + T Karthik Reddy 11 (0.6%) + Bin Meng 9 (0.5%) + Tommaso Merciai 9 (0.5%) + Heiko Thiery 8 (0.5%) + Alper Nebi Yasak 8 (0.5%) + Philippe Schenker 8 (0.5%) + Vyacheslav Bocharov 8 (0.5%) + Michael Walle 7 (0.4%) + Peter Robinson 6 (0.4%) + Francesco Dolcini 6 (0.4%) + Mark Kettenis 6 (0.4%) + Neal Frager 6 (0.4%) + Robert Marko 6 (0.4%) + Jim Liu 6 (0.4%) + Tudor Ambarus 6 (0.4%) + Paweł Jarosz 5 (0.3%) + Dinesh Maniyam 5 (0.3%) + Ariel D'Alessandro 5 (0.3%) + Eugen Hristev 5 (0.3%) + Sergiu Moga 5 (0.3%) + Lukasz Majewski 5 (0.3%) + Clément Léger 5 (0.3%) + Huang Jianan 5 (0.3%) + Etienne Carriere 5 (0.3%) + Tien Fong Chee 4 (0.2%) + Chris Morgan 4 (0.2%) + Dario Binacchi 4 (0.2%) + Frieder Schrempf 4 (0.2%) + Janne Grunau 4 (0.2%) + Josua Mayer 4 (0.2%) + Vincent Stehlé 4 (0.2%) + Chris Packham 4 (0.2%) + Sai Pavan Boddu 4 (0.2%) + Neil Armstrong 4 (0.2%) + Jan Kiszka 4 (0.2%) + Andrew Davis 4 (0.2%) + Aswath Govindraju 4 (0.2%) + Masami Hiramatsu 4 (0.2%) + Durai Manickam KR 4 (0.2%) + Billy Tsai 4 (0.2%) + Angus Ainslie 4 (0.2%) + Jesse Taube 4 (0.2%) + Andrew Jeffery 4 (0.2%) + Hari Nagalla 4 (0.2%) + Icenowy Zheng 4 (0.2%) + Romain Naour 4 (0.2%) + Joel Stanley 3 (0.2%) + Andrey Zhizhikin 3 (0.2%) + Loic Poulain 3 (0.2%) + Rasmus Villemoes 3 (0.2%) + Vagrant Cascadian 3 (0.2%) + Ilias Apalodimas 3 (0.2%) + Eddie James 3 (0.2%) + Gireesh Hiremath 3 (0.2%) + Sam Shih 3 (0.2%) + Luca Ellero 3 (0.2%) + Tony Dinh 3 (0.2%) + Paul Barker 3 (0.2%) + Oleksandr Suvorov 3 (0.2%) + Igor Opaniuk 3 (0.2%) + Denys Drozdov 3 (0.2%) + SESA644425 3 (0.2%) + Vignesh Raghavendra 3 (0.2%) + Dzmitry Sankouski 3 (0.2%) + Jernej Skrabec 3 (0.2%) + Miquel Raynal 2 (0.1%) + Christian Gmeiner 2 (0.1%) + Nate Drude 2 (0.1%) + Rick Chen 2 (0.1%) + Yannick Fertre 2 (0.1%) + Peter Hoyes 2 (0.1%) + Dominic Rath 2 (0.1%) + Du Huanpeng 2 (0.1%) + Haolin Li 2 (0.1%) + Clement Faure 2 (0.1%) + Vladimir Oltean 2 (0.1%) + Christoph Niedermaier 2 (0.1%) + Paul Barbieri 1 (0.1%) + Hannes Schmelzer 1 (0.1%) + Teik Heng Chong 1 (0.1%) + Andrea Scian 1 (0.1%) + Jerome Forissier 1 (0.1%) + Emmanuel Vadot 1 (0.1%) + Nicolas Iooss 1 (0.1%) + Andrejs Cainikovs 1 (0.1%) + qianfan Zhao 1 (0.1%) + Yau Wai Gan 1 (0.1%) + Corentin LABBE 1 (0.1%) + Christophe Leroy 1 (0.1%) + Chunfeng Yun 1 (0.1%) + Camelia Groza 1 (0.1%) + Wasim Khan 1 (0.1%) + Georgi Vlaev 1 (0.1%) + Andrea zi0Black Cappa 1 (0.1%) + Leo Yu-Chi Liang 1 (0.1%) + Humberto Naves 1 (0.1%) + Sean Nyekjaer 1 (0.1%) + Christoph Fritz 1 (0.1%) + Sergei Antonov 1 (0.1%) + George Hilliard 1 (0.1%) + Ying-Chun Liu (PaulLiu) 1 (0.1%) + Vishal Patel 1 (0.1%) + Piyush Mehta 1 (0.1%) + Amit Kumar Mahapatra 1 (0.1%) + Jorge Ramirez-Ortiz 1 (0.1%) + Ralph Siemsen 1 (0.1%) + Ovidiu Panait 1 (0.1%) + John Keeping 1 (0.1%) + Oliver Graute 1 (0.1%) + Nicolas Heemeryck 1 (0.1%) + Stanley Chu 1 (0.1%) + Josef Schlehofer 1 (0.1%) + Stephen Carlson 1 (0.1%) + Yuantian Tang 1 (0.1%) + Hou Zhiqiang 1 (0.1%) + Kyle Evans 1 (0.1%) + Lyle Franklin 1 (0.1%) + Andrew Abbott 1 (0.1%) + Oleksii Titov 1 (0.1%) + Kshitiz Varshney 1 (0.1%) + Ian Ray 1 (0.1%) + Rogier Stam 1 (0.1%) + Diego Rondini 1 (0.1%) + Daniel Golle 1 (0.1%) + Peter Cai 1 (0.1%) + Alexandre Besnard 1 (0.1%) + Elmar Albert 1 (0.1%) + Arjan Minzinga Zijlstra 1 (0.1%) + Oleksii Bidnichenko 1 (0.1%) + Ji Luo 1 (0.1%) + Clark Wang 1 (0.1%) + Clément Péron 1 (0.1%) + Andy Shevchenko 1 (0.1%) + Hajo Noerenberg 1 (0.1%) + Ville Baillie 1 (0.1%) + Paul HENRYS 1 (0.1%) + Jérôme Carretero 1 (0.1%) + Dhananjay Phadke 1 (0.1%) + Ivan Vozvakhov 1 (0.1%) + Tom Saeger 1 (0.1%) + Adarsh Babu Kalepalli 1 (0.1%) + He Yong 1 (0.1%) + Samuel Dionne-Riel 1 (0.1%) + Felix Vietmeyer 1 (0.1%) + Yi Liu 1 (0.1%) + Angelo Dureghello 1 (0.1%) + Baltazár Radics 1 (0.1%) + Alexander Graf 1 (0.1%) + Mihai Sain 1 (0.1%) + Sai Krishna Potthuri 1 (0.1%) + weichangzheng 1 (0.1%) + ================================ ===== + + +.. table:: Developers with the most changed lines + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Aaron Williams 31473 (16.9%) + Tom Rini 25599 (13.7%) + Simon Glass 17972 (9.7%) + Marek Vasut 14707 (7.9%) + Tim Harvey 11858 (6.4%) + Sean Anderson 10323 (5.5%) + Samuel Holland 8705 (4.7%) + Stefan Roese 4394 (2.4%) + Johan Jonker 3712 (2.0%) + Jim Liu 3650 (2.0%) + Ariel D'Alessandro 3358 (1.8%) + Huang Jianan 3272 (1.8%) + Philippe Reynes 2587 (1.4%) + Philip Oberfichtner 2400 (1.3%) + Peng Fan 2365 (1.3%) + Pali Rohár 2277 (1.2%) + Paweł Jarosz 2092 (1.1%) + AKASHI Takahiro 1700 (0.9%) + Eugen Hristev 1532 (0.8%) + Gaurav Jain 1522 (0.8%) + Humberto Naves 1498 (0.8%) + Marek Behún 1353 (0.7%) + Andre Przywara 1318 (0.7%) + Paul Barker 1308 (0.7%) + Patrick Delaunay 1200 (0.6%) + Paweł Anikiel 1162 (0.6%) + Michal Simek 1065 (0.6%) + Patrice Chotard 1038 (0.6%) + Ashok Reddy Soma 1000 (0.5%) + Sughosh Ganu 954 (0.5%) + Denys Drozdov 942 (0.5%) + Neal Frager 894 (0.5%) + Angus Ainslie 804 (0.4%) + Heinrich Schuchardt 692 (0.4%) + weichangzheng 686 (0.4%) + Etienne Carriere 652 (0.4%) + Janne Grunau 648 (0.3%) + Marcel Ziswiler 636 (0.3%) + Andrew Scull 606 (0.3%) + Neil Armstrong 598 (0.3%) + Masahisa Kojima 567 (0.3%) + Adam Ford 524 (0.3%) + Billy Tsai 497 (0.3%) + Alper Nebi Yasak 440 (0.2%) + Fabio Estevam 420 (0.2%) + Michael Trimarchi 393 (0.2%) + Durai Manickam KR 378 (0.2%) + Vincent Stehlé 369 (0.2%) + Andrew Jeffery 359 (0.2%) + T Karthik Reddy 322 (0.2%) + Francesco Dolcini 306 (0.2%) + Ye Li 303 (0.2%) + Nate Drude 275 (0.1%) + Dave Gerlach 263 (0.1%) + Sergiu Moga 260 (0.1%) + Tony Dinh 256 (0.1%) + Sam Shih 252 (0.1%) + Ivan Vozvakhov 252 (0.1%) + Dzmitry Sankouski 244 (0.1%) + Tommaso Merciai 242 (0.1%) + Yannick Fertre 217 (0.1%) + Clément Léger 208 (0.1%) + Eddie James 202 (0.1%) + Ilias Apalodimas 190 (0.1%) + Philippe Schenker 189 (0.1%) + Adarsh Babu Kalepalli 174 (0.1%) + Igor Opaniuk 160 (0.1%) + Michael Walle 159 (0.1%) + Lukasz Majewski 157 (0.1%) + Josua Mayer 137 (0.1%) + Vyacheslav Bocharov 131 (0.1%) + Stanley Chu 131 (0.1%) + Gireesh Hiremath 127 (0.1%) + Hari Nagalla 126 (0.1%) + Leo Yu-Chi Liang 116 (0.1%) + Luca Ellero 107 (0.1%) + Chris Morgan 100 (0.1%) + Peter Hoyes 100 (0.1%) + Ji Luo 100 (0.1%) + George Hilliard 82 (0.0%) + Mark Kettenis 79 (0.0%) + Frieder Schrempf 78 (0.0%) + Heiko Thiery 72 (0.0%) + Icenowy Zheng 69 (0.0%) + Joel Stanley 66 (0.0%) + Diego Rondini 64 (0.0%) + Robert Marko 63 (0.0%) + Dinesh Maniyam 59 (0.0%) + Andrejs Cainikovs 49 (0.0%) + Samuel Dionne-Riel 48 (0.0%) + Mihai Sain 45 (0.0%) + Bin Meng 41 (0.0%) + Loic Poulain 40 (0.0%) + SESA644425 40 (0.0%) + Masami Hiramatsu 39 (0.0%) + Clement Faure 39 (0.0%) + He Yong 39 (0.0%) + Rasmus Villemoes 38 (0.0%) + Jernej Skrabec 37 (0.0%) + Jerome Forissier 35 (0.0%) + Paul HENRYS 31 (0.0%) + Jérôme Carretero 30 (0.0%) + Paul Barbieri 28 (0.0%) + Aswath Govindraju 27 (0.0%) + Jan Kiszka 26 (0.0%) + Jesse Taube 26 (0.0%) + Nicolas Heemeryck 23 (0.0%) + Ville Baillie 23 (0.0%) + Andrew Davis 22 (0.0%) + Kyle Evans 22 (0.0%) + Peter Robinson 21 (0.0%) + Romain Naour 21 (0.0%) + Peter Cai 21 (0.0%) + Hou Zhiqiang 20 (0.0%) + Clark Wang 20 (0.0%) + Sai Pavan Boddu 18 (0.0%) + Amit Kumar Mahapatra 18 (0.0%) + Elmar Albert 18 (0.0%) + Tudor Ambarus 16 (0.0%) + Oleksandr Suvorov 16 (0.0%) + Chris Packham 15 (0.0%) + Vagrant Cascadian 15 (0.0%) + Dominic Rath 13 (0.0%) + Andrea Scian 13 (0.0%) + Christoph Fritz 13 (0.0%) + Nicolas Iooss 12 (0.0%) + Miquel Raynal 11 (0.0%) + Vishal Patel 11 (0.0%) + Georgi Vlaev 9 (0.0%) + Dario Binacchi 8 (0.0%) + Teik Heng Chong 8 (0.0%) + Piyush Mehta 8 (0.0%) + Ovidiu Panait 8 (0.0%) + John Keeping 8 (0.0%) + Dhananjay Phadke 8 (0.0%) + Tom Saeger 8 (0.0%) + Tien Fong Chee 7 (0.0%) + Stephen Carlson 7 (0.0%) + Lyle Franklin 7 (0.0%) + Felix Vietmeyer 7 (0.0%) + Alexander Graf 7 (0.0%) + Andrey Zhizhikin 6 (0.0%) + Vignesh Raghavendra 6 (0.0%) + Christian Gmeiner 6 (0.0%) + Haolin Li 6 (0.0%) + Daniel Golle 6 (0.0%) + Rick Chen 5 (0.0%) + Ying-Chun Liu (PaulLiu) 5 (0.0%) + Rogier Stam 5 (0.0%) + Alexandre Besnard 5 (0.0%) + Angelo Dureghello 5 (0.0%) + Christoph Niedermaier 4 (0.0%) + Hannes Schmelzer 4 (0.0%) + Chunfeng Yun 4 (0.0%) + Kshitiz Varshney 4 (0.0%) + Yi Liu 4 (0.0%) + Baltazár Radics 4 (0.0%) + Christophe Leroy 3 (0.0%) + Wasim Khan 3 (0.0%) + Andrea zi0Black Cappa 3 (0.0%) + Sean Nyekjaer 3 (0.0%) + Andy Shevchenko 3 (0.0%) + Du Huanpeng 2 (0.0%) + Vladimir Oltean 2 (0.0%) + Camelia Groza 2 (0.0%) + Sergei Antonov 2 (0.0%) + Oliver Graute 2 (0.0%) + Yuantian Tang 2 (0.0%) + Oleksii Titov 2 (0.0%) + Arjan Minzinga Zijlstra 2 (0.0%) + Oleksii Bidnichenko 2 (0.0%) + Clément Péron 2 (0.0%) + Hajo Noerenberg 2 (0.0%) + Sai Krishna Potthuri 2 (0.0%) + Emmanuel Vadot 1 (0.0%) + qianfan Zhao 1 (0.0%) + Yau Wai Gan 1 (0.0%) + Corentin LABBE 1 (0.0%) + Jorge Ramirez-Ortiz 1 (0.0%) + Ralph Siemsen 1 (0.0%) + Josef Schlehofer 1 (0.0%) + Andrew Abbott 1 (0.0%) + Ian Ray 1 (0.0%) + ================================ ===== + + +.. table:: Developers with the most lines removed + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Tom Rini 19724 (34.9%) + Denys Drozdov 941 (1.7%) + Marcel Ziswiler 430 (0.8%) + Stefan Roese 331 (0.6%) + Marek Behún 309 (0.5%) + Adam Ford 247 (0.4%) + Tony Dinh 187 (0.3%) + Igor Opaniuk 134 (0.2%) + Leo Yu-Chi Liang 116 (0.2%) + Etienne Carriere 97 (0.2%) + Francesco Dolcini 30 (0.1%) + Rasmus Villemoes 19 (0.0%) + Hou Zhiqiang 16 (0.0%) + Frieder Schrempf 14 (0.0%) + John Keeping 8 (0.0%) + Romain Naour 5 (0.0%) + Ying-Chun Liu (PaulLiu) 5 (0.0%) + Ovidiu Panait 3 (0.0%) + Vignesh Raghavendra 3 (0.0%) + Andrea zi0Black Cappa 2 (0.0%) + Andy Shevchenko 2 (0.0%) + Peter Robinson 1 (0.0%) + Josef Schlehofer 1 (0.0%) + Ian Ray 1 (0.0%) + ================================ ===== + + +.. table:: Developers with the most signoffs (total 266) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Andre Przywara 50 (18.8%) + Michal Simek 43 (16.2%) + Stefan Roese 41 (15.4%) + Patrice Chotard 23 (8.6%) + Peng Fan 17 (6.4%) + Marcel Ziswiler 16 (6.0%) + Neil Armstrong 9 (3.4%) + Priyanka Jain 7 (2.6%) + Michael Trimarchi 6 (2.3%) + Johan Jonker 5 (1.9%) + Tom Rini 4 (1.5%) + Tom Warren 4 (1.5%) + T Karthik Reddy 4 (1.5%) + Stanley Chu 4 (1.5%) + Samuel Holland 4 (1.5%) + Yau Wai Gan 2 (0.8%) + Jagan Teki 2 (0.8%) + Biwen Li 2 (0.8%) + Ye Li 2 (0.8%) + Ilias Apalodimas 2 (0.8%) + Heinrich Schuchardt 2 (0.8%) + Ariel D'Alessandro 2 (0.8%) + Amit Kumar Mahapatra 1 (0.4%) + Wolfgang Wallner 1 (0.4%) + Alexandru M Stan 1 (0.4%) + Kever Yang 1 (0.4%) + Chee Hong Ang 1 (0.4%) + Yifan Gu 1 (0.4%) + Horia Geantă 1 (0.4%) + Richard Weinberger 1 (0.4%) + Anatolij Gustschin 1 (0.4%) + Gabriel Fernandez 1 (0.4%) + Christian Gmeiner 1 (0.4%) + Sai Krishna Potthuri 1 (0.4%) + Josua Mayer 1 (0.4%) + Masahisa Kojima 1 (0.4%) + Ashok Reddy Soma 1 (0.4%) + ================================ ===== + + +.. table:: Developers with the most reviews (total 871) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Simon Glass 100 (11.5%) + Fabio Estevam 69 (7.9%) + Stefan Roese 67 (7.7%) + Ramon Fried 65 (7.5%) + Kever Yang 63 (7.2%) + Priyanka Jain 53 (6.1%) + Patrice Chotard 38 (4.4%) + Patrick Delaunay 38 (4.4%) + Heinrich Schuchardt 35 (4.0%) + Andre Przywara 31 (3.6%) + Peng Fan 26 (3.0%) + Bin Meng 25 (2.9%) + Alper Nebi Yasak 23 (2.6%) + Tom Rini 21 (2.4%) + Marek Behún 21 (2.4%) + Jaehoon Chung 19 (2.2%) + Ye Li 13 (1.5%) + Marek Vasut 12 (1.4%) + Heiko Schocher 9 (1.0%) + Tien Fong Chee 9 (1.0%) + Sean Anderson 9 (1.0%) + Vladimir Oltean 8 (0.9%) + Ilias Apalodimas 7 (0.8%) + Leo Yu-Chi Liang 6 (0.7%) + Mark Kettenis 6 (0.7%) + Neil Armstrong 5 (0.6%) + Samuel Holland 5 (0.6%) + Jagan Teki 5 (0.6%) + Masami Hiramatsu 5 (0.6%) + Gaurav Jain 5 (0.6%) + Christian Gmeiner 4 (0.5%) + Chia-Wei Wang 4 (0.5%) + Claudiu Beznea 4 (0.5%) + Pali Rohár 4 (0.5%) + Ashok Reddy Soma 3 (0.3%) + Francesco Dolcini 3 (0.3%) + Nishanth Menon 3 (0.3%) + Stefano Babic 3 (0.3%) + Holger Brunck 3 (0.3%) + Miquel Raynal 3 (0.3%) + Michael Walle 3 (0.3%) + Michal Simek 2 (0.2%) + Michael Trimarchi 2 (0.2%) + Tony Dinh 2 (0.2%) + Frieder Schrempf 2 (0.2%) + Minkyu Kang 2 (0.2%) + Rick Chen 2 (0.2%) + Tudor Ambarus 2 (0.2%) + Joel Stanley 2 (0.2%) + Tim Harvey 2 (0.2%) + Marcel Ziswiler 1 (0.1%) + John Keeping 1 (0.1%) + Peter Robinson 1 (0.1%) + Peter Collingbourne 1 (0.1%) + Pankaj Gupta 1 (0.1%) + Han Xu 1 (0.1%) + Radhey Shyam Pandey 1 (0.1%) + Philipp Tomsich 1 (0.1%) + Thomas Chou 1 (0.1%) + Kristian Amlie 1 (0.1%) + Qu Wenruo 1 (0.1%) + Jacky Bai 1 (0.1%) + Ley Foon Tan 1 (0.1%) + Dylan Hung 1 (0.1%) + Andrey Zhizhikin 1 (0.1%) + Kshitiz Varshney 1 (0.1%) + Andrew Scull 1 (0.1%) + Janne Grunau 1 (0.1%) + ================================ ===== + + +.. table:: Developers with the most test credits (total 66) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Tim Harvey 15 (22.7%) + Patrice Chotard 5 (7.6%) + Mark Kettenis 4 (6.1%) + Adam Ford 4 (6.1%) + Fabio Estevam 3 (4.5%) + Marek Vasut 3 (4.5%) + Marcel Ziswiler 3 (4.5%) + Derald D. Woods 3 (4.5%) + Pali Rohár 2 (3.0%) + Ariel D'Alessandro 2 (3.0%) + Heiko Thiery 2 (3.0%) + Andre Przywara 1 (1.5%) + Chia-Wei Wang 1 (1.5%) + Stefano Babic 1 (1.5%) + Frieder Schrempf 1 (1.5%) + John Keeping 1 (1.5%) + Peter Robinson 1 (1.5%) + Peter Collingbourne 1 (1.5%) + Kshitiz Varshney 1 (1.5%) + Janne Grunau 1 (1.5%) + Josua Mayer 1 (1.5%) + Ying-Chun Liu (PaulLiu) 1 (1.5%) + Peter Griffin 1 (1.5%) + Tatsuhiko Yasumatsu 1 (1.5%) + Jincheng Wang 1 (1.5%) + Gabriel Hojda 1 (1.5%) + Arti Zirk 1 (1.5%) + Merlijn Wajer 1 (1.5%) + Soeren Moch 1 (1.5%) + Raffaele RECALCATI 1 (1.5%) + Angus Ainslie 1 (1.5%) + ================================ ===== + + +.. table:: Developers who gave the most tested-by credits (total 67) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Marek Vasut 14 (20.9%) + Fabio Estevam 6 (9.0%) + Michael Trimarchi 6 (9.0%) + Heiko Thiery 4 (6.0%) + Adam Ford 3 (4.5%) + Heinrich Schuchardt 3 (4.5%) + Tom Rini 3 (4.5%) + Pali Rohár 2 (3.0%) + Andre Przywara 2 (3.0%) + Frieder Schrempf 2 (3.0%) + Janne Grunau 2 (3.0%) + Miquel Raynal 2 (3.0%) + Masahisa Kojima 2 (3.0%) + Tim Harvey 1 (1.5%) + Mark Kettenis 1 (1.5%) + Angus Ainslie 1 (1.5%) + Simon Glass 1 (1.5%) + Peng Fan 1 (1.5%) + Marek Behún 1 (1.5%) + Ye Li 1 (1.5%) + Gaurav Jain 1 (1.5%) + Joel Stanley 1 (1.5%) + Rasmus Villemoes 1 (1.5%) + Christoph Niedermaier 1 (1.5%) + Peter Cai 1 (1.5%) + Jerome Forissier 1 (1.5%) + Andrejs Cainikovs 1 (1.5%) + Nate Drude 1 (1.5%) + AKASHI Takahiro 1 (1.5%) + ================================ ===== + + +.. table:: Developers with the most report credits (total 19) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Tom Rini 2 (10.5%) + Patrick Delaunay 2 (10.5%) + Fabio Estevam 1 (5.3%) + Tim Harvey 1 (5.3%) + Tatsuhiko Yasumatsu 1 (5.3%) + Jincheng Wang 1 (5.3%) + Gabriel Hojda 1 (5.3%) + Nishanth Menon 1 (5.3%) + Milan P. Stanić 1 (5.3%) + Yun-Chien Yu 1 (5.3%) + Nicolas Bidron 1 (5.3%) + Balaji Anandapadmanaban 1 (5.3%) + David Mosberger-Tang 1 (5.3%) + Jesse Villarreal 1 (5.3%) + Suman Anna 1 (5.3%) + Vagrant Cascadian 1 (5.3%) + Chris Morgan 1 (5.3%) + ================================ ===== + + +.. table:: Developers who gave the most report credits (total 19) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + Simon Glass 5 (26.3%) + Andre Przywara 3 (15.8%) + Heinrich Schuchardt 2 (10.5%) + Miquel Raynal 2 (10.5%) + Aswath Govindraju 2 (10.5%) + Tom Rini 1 (5.3%) + Fabio Estevam 1 (5.3%) + Samuel Holland 1 (5.3%) + Tudor Ambarus 1 (5.3%) + Chunfeng Yun 1 (5.3%) + ================================ ===== + + +.. table:: Top changeset contributors by employer + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + (Unknown) 669 (39.4%) + Google, Inc. 168 (9.9%) + Konsulko Group 164 (9.7%) + DENX Software Engineering 147 (8.7%) + NXP 112 (6.6%) + Linaro 80 (4.7%) + ST Microelectronics 53 (3.1%) + AMD 51 (3.0%) + Marvell 40 (2.4%) + Xilinx 39 (2.3%) + ARM 34 (2.0%) + Toradex 33 (1.9%) + Texas Instruments 27 (1.6%) + Amarula Solutions 24 (1.4%) + Intel 12 (0.7%) + Semihalf Embedded Systems 11 (0.6%) + Bootlin 7 (0.4%) + BayLibre SAS 5 (0.3%) + Collabora Ltd. 5 (0.3%) + Siemens 4 (0.2%) + Debian.org 3 (0.2%) + IBM 3 (0.2%) + Wind River 1 (0.1%) + Dave S.r.l. 1 (0.1%) + General Electric 1 (0.1%) + Oracle 1 (0.1%) + Rockchip 1 (0.1%) + ================================ ===== + + +.. table:: Top lines changed by employer + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + (Unknown) 63402 (34.0%) + Marvell 31473 (16.9%) + Konsulko Group 25599 (13.7%) + DENX Software Engineering 22078 (11.9%) + Google, Inc. 18578 (10.0%) + NXP 4382 (2.4%) + Linaro 4183 (2.2%) + Collabora Ltd. 3358 (1.8%) + ST Microelectronics 2455 (1.3%) + Xilinx 2277 (1.2%) + Toradex 2140 (1.1%) + ARM 1787 (1.0%) + Semihalf Embedded Systems 1162 (0.6%) + AMD 1061 (0.6%) + Amarula Solutions 643 (0.3%) + BayLibre SAS 599 (0.3%) + Texas Instruments 453 (0.2%) + Bootlin 219 (0.1%) + IBM 202 (0.1%) + Intel 78 (0.0%) + Siemens 26 (0.0%) + Debian.org 15 (0.0%) + Dave S.r.l. 13 (0.0%) + Wind River 8 (0.0%) + Oracle 8 (0.0%) + Rockchip 4 (0.0%) + General Electric 1 (0.0%) + ================================ ===== + + +.. table:: Employers with the most signoffs (total 266) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + ARM 50 (18.8%) + DENX Software Engineering 42 (15.8%) + Xilinx 39 (14.7%) + NXP 29 (10.9%) + ST Microelectronics 24 (9.0%) + (Unknown) 21 (7.9%) + Toradex 16 (6.0%) + AMD 11 (4.1%) + BayLibre SAS 9 (3.4%) + Amarula Solutions 8 (3.0%) + Konsulko Group 4 (1.5%) + NVidia 4 (1.5%) + Linaro 3 (1.1%) + Intel 3 (1.1%) + Collabora Ltd. 2 (0.8%) + Rockchip 1 (0.4%) + ================================ ===== + + +.. table:: Employers with the most hackers (total 185) + :widths: auto + + ================================ ===== + Name Count + ================================ ===== + (Unknown) 102 (55.1%) + NXP 12 (6.5%) + Linaro 10 (5.4%) + Xilinx 9 (4.9%) + Toradex 7 (3.8%) + Texas Instruments 6 (3.2%) + DENX Software Engineering 5 (2.7%) + Intel 5 (2.7%) + ARM 3 (1.6%) + ST Microelectronics 3 (1.6%) + Amarula Solutions 3 (1.6%) + AMD 2 (1.1%) + BayLibre SAS 2 (1.1%) + Google, Inc. 2 (1.1%) + Bootlin 2 (1.1%) + Konsulko Group 1 (0.5%) + Collabora Ltd. 1 (0.5%) + Rockchip 1 (0.5%) + Marvell 1 (0.5%) + Semihalf Embedded Systems 1 (0.5%) + IBM 1 (0.5%) + Siemens 1 (0.5%) + Debian.org 1 (0.5%) + Dave S.r.l. 1 (0.5%) + Wind River 1 (0.5%) + Oracle 1 (0.5%) + General Electric 1 (0.5%) + ================================ ===== -- 2.25.1

2 5

[v3 1/7] doc: Migrate CodingStyle wiki page to Sphinx
by Tom Rini 15 Jul '22

15 Jul '22

Move the current CodingStyle wiki page to doc/develop/codingstyle.rst. The changes here are for formatting or slight rewording so that it reads well when linking to other Sphinx documents. Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Changes in v3: - A few more rewordings, per Heinrich Changes in v2: - Assorted wiki -> Sphinx style corrections and a few typo fixes, per Heinrich --- doc/develop/codingstyle.rst | 258 ++++++++++++++++++++++++++++++++++++ doc/develop/index.rst | 8 ++ 2 files changed, 266 insertions(+) create mode 100644 doc/develop/codingstyle.rst diff --git a/doc/develop/codingstyle.rst b/doc/develop/codingstyle.rst new file mode 100644 index 000000000000..1041d1c8d946 --- /dev/null +++ b/doc/develop/codingstyle.rst @@ -0,0 +1,258 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +U-Boot Coding Style +=================== + +The following Coding Style requirements shall be mandatory for all code contributed to +the U-Boot project. + +Exceptions are only allowed if code from other projects is integrated with no +or only minimal changes. + +The following rules apply: + +* All contributions to U-Boot should conform to the `Linux kernel + coding style <https://www.kernel.org/doc/html/latest/process/coding-style.html>`_ + and the `Lindent script <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/scr…>`_. + * The exception for net files to the `multi-line comment + <https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting>`_ + applies only to Linux, not to U-Boot. Only large hunks which are copied + unchanged from Linux may retain that comment format. + +* Use patman to send your patches (``tools/patman/patman -H`` for full + instructions). With a few tags in your commits this will check your patches + and take care of emailing them. + +* If you don't use patman, make sure to run ``scripts/checkpatch.pl``. For + more information, read :doc:`checkpatch`. Note that this should be done + *before* posting on the mailing list! + +* Source files originating from different projects (for example the MTD + subsystem or the hush shell code from the BusyBox project) may, after + careful consideration, be exempted from these rules. For such files, the + original coding style may be kept to ease subsequent migration to newer + versions of those sources. + +* Please note that U-Boot is implemented in C (and to some small parts in + Assembler); no C++ is used, so please do not use C++ style comments (//) in + your code. + + * The sole exception here is for SPDX tags in some files (checkpatch.pl will warn you). + +* Please also stick to the following formatting rules: + + * Remove any trailing white space + + * Use TAB characters for indentation and vertical alignment, not spaces + + * The exception here is Python which requires 4 spaces instead. + + * All source files need to be in "Unix" and not "DOS" or "Windows" formatted, + with respect to line ends. + + * Do not add more than 2 consecutive empty lines to source files + + * Do not add trailing empty lines to source files + + * Using the option ``git config --global color.diff auto`` will help to + visually see whitespace problems in ``diff`` output from ``git``. + + * In Emacs one can use ``=M-x whitespace-global-mode=`` to get visual + feedback on the nasty details. ``=M-x whitespace-cleanup=`` does The Right + Thing (tm) + +Submissions of new code or patches that do not conform to these requirements +shall be rejected with a request to reformat the changes. + +U-Boot Code Documentation +------------------------- + +U-Boot adopted the kernel-doc annotation style, this is the only exception from +multi-line comment rule of Coding Style. While not mandatory, adding +documentation is strongly advised. The Linux kernel `kernel-doc +<https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html>`_ +documentation applies with no changes. + +Use structures for I/O access +----------------------------- + +U-Boot typically uses a C structure to map out the registers in an I/O region, +rather than offsets. The reasons for this are: + +* It dissociates the register location (offset) from the register type, which + means the developer has to make sure the type is right for each access, + whereas with the struct method, this is checked by the compiler; + +* It avoids actually writing all offsets, which is (more) error-prone; + +* It allows for better compile time sanity-checking of values we write to registers. + +Some reasons why you might not use C structures: + +* Where the registers appear at different offsets in different hardware + revisions supported by the same driver + +* Where the driver only uses a small subset of registers and it is not worth + defining a struct to cover them all, with large empty regions + +* Where the offset of a register might be hard to figure out when buried a long + way down a structure, possibly with embedded sub-structures + +* This may need to change to the kernel model if we allow for more run-time + detection of what drivers are appropriate for what we're running on. + +Please use the check_member() macro to verify that your structure is the +expected size, or that particular members appear at the right offset. + +Include files +------------- + +You should follow this ordering in U-Boot. The common.h header (which is going +away at some point) should always be first, followed by other headers in order, +then headers with directories, then local files: + +.. code-block:: C + + #include <common.h> + #include <bootstage.h> + #include <dm.h> + #include <others.h> + #include <asm/...> + #include <arm/arch/...> + #include <dm/device_compat/.h> + #include <linux/...> + #include "local.h" + +Within that order, sort your includes. + +It is important to include common.h first since it provides basic features used +by most files, e.g. CONFIG options. + +For files that need to be compiled for the host (e.g. tools), you need to use +``#ifndef USE_HOSTCC`` to avoid including common.h since it includes a lot of +internal U-Boot things. See common/image.c for an example. + +If your file uses driver model, include <dm.h> in the C file. Do not include +dm.h in a header file. Try to use forward declarations (e.g. ``struct +udevice``) instead. + +Filenames +--------- + +For .c and .h files try to use underscore rather than hyphen unless you want +the file to stand out (e.g. driver-model uclasses should be named xxx-uclass.h. +Avoid upper case and keep the names fairly short. + +Function and struct comments +---------------------------- + +Non-trivial functions should have a comment which describes what they do. If it +is an exported function, put the comment in the header file so the API is in +one place. If it is a static function, put it in the C file. + +If the function returns errors, mention that and list the different errors that +are returned. If it is merely passing errors back from a function it calls, +then you can skip that. + +See `here +<https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html#function-d…>`_ +for style. + +Driver model +------------ + +When declaring a device, try to use ``struct udevice *dev``, i.e. ``dev`` as the name: + +.. code-block:: C + + struct udevice *dev; + +Use ``ret`` as the return value: + +.. code-block:: C + + struct udevice *dev; + int ret; + + ret = uclass_first_device_err(UCLASS_ACPI_PMC, &dev); + if (ret) + return log_msg_ret("pmc", dev); + +Consider using log_ret() or log_msg_ret() to return a value (see above). + +Add a ``p`` suffix on return arguments: + +.. code-block:: C + + int dm_pci_find_class(uint find_class, int index, struct udevice **devp) + { + ... + *devp = dev; + + return 0; + } + +There are standard variable names that you should use in drivers: + +* ``struct xxx_priv`` and ``priv`` for dev_get_priv() + +* ``struct xxx_plat`` and ``plat`` for dev_get_platdata() + +For example: + +.. code-block:: C + + struct simple_bus_plat { + u32 base; + u32 size; + u32 target; + }; + + /* Davinci MMC board definitions */ + struct davinci_mmc_priv { + struct davinci_mmc_regs *reg_base; /* Register base address */ + uint input_clk; /* Input clock to MMC controller */ + struct gpio_desc cd_gpio; /* Card Detect GPIO */ + struct gpio_desc wp_gpio; /* Write Protect GPIO */ + }; + + struct rcar_gpio_priv *priv = dev_get_priv(dev); + + struct pl01x_serial_platdata *plat = dev_get_platdata(dev); + +Other +----- + +Some minor things: + +* Put a blank line before the last ``return`` in a function unless it is the only line: + +.. code-block:: C + + struct udevice *pci_get_controller(struct udevice *dev) + { + while (device_is_on_pci_bus(dev)) + dev = dev->parent; + + return dev; + } + +Tests +----- + +Please add tests when you add code. Please change or expand tests when you change code. + +Run the tests with:: + + make check + make qcheck (skips some tests) + +Python tests are in test/py/tests - see the docs in test/py for info. + +Try to write your tests in C if you can. For example, tests to check a command +will be much faster (10-100x or more) if they can directly call run_command() +and ut_check_console_line() instead of using Python to send commands over a +pipe to U-Boot. + +Tests run all supported CI systems (gitlab, travis, azure) using scripts in the +root of the U-Boot tree. diff --git a/doc/develop/index.rst b/doc/develop/index.rst index fe3564a9fbf4..dde47994c71a 100644 --- a/doc/develop/index.rst +++ b/doc/develop/index.rst @@ -3,6 +3,14 @@ Develop U-Boot ============== +General +------- + +.. toctree:: + :maxdepth: 1 + + codingstyle + Implementation -------------- -- 2.25.1

1 7

[PULL] u-boot-usb/master
by Marek Vasut 15 Jul '22

15 Jul '22

The following changes since commit 36b661dc919da318c163a45f4a220d2e3d9db608: Merge branch 'next' (2022-07-11 14:58:57 -0400) are available in the Git repository at: git://source.denx.de/u-boot-usb.git master for you to fetch changes up to 16aabfe2f29d4682b2176095029fa307caccaced: spl: sdp: Pass the USB index to board_usb_init() (2022-07-14 16:13:11 +0200) ---------------------------------------------------------------- Fabio Estevam (1): spl: sdp: Pass the USB index to board_usb_init() Kory Maincent (1): usb: kbd: allow probing even if usbkbd not in stdin Michal Simek (1): ti: keystone: Don't select GPIO_EXTRA_HEADER Patrick Delaunay (1): usb: hub: introduce HUB_DEBOUNCE_TIMEOUT Rui Miguel Silva (3): usb: common: move urb code to common usb: add isp1760 family driver corstone1000: enable isp1763 usb controller and mmc T Karthik Reddy (1): usb: dwc3: Add support to reset usb ULPI phy Makefile | 1 + arch/arm/Kconfig | 1 - common/spl/spl_sdp.c | 2 +- common/usb_hub.c | 6 +- common/usb_kbd.c | 25 +- configs/corstone1000_defconfig | 3 + drivers/usb/Kconfig | 2 + drivers/usb/common/Makefile | 4 + drivers/usb/common/usb_urb.c | 160 ++++ drivers/usb/dwc3/dwc3-generic.c | 30 + drivers/usb/host/r8a66597-hcd.c | 30 +- drivers/usb/isp1760/Kconfig | 12 + drivers/usb/isp1760/Makefile | 6 + drivers/usb/isp1760/isp1760-core.c | 380 ++++++++++ drivers/usb/isp1760/isp1760-core.h | 96 +++ drivers/usb/isp1760/isp1760-hcd.c | 2477 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/isp1760/isp1760-hcd.h | 81 ++ drivers/usb/isp1760/isp1760-if.c | 125 +++ drivers/usb/isp1760/isp1760-regs.h | 292 +++++++ drivers/usb/isp1760/isp1760-uboot.c | 75 ++ drivers/usb/isp1760/isp1760-uboot.h | 27 + drivers/usb/musb-new/musb_core.c | 2 +- drivers/usb/musb-new/musb_host.c | 2 +- drivers/usb/musb-new/musb_host.h | 2 +- drivers/usb/musb-new/musb_uboot.c | 38 +- drivers/usb/musb-new/musb_uboot.h | 2 +- include/configs/corstone1000.h | 6 + drivers/usb/musb-new/usb-compat.h => include/linux/usb/usb_urb_compat.h | 47 +- include/usb_defs.h | 32 + 29 files changed, 3874 insertions(+), 92 deletions(-) create mode 100644 drivers/usb/common/usb_urb.c create mode 100644 drivers/usb/isp1760/Kconfig create mode 100644 drivers/usb/isp1760/Makefile create mode 100644 drivers/usb/isp1760/isp1760-core.c create mode 100644 drivers/usb/isp1760/isp1760-core.h create mode 100644 drivers/usb/isp1760/isp1760-hcd.c create mode 100644 drivers/usb/isp1760/isp1760-hcd.h create mode 100644 drivers/usb/isp1760/isp1760-if.c create mode 100644 drivers/usb/isp1760/isp1760-regs.h create mode 100644 drivers/usb/isp1760/isp1760-uboot.c create mode 100644 drivers/usb/isp1760/isp1760-uboot.h rename drivers/usb/musb-new/usb-compat.h => include/linux/usb/usb_urb_compat.h (59%)

2 1

[PATCH 0/4] mtd: spi: arm: rk3399: rock-pi-4: u-boot/next Support SPI NOR Flash in Rock Pi 4 (XTX xt25f32b)
by Xavier Drudis Ferran 15 Jul '22

15 Jul '22

The Radxa Rock Pi 4 board is sold from revision 1.4 with a soldered 4Mb SPI NOR Flash. This series allows to use it from U-Boot and boot from it. This series applies to u-boot/next. I have patches for master I can send if requested. I can for custodian trees, but i'd need to adapt and retest. I'm not sure other people will need all of the patches. It may depend on what other components are in use. I needed them and I'm sending them thinking they'd improve U-Boot, but I'm new here so it's likely I'm overseeing something. You may of course take all, some or none of them. I've tested with flashrom on linux-libre 5.15.42 (/dev/mtd0) with this patch applied to the kernel. (not all of it would be needed, just for "full disclosure" on tests) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi index 100a76916..7fdb22a85 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi @@ -14,6 +14,13 @@ aliases { mmc0 = &sdmmc; mmc1 = &sdhci; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + }; chosen { @@ -128,6 +135,12 @@ regulator-max-microvolt = <1400000>; vin-supply = <&vcc5v0_sys>; }; + + sound { + compatible = "audio-graph-card"; + label = "rockchip,rk33999"; + dais = <&i2s0_p0>; + }; }; &cpu_l0 { @@ -419,9 +432,28 @@ }; &i2c1 { - i2c-scl-rising-time-ns = <300>; i2c-scl-falling-time-ns = <15>; - status = "okay"; + i2c-scl-rising-time-ns = <300>; + status = "okay"; + + es8316: codec@11 { + compatible = "everest,es8316"; + reg = <0x11>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det_pin>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PA1 IRQ_TYPE_LEVEL_HIGH>; + #sound-dai-cells = <0>; + + port { + es8316_p0_0: endpoint { + remote-endpoint = <&i2s0_p0_0>; + }; + }; + }; + }; &i2c3 { @@ -441,6 +473,15 @@ rockchip,capture-channels = <2>; rockchip,playback-channels = <2>; status = "okay"; + + i2s0_p0: port { + i2s0_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&es8316_p0_0>; + }; + }; + }; &i2s1 { @@ -481,6 +522,7 @@ vpcie1v8-supply = <&vcc_1v8>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; + max-link-speed = <2>; }; &pinctrl { @@ -500,7 +542,7 @@ pcie { pcie_pwr_en: pcie-pwr-en { - rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up_20ma>; }; }; @@ -556,6 +598,20 @@ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + es8316 { + hp_det_pin: hp-det-pin { + rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + i2s0 { + i2s_8ch_mclk_pin: i2s-8ch-mclk-pin { + rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>; + }; + }; + + }; &pwm2 { @@ -596,6 +652,7 @@ }; &sdhci { + max-frequency = <150000000>; bus-width = <8>; mmc-hs400-1_8v; mmc-hs400-enhanced-strobe; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts index 6c63e6170..c04fee0f5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts @@ -44,3 +44,29 @@ pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; }; }; + +&spi1 { + max-freq = <40000000>; + status = "okay"; + + spiflash: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <40000000>; + spi-cpol; + spi-cpha; + + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + + loader@0 { + label = "loader"; + reg = <0x0 0x400000>; + }; + }; + }; +}; \ No newline at end of file diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 6b904e439..e344077e3 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -17,6 +17,7 @@ spi-nor-objs += sst.o spi-nor-objs += winbond.o spi-nor-objs += xilinx.o spi-nor-objs += xmc.o +spi-nor-objs += xtx.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_MTD_SPI_NOR) += controllers/ diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index cc08bd707..7ab768309 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -1846,6 +1846,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = { &spi_nor_winbond, &spi_nor_xilinx, &spi_nor_xmc, + &spi_nor_xtx, }; static const struct flash_info * diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 3348e1dd1..fd2771fbe 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -489,6 +489,7 @@ extern const struct spi_nor_manufacturer spi_nor_sst; extern const struct spi_nor_manufacturer spi_nor_winbond; extern const struct spi_nor_manufacturer spi_nor_xilinx; extern const struct spi_nor_manufacturer spi_nor_xmc; +extern const struct spi_nor_manufacturer spi_nor_xtx; extern const struct attribute_group *spi_nor_sysfs_groups[]; diff --git a/drivers/mtd/spi-nor/xtx.c b/drivers/mtd/spi-nor/xtx.c new file mode 100644 index 000000000..3db8bfd93 --- /dev/null +++ b/drivers/mtd/spi-nor/xtx.c @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022, Xavier Drudis Ferran + * (based on eon.c from this directory + * and drivers/mtd/spi-nor/spi-nor.c from https://github.com/radxa/kernel.git ) + */ + +#include <linux/mtd/spi-nor.h> + +#include "core.h" + +static const struct flash_info xtx_parts[] = { + /* XTX -- xt25xxx */ + { "xt25f32b", INFO(0x0b4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ) }, + { "xt25f128b", INFO(0x0b4018, 0, 64 * 1024, 256, SECT_4K) }, +}; + +const struct spi_nor_manufacturer spi_nor_xtx = { + .name = "xtx", + .parts = xtx_parts, + .nparts = ARRAY_SIZE(xtx_parts), +};

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