July 2022 - U-Boot

Re: Increasing stabilization time in sunxi_mmc_core_init
by Andre Przywara 21 Jul '22

21 Jul '22

On 21/07/2022 12:03, Da Xue wrote: Hi Da, > Users were reporting non-boot on our H5 boards (ALL-H3-CC-H5). u-boot > gets stuck in SPL with this message for SD/eMMC respectively. > > Trying to boot from MMC1 or Trying to boot from MMC2 > > I tested about 20 MicroSD cards from different brands and some were > happy and some were not. Increasing the udelay to 8-10ms in > drivers/mmc/sunxi_mmc.c sunxi_mmc_core_init after reset seems to fix > the issue for the MicroSD cards. That's interesting, thanks for the report. I don't remember hearing of issues with MMC before, at least not in the SPL. It's a bit odd that waiting after the *controller* reset should affect SD cards, and 1ms seems plenty for just the reset. I just checked and at least the SOFT_RESET and FIFO_RESET bits are self clearing. Can you try to use wait_for_bit_le32() to wait for those parts to finish? See sun8i_emac_eth_start() for an example. And since you mentioned it's card related: can you check whether the delay is actually needed somewhere else, later? At some point where we wait to the card to response, for instance? I am not against taking this patch, if it fixes problems for you, but just want to avoid that it papers over other issues. Cheers, Andre > > Author: Da Xue <da(a)libre.computer> > Date: Wed Jul 20 19:11:55 2022 -0400 > > sunxi: raise stabilization time for mmc from 1ms to 8ms > > diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c > index 1bb7b6d0e9..499e057725 100644 > --- a/drivers/mmc/sunxi_mmc.c > +++ b/drivers/mmc/sunxi_mmc.c > @@ -297,7 +297,7 @@ static int sunxi_mmc_core_init(struct mmc *mmc) > > /* Reset controller */ > writel(SUNXI_MMC_GCTRL_RESET, &priv->reg->gctrl); > - udelay(1000); > + udelay(8000); > > return 0; > } > > I don't know the implications of this change so I am seeking feedback. > Are other boards having this issue as well or is it specific to our > hardware? > > Best, > Da >

3 8

Please pull u-boot-marvell/master
by Stefan Roese 21 Jul '22

21 Jul '22

Hi Tom, please pull this first batch of mostly Marvell related patches: ---------------------------------------------------------------- - turris: Misc updates (Pali) - mvebu: handle non-zero base address for RAM (Chris) - mvebu: add support for Methode eDPU (Robert) - mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals (Pali) - tlv_eeprom: Add missing CRC32 dependency (Pali) - treewide: Fix Marek's name and change my e-mail address (Marek) - mvebu: eDPU/uDPU: Misc updates (Robert) - mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times (Pali) ---------------------------------------------------------------- Here the Azure build, without any issues: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=209&view=results Thanks, Stefan The following changes since commit 88d931a71052fc8fb7b48126ae09aa875745d5ec: Merge tag 'for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-ubi (2022-07-20 07:38:49 -0400) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-marvell.git for you to fetch changes up to ca85b5a146ebfd6da81f4b79e4b51eb9c5d6f60b: arm: mvebu: turris_omnia: Set ETHPRIME to DT alias (2022-07-21 10:14:04 +0200) ---------------------------------------------------------------- Chris Packham (1): arm64: mvebu: handle non-zero base address for RAM Marek Behún (2): board: turris: Fix MAINTAINERS and add Pali treewide: Fix Marek's name and change my e-mail address Pali Rohár (7): board: turris: Find atsha device by atsha driver arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals arm: mvebu: a3720: Add NVMe to BOOT_TARGET_DEVICES list arch: mvebu: Disable by default unused peripherals in SPL tlv_eeprom: Add missing CRC32 dependency arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times arm: mvebu: turris_omnia: Set ETHPRIME to DT alias Robert Marko (5): arm: mvebu: dts: sync DTS arm: mvebu: add support for Methode eDPU MAINTAINERS: add myself as Methode maintainer mvebu: eDPU: disable SCSI support mvebu: uDPU: disable non-present peripherals .mailmap | 2 + MAINTAINERS | 20 +-- arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 +++++++ arch/arm/dts/armada-3720-eDPU.dts | 14 ++ arch/arm/dts/armada-3720-uDPU.dts | 155 +--------------------- arch/arm/dts/armada-3720-uDPU.dtsi | 160 +++++++++++++++++++++++ arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi | 2 +- arch/arm/dts/armada-385-turris-omnia.dts | 6 + arch/arm/mach-mvebu/arm64-common.c | 7 +- arch/arm/mach-mvebu/armada3700/cpu.c | 2 +- arch/arm/mach-mvebu/armada3700/mbox.c | 2 +- arch/arm/mach-mvebu/cpu.c | 67 ++++------ arch/arm/mach-mvebu/dram.c | 18 +-- arch/arm/mach-mvebu/include/mach/cpu.h | 9 -- arch/arm/mach-mvebu/include/mach/mbox.h | 2 +- board/CZ.NIC/turris_atsha_otp.c | 7 +- board/CZ.NIC/turris_mox/MAINTAINERS | 6 +- board/CZ.NIC/turris_mox/Makefile | 2 +- board/CZ.NIC/turris_mox/mox_sp.c | 2 +- board/CZ.NIC/turris_mox/mox_sp.h | 2 +- board/CZ.NIC/turris_mox/turris_mox.c | 2 +- board/CZ.NIC/turris_omnia/MAINTAINERS | 7 +- board/CZ.NIC/turris_omnia/Makefile | 2 +- board/CZ.NIC/turris_omnia/turris_omnia.c | 2 +- board/Marvell/mvebu_armada-37xx/MAINTAINERS | 5 - cmd/Kconfig | 2 + cmd/btrfs.c | 2 +- common/spl/Kconfig | 2 + configs/eDPU_defconfig | 99 ++++++++++++++ configs/turris_omnia_defconfig | 2 +- configs/uDPU_defconfig | 7 +- disk/Kconfig | 2 + doc/kwboot.1 | 2 +- drivers/clk/mvebu/armada-37xx-periph.c | 2 +- drivers/clk/mvebu/armada-37xx-tbg.c | 2 +- drivers/misc/atsha204a-i2c.c | 2 +- drivers/mmc/Kconfig | 1 + drivers/rtc/armada38x.c | 2 +- drivers/usb/Kconfig | 1 + drivers/watchdog/armada-37xx-wdt.c | 2 +- drivers/watchdog/orion_wdt.c | 2 +- fs/btrfs/Makefile | 2 +- fs/btrfs/btrfs.c | 2 +- fs/btrfs/btrfs.h | 2 +- fs/btrfs/compression.c | 2 +- fs/btrfs/conv-funcs.h | 2 +- fs/btrfs/ctree.c | 2 +- fs/btrfs/ctree.h | 2 +- fs/btrfs/dev.c | 2 +- fs/btrfs/dir-item.c | 2 +- fs/btrfs/extent-io.c | 2 +- fs/btrfs/inode.c | 2 +- fs/btrfs/subvolume.c | 2 +- fs/fs_internal.c | 2 +- include/atsha204a-i2c.h | 2 +- include/btrfs.h | 2 +- include/configs/mvebu_armada-37xx.h | 49 ++++++- include/configs/turris_mox.h | 2 +- include/configs/turris_omnia.h | 2 +- include/fs_internal.h | 2 +- include/u-boot/variadic-macro.h | 2 +- scripts/gen_ll_addressable_symbols.sh | 2 +- tools/kwboot.c | 2 +- tools/termios_linux.h | 2 +- 65 files changed, 481 insertions(+), 293 deletions(-) create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi create mode 100644 arch/arm/dts/armada-3720-eDPU.dts create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi create mode 100644 configs/eDPU_defconfig

2 1

[PATCH v2] watchdog: add amlogic watchdog support
by Philippe Boos 21 Jul '22

21 Jul '22

Add support for hardware watchdog timer for Amlogic SoCs. This driver has been heavily inspired by his Linux equivalent (meson_gxbb_wdt.c). Reviewed-by: Jerome Brunet <jbrunet(a)baylibre.com> Reviewed-by: Neil Armstrong <narmstrong(a)baylibre.com> Signed-off-by: Philippe Boos <pboos(a)baylibre.com> --- Your recommendations have been implemented. I let you check this version 2. The reset works well when triggered by the wdt command in u-boot. This watchdog driver has been tested on a GXL libretech-cc board and also on a custom G12a board. I did the following test cases: * boot with a faulty boot command, then we reach watchdog reset successfully, * boot a Linux kernel with and without watchdog support, and check if it is working as expected. MAINTAINERS | 1 + doc/board/amlogic/index.rst | 2 + drivers/watchdog/Kconfig | 7 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/meson_gxbb_wdt.c | 136 ++++++++++++++++++++++++++++++ 5 files changed, 147 insertions(+) create mode 100644 drivers/watchdog/meson_gxbb_wdt.c diff --git a/MAINTAINERS b/MAINTAINERS index 28e4d38238..ab3ef041f7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -160,6 +160,7 @@ F: drivers/spi/meson_spifc.c F: drivers/pinctrl/meson/ F: drivers/power/domain/meson-gx-pwrc-vpu.c F: drivers/video/meson/ +F: drivers/watchdog/meson_gxbb_wdt.c F: include/configs/meson64.h F: include/configs/meson64_android.h F: doc/board/amlogic/ diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 9c7fadf2c0..cc2ba50889 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -73,6 +73,8 @@ This matrix concerns the actual source code version. +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ | PCIe (+NVMe) | *N/A* | *N/A* | *N/A* | **Yes** | **Yes** | **Yes** | **Yes** | +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ +| Watchdog | *N/A* | **Yes** | *N/A* | *N/A* | *N/A* | *N/A* | *N/A* | ++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+ Boot Documentation ------------------ diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index c3eb8a8aec..da0fa5396f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -175,6 +175,13 @@ config WDT_MAX6370 help Select this to enable max6370 watchdog timer. +config WDT_MESON_GXBB + bool "Amlogic watchdog timer support" + depends on WDT + help + Select this to enable Meson watchdog timer, + which can be found on some Amlogic platforms. + config WDT_MPC8xx bool "MPC8xx watchdog timer support" depends on WDT && MPC8xx diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 1f6199beca..0e2f582a5f 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_ORION) += orion_wdt.o obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o +obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o diff --git a/drivers/watchdog/meson_gxbb_wdt.c b/drivers/watchdog/meson_gxbb_wdt.c new file mode 100644 index 0000000000..6ab005813f --- /dev/null +++ b/drivers/watchdog/meson_gxbb_wdt.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 BayLibre, SAS. + */ + +#include <clk.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <reset.h> +#include <wdt.h> +#include <asm/io.h> +#include <linux/bitops.h> + +#define GXBB_WDT_CTRL_REG 0x0 +#define GXBB_WDT_TCNT_REG 0x8 +#define GXBB_WDT_RSET_REG 0xc + +#define GXBB_WDT_CTRL_SYS_RESET_NOW BIT(26) +#define GXBB_WDT_CTRL_CLKDIV_EN BIT(25) +#define GXBB_WDT_CTRL_CLK_EN BIT(24) +#define GXBB_WDT_CTRL_EE_RESET BIT(21) +#define GXBB_WDT_CTRL_EN BIT(18) + +#define GXBB_WDT_CTRL_DIV_MASK GENMASK(17, 0) +#define GXBB_WDT_TCNT_SETUP_MASK GENMASK(15, 0) + + +struct amlogic_wdt_priv { + void __iomem *reg_base; +}; + +static int amlogic_wdt_set_timeout(struct udevice *dev, u64 timeout_ms) +{ + struct amlogic_wdt_priv *data = dev_get_priv(dev); + + if (timeout_ms > GXBB_WDT_TCNT_SETUP_MASK) { + dev_warn(dev, "%s: timeout_ms=%llu: maximum watchdog timeout exceeded\n", + __func__, timeout_ms); + timeout_ms = GXBB_WDT_TCNT_SETUP_MASK; + } + + writel(timeout_ms, data->reg_base + GXBB_WDT_TCNT_REG); + + return 0; +} + +static int amlogic_wdt_stop(struct udevice *dev) +{ + struct amlogic_wdt_priv *data = dev_get_priv(dev); + + writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN, + data->reg_base + GXBB_WDT_CTRL_REG); + + return 0; +} + +static int amlogic_wdt_start(struct udevice *dev, u64 time_ms, ulong flags) +{ + struct amlogic_wdt_priv *data = dev_get_priv(dev); + + writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN, + data->reg_base + GXBB_WDT_CTRL_REG); + + return amlogic_wdt_set_timeout(dev, time_ms); +} + +static int amlogic_wdt_reset(struct udevice *dev) +{ + struct amlogic_wdt_priv *data = dev_get_priv(dev); + + writel(0, data->reg_base + GXBB_WDT_RSET_REG); + + return 0; +} + +static int amlogic_wdt_expire_now(struct udevice *dev, ulong flags) +{ + struct amlogic_wdt_priv *data = dev_get_priv(dev); + + writel(0, data->reg_base + GXBB_WDT_CTRL_SYS_RESET_NOW); + + return 0; +} + +static int amlogic_wdt_probe(struct udevice *dev) +{ + struct amlogic_wdt_priv *data = dev_get_priv(dev); + int ret; + + data->reg_base = dev_remap_addr(dev); + if (!data->reg_base) + return -EINVAL; + + struct clk clk; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return ret; + + ret = clk_enable(&clk); + if (ret) { + clk_free(&clk); + return ret; + } + + /* Setup with 1ms timebase */ + writel(((clk_get_rate(&clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) | + GXBB_WDT_CTRL_EE_RESET | + GXBB_WDT_CTRL_CLK_EN | + GXBB_WDT_CTRL_CLKDIV_EN, + data->reg_base + GXBB_WDT_CTRL_REG); + + return 0; +} + +static const struct wdt_ops amlogic_wdt_ops = { + .start = amlogic_wdt_start, + .reset = amlogic_wdt_reset, + .stop = amlogic_wdt_stop, + .expire_now = amlogic_wdt_expire_now, +}; + +static const struct udevice_id amlogic_wdt_ids[] = { + { .compatible = "amlogic,meson-gxbb-wdt" }, + {} +}; + +U_BOOT_DRIVER(amlogic_wdt) = { + .name = "amlogic_wdt", + .id = UCLASS_WDT, + .of_match = amlogic_wdt_ids, + .priv_auto = sizeof(struct amlogic_wdt_priv), + .probe = amlogic_wdt_probe, + .ops = &amlogic_wdt_ops, + .flags = DM_FLAG_PRE_RELOC, +}; -- 2.20.1

3 5

u-boot 2022.04 for MCIMX6S7 board (TS-7970)
by DataSelfService Srl 21 Jul '22

21 Jul '22

Hi, while trying to port OEM u-boot (https://github.com/embeddedTS/u-boot) for TS-7970 (https://www.embeddedts.com/products/TS-7970) to latest 2022.04, I cannot get the init.S running. Connecting GDB+JLink it appears at certain point the processor does not execute: ``` 0x17802200 <s_init>: push {r3, lr} ``` properly and hang there. See attached gdb.txt: sp does not increments, not `x/x $sp` shows any change in memory. Note: `mon memu32 0x93fe38=1` allows you to write memory (and restore it: `mon memu32 0x93fe38=0`). Also I traced all instructions executed by "orig" OEM delivered u-boot.imx (based on v2015), and "new" one (attached). There is some diffs in IMX ERRATAS (no impact: removing code from orig works fine); I noted new codes `bl s_init` (from start.S) as `blx s_init`, while orig keeps the same. Not sure why and what is the impact. Any idea what the reason is and how to get this working? Regards, Andrea

1 1

[PATCH 1/5] imx8m: USDHC3 base address definition for i.MX8MP
by Martyn Welch 21 Jul '22

21 Jul '22

The i.MX8MP also has USDHC3, allow access to the relvant base address definition. Signed-off-by: Martyn Welch <martyn.welch(a)collabora.com> --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 1da75528d4..912c28e624 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -45,7 +45,7 @@ #define UART4_BASE_ADDR 0x30A60000 #define USDHC1_BASE_ADDR 0x30B40000 #define USDHC2_BASE_ADDR 0x30B50000 -#ifdef CONFIG_IMX8MM +#if defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MP) #define USDHC3_BASE_ADDR 0x30B60000 #endif #define UART_BASE_ADDR(n) ( \ -- 2.35.1

1 4

[PATCH] arm: mvebu: turris_omnia: Set ETHPRIME to DT alias
by Pali Rohár 21 Jul '22

21 Jul '22

CONFIG_ETHPRIME can be set to DT node name or alias which refers to DT node. Define ethernet aliases and set ETHPRIME to eth2 which refers to WAN ethernet port. This removes hardcoded DT node name from U-Boot configuration file. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- arch/arm/dts/armada-385-turris-omnia.dts | 6 ++++++ configs/turris_omnia_defconfig | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/armada-385-turris-omnia.dts b/arch/arm/dts/armada-385-turris-omnia.dts index 5511c84849ee..7f1478edfd23 100644 --- a/arch/arm/dts/armada-385-turris-omnia.dts +++ b/arch/arm/dts/armada-385-turris-omnia.dts @@ -55,6 +55,12 @@ stdout-path = &uart0; }; + aliases { + ethernet0 = &eth0; + ethernet1 = &eth1; + ethernet2 = &eth2; + }; + memory { device_type = "memory"; reg = <0x00000000 0x40000000>; /* 1024 MB */ diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 6460535ef94e..e2a0449b487b 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -65,7 +65,7 @@ CONFIG_CMD_FS_UUID=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y -CONFIG_ETHPRIME="ethernet@34000" +CONFIG_ETHPRIME="eth2" CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 CONFIG_NETCONSOLE=y -- 2.20.1

3 4

[PATCH] arm: mvebu: Avoid reading MVEBU_REG_PCIE_DEVID register too many times
by Pali Rohár 21 Jul '22

21 Jul '22

Change detection of platform/cpu from runtime to compile time via config define. This completely eliminates compiling code which is not going to run on selected platform. Code which parses and prints device / revision id still reads device id from MVEBU_REG_PCIE_DEVID register, but only once. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- arch/arm/mach-mvebu/cpu.c | 67 ++++++++++---------------- arch/arm/mach-mvebu/dram.c | 18 +++---- arch/arm/mach-mvebu/include/mach/cpu.h | 9 ---- 3 files changed, 32 insertions(+), 62 deletions(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 173d95a760a3..1457af1d6aa3 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -54,33 +54,6 @@ void reset_cpu(void) ; } -int mvebu_soc_family(void) -{ - u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff; - - switch (devid) { - case SOC_MV78230_ID: - case SOC_MV78260_ID: - case SOC_MV78460_ID: - return MVEBU_SOC_AXP; - - case SOC_88F6720_ID: - return MVEBU_SOC_A375; - - case SOC_88F6810_ID: - case SOC_88F6820_ID: - case SOC_88F6828_ID: - return MVEBU_SOC_A38X; - - case SOC_98DX3236_ID: - case SOC_98DX3336_ID: - case SOC_98DX4251_ID: - return MVEBU_SOC_MSYS; - } - - return MVEBU_SOC_UNKNOWN; -} - u32 get_boot_device(void) { u32 val; @@ -305,7 +278,10 @@ int print_cpuinfo(void) break; } - if (mvebu_soc_family() == MVEBU_SOC_AXP) { + switch (devid) { + case SOC_MV78230_ID: + case SOC_MV78260_ID: + case SOC_MV78460_ID: switch (revid) { case 1: puts("A0"); @@ -317,9 +293,9 @@ int print_cpuinfo(void) printf("?? (%x)", revid); break; } - } + break; - if (mvebu_soc_family() == MVEBU_SOC_A375) { + case SOC_88F6720_ID: switch (revid) { case MV_88F67XX_A0_ID: puts("A0"); @@ -328,9 +304,11 @@ int print_cpuinfo(void) printf("?? (%x)", revid); break; } - } + break; - if (mvebu_soc_family() == MVEBU_SOC_A38X) { + case SOC_88F6810_ID: + case SOC_88F6820_ID: + case SOC_88F6828_ID: switch (revid) { case MV_88F68XX_Z1_ID: puts("Z1"); @@ -345,9 +323,11 @@ int print_cpuinfo(void) printf("?? (%x)", revid); break; } - } + break; - if (mvebu_soc_family() == MVEBU_SOC_MSYS) { + case SOC_98DX3236_ID: + case SOC_98DX3336_ID: + case SOC_98DX4251_ID: switch (revid) { case 3: puts("A0"); @@ -359,6 +339,11 @@ int print_cpuinfo(void) printf("?? (%x)", revid); break; } + break; + + default: + printf("?? (%x)", revid); + break; } get_sar_freq(&sar_freq); @@ -463,7 +448,7 @@ int arch_cpu_init(void) struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; - if (mvebu_soc_family() == MVEBU_SOC_A38X) { + if (IS_ENABLED(CONFIG_ARMADA_38X)) { /* * To fully release / unlock this area from cache, we need * to flush all caches and disable the L2 cache. @@ -492,7 +477,7 @@ int arch_cpu_init(void) */ mvebu_mbus_probe(NULL, 0); - if (mvebu_soc_family() == MVEBU_SOC_AXP) { + if (IS_ENABLED(CONFIG_ARMADA_XP)) { /* * Now the SDRAM access windows can be reconfigured using * the information in the SDRAM scratch pad registers @@ -506,7 +491,7 @@ int arch_cpu_init(void) */ mvebu_mbus_probe(windows, ARRAY_SIZE(windows)); - if (mvebu_soc_family() == MVEBU_SOC_AXP) { + if (IS_ENABLED(CONFIG_ARMADA_XP)) { /* Enable GBE0, GBE1, LCD and NFC PUP */ clrsetbits_le32(ARMADA_XP_PUP_ENABLE, 0, GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | @@ -530,9 +515,9 @@ u32 mvebu_get_nand_clock(void) { u32 reg; - if (mvebu_soc_family() == MVEBU_SOC_A38X) + if (IS_ENABLED(CONFIG_ARMADA_38X)) reg = MVEBU_DFX_DIV_CLK_CTRL(1); - else if (mvebu_soc_family() == MVEBU_SOC_MSYS) + else if (IS_ENABLED(CONFIG_ARMADA_MSYS)) reg = MVEBU_DFX_DIV_CLK_CTRL(8); else reg = MVEBU_CORE_DIV_CLK_CTRL(1); @@ -678,7 +663,7 @@ void enable_caches(void) * ethernet driver (mvpp2). So lets keep the d-cache disabled * until this is solved. */ - if (mvebu_soc_family() != MVEBU_SOC_A375) { + if (IS_ENABLED(CONFIG_ARMADA_375)) { /* Enable D-cache. I-cache is already enabled in start.S */ dcache_enable(); } @@ -686,7 +671,7 @@ void enable_caches(void) void v7_outer_cache_enable(void) { - if (mvebu_soc_family() == MVEBU_SOC_AXP) { + if (IS_ENABLED(CONFIG_ARMADA_XP)) { struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; u32 u; diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index 349e0cc4c180..d398d0f7676a 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -220,7 +220,7 @@ static int ecc_enabled(void) return 0; } -/* Return the width of the DRAM bus, or 0 for unknown. */ +/* Return the width of the DRAM bus. */ static int bus_width(void) { int full_width = 0; @@ -228,17 +228,11 @@ static int bus_width(void) if (reg_read(REG_SDRAM_CONFIG_ADDR) & (1 << REG_SDRAM_CONFIG_WIDTH_OFFS)) full_width = 1; - switch (mvebu_soc_family()) { - case MVEBU_SOC_AXP: - return full_width ? 64 : 32; - break; - case MVEBU_SOC_A375: - case MVEBU_SOC_A38X: - case MVEBU_SOC_MSYS: - return full_width ? 32 : 16; - default: - return 0; - } +#ifdef CONFIG_ARMADA_XP + return full_width ? 64 : 32; +#else + return full_width ? 32 : 16; +#endif } static int cycle_mode(void) diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index 9109f0c2582d..df0bb3c1bddd 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -61,14 +61,6 @@ enum cpu_attrib { CPU_ATTR_DEV_CS3 = 0x37, }; -enum { - MVEBU_SOC_AXP, - MVEBU_SOC_A375, - MVEBU_SOC_A38X, - MVEBU_SOC_MSYS, - MVEBU_SOC_UNKNOWN, -}; - #define MVEBU_SDRAM_SIZE_MAX 0xc0000000 /* @@ -151,7 +143,6 @@ unsigned int mvebu_sdram_bar(enum memory_bank bank); unsigned int mvebu_sdram_bs(enum memory_bank bank); void mvebu_sdram_size_adjust(enum memory_bank bank); int mvebu_mbus_probe(struct mbus_win windows[], int count); -int mvebu_soc_family(void); u32 mvebu_get_nand_clock(void); void __noreturn return_to_bootrom(void); -- 2.20.1

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[PATCH 1/2] mvebu: eDPU: disable SCSI support
by Robert Marko 21 Jul '22

21 Jul '22

eDPU does not use SCSI nor it has SATA exposed, and commit arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals now allows compiling U-boot wihout all of the BOOT_TARGET_DEVICES since not all boards have all of the listed peripherals exposed. So, disable SCSI support in defconfig for eDPU. Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> --- configs/eDPU_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig index e2e593ad21..9c124bf147 100644 --- a/configs/eDPU_defconfig +++ b/configs/eDPU_defconfig @@ -32,7 +32,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y -# CONFIG_CMD_SCSI is not set CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -78,7 +77,7 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_SCSI=y +# CONFIG_SCSI is not set CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y CONFIG_SYSINFO=y -- 2.36.1

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[PATCH u-boot-marvell 1/2] board: turris: Fix MAINTAINERS and add Pali
by Marek Behún 21 Jul '22

21 Jul '22

From: Marek Behún <marek.behun(a)nic.cz> Fix MAINTAINERS files for Turris devices, add missing files and add Pali as maintainer. Signed-off-by: Marek Behún <marek.behun(a)nic.cz> --- MAINTAINERS | 8 -------- board/CZ.NIC/turris_mox/MAINTAINERS | 4 +++- board/CZ.NIC/turris_omnia/MAINTAINERS | 5 ++++- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 72bf94c3d1..1c7baf9412 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -235,14 +235,6 @@ F: drivers/net/cortina_ni.h F: drivers/net/phy/ca_phy.c F: configs/cortina_presidio-asic-pnand_defconfig -ARM/CZ.NIC TURRIS MOX SUPPORT -M: Marek Behun <marek.behun(a)nic.cz> -S: Maintained -F: arch/arm/dts/armada-3720-turris-mox.dts -F: board/CZ.NIC/ -F: configs/turris_*_defconfig -F: include/configs/turris_*.h - ARM FREESCALE IMX M: Stefano Babic <sbabic(a)denx.de> M: Fabio Estevam <festevam(a)gmail.com> diff --git a/board/CZ.NIC/turris_mox/MAINTAINERS b/board/CZ.NIC/turris_mox/MAINTAINERS index 2b9c1132f5..3c3e477f30 100644 --- a/board/CZ.NIC/turris_mox/MAINTAINERS +++ b/board/CZ.NIC/turris_mox/MAINTAINERS @@ -1,6 +1,8 @@ -TURRIS OMNIA BOARD +TURRIS MOX BOARD M: Marek Behún <marek.behun(a)nic.cz> +M: Pali Rohár <pali(a)kernel.org> S: Maintained +F: arch/arm/dts/armada-3720-turris-mox*.dts* F: board/CZ.NIC/turris_mox/ F: include/configs/turris_mox.h F: configs/turris_mox_defconfig diff --git a/board/CZ.NIC/turris_omnia/MAINTAINERS b/board/CZ.NIC/turris_omnia/MAINTAINERS index ed15e11d3e..f653c4af86 100644 --- a/board/CZ.NIC/turris_omnia/MAINTAINERS +++ b/board/CZ.NIC/turris_omnia/MAINTAINERS @@ -1,6 +1,9 @@ TURRIS OMNIA BOARD M: Marek Behún <marek.behun(a)nic.cz> +M: Pali Rohár <pali(a)kernel.org> S: Maintained +F: arch/arm/dts/armada-385-turris-omnia*.dts* +F: board/CZ.NIC/turris_atsha_otp.* F: board/CZ.NIC/turris_omnia/ -F: include/configs/turris_omnia.h F: configs/turris_omnia_defconfig +F: include/configs/turris_omnia.h -- 2.35.1

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[PATCH] tlv_eeprom: Add missing CRC32 dependency
by Pali Rohár 21 Jul '22

21 Jul '22

tlv_eeprom uses crc32() function, so add dependency into Kconfig. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- cmd/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index 69c1814d24af..d513d808aa3d 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -167,6 +167,7 @@ config CMD_REGINFO config CMD_TLV_EEPROM bool "tlv_eeprom" depends on I2C_EEPROM + select CRC32 help Display and program the system EEPROM data block in ONIE Tlvinfo format. TLV stands for Type-Length-Value. @@ -175,6 +176,7 @@ config SPL_CMD_TLV_EEPROM bool "tlv_eeprom for SPL" depends on SPL_I2C_EEPROM select SPL_DRIVERS_MISC + select SPL_CRC32 help Read system EEPROM data block in ONIE Tlvinfo format from SPL. -- 2.20.1

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