July 2022 - U-Boot

[PULL] u-boot-mips for u-boot/next (v2022.10)
by Daniel Schwierzeck 10 Jul '22

10 Jul '22

Gitlab CI: https://source.denx.de/u-boot/custodians/u-boot-mips/-/pipelines/12656 Azure: https://dev.azure.com/danielschwierzeck/u-boot/_build/results?buildId=30&vi… The following changes since commit 2d2c61ff0460740d9ec5a44dbef9255a8c690696: Merge tag 'efi-2022-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi (2022-07-06 09:17:08 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-mips.git/ tags/mips-pull-2022-07-08 for you to fetch changes up to e5fc4022af3cfd59e3459276305671a595ac5ff0: MAINTAINERS: update maintainer for MediaTek MIPS platform (2022-07-08 15:13:29 +0200) ---------------------------------------------------------------- - MIPS: add drivers and board support for Mediatek MT7621 SoC ---------------------------------------------------------------- Weijie Gao (25): mips: add asm/mipsmtregs.h for MIPS multi-threading mips: add more definitions for asm/cm.h mips: add __image_copy_len for SPL linker script mips: add support for noncached_alloc() mips: mtmips: add support for MediaTek MT7621 SoC mips: mtmips: add two reference boards for mt7621 doc: mediatek: add documentation for mt7621 reference boards clk: mtmips: add clock driver for MediaTek MT7621 SoC reset: mtmips: add reset controller support for MediaTek MT7621 SoC pinctrl: mtmips: add support for MediaTek MT7621 SoC usb: xhci-mtk: add support for MediaTek MT7621 SoC phy: mtk-tphy: add support for MediaTek MT7621 SoC spi: add support for MediaTek MT7621 SoC gpio: add support for MediaTek MT7621 SoC watchdog: add support for MediaTek MT7621 SoC mmc: mediatek: add support for MediaTek MT7621 SoC net: mediatek: remap iobase address net: mediatek: use regmap api to modify ethsys registers net: mediatek: add support for MediaTek MT7621 SoC nand: raw: add support for MediaTek MT7621 SoC spl: allow using nand base without standard nand driver spl: spl_legacy: fix the use of SPL_COPY_PAYLOAD_ONLY spl: nand: support loading legacy image with payload compressed tools: mtk_image: add support for MT7621 NAND images MAINTAINERS: update maintainer for MediaTek MIPS platform MAINTAINERS | 8 + arch/mips/cpu/u-boot-spl.lds | 3 + arch/mips/dts/Makefile | 2 + arch/mips/dts/mediatek,mt7621-nand-rfb.dts | 67 ++ arch/mips/dts/mediatek,mt7621-rfb.dts | 82 ++ arch/mips/dts/mt7621-u-boot.dtsi | 111 +++ arch/mips/dts/mt7621.dtsi | 349 +++++++ arch/mips/include/asm/cm.h | 67 ++ arch/mips/include/asm/mipsmtregs.h | 142 +++ arch/mips/include/asm/system.h | 20 + arch/mips/lib/cache.c | 43 + arch/mips/mach-mtmips/Kconfig | 49 +- arch/mips/mach-mtmips/Makefile | 4 + arch/mips/mach-mtmips/cpu.c | 2 +- arch/mips/mach-mtmips/mt7621/Kconfig | 115 +++ arch/mips/mach-mtmips/mt7621/Makefile | 14 + arch/mips/mach-mtmips/mt7621/init.c | 246 +++++ arch/mips/mach-mtmips/mt7621/mt7621.h | 229 +++++ arch/mips/mach-mtmips/mt7621/serial.c | 23 + arch/mips/mach-mtmips/mt7621/spl/Makefile | 9 + arch/mips/mach-mtmips/mt7621/spl/cps.c | 153 +++ arch/mips/mach-mtmips/mt7621/spl/dram.c | 153 +++ arch/mips/mach-mtmips/mt7621/spl/dram.h | 39 + arch/mips/mach-mtmips/mt7621/spl/launch.c | 100 ++ arch/mips/mach-mtmips/mt7621/spl/launch.h | 52 + arch/mips/mach-mtmips/mt7621/spl/launch_ll.S | 339 +++++++ arch/mips/mach-mtmips/mt7621/spl/serial.c | 24 + arch/mips/mach-mtmips/mt7621/spl/spl.c | 95 ++ arch/mips/mach-mtmips/mt7621/spl/start.S | 226 +++++ arch/mips/mach-mtmips/mt7621/sram_init.S | 22 + arch/mips/mach-mtmips/mt7621/tpl/Makefile | 4 + arch/mips/mach-mtmips/mt7621/tpl/start.S | 161 ++++ arch/mips/mach-mtmips/mt7621/tpl/tpl.c | 144 +++ board/mediatek/mt7621/MAINTAINERS | 8 + board/mediatek/mt7621/Makefile | 3 + board/mediatek/mt7621/board.c | 6 + common/spl/Kconfig | 2 +- common/spl/spl_legacy.c | 21 +- common/spl/spl_nand.c | 27 + configs/mt7621_nand_rfb_defconfig | 85 ++ configs/mt7621_rfb_defconfig | 82 ++ doc/board/index.rst | 1 + doc/board/mediatek/index.rst | 9 + doc/board/mediatek/mt7621.rst | 48 + drivers/clk/mtmips/Makefile | 1 + drivers/clk/mtmips/clk-mt7621.c | 288 ++++++ drivers/gpio/Kconfig | 2 +- drivers/mmc/mtk-sd.c | 13 + drivers/mtd/nand/raw/Kconfig | 17 +- drivers/mtd/nand/raw/Makefile | 2 + drivers/mtd/nand/raw/mt7621_nand.c | 1205 ++++++++++++++++++++++++ drivers/mtd/nand/raw/mt7621_nand.h | 29 + drivers/mtd/nand/raw/mt7621_nand_spl.c | 237 +++++ drivers/net/mtk_eth.c | 45 +- drivers/phy/Kconfig | 2 +- drivers/pinctrl/mtmips/Kconfig | 9 + drivers/pinctrl/mtmips/Makefile | 1 + drivers/pinctrl/mtmips/pinctrl-mt7621.c | 306 ++++++ drivers/pinctrl/mtmips/pinctrl-mtmips-common.c | 4 +- drivers/pinctrl/mtmips/pinctrl-mtmips-common.h | 12 + drivers/spi/Kconfig | 2 +- drivers/usb/host/Kconfig | 2 +- drivers/watchdog/Kconfig | 2 +- include/configs/mt7621.h | 65 ++ include/dt-bindings/clock/mt7621-clk.h | 46 + include/dt-bindings/reset/mt7621-reset.h | 38 + tools/mtk_image.c | 182 ++++ tools/mtk_image.h | 24 + 68 files changed, 5887 insertions(+), 36 deletions(-) create mode 100644 arch/mips/dts/mediatek,mt7621-nand-rfb.dts create mode 100644 arch/mips/dts/mediatek,mt7621-rfb.dts create mode 100644 arch/mips/dts/mt7621-u-boot.dtsi create mode 100644 arch/mips/dts/mt7621.dtsi create mode 100644 arch/mips/include/asm/mipsmtregs.h create mode 100644 arch/mips/mach-mtmips/mt7621/Kconfig create mode 100644 arch/mips/mach-mtmips/mt7621/Makefile create mode 100644 arch/mips/mach-mtmips/mt7621/init.c create mode 100644 arch/mips/mach-mtmips/mt7621/mt7621.h create mode 100644 arch/mips/mach-mtmips/mt7621/serial.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/Makefile create mode 100644 arch/mips/mach-mtmips/mt7621/spl/cps.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/dram.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/dram.h create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch.h create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch_ll.S create mode 100644 arch/mips/mach-mtmips/mt7621/spl/serial.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/spl.c create mode 100644 arch/mips/mach-mtmips/mt7621/spl/start.S create mode 100644 arch/mips/mach-mtmips/mt7621/sram_init.S create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/Makefile create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/start.S create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/tpl.c create mode 100644 board/mediatek/mt7621/MAINTAINERS create mode 100644 board/mediatek/mt7621/Makefile create mode 100644 board/mediatek/mt7621/board.c create mode 100644 configs/mt7621_nand_rfb_defconfig create mode 100644 configs/mt7621_rfb_defconfig create mode 100644 doc/board/mediatek/index.rst create mode 100644 doc/board/mediatek/mt7621.rst create mode 100644 drivers/clk/mtmips/clk-mt7621.c create mode 100644 drivers/mtd/nand/raw/mt7621_nand.c create mode 100644 drivers/mtd/nand/raw/mt7621_nand.h create mode 100644 drivers/mtd/nand/raw/mt7621_nand_spl.c create mode 100644 drivers/pinctrl/mtmips/pinctrl-mt7621.c create mode 100644 include/configs/mt7621.h create mode 100644 include/dt-bindings/clock/mt7621-clk.h create mode 100644 include/dt-bindings/reset/mt7621-reset.h

4 6

[PATCH] sunxi: dts: OrangePi Zero: Fixup SPI flash device node
by Michal Suchanek 09 Jul '22

09 Jul '22

For some reason the flash cannot be probed as is - the u-boot DT lookup code fails to find the definition, and sf complains about invalid cs. Fixes: 280294c5df ("sunxi: boards: Enable SPI flash support in U-Boot proper") Signed-off-by: Michal Suchanek <msuchanek(a)suse.de> --- arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts index b08e84c616..034f0f77a0 100644 --- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts @@ -167,10 +167,8 @@ /* Enable SPI NOR by default: it optional on Orange Pi Zero boards */ status = "okay"; - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mxicy,mx25l1606e", "winbond,w25q128"; + spiflash: flash@0 { + compatible = "mxicy,mx25l1606e", "winbond,w25q128", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; }; -- 2.36.1

2 2

[PATCH v2 11/11] rockchip: configs: mk808: add idb configs
by Johan Jonker 09 Jul '22

09 Jul '22

Add IDB configs for mk808. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- This patch comes on top of a serie called: [PATCH v1 00/17] Add rk3066 ADC and USB support --- configs/mk808_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 6ae41a23..3e6d942d 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -15,6 +15,8 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808" CONFIG_SPL_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RK3066=y # CONFIG_ROCKCHIP_STIMER is not set +CONFIG_ROCKCHIP_IDB=y +CONFIG_SPL_ROCKCHIP_IDB=y CONFIG_TPL_TEXT_BASE=0x10080C04 CONFIG_TPL_MAX_SIZE=32764 CONFIG_TPL_STACK=0x1008FFFF @@ -27,6 +29,7 @@ CONFIG_SYS_LOAD_ADDR=0x70800800 CONFIG_SPL_PAYLOAD="u-boot.bin" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_NAND_BOOT=y CONFIG_SD_BOOT=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" @@ -91,6 +94,7 @@ CONFIG_MMC_UHS_SUPPORT=y CONFIG_SPL_MMC_UHS_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +# CONFIG_MTD_RAW_NAND is not set CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_PINCTRL=y CONFIG_DM_PMIC=y -- 2.20.1

1 0

[PATCH v2 10/11] arm: dts: rockchip: enable nfc node in spl for rk3066 mk808
by Johan Jonker 09 Jul '22

09 Jul '22

Enable the nfc node in spl for rk3066 mk808 in the rk3066a-mk808-u-boot.dtsi file. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- arch/arm/dts/rk3066a-mk808-u-boot.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi index 60b39026..09024908 100644 --- a/arch/arm/dts/rk3066a-mk808-u-boot.dtsi +++ b/arch/arm/dts/rk3066a-mk808-u-boot.dtsi @@ -39,6 +39,14 @@ status = "disabled"; }; +&nfc { + u-boot,dm-spl; + + nand@0 { + u-boot,dm-spl; + }; +}; + &noc { compatible = "rockchip,rk3066-noc", "syscon"; }; -- 2.20.1

1 0

[PATCH v2 08/11] rockchip: rk3066: add Rockchip IDB block device as boot action
by Johan Jonker 09 Jul '22

09 Jul '22

Add Rockchip IDB block device as boot action for rk3066. When a key is pressed the NAND IDB blocks can be accessed by a USB gadget like rockusb. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- This patch comes on top of a serie called: [PATCH v1 00/17] Add rk3066 ADC and USB support --- arch/arm/mach-rockchip/rk3066/rk3066.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index be19400c..c2058369 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -32,6 +32,8 @@ void board_debug_uart_init(void) GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); } +int rk_idb_start(void); + __weak void do_spl(void) { if (CONFIG_IS_ENABLED(OF_PLATDATA)) @@ -43,6 +45,15 @@ __weak void do_spl(void) int ret; switch (spl_boot_device()) { +#if IS_ENABLED(CONFIG_SPL_ROCKCHIP_IDB) + case BOOT_DEVICE_NAND: + dev_type = "idb"; + dev_index = 0; + ret = rk_idb_start(); + if (ret) + return; + break; +#endif case BOOT_DEVICE_MMC1: dev_type = "mmc"; dev_index = 0; -- 2.20.1

1 0

[PATCH v2 07/11] rockchip: spl: allow more boot devices
by Johan Jonker 09 Jul '22

09 Jul '22

Rockchip SoCs have more boot device options then currently included in the function spl_boot_device(). Make this function generic for SPI and NAND. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- This patch should replace a patch in the serie called: [PATCH v1 02/17] rockchip: spl: allow more boot devices https://lore.kernel.org/u-boot/20220508150825.21711-3-jbx6244@gmail.com/ Changed: replace #elseif by #elif --- arch/arm/mach-rockchip/spl.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index ceef9d91..aab3804f 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -53,13 +53,16 @@ u32 spl_boot_device(void) { u32 boot_device = BOOT_DEVICE_MMC1; -#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ +#if defined(CONFIG_SPI_BOOT) || \ + defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) || \ defined(CONFIG_TARGET_CHROMEBOOK_BOB) || \ defined(CONFIG_TARGET_CHROMEBOOK_KEVIN) return BOOT_DEVICE_SPI; +#elif defined(CONFIG_NAND_BOOT) + return BOOT_DEVICE_NAND; #endif if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) return BOOT_DEVICE_BOOTROM; -- 2.20.1

1 0

[PATCH v2 06/11] rockchip: idb: add randomizer option
by Johan Jonker 09 Jul '22

09 Jul '22

Add randomizer option as on some NAND chip all data writen by Rockchip tools after the IDB blocks is scrambled. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- optional --- arch/arm/mach-rockchip/rockchip_idb.c | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/mach-rockchip/rockchip_idb.c b/arch/arm/mach-rockchip/rockchip_idb.c index 37fe6ff2..39eb458a 100644 --- a/arch/arm/mach-rockchip/rockchip_idb.c +++ b/arch/arm/mach-rockchip/rockchip_idb.c @@ -190,6 +190,7 @@ struct rk_idb { u32 boot_blks; u32 boot_ecc; u32 pages_per_blk; + u32 randomizer; struct idb idblock[5]; u32 blk_counter; u32 idb_need_write_back; @@ -206,6 +207,41 @@ struct rk_idb { char uuid_disk_str[UUID_STR_LEN + 1]; }; +u16 random_seed[] = { + 0x576a, 0x05e8, 0x629d, 0x45a3, + 0x649c, 0x4bf0, 0x2342, 0x272e, + 0x7358, 0x4ff3, 0x73ec, 0x5f70, + 0x7a60, 0x1ad8, 0x3472, 0x3612, + 0x224f, 0x0454, 0x030e, 0x70a5, + 0x7809, 0x2521, 0x48f4, 0x5a2d, + 0x492a, 0x043d, 0x7f61, 0x3969, + 0x517a, 0x3b42, 0x769d, 0x0647, + 0x7e2a, 0x1383, 0x49d9, 0x07b8, + 0x2578, 0x4eec, 0x4423, 0x352f, + 0x5b22, 0x72b9, 0x367b, 0x24b6, + 0x7e8e, 0x2318, 0x6bd0, 0x5519, + 0x1783, 0x18a7, 0x7b6e, 0x7602, + 0x4b7f, 0x3648, 0x2c53, 0x6b99, + 0x0c23, 0x67cf, 0x7e0e, 0x4d8c, + 0x5079, 0x209d, 0x244a, 0x747b, + 0x350b, 0x0e4d, 0x7004, 0x6ac3, + 0x7f3e, 0x21f5, 0x7a15, 0x2379, + 0x1517, 0x1aba, 0x4e77, 0x15a1, + 0x04fa, 0x2d61, 0x253a, 0x1302, + 0x1f63, 0x5ab3, 0x049a, 0x5ae8, + 0x1cd7, 0x4a00, 0x30c8, 0x3247, + 0x729c, 0x5034, 0x2b0e, 0x57f2, + 0x00e4, 0x575b, 0x6192, 0x38f8, + 0x2f6a, 0x0c14, 0x45fc, 0x41df, + 0x38da, 0x7ae1, 0x7322, 0x62df, + 0x5e39, 0x0e64, 0x6d85, 0x5951, + 0x5937, 0x6281, 0x33a1, 0x6a32, + 0x3a5a, 0x2bac, 0x743a, 0x5e74, + 0x3b2e, 0x7ec7, 0x4fd2, 0x5d28, + 0x751f, 0x3ef8, 0x39b1, 0x4e49, + 0x746b, 0x6ef6, 0x44be, 0x6db7, +}; + struct nand_para_info nand_para_tbl[] = { {6, {0x2c, 0x64, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16, 256, 2, 2, 2048, 0x01df, 3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}}, {6, {0x2c, 0x44, 0x44, 0x4b, 0xa9, 0x00}, 4, 1, 16, 256, 2, 2, 1064, 0x01df, 3, 17, 40, 32, 1, 0, 1, 0, 0, {0, 0, 0, 0, 0}}, @@ -640,6 +676,15 @@ void rk_idb_read_page_op(struct rk_idb *plat, int page, int col) writeb(page >> 8, bank_base + BANK_ADDR); writeb(page >> 16, bank_base + BANK_ADDR); writeb(NAND_CMD_READSTART, bank_base + BANK_CMD); + + u32 seed = random_seed[page & 0x7F]; + + if (plat->randomizer) { + if (!(page < plat->pages_per_blk * plat->boot_blks)) + seed |= 0xC0000000; + } + + writel(seed, regs + plat->cfg->randmz_off); } void rk_idb_write_page_op_begin(struct rk_idb *plat, int page, int col) @@ -653,6 +698,15 @@ void rk_idb_write_page_op_begin(struct rk_idb *plat, int page, int col) writeb(page, bank_base + BANK_ADDR); writeb(page >> 8, bank_base + BANK_ADDR); writeb(page >> 16, bank_base + BANK_ADDR); + + u32 seed = random_seed[page & 0x7F]; + + if (plat->randomizer) { + if (!(page < plat->pages_per_blk * plat->boot_blks)) + seed |= 0xC0000000; + } + + writel(seed, regs + plat->cfg->randmz_off); } void rk_idb_write_page_op_end(struct rk_idb *plat) @@ -1277,6 +1331,8 @@ int rk_idb_probe(struct udevice *dev) return -ENODEV; } + plat->randomizer = (plat->info->operation_opt >> 7) & 1; + rk_idb_block_align(plat, plat->info->page_per_blk); rk_idb_build_page_table(plat, plat->info->lsb_mode); -- 2.20.1

1 0

[PATCH v2 05/11] rockchip: idb: add sector1 info
by Johan Jonker 09 Jul '22

09 Jul '22

Add Rockchip IDB sector1 info to make it easier to identify the IDB date and version. Sector1 data is currently not added by U-boot tools, but is generated by external tools that have support for it. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- optional --- arch/arm/mach-rockchip/rockchip_idb.c | 46 +++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/mach-rockchip/rockchip_idb.c b/arch/arm/mach-rockchip/rockchip_idb.c index 0692ce1a..37fe6ff2 100644 --- a/arch/arm/mach-rockchip/rockchip_idb.c +++ b/arch/arm/mach-rockchip/rockchip_idb.c @@ -59,6 +59,11 @@ #define NAND_CMD_ERASE2 0xd0 #define NAND_CMD_RESET 0xff +#define BCD2INT(num) (((((num) >> 12) & 0x0F) * 1000) + \ + ((((num) >> 8) & 0x0F) * 100) + \ + ((((num) >> 4) & 0x0F) * 10) + \ + ((num) & 0x0F)) + #define DATA_STEP 1024 #define OOB_STEP 4 #define LBA 64 + 512 + 33 @@ -80,6 +85,35 @@ struct sector0 { u8 reserved2[2]; } __packed; +struct sector1 { + u16 sys_reserved_block; + u16 disk0_size; + u16 disk1_size; + u16 disk2_size; + u16 disk3_size; + u32 chip_tag; + u32 machine_id; + u16 loader_year; + u16 loader_date; + u16 loader_ver; + u8 reserved[72]; + u16 flash_data_offset; + u16 flash_data_len; + u8 reserved2[384]; + u32 flash_chip_size; + u8 reserved1; + u8 access_time; + u16 phy_block_size; + u8 phy_page_size; + u8 ecc_bits; + u8 reserved3[8]; + u16 id_block0; + u16 id_block1; + u16 id_block2; + u16 id_block3; + u16 id_block4; +} __packed; + struct nand_para_info { u8 id_bytes; u8 nand_id[6]; @@ -1475,10 +1509,22 @@ int rk_idb_stop(void) void rk_idb_print_idb_data(u32 *data) { + struct sector1 *sec1 = (struct sector1 *)((u8 *)data + 512); struct sector0 *sec0 = (struct sector0 *)data; printf("\n"); + printf("DATE : %d-%d-%d\n", + BCD2INT(sec1->loader_year), + BCD2INT(sec1->loader_date >> 8), + BCD2INT(sec1->loader_date & 0xff)); + + printf("VERSION : %d.%d\n", + BCD2INT(sec1->loader_ver >> 8), + BCD2INT(sec1->loader_ver & 0xff)); + + printf("\n"); + printf("magic : %08x\n" "rc4_flag : %08x\n" "boot_code1_offset: %d\n" -- 2.20.1

1 0

[PATCH v2 04/11] rockchip: idb: add info and stop command
by Johan Jonker 09 Jul '22

09 Jul '22

Add info and stop command to become aware of what goes on inside the driver and to release some resources. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- optional --- arch/arm/mach-rockchip/rockchip_idb.c | 116 ++++++++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/arch/arm/mach-rockchip/rockchip_idb.c b/arch/arm/mach-rockchip/rockchip_idb.c index 832b3251..0692ce1a 100644 --- a/arch/arm/mach-rockchip/rockchip_idb.c +++ b/arch/arm/mach-rockchip/rockchip_idb.c @@ -1456,10 +1456,124 @@ int rk_idb_start(void) #if !defined(CONFIG_SPL_BUILD) +int rk_idb_stop(void) +{ + struct udevice *bdev; + int ret; + + ret = blk_find_device(IF_TYPE_RK_IDB, 0, &bdev); + if (ret) { + printf("no IDB blk device found\n"); + return 0; + } + + device_remove(bdev, DM_REMOVE_NORMAL); + device_unbind(bdev); + + return 0; +} + +void rk_idb_print_idb_data(u32 *data) +{ + struct sector0 *sec0 = (struct sector0 *)data; + + printf("\n"); + + printf("magic : %08x\n" + "rc4_flag : %08x\n" + "boot_code1_offset: %d\n" + "flash_data_size : %d\n" + "flash_boot_size : %d\n", + sec0->magic, + sec0->rc4_flag, + sec0->boot_code1_offset, + sec0->flash_data_size, + sec0->flash_boot_size); + + printf("\n"); +} + +static int rk_idb_info(void) +{ + struct rk_idb *plat; + struct udevice *dev; + u32 data[512]; + u32 spare[2]; + int ret; + int i, j; + + ret = uclass_find_device(UCLASS_RK_IDB, 0, &dev); + if (ret) { + printf("no IDB device found\n"); + return CMD_RET_FAILURE; + } + + if (!device_active(dev)) { + printf("IDB device present but not probed\n"); + return CMD_RET_FAILURE; + } + + plat = dev_get_plat(dev); + + printf("\n##### HARDWARE #####\n"); + + printf("REG : 0x%08x\n", (u32)plat->regs); + + printf("FLASH ID : %02x %02x %02x %02x %02x %02x\n", + plat->info->nand_id[0], + plat->info->nand_id[1], + plat->info->nand_id[2], + plat->info->nand_id[3], + plat->info->nand_id[4], + plat->info->nand_id[5]); + + printf("page_per_blk : %d\n", plat->info->page_per_blk); + printf("lsb_mode : %d\n", plat->info->lsb_mode); + printf("randomizer : %d\n", (plat->info->operation_opt >> 7) & 1); + + printf("\n##### BLOCK DEVICE #####\n"); + + ret = blk_find_device(IF_TYPE_RK_IDB, 0, &dev); + if (ret) { + printf("no IDB blk device found\n"); + } else { + struct blk_desc *blk_dev = dev_get_uclass_plat(dev); + + printf("blocks : %lu\n", (unsigned long)blk_dev->lba); + } + + printf("uuid_part_str : %s\n", plat->uuid_part_str); + printf("uuid_disk_str : %s\n", plat->uuid_disk_str); + + printf("\n##### IDB #####\n"); + for (i = 0; i < plat->blk_counter; i++) { + rk_idb_read_block(plat, j, 4, data, spare); + + for (j = 0; j < 4; j++) { + if (j != 1) + rk_idb_rc4((char *)data + j * 512, 512); + } + + printf("\nblk : %d\n", plat->idblock[i].blk); + printf("ecc : %d\n", plat->idblock[i].ecc); + printf("sectors : %d\n", plat->idblock[i].sectors); + + rk_idb_print_idb_data(data); + } + + return 0; +} + static int rk_idb_do(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { if (argc == 2) { + if (!strcmp(argv[1], "info")) + return rk_idb_info(); + + if (!strcmp(argv[1], "stop")) + return rk_idb_stop(); + if (!strcmp(argv[1], "start")) return rk_idb_start(); } @@ -1471,6 +1585,8 @@ U_BOOT_CMD( idb, 5, 1, rk_idb_do, "Rockchip IDB block device", "start - start IDB device\n" + "idb stop - stop IDB blk device\n" + "idb info - show IDB device info\n" ); #endif -- 2.20.1

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[PATCH v2 03/11] rockchip: idb: add IDB block device
by Johan Jonker 09 Jul '22

09 Jul '22

The Rockchip SoCs with a NAND as boot device need a special Rockchip IDB block device to transfer the data from the rockusb gadget to the NAND driver. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- arch/arm/mach-rockchip/rockchip_idb.c | 402 ++++++++++++++++++++++++++ 1 file changed, 402 insertions(+) diff --git a/arch/arm/mach-rockchip/rockchip_idb.c b/arch/arm/mach-rockchip/rockchip_idb.c index 6a2af329..832b3251 100644 --- a/arch/arm/mach-rockchip/rockchip_idb.c +++ b/arch/arm/mach-rockchip/rockchip_idb.c @@ -3,10 +3,16 @@ * Copyright (C) 2022 Johan Jonker <jbx6244(a)gmail.com> */ +#include <blk.h> #include <clk.h> +#include <command.h> #include <dm.h> #include <memalign.h> +#include <part.h> +#include <dm/device-internal.h> +#include <dm/uclass-internal.h> #include <linux/iopoll.h> +#include <u-boot/crc.h> #define NFC_DEF_TIMEOUT 20000 #define NFC_ECC_MAX_MODES 4 @@ -152,10 +158,18 @@ struct rk_idb { u32 pages_per_blk; struct idb idblock[5]; u32 blk_counter; + u32 idb_need_write_back; u32 sectors; u16 page_table[512]; + legacy_mbr *mbr; + gpt_header *gpt_h; + gpt_header *gpt_h2; + gpt_entry *gpt_e; char *check; char *idb; + char *str; + char uuid_part_str[UUID_STR_LEN + 1]; + char uuid_disk_str[UUID_STR_LEN + 1]; }; struct nand_para_info nand_para_tbl[] = { @@ -816,6 +830,171 @@ void rk_idb_write_block(struct rk_idb *plat, u32 idb, u32 sectors, u32 *data, u3 } } +unsigned long rk_idb_read(struct udevice *dev, + unsigned long start, lbaint_t blkcnt, + void *buffer) +{ + struct rk_idb *plat = dev_get_plat(dev->parent); + struct blk_desc *block_dev = dev_get_uclass_plat(dev); + char *buf = buffer; + int i; + + debug("start : %lu blkcnt: %lu\n", start, blkcnt); + + if (start > (block_dev->lba - 1) || (start + blkcnt) > block_dev->lba) { + debug("invalid block\n"); + return -1; + } + + memset(buffer, 0xff, blkcnt * block_dev->blksz); + + for (i = start; i < (start + blkcnt); i++) { + if (i == 0) { + debug("mbr : %d\n", i); + + memcpy(&buf[(i - start) * block_dev->blksz], + plat->mbr, sizeof(legacy_mbr)); + } else if (i == 1) { + debug("gpt_h : %d\n", i); + + memcpy(&buf[(i - start) * block_dev->blksz], + plat->gpt_h, sizeof(gpt_header)); + } else if (i == (block_dev->lba - 1)) { + debug("gpt_h2 : %d\n", i); + + memcpy(&buf[(i - start) * block_dev->blksz], + plat->gpt_h2, sizeof(gpt_header)); + } else if (i == 2 || i == (block_dev->lba - 33)) { + debug("gpt_e : %d\n", i); + + memcpy(&buf[(i - start) * block_dev->blksz], + plat->gpt_e, sizeof(gpt_entry)); + } else if (i >= 64 && i < (block_dev->lba - 33)) { + debug("idb rd : %d\n", i); + + memcpy(&buf[(i - start) * block_dev->blksz], + &plat->idb[(i - 64) * block_dev->blksz], block_dev->blksz); + } + } + + return blkcnt; +} + +unsigned long rk_idb_write(struct udevice *dev, + unsigned long start, lbaint_t blkcnt, + const void *buffer) +{ + struct rk_idb *plat = dev_get_plat(dev->parent); + struct blk_desc *block_dev = dev_get_uclass_plat(dev); + u32 data[512]; + u32 spare[2]; + int i, j; + + if (start > (block_dev->lba - 1) || (start + blkcnt) > block_dev->lba) { + debug("invalid block\n"); + return -1; + } + + debug("start : %lu blkcnt: %lu\n", start, blkcnt); + + for (i = start; i < (start + blkcnt); i++) { + debug("idb wr : %d\n", i); + + if (i >= 64 && i < (block_dev->lba - 33)) { + if (i == 64) { + debug("first block\n"); + + plat->idb_need_write_back = 1; + memset(plat->idb, 0xff, 512 * 512); + } + + if (plat->idb_need_write_back) { + char *buf = (char *)buffer; + + memcpy(&plat->idb[(i - 64) * block_dev->blksz], + &buf[(i - start) * block_dev->blksz], + block_dev->blksz); + + if (i == 64) { + memcpy(data, plat->idb, 512); + + if (*data == RK_MAGIC) { + u32 boot_size; + + rk_idb_rc4((char *)data, 512); + + struct sector0 *sec0 = (struct sector0 *)data; + + if ((sec0->flash_boot_size - + sec0->flash_data_size) != 1024) { + boot_size = sec0->flash_boot_size - + sec0->flash_data_size; + } else { + boot_size = 0; + } + + plat->sectors = sec0->boot_code1_offset + + sec0->flash_data_size + + boot_size; + + if (plat->sectors > 512) { + debug("max sector limit\n"); + plat->idb_need_write_back = 0; + } + } else { + debug("no IDB block found\n"); + plat->idb_need_write_back = 0; + } + } + + if (i == (64 + plat->sectors - 1)) { + debug("last block\n"); + + plat->idb_need_write_back = 0; + + if (!plat->blk_counter) { + plat->idblock[0].blk = 2; + plat->idblock[0].ecc = plat->boot_ecc; + plat->idblock[1].blk = 3; + plat->idblock[1].ecc = plat->boot_ecc; + plat->idblock[2].blk = 4; + plat->idblock[2].ecc = plat->boot_ecc; + plat->idblock[3].blk = 5; + plat->idblock[3].ecc = plat->boot_ecc; + plat->idblock[4].blk = 6; + plat->idblock[4].ecc = plat->boot_ecc; + plat->blk_counter = 5; + } + + for (j = 0; j < plat->blk_counter; j++) { + if (plat->idblock[j].blk < plat->boot_blks) + rk_idb_write_block(plat, j, plat->sectors, + (u32 *)plat->idb, spare); + } + + rk_idb_scan_block(plat, data, spare); + + memset(plat->idb, 0xff, 512 * 512); + + if (plat->blk_counter) + rk_idb_read_block(plat, 0, plat->idblock[0].sectors, + (u32 *)plat->idb, spare); + } + } + } else if (plat->idb_need_write_back) { + plat->idb_need_write_back = 0; + + memset(plat->idb, 0xff, 512 * 512); + + if (plat->blk_counter) + rk_idb_read_block(plat, 0, plat->idblock[0].sectors, + (u32 *)plat->idb, spare); + } + } + + return blkcnt; +} + void rk_idb_block_align(struct rk_idb *plat, u32 pages_per_blk) { plat->pages_per_blk = pages_per_blk; @@ -827,9 +1006,25 @@ void rk_idb_block_align(struct rk_idb *plat, u32 pages_per_blk) plat->pages_per_blk = 256; } +static inline u32 efi_crc32(const void *buf, u32 len) +{ + return crc32(0, buf, len); +} + int rk_idb_init_plat(struct udevice *dev) { + static const efi_guid_t partition_basic_data_guid = PARTITION_BASIC_DATA_GUID; struct rk_idb *plat = dev_get_plat(dev); + size_t efiname_len, dosname_len; + uchar name[] = "loader1"; + u32 calc_crc32; + int k; + + gen_rand_uuid_str(plat->uuid_disk_str, UUID_STR_FORMAT_GUID); + gen_rand_uuid_str(plat->uuid_part_str, UUID_STR_FORMAT_GUID); + + debug("uuid_part_str : %s\n", plat->uuid_part_str); + debug("uuid_disk_str : %s\n", plat->uuid_disk_str); plat->idb = malloc_cache_aligned(512 * 512); @@ -845,6 +1040,127 @@ int rk_idb_init_plat(struct udevice *dev) return -1; } + plat->mbr = malloc_cache_aligned(sizeof(legacy_mbr)); + + if (!plat->mbr) { + debug("mbr malloc failed\n"); + free(plat->idb); + free(plat->check); + return -1; + } + + plat->gpt_e = malloc_cache_aligned(sizeof(gpt_entry)); + + if (!plat->gpt_e) { + debug("gpt_e malloc failed\n"); + free(plat->idb); + free(plat->check); + free(plat->mbr); + return -1; + } + + plat->gpt_h = malloc_cache_aligned(sizeof(gpt_header)); + + if (!plat->gpt_h) { + debug("gpt_h malloc failed\n"); + free(plat->idb); + free(plat->check); + free(plat->mbr); + free(plat->gpt_e); + return -1; + } + + plat->gpt_h2 = malloc_cache_aligned(sizeof(gpt_header)); + + if (!plat->gpt_h2) { + debug("gpt_h2 malloc failed\n"); + free(plat->idb); + free(plat->check); + free(plat->mbr); + free(plat->gpt_e); + free(plat->gpt_h); + return -1; + } + + /* Init idb */ + memset(plat->idb, 0xff, 512 * 512); + + /* Init mbr */ + memset((char *)plat->mbr, 0, sizeof(legacy_mbr)); + + plat->mbr->signature = MSDOS_MBR_SIGNATURE; + plat->mbr->partition_record[0].sys_ind = EFI_PMBR_OSTYPE_EFI_GPT; + plat->mbr->partition_record[0].start_sect = 1; + plat->mbr->partition_record[0].nr_sects = LBA - 1; + + /* Init gpt_e */ + memset(plat->gpt_e, 0, sizeof(gpt_entry)); + + plat->gpt_e->starting_lba = cpu_to_le64(64); + plat->gpt_e->ending_lba = cpu_to_le64(LBA - 34); + + debug("starting_lba : %llu\n", le64_to_cpu(plat->gpt_e->starting_lba)); + debug("ending_lba : %llu\n", le64_to_cpu(plat->gpt_e->ending_lba)); + + memcpy(plat->gpt_e->partition_type_guid.b, &partition_basic_data_guid, 16); + + uuid_str_to_bin(plat->uuid_part_str, plat->gpt_e->unique_partition_guid.b, + UUID_STR_FORMAT_GUID); + + efiname_len = sizeof(plat->gpt_e->partition_name) / sizeof(efi_char16_t); + dosname_len = sizeof(name); + + for (k = 0; k < min(dosname_len, efiname_len); k++) + plat->gpt_e->partition_name[k] = (efi_char16_t)(name[k]); + + /* Init gpt_h */ + memset(plat->gpt_h, 0, sizeof(gpt_header)); + + plat->gpt_h->signature = cpu_to_le64(GPT_HEADER_SIGNATURE_UBOOT); + plat->gpt_h->revision = cpu_to_le32(GPT_HEADER_REVISION_V1); + plat->gpt_h->header_size = cpu_to_le32(sizeof(gpt_header)); + plat->gpt_h->first_usable_lba = cpu_to_le64(64); + plat->gpt_h->last_usable_lba = cpu_to_le64(LBA - 34); + plat->gpt_h->num_partition_entries = cpu_to_le32(1); + plat->gpt_h->sizeof_partition_entry = cpu_to_le32(sizeof(gpt_entry)); + + uuid_str_to_bin(plat->uuid_disk_str, plat->gpt_h->disk_guid.b, + UUID_STR_FORMAT_GUID); + + plat->gpt_h->partition_entry_array_crc32 = 0; + calc_crc32 = efi_crc32((const unsigned char *)plat->gpt_e, + le32_to_cpu(plat->gpt_h->num_partition_entries) * + le32_to_cpu(plat->gpt_h->sizeof_partition_entry)); + plat->gpt_h->partition_entry_array_crc32 = cpu_to_le32(calc_crc32); + + debug("partition crc32 : 0x%08x\n", calc_crc32); + + plat->gpt_h->my_lba = cpu_to_le64(1); + plat->gpt_h->partition_entry_lba = cpu_to_le64(2); + plat->gpt_h->alternate_lba = cpu_to_le64(LBA - 1); + + plat->gpt_h->header_crc32 = 0; + calc_crc32 = efi_crc32((const unsigned char *)plat->gpt_h, + le32_to_cpu(plat->gpt_h->header_size)); + plat->gpt_h->header_crc32 = cpu_to_le32(calc_crc32); + + debug("header h1 crc32 : 0x%08x\n", calc_crc32); + + /* Init gpt_h2 */ + memcpy(plat->gpt_h2, plat->gpt_h, sizeof(gpt_header)); + + plat->gpt_h2->my_lba = cpu_to_le64(LBA - 1); + plat->gpt_h2->partition_entry_lba = + cpu_to_le64(le64_to_cpu(plat->gpt_h2->last_usable_lba) + 1); + plat->gpt_h2->alternate_lba = cpu_to_le64(1); + + plat->gpt_h2->header_crc32 = 0; + calc_crc32 = efi_crc32((const unsigned char *)plat->gpt_h2, + le32_to_cpu(plat->gpt_h2->header_size)); + plat->gpt_h2->header_crc32 = cpu_to_le32(calc_crc32); + + debug("header h2 crc32 : 0x%08x\n", calc_crc32); + return 0; } @@ -853,6 +1169,8 @@ int rk_idb_probe(struct udevice *dev) struct rk_idb *plat = dev_get_plat(dev); const char *node_name; ofnode subnode; + u32 data[512]; + u32 spare[2]; u8 id[8]; int ret; int i; @@ -935,6 +1253,23 @@ int rk_idb_probe(struct udevice *dev) return -ENOENT; } + rk_idb_scan_block(plat, data, spare); + + if (plat->blk_counter) + rk_idb_read_block(plat, 0, plat->idblock[0].sectors, (u32 *)plat->idb, spare); + + return 0; +} + +static int rk_idb_blk_probe(struct udevice *udev) +{ + struct blk_desc *desc = dev_get_uclass_plat(udev); + + desc->removable = true; + snprintf(desc->vendor, BLK_VEN_SIZE, "Rockchip"); + snprintf(desc->product, BLK_PRD_SIZE, "IDB"); + snprintf(desc->revision, BLK_REV_SIZE, "1.0"); + return 0; } @@ -1065,6 +1400,24 @@ static const struct udevice_id rk_idb_ids[] = { { /* sentinel */ } }; +static const struct blk_ops rk_idb_ops = { + .read = rk_idb_read, + .write = rk_idb_write, +}; + +U_BOOT_DRIVER(idb_blk) = { + .name = "idb_blk", + .id = UCLASS_BLK, + .ops = &rk_idb_ops, + .probe = rk_idb_blk_probe, +}; + +UCLASS_DRIVER(idb) = { + .id = UCLASS_RK_IDB, + .name = "idb", + .flags = DM_UC_FLAG_SEQ_ALIAS, +}; + U_BOOT_DRIVER(rockchip_idb) = { .name = "rockchip_idb", .id = UCLASS_RK_IDB, @@ -1072,3 +1425,52 @@ U_BOOT_DRIVER(rockchip_idb) = { .probe = rk_idb_probe, .plat_auto = sizeof(struct rk_idb), }; + +int rk_idb_start(void) +{ + struct udevice *dev; + struct udevice *bdev; + int ret; + + ret = uclass_get_device(UCLASS_RK_IDB, 0, &dev); + if (ret) { + printf("no IDB device found\n"); + return CMD_RET_FAILURE; + } + + ret = blk_get_device(IF_TYPE_RK_IDB, 0, &bdev); + if (ret) { + ret = blk_create_device(dev, "idb_blk", "blk", + IF_TYPE_RK_IDB, 0, 512, + LBA, &bdev); + if (ret) + return ret; + + ret = blk_probe_or_unbind(bdev); + if (ret) + return ret; + } + + return 0; +} + +#if !defined(CONFIG_SPL_BUILD) + +static int rk_idb_do(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + if (argc == 2) { + if (!strcmp(argv[1], "start")) + return rk_idb_start(); + } + + return CMD_RET_USAGE; +} + +U_BOOT_CMD( + idb, 5, 1, rk_idb_do, + "Rockchip IDB block device", + "start - start IDB device\n" +); + +#endif -- 2.20.1

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