June 2022 - U-Boot

[PATCH] driver: video: Check allocated pointers
by Bin Meng 25 Jun '22

25 Jun '22

The codes that call STBTT_malloc() / stbtt__new_active() do not check the return value at present which may cause segfault. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- drivers/video/stb_truetype.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/video/stb_truetype.h b/drivers/video/stb_truetype.h index 26f4ac2ca8..438bfce468 100644 --- a/drivers/video/stb_truetype.h +++ b/drivers/video/stb_truetype.h @@ -1768,10 +1768,13 @@ static void stbtt__rasterize_sorted_edges(stbtt__bitmap *result, stbtt__edge *e, int s; // vertical subsample index unsigned char scanline_data[512], *scanline; - if (result->w > 512) + if (result->w > 512) { scanline = (unsigned char *) STBTT_malloc(result->w, userdata); - else + if (!scanline) + return; + } else { scanline = scanline_data; + } y = off_y * vsubsample; e[n].y0 = (off_y + result->h) * (float) vsubsample + 1; @@ -1821,6 +1824,8 @@ static void stbtt__rasterize_sorted_edges(stbtt__bitmap *result, stbtt__edge *e, while (e->y0 <= scan_y) { if (e->y1 > scan_y) { stbtt__active_edge *z = stbtt__new_active(&hh, e, off_x, scan_y, userdata); + if (!z) + return; // find insertion point if (active == NULL) active = z; @@ -2068,10 +2073,13 @@ static void stbtt__rasterize_sorted_edges(stbtt__bitmap *result, stbtt__edge *e, int y,j=0, i; float scanline_data[129], *scanline, *scanline2; - if (result->w > 64) + if (result->w > 64) { scanline = (float *) STBTT_malloc((result->w*2+1) * sizeof(float), userdata); - else + if (!scanline) + return; + } else { scanline = scanline_data; + } scanline2 = scanline + result->w; @@ -2105,6 +2113,8 @@ static void stbtt__rasterize_sorted_edges(stbtt__bitmap *result, stbtt__edge *e, while (e->y0 <= scan_y_bottom) { if (e->y0 != e->y1) { stbtt__active_edge *z = stbtt__new_active(&hh, e, off_x, scan_y_top, userdata); + if (!z) + return; STBTT_assert(z->ey >= scan_y_top); // insert at front z->next = active; -- 2.25.1

2 1

[PATCH v2] sandbox: sdl: Add stub sandbox_sdl_remove_display()
by Andrew Scull 25 Jun '22

25 Jun '22

Building the sandbox with NO_SDL=1 resulted in an undefined reference to 'sandbox_sdl_remove_display'. Resolve this by adding a stub implementation to match the stubs of the other similar functions. Signed-off-by: Andrew Scull <ascull(a)google.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Anatolij Gustschin <agust(a)denx.de> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- arch/sandbox/include/asm/sdl.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/sandbox/include/asm/sdl.h b/arch/sandbox/include/asm/sdl.h index e271a849af..56dcb84803 100644 --- a/arch/sandbox/include/asm/sdl.h +++ b/arch/sandbox/include/asm/sdl.h @@ -94,6 +94,11 @@ static inline int sandbox_sdl_init_display(int width, int height, int log2_bpp, return -ENODEV; } +static inline int sandbox_sdl_remove_display(void) +{ + return -ENODEV; +} + static inline int sandbox_sdl_sync(void *lcd_base) { return -ENODEV; -- 2.35.1.894.gb6a874cedc-goog

2 3

[PATCH v2 0/2] board/armltd: add support for corstone1000
by Rui Miguel Silva 25 Jun '22

25 Jun '22

This series add support for arm's corstone1000 platform (see specific commit changelog for references to documentation), but first introduce a command (loadm which will integrate with efi subsystem) used in one of the boot sequence in this platform. v1 [0] -> v2: Tom: - device tree status (now on kernel next [1]) - loadm add documentation, testing, change the default value - kconfig extra line - dm_eth, dm_serial cleanups in platform code and headers - moving bootcommand to defconfig [0]: https://lore.kernel.org/all/20220322104118.573537-1-rui.silva@linaro.org/ [1]: https://lore.kernel.org/all/165089291072.1036016.13574796454085073736.b4-ty… Rui Miguel Silva (2): cmd: load: add load command for memory mapped arm: add support to corstone1000 platform README | 1 + arch/arm/Kconfig | 8 +- arch/arm/dts/Makefile | 3 + arch/arm/dts/corstone1000-fvp.dts | 51 +++++++ arch/arm/dts/corstone1000-mps3.dts | 32 +++++ arch/arm/dts/corstone1000.dtsi | 164 +++++++++++++++++++++++ board/armltd/corstone1000/Kconfig | 12 ++ board/armltd/corstone1000/MAINTAINERS | 7 + board/armltd/corstone1000/Makefile | 7 + board/armltd/corstone1000/corstone1000.c | 91 +++++++++++++ cmd/Kconfig | 5 + cmd/bootefi.c | 12 ++ cmd/load.c | 48 +++++++ configs/corstone1000_defconfig | 48 +++++++ configs/sandbox64_defconfig | 1 + configs/sandbox_defconfig | 1 + doc/usage/loadm.rst | 49 +++++++ include/configs/corstone1000.h | 52 +++++++ include/efi_loader.h | 2 + include/test/suites.h | 1 + lib/efi_loader/efi_device_path.c | 9 ++ test/cmd/Makefile | 1 + test/cmd/loadm.c | 72 ++++++++++ test/cmd_ut.c | 6 + 24 files changed, 682 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/corstone1000-fvp.dts create mode 100644 arch/arm/dts/corstone1000-mps3.dts create mode 100644 arch/arm/dts/corstone1000.dtsi create mode 100644 board/armltd/corstone1000/Kconfig create mode 100644 board/armltd/corstone1000/MAINTAINERS create mode 100644 board/armltd/corstone1000/Makefile create mode 100644 board/armltd/corstone1000/corstone1000.c create mode 100644 configs/corstone1000_defconfig create mode 100644 doc/usage/loadm.rst create mode 100644 include/configs/corstone1000.h create mode 100644 test/cmd/loadm.c -- 2.36.1

3 10

[PATCH] fs/sqashfs: Use kcalloc when relevant
by Miquel Raynal 24 Jun '22

24 Jun '22

A crafted squashfs image could embed a huge number of empty metadata blocks in order to make the amount of malloc()'d memory overflow and be much smaller than expected. Because of this flaw, any random code positioned at the right location in the squashfs image could be memcpy'd from the squashfs structures into U-Boot code location while trying to access the rearmost blocks, before being executed. In order to prevent this vulnerability from being exploited in eg. a secure boot environment, let's add a check over the amount of data that is going to be allocated. Such a check could look like: if (!elem_size || n > SIZE_MAX / elem_size) return NULL; The right way to do it would be to enhance the calloc() implementation but this is quite an impacting change for such a small fix. Another solution would be to add the check before the malloc call in the squashfs implementation, but this does not look right. So for now, let's use the kcalloc() compatibility function from Linux, which has this check. Reported-by: Tatsuhiko Yasumatsu <Tatsuhiko.Yasumatsu(a)sony.com> Signed-off-by: Miquel Raynal <miquel.raynal(a)bootlin.com> --- fs/squashfs/sqfs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index c1489966112..ee648ad425e 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -14,6 +14,7 @@ #include <linux/types.h> #include <linux/byteorder/little_endian.h> #include <linux/byteorder/generic.h> +#include <linux/compat.h> #include <memalign.h> #include <stdlib.h> #include <string.h> @@ -727,7 +728,8 @@ static int sqfs_read_inode_table(unsigned char **inode_table) goto free_itb; } - *inode_table = malloc(metablks_count * SQFS_METADATA_BLOCK_SIZE); + *inode_table = kcalloc(metablks_count, SQFS_METADATA_BLOCK_SIZE, + GFP_KERNEL); if (!*inode_table) { ret = -ENOMEM; printf("Error: failed to allocate squashfs inode_table of size %i, increasing CONFIG_SYS_MALLOC_LEN could help\n", -- 2.34.1

2 1

[PATCH] sunxi: fix initial environment loading without MMC
by Andre Przywara 24 Jun '22

24 Jun '22

Commit e42dad4168fe ("sunxi: use boot source for determining environment location") changed our implementation of env_get_location() and enabled it for every board, even those without MMC support (like the C.H.I.P. boards). However the default fallback location of ENVL_FAT does not cope very well without MMC support compiled in, so the board hangs when trying to initially load the environment. Change the default fallback location to be ENVL_FAT only when the FAT environment support is enabled, and use ENVL_NOWHERE and ENVL_UBI as alternative fallbacks, when those sources are enabled. This fixes U-Boot loading on the C.H.I.P. boards. Fixes: e42dad4168fe ("sunxi: use boot source for determining environment location") Reported-by: Chris Morgan <macroalpha82(a)gmail.com> Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> --- board/sunxi/board.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 89324159d55..befb6076ca6 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -132,7 +132,14 @@ void i2c_init_board(void) */ enum env_location env_get_location(enum env_operation op, int prio) { - enum env_location boot_loc = ENVL_FAT; + enum env_location boot_loc; + + if (IS_ENABLED(CONFIG_ENV_IS_NOWHERE)) + boot_loc = ENVL_NOWHERE; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) + boot_loc = ENVL_FAT; + else if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI)) + boot_loc = ENVL_UBI; gd->env_load_prio = prio; -- 2.35.3

3 5

[PATCH v2 01/15] firmware: zynqmp: Check if rx channel dev pointer is valid
by Stefan Herbrechtsmeier 24 Jun '22

24 Jun '22

From: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> Check if rx channel dev pointer is valid and not if the address of the pointer is valid. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier(a)weidmueller.com> --- (no changes since v1) drivers/firmware/firmware-zynqmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 0f0d2b07c0..341d7cf135 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -92,7 +92,7 @@ static int ipi_req(const u32 *req, size_t req_len, u32 *res, size_t res_maxlen) res_maxlen > PMUFW_PAYLOAD_ARG_CNT) return -EINVAL; - if (!(zynqmp_power.tx_chan.dev) || !(&zynqmp_power.rx_chan.dev)) + if (!(zynqmp_power.tx_chan.dev) || !(zynqmp_power.rx_chan.dev)) return -EINVAL; debug("%s, Sending IPI message with ID: 0x%0x\n", __func__, req[0]); -- 2.30.2

2 15

[PATCH] ARM: zynq: Fix size-cells for pl353 driver
by Michal Simek 24 Jun '22

24 Jun '22

From: Amit Kumar Mahapatra <amit.kumar-mahapatra(a)xilinx.com> "size-cells" of the nand controller node should be 0 as the "reg" property of the nand device node contains the chip select number and not address information. The patch fixes the below compilation warning arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format): /axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/arm/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 9495911397eb..37155df0fd42 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -287,7 +287,7 @@ reg = <0 0 0x1000000>; status = "disabled"; #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; }; nor0: flash@1,0 { status = "disabled"; -- 2.36.1

1 1

[PATCH] arm64: zynqmp: Fix usb node drive strength and slew rate
by Michal Simek 24 Jun '22

24 Jun '22

From: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb gorup pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/arm/dts/zynqmp-sck-kr-g-revA.dts | 10 ++++++++-- arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 10 ++++++++-- arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 5 ++++- arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 5 ++++- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++++- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 5 ++++- arch/arm/dts/zynqmp-zcu100-revC.dts | 10 ++++++++-- arch/arm/dts/zynqmp-zcu102-revA.dts | 5 ++++- arch/arm/dts/zynqmp-zcu104-revA.dts | 6 ++++-- arch/arm/dts/zynqmp-zcu104-revC.dts | 6 ++++-- arch/arm/dts/zynqmp-zcu106-revA.dts | 5 ++++- arch/arm/dts/zynqmp-zcu111-revA.dts | 5 ++++- 12 files changed, 60 insertions(+), 17 deletions(-) diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts index 7be02ab29fa1..735c1e3d1a88 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dts @@ -329,19 +329,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { @@ -353,19 +356,22 @@ pinctrl_usb1_default: usb1-default { conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts index 56effb5e21a9..63590619d43e 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts @@ -329,19 +329,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { @@ -353,19 +356,22 @@ pinctrl_usb1_default: usb1-default { conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index 8250a493c8a0..b714bd3eb1b1 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -285,19 +285,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index b81c2e6b7543..a1d8f9f0e51f 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -272,19 +272,22 @@ pinctrl_usb0_default: usb0-default { conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; mux { diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d20f6675687b..7ea2a1c96f4e 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -187,19 +187,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index f32f87acacb6..4e6160bcd8b9 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -335,19 +335,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index ea630a43dc7f..5e7bc7384fce 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -441,19 +441,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; @@ -465,19 +468,22 @@ conf { groups = "usb1_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO64", "MIO65", "MIO67"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index c13b52a6aeaa..a4e92c8bb16b 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -795,19 +795,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 50bf47908913..1418cffb2042 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -402,20 +402,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; - drive-strength = <12>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 752a9e38f3d3..7fd19ca3a8c0 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -414,20 +414,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; - drive-strength = <12>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index 6dfc8fe17bf2..3e137676feb6 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -793,19 +793,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 021fe88670fb..e412992ff1bd 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -652,19 +652,22 @@ conf { groups = "usb0_0_grp"; - slew-rate = <SLEW_RATE_SLOW>; power-source = <IO_STANDARD_LVCMOS18>; }; conf-rx { pins = "MIO52", "MIO53", "MIO55"; bias-high-impedance; + drive-strength = <12>; + slew-rate = <SLEW_RATE_FAST>; }; conf-tx { pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63"; bias-disable; + drive-strength = <4>; + slew-rate = <SLEW_RATE_SLOW>; }; }; -- 2.36.1

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[PATCH 0/2] microblaze: Fix timer and interrupt code
by Michal Simek 24 Jun '22

24 Jun '22

Hi, this series is moving timer to generic drivers/timer/ location and it is removing unused interrupt code in architecture. note: This patchset is based on rela and cache series. Thanks, Michal Michal Simek (2): microblaze: Convert axi timer to DM driver microblaze: Remove interrupt handler MAINTAINERS | 1 + arch/Kconfig | 6 +- arch/microblaze/cpu/Makefile | 2 +- arch/microblaze/cpu/interrupts.c | 182 +----------------- arch/microblaze/cpu/timer.c | 123 ------------ arch/microblaze/include/asm/microblaze_intc.h | 37 ---- .../microblaze/include/asm/microblaze_timer.h | 26 --- drivers/timer/Kconfig | 8 + drivers/timer/Makefile | 1 + drivers/timer/xilinx-timer.c | 82 ++++++++ 10 files changed, 99 insertions(+), 369 deletions(-) delete mode 100644 arch/microblaze/cpu/timer.c delete mode 100644 arch/microblaze/include/asm/microblaze_intc.h delete mode 100644 arch/microblaze/include/asm/microblaze_timer.h create mode 100644 drivers/timer/xilinx-timer.c -- 2.36.1

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[PATCH v4 00/23] microblaze: Add support for full relocation
by Michal Simek 24 Jun '22

24 Jun '22

Hi, this series is adding support for full rela relocation. Origin NEEDS_MANUAL_RELOC option is still there as default. Code has been tested with multiple configurations on QEMU. - Origin behavior - u-boot - Relocated version - u-boot.elf - Loading u-boot.bin to higher address than TEXT_BASE - Loading u-boot.bin to lower address than TEXT_BASE In v2 I fixed Kconfig issue reported in v1 series. In v3 fix issues reported by gitlab CI. I incorrectly squashed m68k change to wrong patch. V4 fixes it. Thanks, Michal Changes in v4: - Revert incorrect m68k merge - wrong patch - Aligned NEEDS_MANUAL_RELOC for m68k Changes in v3: - Move NEEDS_MANUAL_RELOC to m68k Kconfig to avoid Kconfig issues Changes in v2: - new patch in series to solve Kconfig warning - Fix endian selection Michal Simek (23): tools: relocate-rela: Open binary u-boot file later Makefile: Fix description for relocate-rela parameters tools: relocate-rela: Use global variables tools: relocate-rela: Read rela start/end directly from ELF microblaze: Switch absolute branches to relative microblaze: Fix stack protection behavior microblaze: Fix early stack allocation microblaze: Remove CONFIG_TEXT_BASE from code microblaze: Fix typo in exception.c mips: Move endianness selection to arch/Kconfig microblaze: Enable REMAKE_ELF microblaze: Separate code end substraction microblaze: Change stack protection address to new stack address microblaze: Optimize register usage in relocate_code microblaze: Remove code around r20 in relocate_code() microblaze: Remove _start symbol handling at U-Boot start microblaze: Add comment about reset location microblaze: Create SYM_ADDR macro to deal with symbols tools: relocate-rela: Extract elf64 reloc to special function tools: relocate-rela: Check that relocation works only for EM_AARCH64 tools: relocate-rela: Add support for elf32 decoding tools: relocate-rela: Add support for 32bit Microblaze relocation microblaze: Add support for run time relocation Makefile | 6 +- arch/Kconfig | 26 +- arch/m68k/Kconfig | 3 + arch/microblaze/Kconfig | 14 + arch/microblaze/config.mk | 11 + arch/microblaze/cpu/Makefile | 1 + arch/microblaze/cpu/exception.c | 2 +- arch/microblaze/cpu/relocate.c | 111 ++++++ arch/microblaze/cpu/start.S | 130 +++++-- arch/microblaze/cpu/u-boot.lds | 14 + arch/mips/Kconfig | 18 - common/board_f.c | 2 + configs/microblaze-generic_defconfig | 1 + include/configs/microblaze-generic.h | 4 - tools/relocate-rela.c | 545 +++++++++++++++++++++++++-- 15 files changed, 789 insertions(+), 99 deletions(-) create mode 100644 arch/microblaze/cpu/relocate.c -- 2.36.1

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