June 2022 - U-Boot

[PATCH v1] usb: host: nuvoton: Add nuvoton NPCM7xx ehci/ohci driver
by Jim Liu 29 Jun '22

29 Jun '22

Add nuvoton BMC NPCM750 ehci/ohci driver Signed-off-by: Jim Liu <JJLIU0(a)nuvoton.com> --- drivers/usb/host/Kconfig | 16 +++++ drivers/usb/host/Makefile | 2 + drivers/usb/host/ehci-npcm.c | 119 +++++++++++++++++++++++++++++++++++ drivers/usb/host/ohci-npcm.c | 108 +++++++++++++++++++++++++++++++ 4 files changed, 245 insertions(+) create mode 100644 drivers/usb/host/ehci-npcm.c create mode 100644 drivers/usb/host/ohci-npcm.c diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8f77412cc7..e2a16cb186 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -188,6 +188,14 @@ config USB_EHCI_MXS Enables support for the on-chip EHCI controller on i.MX23 and i.MX28 SoCs. +config USB_EHCI_NPCM + bool "Support for Nuvoton NPCM on-chip EHCI USB controller" + depends on ARCH_NPCM + default n + ---help--- + Enables support for the on-chip EHCI controller on + Nuvoton NPCM chips. + config USB_EHCI_OMAP bool "Support for OMAP3+ on-chip EHCI USB controller" depends on ARCH_OMAP2PLUS @@ -290,6 +298,14 @@ config USB_OHCI_DA8XX help Enable support for the da850 USB controller. +config USB_OHCI_NPCM + bool "Support for Nuvoton NPCM on-chip OHCI USB controller" + depends on ARCH_NPCM + default n + ---help--- + Enables support for the on-chip OHCI controller on + Nuvoton NPCM chips. + endif # USB_OHCI_HCD config USB_UHCI_HCD diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 7785b3744e..a1de788d8c 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o obj-$(CONFIG_USB_OHCI_LPC32XX) += ohci-lpc32xx.o obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o obj-$(CONFIG_USB_OHCI_GENERIC) += ohci-generic.o +obj-$(CONFIG_USB_OHCI_NPCM) += ohci-npcm.o # echi obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o @@ -35,6 +36,7 @@ obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o obj-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o obj-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o +obj-$(CONFIG_USB_EHCI_NPCM) += ehci-npcm.o obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o diff --git a/drivers/usb/host/ehci-npcm.c b/drivers/usb/host/ehci-npcm.c new file mode 100644 index 0000000000..357a5614ed --- /dev/null +++ b/drivers/usb/host/ehci-npcm.c @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Nuvoton Technology Corp. + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <reset.h> +#include <asm/io.h> +#include <dm/device_compat.h> +#include <linux/delay.h> +#include "ehci.h" + +struct npcm_ehci_priv { + struct ehci_ctrl ctrl; + struct ehci_hccr *hcd; + struct phy phy; +}; + +static int npcm_ehci_setup_phy(struct udevice *dev, struct phy *phy) +{ + int ret; + + if (!phy) + return 0; + + ret = generic_phy_get_by_index(dev, 0, phy); + if (ret) { + if (ret != -ENOENT) { + dev_err(dev, "failed to get usb phy\n"); + return ret; + } + } else { + ret = generic_phy_init(phy); + if (ret) { + dev_err(dev, "failed to init usb phy\n"); + return ret; + } + } + + return 0; +} + +static int npcm_ehci_init(struct udevice *dev) +{ + struct npcm_ehci_priv *priv = dev_get_priv(dev); + struct reset_ctl reset; + int ret; + + ret = reset_get_by_index(dev, 0, &reset); + if (ret && ret != -ENOENT && ret != -ENOTSUPP) { + dev_err(dev, "failed to get reset\n"); + return ret; + } + + /* reset controller */ + if (reset_valid(&reset)) + reset_assert(&reset); + + /* setup phy */ + ret = npcm_ehci_setup_phy(dev, &priv->phy); + if (ret) + return ret; + + /* release controller from reset */ + if (reset_valid(&reset)) + reset_deassert(&reset); + + return 0; +} + +static int npcm_ehci_probe(struct udevice *dev) +{ + struct npcm_ehci_priv *priv = dev_get_priv(dev); + struct ehci_hcor *hcor; + enum usb_init_type type = dev_get_driver_data(dev); + int ret; + + ret = npcm_ehci_init(dev); + if (ret) + return ret; + + priv->hcd = (struct ehci_hccr *)dev_read_addr_ptr(dev); + debug("USB HCD @0x%p\n", priv->hcd); + hcor = (struct ehci_hcor *)((uintptr_t)priv->hcd + + HC_LENGTH(ehci_readl(&priv->hcd->cr_capbase))); + + return ehci_register(dev, priv->hcd, hcor, NULL, 0, type); +} + +static int npcm_ehci_remove(struct udevice *dev) +{ + struct npcm_ehci_priv *priv = dev_get_priv(dev); + + generic_phy_exit(&priv->phy); + + return ehci_deregister(dev); +} + +static const struct udevice_id npcm_ehci_ids[] = { + { .compatible = "nuvoton,npcm845-ehci", .data = USB_INIT_HOST }, + { .compatible = "nuvoton,npcm845-udc", .data = USB_INIT_DEVICE }, + { .compatible = "nuvoton,npcm750-ehci", .data = USB_INIT_HOST }, + { .compatible = "nuvoton,npcm750-udc", .data = USB_INIT_DEVICE }, + { } +}; + +U_BOOT_DRIVER(ehci_npcm) = { + .name = "ehci_npcm", + .id = UCLASS_USB, + .of_match = npcm_ehci_ids, + .probe = npcm_ehci_probe, + .remove = npcm_ehci_remove, + .ops = &ehci_usb_ops, + .priv_auto = sizeof(struct npcm_ehci_priv), + .plat_auto = sizeof(struct usb_plat), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; diff --git a/drivers/usb/host/ohci-npcm.c b/drivers/usb/host/ohci-npcm.c new file mode 100644 index 0000000000..9e1d529880 --- /dev/null +++ b/drivers/usb/host/ohci-npcm.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 Nuvoton Technology Corp. + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <reset.h> +#include <asm/io.h> +#include <dm/device_compat.h> +#include <linux/delay.h> +#include "ohci.h" + +struct npcm_ohci_priv { + ohci_t ohci; + struct phy phy; +}; + +static int npcm_ohci_setup_phy(struct udevice *dev, struct phy *phy) +{ + int ret; + + if (!phy) + return 0; + + ret = generic_phy_get_by_index(dev, 0, phy); + if (ret) { + if (ret != -ENOENT) { + dev_err(dev, "failed to get usb phy\n"); + return ret; + } + } else { + ret = generic_phy_init(phy); + if (ret) { + dev_err(dev, "failed to init usb phy\n"); + return ret; + } + } + + return 0; +} + +static int npcm_ohci_init(struct udevice *dev) +{ + struct npcm_ohci_priv *priv = dev_get_priv(dev); + struct reset_ctl reset; + int ret; + + ret = reset_get_by_index(dev, 0, &reset); + if (ret && ret != -ENOENT && ret != -ENOTSUPP) { + dev_err(dev, "failed to get reset\n"); + return ret; + } + + /* reset controller */ + if (reset_valid(&reset)) + reset_assert(&reset); + + /* setup phy */ + ret = npcm_ohci_setup_phy(dev, &priv->phy); + if (ret) + return ret; + + /* release controller from reset */ + if (reset_valid(&reset)) + reset_deassert(&reset); + + return 0; +} + +static int npcm_ohci_probe(struct udevice *dev) +{ + struct ohci_regs *regs = dev_read_addr_ptr(dev); + int ret; + + ret = npcm_ohci_init(dev); + if (ret) + return ret; + + return ohci_register(dev, regs); +} + +static int npcm_ohci_remove(struct udevice *dev) +{ + struct npcm_ohci_priv *priv = dev_get_priv(dev); + + generic_phy_exit(&priv->phy); + + return ohci_deregister(dev); +} + +static const struct udevice_id npcm_ohci_ids[] = { + { .compatible = "nuvoton,npcm845-ohci" }, + { .compatible = "nuvoton,npcm750-ohci" }, + { } +}; + +U_BOOT_DRIVER(ohci_npcm) = { + .name = "ohci_npcm", + .id = UCLASS_USB, + .of_match = npcm_ohci_ids, + .probe = npcm_ohci_probe, + .remove = npcm_ohci_remove, + .ops = &ohci_usb_ops, + .priv_auto = sizeof(struct npcm_ohci_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; -- 2.17.1

2 7

[PATCH] arm64: zynqmp: Used fixed-partitions for QSPI in k26
by Michal Simek 29 Jun '22

29 Jun '22

Using fixed partitions is recommended way how to describe QSPI. Also add label for qspi flash memory to be able to reference it in future. Signed-off-by: Michal Simek <michal.simek(a)amd.com> --- arch/arm/dts/zynqmp-sm-k26-revA.dts | 163 +++++++++++++++------------- 1 file changed, 85 insertions(+), 78 deletions(-) diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 7c2bfa395da7..ac349a9dcc5d 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -130,7 +130,7 @@ &qspi { /* MIO 0-5 - U143 */ status = "okay"; - flash@0 { /* MT25QU512A */ + spi_flash: flash@0 { /* MT25QU512A */ compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */ #address-cells = <1>; #size-cells = <1>; @@ -138,83 +138,90 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <40000000>; /* 40MHz */ - partition@0 { - label = "Image Selector"; - reg = <0x0 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@80000 { - label = "Image Selector Golden"; - reg = <0x80000 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@100000 { - label = "Persistent Register"; - reg = <0x100000 0x20000>; /* 128KB */ - }; - partition@120000 { - label = "Persistent Register Backup"; - reg = <0x120000 0x20000>; /* 128KB */ - }; - partition@140000 { - label = "Open_1"; - reg = <0x140000 0xC0000>; /* 768KB */ - }; - partition@200000 { - label = "Image A (FSBL, PMU, ATF, U-Boot)"; - reg = <0x200000 0xD00000>; /* 13MB */ - }; - partition@f00000 { - label = "ImgSel Image A Catch"; - reg = <0xF00000 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@f80000 { - label = "Image B (FSBL, PMU, ATF, U-Boot)"; - reg = <0xF80000 0xD00000>; /* 13MB */ - }; - partition@1c80000 { - label = "ImgSel Image B Catch"; - reg = <0x1C80000 0x80000>; /* 512KB */ - read-only; - lock; - }; - partition@1d00000 { - label = "Open_2"; - reg = <0x1D00000 0x100000>; /* 1MB */ - }; - partition@1e00000 { - label = "Recovery Image"; - reg = <0x1E00000 0x200000>; /* 2MB */ - read-only; - lock; - }; - partition@2000000 { - label = "Recovery Image Backup"; - reg = <0x2000000 0x200000>; /* 2MB */ - read-only; - lock; - }; - partition@2200000 { - label = "U-Boot storage variables"; - reg = <0x2200000 0x20000>; /* 128KB */ - }; - partition@2220000 { - label = "U-Boot storage variables backup"; - reg = <0x2220000 0x20000>; /* 128KB */ - }; - partition@2240000 { - label = "SHA256"; - reg = <0x2240000 0x10000>; /* 256B but 64KB sector */ - read-only; - lock; - }; - partition@2250000 { - label = "User"; - reg = <0x2250000 0x1db0000>; /* 29.5 MB */ + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Image Selector"; + reg = <0x0 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@80000 { + label = "Image Selector Golden"; + reg = <0x80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@100000 { + label = "Persistent Register"; + reg = <0x100000 0x20000>; /* 128KB */ + }; + partition@120000 { + label = "Persistent Register Backup"; + reg = <0x120000 0x20000>; /* 128KB */ + }; + partition@140000 { + label = "Open_1"; + reg = <0x140000 0xC0000>; /* 768KB */ + }; + partition@200000 { + label = "Image A (FSBL, PMU, ATF, U-Boot)"; + reg = <0x200000 0xD00000>; /* 13MB */ + }; + partition@f00000 { + label = "ImgSel Image A Catch"; + reg = <0xF00000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@f80000 { + label = "Image B (FSBL, PMU, ATF, U-Boot)"; + reg = <0xF80000 0xD00000>; /* 13MB */ + }; + partition@1c80000 { + label = "ImgSel Image B Catch"; + reg = <0x1C80000 0x80000>; /* 512KB */ + read-only; + lock; + }; + partition@1d00000 { + label = "Open_2"; + reg = <0x1D00000 0x100000>; /* 1MB */ + }; + partition@1e00000 { + label = "Recovery Image"; + reg = <0x1E00000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2000000 { + label = "Recovery Image Backup"; + reg = <0x2000000 0x200000>; /* 2MB */ + read-only; + lock; + }; + partition@2200000 { + label = "U-Boot storage variables"; + reg = <0x2200000 0x20000>; /* 128KB */ + }; + partition@2220000 { + label = "U-Boot storage variables backup"; + reg = <0x2220000 0x20000>; /* 128KB */ + }; + partition@2240000 { + label = "SHA256"; + reg = <0x2240000 0x10000>; /* 256B but 64KB sector */ + read-only; + lock; + }; + partition@2250000 { + label = "User"; + reg = <0x2250000 0x1db0000>; /* 29.5 MB */ + }; }; }; }; -- 2.36.1

1 1

[PATCH v2] usb: dwc3: Add support to reset usb ULPI phy
by Michal Simek 29 Jun '22

29 Jun '22

From: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> When usb PHY initialization is done, the PHY need to be reset. Signed-off-by: T Karthik Reddy <t.karthik.reddy(a)xilinx.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- Changes in v2: - Remove EBUSY checking which is not needed. Reported by Bin drivers/usb/dwc3/Kconfig | 2 +- drivers/usb/dwc3/dwc3-generic.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 62aa65bf0cd2..685bda3729e5 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -25,7 +25,7 @@ config USB_DWC3_OMAP config USB_DWC3_GENERIC bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue)" - depends on DM_USB && USB_DWC3 && MISC + depends on DM_USB && USB_DWC3 && MISC && DM_GPIO help Select this for Xilinx ZynqMP and similar Platforms. This wrapper supports Host and Peripheral operation modes. diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index b1e019b5b91a..53355eb13a9c 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -25,6 +25,7 @@ #include <reset.h> #include <clk.h> #include <usb/xhci.h> +#include <asm/gpio.h> struct dwc3_glue_data { struct clk_bulk clks; @@ -42,6 +43,7 @@ struct dwc3_generic_priv { void *base; struct dwc3 dwc3; struct phy_bulk phys; + struct gpio_desc ulpi_reset; }; struct dwc3_generic_host_priv { @@ -77,6 +79,26 @@ static int dwc3_generic_probe(struct udevice *dev, if (rc && rc != -ENOTSUPP) return rc; + if (device_is_compatible(dev->parent, "xlnx,zynqmp-dwc3")) { + rc = gpio_request_by_name(dev->parent, "reset-gpios", 0, + &priv->ulpi_reset, GPIOD_ACTIVE_LOW); + if (rc) + return rc; + + /* Toggle ulpi to reset the phy. */ + rc = dm_gpio_set_value(&priv->ulpi_reset, 1); + if (rc) + return rc; + + mdelay(5); + + rc = dm_gpio_set_value(&priv->ulpi_reset, 0); + if (rc) + return rc; + + mdelay(5); + } + if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) reset_deassert_bulk(&glue->resets); @@ -98,6 +120,12 @@ static int dwc3_generic_remove(struct udevice *dev, { struct dwc3 *dwc3 = &priv->dwc3; + if (device_is_compatible(dev->parent, "xlnx,zynqmp-dwc3")) { + struct gpio_desc *ulpi_reset = &priv->ulpi_reset; + + dm_gpio_free(ulpi_reset->dev, ulpi_reset); + } + dwc3_remove(dwc3); dwc3_shutdown_phy(dev, &priv->phys); unmap_physmem(dwc3->regs, MAP_NOCACHE); -- 2.35.1

3 2

[PATCH v2 0/2] spl, rk3399: fix FIT image loading out-of-range
by Jerome Forissier 29 Jun '22

29 Jun '22

The patches in this series address an issue I met when trying to enable FIT signature verification by SPL on a RockPi4B board. - The first patch avoids a buffer overflow when writing to INTMEM1 SRAM - The second one addresses reliability issues I had with back-to-back MMC reads from the microSD card. By allowing DMA operation, the issue is gone and generally speaking DMA is preferred over FIFO mode anyways. Jerome Forissier (2): spl: fit: add config option for temporary buffer when loading image rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed arch/arm/dts/rk3399-u-boot.dtsi | 2 + common/spl/Kconfig | 45 +++++++++++++++++++ common/spl/spl_fit.c | 79 ++++++++++++++++++++++++++++++--- 3 files changed, 120 insertions(+), 6 deletions(-) -- 2.34.1

1 2

[PATCH 0/2] spl, rk3399: fix FIT image loadingg out-of-range
by Jerome Forissier 29 Jun '22

29 Jun '22

The patches in this series address an issue I met when trying to enable FIT signature verification by SPL on a RockPi4B board. - The first patch avoids a buffer overflow when writing to INTMEM1 SRAM - The second one addresses reliability issues I had with back-to-back MMC reads from the microSD card. By allowing DMA operation, the issue is gone and generally speaking DMA is preferred over FIFO mode anyways. Jerome Forissier (2): spl: fit: add config option for temporary buffer when loading image rockchip: rk3399: enable spl-fifo-mode for sdmmc only when needed arch/arm/dts/rk3399-u-boot.dtsi | 2 + common/spl/Kconfig | 45 +++++++++++++++++++ common/spl/spl_fit.c | 79 ++++++++++++++++++++++++++++++--- 3 files changed, 120 insertions(+), 6 deletions(-) -- 2.34.1

3 6

[PATCH V2] imx: imx93_11x11_evk: using binman to pack images
by Peng Fan (OSS) 29 Jun '22

29 Jun '22

From: Peng Fan <peng.fan(a)nxp.com> Use BINMAN to generate flash.bin Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- Based on https://patchwork.ozlabs.org/project/uboot/cover/20220611132035.32698-1-pen… V2: Typo correct arch/arm/dts/imx93-11x11-evk-u-boot.dtsi | 2 + arch/arm/dts/imx93-u-boot.dtsi | 84 ++++++++++++++++++++++++ arch/arm/mach-imx/Makefile | 24 +++++++ arch/arm/mach-imx/imx9/Kconfig | 1 + arch/arm/mach-imx/imx9/container.cfg | 11 ++++ arch/arm/mach-imx/imx9/imximage.cfg | 15 +++++ board/freescale/imx93_evk/Kconfig | 6 ++ 7 files changed, 143 insertions(+) create mode 100644 arch/arm/dts/imx93-u-boot.dtsi create mode 100644 arch/arm/mach-imx/imx9/container.cfg create mode 100644 arch/arm/mach-imx/imx9/imximage.cfg diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index 6f02b389893..e5912a85ca2 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -3,6 +3,8 @@ * Copyright 2022 NXP */ +#include "imx93-u-boot.dtsi" + / { wdt-reboot { compatible = "wdt-reboot"; diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi new file mode 100644 index 00000000000..2b6bfd0cb44 --- /dev/null +++ b/arch/arm/dts/imx93-u-boot.dtsi @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2022 NXP + * Peng Fan <peng.fan(a)nxp.com> + */ + +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + u-boot-spl-ddr { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + }; + + blob_1: blob-ext@1 { + filename = "lpddr4_imem_1d_v202201.bin"; + size = <0x8000>; + }; + + blob_2: blob-ext@2 { + filename = "lpddr4_dmem_1d_v202201.bin"; + size = <0x4000>; + }; + + blob_3: blob-ext@3 { + filename = "lpddr4_imem_2d_v202201.bin"; + size = <0x8000>; + }; + + blob_4: blob-ext@4 { + filename = "lpddr4_dmem_2d_v202201.bin"; + size = <0x4000>; + }; + }; + + spl { + filename = "spl.bin"; + + mkimage { + args = "-n spl/u-boot-spl.cfgout -T imx8image -e 0x2049a000"; + + blob { + filename = "u-boot-spl-ddr.bin"; + }; + }; + }; + + u-boot-container { + filename = "u-boot-container.bin"; + + mkimage { + args = "-n u-boot-container.cfgout -T imx8image -e 0x0"; + + blob { + filename = "u-boot.bin"; + }; + }; + }; + + imx-boot { + filename = "flash.bin"; + pad-byte = <0x00>; + + spl: blob-ext@1 { + filename = "spl.bin"; + offset = <0x0>; + align-size = <0x400>; + align = <0x400>; + }; + + uboot: blob-ext@2 { + filename = "u-boot-container.bin"; + }; + }; +}; diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 71ac8e6ffde..2f51226e0d9 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -120,6 +120,9 @@ DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctre else ifeq ($(CONFIG_ARCH_IMX8M), y) IMAGE_TYPE := imx8mimage DEPFILE_EXISTS := 0 +else ifeq ($(CONFIG_ARCH_IMX9), y) +IMAGE_TYPE := imx8image +DEPFILE_EXISTS := 0 else IMAGE_TYPE := imximage DEPFILE_EXISTS := 0 @@ -171,6 +174,27 @@ flash.bin: spl/u-boot-spl-ddr.bin u-boot.itb FORCE $(call if_changed,mkimage) endif +ifeq ($(CONFIG_ARCH_IMX9), y) + +SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout u-boot-container.cfgout FORCE + +MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout -T $(IMAGE_TYPE) -e $(CONFIG_SPL_TEXT_BASE) +flash.bin: MKIMAGEOUTPUT = flash.log + +spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE + $(Q)mkdir -p $(dir $@) + $(call if_changed_dep,cpp_cfg) + +spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE + +u-boot-container.cfgout: $(IMX_CONTAINER_CFG) FORCE + $(Q)mkdir -p $(dir $@) + $(call if_changed_dep,cpp_cfg) + +flash.bin: spl/u-boot-spl-ddr.bin container.cfgout FORCE + $(call if_changed,mkimage) +endif + ifeq ($(CONFIG_ARCH_IMX8), y) SPL: diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index c06102bae07..0b965376987 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -25,6 +25,7 @@ choice config TARGET_IMX93_11X11_EVK bool "imx93_11x11_evk" select IMX93 + select BINMAN endchoice diff --git a/arch/arm/mach-imx/imx9/container.cfg b/arch/arm/mach-imx/imx9/container.cfg new file mode 100644 index 00000000000..baaa17748ff --- /dev/null +++ b/arch/arm/mach-imx/imx9/container.cfg @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022 NXP + */ + +/* This file is to create a container image could be loaded by SPL */ +BOOT_FROM SD 0x400 +SOC_TYPE IMX9 +CONTAINER +IMAGE A55 bl31.bin 0x204E0000 +IMAGE A55 u-boot.bin CONFIG_SYS_TEXT_BASE diff --git a/arch/arm/mach-imx/imx9/imximage.cfg b/arch/arm/mach-imx/imx9/imximage.cfg new file mode 100644 index 00000000000..fae0c64245f --- /dev/null +++ b/arch/arm/mach-imx/imx9/imximage.cfg @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2022 NXP + */ + +/* Boot from SD, sector size 0x400 */ +BOOT_FROM SD 0x400 +/* SoC type IMX9 */ +SOC_TYPE IMX9 +/* Append sentinel container image */ +APPEND mx93a0-ahab-container.img +/* Create the 2nd container */ +CONTAINER +/* Add spl with exec attribute */ +IMAGE A55 u-boot-spl-ddr.bin 0x2049A000 diff --git a/board/freescale/imx93_evk/Kconfig b/board/freescale/imx93_evk/Kconfig index 032e523198d..17209d939d2 100644 --- a/board/freescale/imx93_evk/Kconfig +++ b/board/freescale/imx93_evk/Kconfig @@ -16,6 +16,12 @@ config IMX93_EVK_LPDDR4X help Select the LPDDR4X timing and 0.6V VDDQ +config IMX_CONFIG + default "arch/arm/mach-imx/imx9/imximage.cfg" + +config IMX_CONTAINER_CFG + default "arch/arm/mach-imx/imx9/container.cfg" + source "board/freescale/common/Kconfig" endif -- 2.36.0

2 2

[PATCH RESEND 0/5] aspeed: Add AST2600 machine to CI
by Joel Stanley 29 Jun '22

29 Jun '22

The Aspeed AST2600 is modelled in Qemu. This makes some configuration changes so it can be added to CI. It has a depednency on the u-boot-test-hooks patches I sent here: https://lore.kernel.org/u-boot/20220624023420.3925916-1-joel@jms.id.au I've given it a run on Azure and the tests passed. Joel Stanley (5): config/ast2600: Enable CRC32 config/ast2600: Make position independent config/ast2600: Disable hash hardware accel ast2600: Configure u-boot-with-spl.bin target CI: Add Aspeed AST2600 include/configs/evb_ast2600.h | 3 +++ .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 6 ++++++ configs/evb-ast2600_defconfig | 7 ++++--- 4 files changed, 16 insertions(+), 3 deletions(-) -- 2.35.1

5 23

[PATCH] crypto/fsl: Add support for black key blob
by Gaurav Jain 29 Jun '22

29 Jun '22

modified caam descriptor to support black key blob. Signed-off-by: Gaurav Jain <gaurav.jain(a)nxp.com> --- cmd/blob.c | 12 ++++++++---- drivers/crypto/fsl/desc.h | 1 + drivers/crypto/fsl/fsl_blob.c | 21 +++++++++++++-------- drivers/crypto/fsl/jobdesc.c | 24 +++++++++++++++++++----- drivers/crypto/fsl/jobdesc.h | 8 ++++++-- 5 files changed, 47 insertions(+), 19 deletions(-) diff --git a/cmd/blob.c b/cmd/blob.c index e2efae7a11..5c459b6f19 100644 --- a/cmd/blob.c +++ b/cmd/blob.c @@ -21,10 +21,12 @@ * @src: - Address of data to be decapsulated * @dst: - Address of data to be decapsulated * @len: - Size of data to be decapsulated + * @keycolor - Determines if the source data is covered (black key) or + * plaintext. * * Returns zero on success,and negative on error. */ -__weak int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) +__weak int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len, u8 keycolor) { return 0; } @@ -35,10 +37,12 @@ __weak int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) * @src: - Address of data to be encapsulated * @dst: - Address of data to be encapsulated * @len: - Size of data to be encapsulated + * @keycolor - Determines if the source data is covered (black key) or + * plaintext. * * Returns zero on success,and negative on error. */ -__weak int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) +__weak int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len, u8 keycolor) { return 0; } @@ -91,9 +95,9 @@ static int do_blob(struct cmd_tbl *cmdtp, int flag, int argc, #endif if (enc) - ret = blob_encap(km_ptr, src_ptr, dst_ptr, len); + ret = blob_encap(km_ptr, src_ptr, dst_ptr, len, 0); else - ret = blob_decap(km_ptr, src_ptr, dst_ptr, len); + ret = blob_decap(km_ptr, src_ptr, dst_ptr, len, 0); return ret; } diff --git a/drivers/crypto/fsl/desc.h b/drivers/crypto/fsl/desc.h index 5705c4f944..4c148a2fc4 100644 --- a/drivers/crypto/fsl/desc.h +++ b/drivers/crypto/fsl/desc.h @@ -435,6 +435,7 @@ /* Assuming OP_TYPE = OP_TYPE_UNI_PROTOCOL */ #define OP_PCLID_SECMEM 0x08 #define OP_PCLID_BLOB (0x0d << OP_PCLID_SHIFT) +#define OP_PCL_BLOB_BLACK 0x0004 #define OP_PCLID_SECRETKEY (0x11 << OP_PCLID_SHIFT) #define OP_PCLID_PUBLICKEYPAIR (0x14 << OP_PCLID_SHIFT) #define OP_PCLID_DSA_SIGN (0x15 << OP_PCLID_SHIFT) diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c index 9b6e4bca06..034e6ae5df 100644 --- a/drivers/crypto/fsl/fsl_blob.c +++ b/drivers/crypto/fsl/fsl_blob.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2022 NXP * */ @@ -22,13 +23,15 @@ * @src: - Source address (blob) * @dst: - Destination address (data) * @len: - Size of decapsulated data + * @keycolor - Determines if the source data is covered (black key) or + * plaintext. * * Note: Start and end of the key_mod, src and dst buffers have to be aligned to * the cache line size (ARCH_DMA_MINALIGN) for the CAAM operation to succeed. * * Returns zero on success, negative on error. */ -int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) +int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len, u8 keycolor) { int ret, size, i = 0; u32 *desc; @@ -55,7 +58,7 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) flush_dcache_range((unsigned long)src, (unsigned long)src + size); - inline_cnstr_jobdesc_blob_decap(desc, key_mod, src, dst, len); + inline_cnstr_jobdesc_blob_decap(desc, key_mod, src, dst, len, keycolor); debug("Descriptor dump:\n"); for (i = 0; i < 14; i++) @@ -65,8 +68,8 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) flush_dcache_range((unsigned long)desc, (unsigned long)desc + size); - flush_dcache_range((unsigned long)dst, - (unsigned long)dst + size); + size = ALIGN(len, ARCH_DMA_MINALIGN); + invalidate_dcache_range((unsigned long)dst, (unsigned long)dst + size); ret = run_descriptor_jr(desc); @@ -94,13 +97,15 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) * @src: - Source address (data) * @dst: - Destination address (blob) * @len: - Size of data to be encapsulated + * @keycolor - Determines if the source data is covered (black key) or + * plaintext. * * Note: Start and end of the key_mod, src and dst buffers have to be aligned to * the cache line size (ARCH_DMA_MINALIGN) for the CAAM operation to succeed. * * Returns zero on success, negative on error. */ -int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) +int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len, u8 keycolor) { int ret, size, i = 0; u32 *desc; @@ -127,7 +132,7 @@ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) flush_dcache_range((unsigned long)src, (unsigned long)src + size); - inline_cnstr_jobdesc_blob_encap(desc, key_mod, src, dst, len); + inline_cnstr_jobdesc_blob_encap(desc, key_mod, src, dst, len, keycolor); debug("Descriptor dump:\n"); for (i = 0; i < 14; i++) @@ -137,8 +142,8 @@ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) flush_dcache_range((unsigned long)desc, (unsigned long)desc + size); - flush_dcache_range((unsigned long)dst, - (unsigned long)dst + size); + size = ALIGN(BLOB_SIZE(len), ARCH_DMA_MINALIGN); + invalidate_dcache_range((unsigned long)dst, (unsigned long)dst + size); ret = run_descriptor_jr(desc); diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c index 542b1652d8..1280e6122e 100644 --- a/drivers/crypto/fsl/jobdesc.c +++ b/drivers/crypto/fsl/jobdesc.c @@ -4,7 +4,7 @@ * Basic job descriptor construction * * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018, 2022 NXP * */ @@ -210,13 +210,14 @@ void inline_cnstr_jobdesc_hash(uint32_t *desc, #ifndef CONFIG_SPL_BUILD void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *plain_txt, uint8_t *enc_blob, - uint32_t in_sz) + uint32_t in_sz, uint8_t keycolor) { caam_dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out; uint32_t key_sz = KEY_IDNFR_SZ_BYTES; /* output blob will have 32 bytes key blob in beginning and * 16 byte HMAC identifier at end of data blob */ uint32_t out_sz = in_sz + KEY_BLOB_SIZE + MAC_SIZE; + uint32_t bk_store; dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr); dma_addr_in = virt_to_phys((void *)plain_txt); @@ -230,16 +231,23 @@ void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr, append_seq_out_ptr(desc, dma_addr_out, out_sz, 0); - append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | OP_PCLID_BLOB); + bk_store = OP_PCLID_BLOB; + + /* An input black key cannot be stored in a red blob */ + if (keycolor == BLACK_KEY) + bk_store |= OP_PCL_BLOB_BLACK; + + append_operation(desc, OP_TYPE_ENCAP_PROTOCOL | bk_store); } void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *enc_blob, uint8_t *plain_txt, - uint32_t out_sz) + uint32_t out_sz, uint8_t keycolor) { caam_dma_addr_t dma_addr_key_idnfr, dma_addr_in, dma_addr_out; uint32_t key_sz = KEY_IDNFR_SZ_BYTES; uint32_t in_sz = out_sz + KEY_BLOB_SIZE + MAC_SIZE; + uint32_t bk_store; dma_addr_key_idnfr = virt_to_phys((void *)key_idnfr); dma_addr_in = virt_to_phys((void *)enc_blob); @@ -253,7 +261,13 @@ void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, append_seq_out_ptr(desc, dma_addr_out, out_sz, 0); - append_operation(desc, OP_TYPE_DECAP_PROTOCOL | OP_PCLID_BLOB); + bk_store = OP_PCLID_BLOB; + + /* An input black key cannot be stored in a red blob */ + if (keycolor == BLACK_KEY) + bk_store |= OP_PCL_BLOB_BLACK; + + append_operation(desc, OP_TYPE_DECAP_PROTOCOL | bk_store); } #endif /* diff --git a/drivers/crypto/fsl/jobdesc.h b/drivers/crypto/fsl/jobdesc.h index c4501abd26..99ac049c3e 100644 --- a/drivers/crypto/fsl/jobdesc.h +++ b/drivers/crypto/fsl/jobdesc.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2022 NXP * */ @@ -13,6 +14,9 @@ #define KEY_IDNFR_SZ_BYTES 16 +/* Encrypted key */ +#define BLACK_KEY 1 + #ifdef CONFIG_CMD_DEKBLOB /* inline_cnstr_jobdesc_blob_dek: * Intializes and constructs the job descriptor for DEK encapsulation @@ -33,11 +37,11 @@ void inline_cnstr_jobdesc_hash(uint32_t *desc, void inline_cnstr_jobdesc_blob_encap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *plain_txt, uint8_t *enc_blob, - uint32_t in_sz); + uint32_t in_sz, uint8_t keycolor); void inline_cnstr_jobdesc_blob_decap(uint32_t *desc, uint8_t *key_idnfr, uint8_t *enc_blob, uint8_t *plain_txt, - uint32_t out_sz); + uint32_t out_sz, uint8_t keycolor); void inline_cnstr_jobdesc_rng_instantiation(u32 *desc, int handle, int do_sk); -- 2.25.1

1 1

[PATCH 0/2] pmic: pca9450: Initialization of pmic like done in linux
by Heiko Thiery 29 Jun '22

29 Jun '22

To be able to initialize the PMIC voltages by using the PCA9450 regulator driver we need to properly disable the BUCK1/2/3 preset behavior. Also the RESET_CTRL/WDOG_B_CFG behavior can be done by the PC9450 PMIC driver. With that enabled the PMIC custom configurations done in SPL code for boards that has the PCA9450 implemented can be cleaned. Heiko Thiery (2): pmic: pca9450: enable system reset on WDOG_B assertion pmic: pca9450: clear PRESET_EN bit for BUCK1/2/3 voltage settings drivers/power/pmic/Kconfig | 4 ++++ drivers/power/pmic/pca9450.c | 21 +++++++++++++++++++++ include/power/pca9450.h | 10 ++++++++++ 3 files changed, 35 insertions(+) -- 2.30.2

4 7

[PATCH] rockchip: pinebook-pro: sync PBP dtb to 5.18
by Peter Robinson 29 Jun '22

29 Jun '22

Sync the pinebook pro to upstream 5.18, in particular this brings brings in a fix so the DP is disabled so Linux will actually boot. Signed-off-by: Peter Robinson <pbrobinson(a)gmail.com> --- arch/arm/dts/rk3399-pinebook-pro.dts | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts index 2b5f001ff4a..d6b68d77d63 100644 --- a/arch/arm/dts/rk3399-pinebook-pro.dts +++ b/arch/arm/dts/rk3399-pinebook-pro.dts @@ -17,6 +17,7 @@ / { model = "Pine64 Pinebook Pro"; compatible = "pine64,pinebook-pro", "rockchip,rk3399"; + chassis-type = "laptop"; aliases { mmc0 = &sdio0; @@ -242,12 +243,12 @@ vdd_log: vdd-log { compatible = "pwm-regulator"; pwms = <&pwm2 0 25000 1>; + pwm-supply = <&vcc_sysin>; regulator-name = "vdd_log"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <800000>; regulator-max-microvolt = <1400000>; - vin-supply = <&vcc_sysin>; regulator-state-mem { regulator-on-in-suspend; @@ -385,10 +386,6 @@ }; }; -&cdn_dp { - status = "okay"; -}; - &cpu_b0 { cpu-supply = <&vdd_cpu_b>; }; @@ -475,8 +472,6 @@ vcc10-supply = <&vcc_sysin>; vcc11-supply = <&vcc_sysin>; vcc12-supply = <&vcc3v3_sys>; - vcc13-supply = <&vcc_sysin>; - vcc14-supply = <&vcc_sysin>; regulators { /* rk3399 center logic supply */ @@ -711,7 +706,7 @@ connector { compatible = "usb-c-connector"; - data-role = "host"; + data-role = "dual"; label = "USB-C"; op-sink-microwatt = <1000000>; power-role = "dual"; -- 2.36.1

2 1