June 2022 - U-Boot

[PATCH] mtd: spi-nor-ids: Add support for flashes tested by xilinx
by Ashok Reddy Soma 04 Jul '22

04 Jul '22

Add support for various flashes from below manufacturers which are tested by xilinx for years. EON: en25q128b GIGA: gd25lx256e ISSI: is25lp008 is25lp016 is25lp01g is25wp008 is25wp016 is25wp01g is25wx256 MACRONIX: mx25u51245f mx66u1g45g mx66l2g45g MICRON: mt35xl512aba mt35xu01g SPANSION: s70fs01gs_256k SST: sst26wf016b WINBOND: w25q16dw w25q16jv w25q512jv w25q32bv w25h02jv Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma(a)xilinx.com> --- drivers/mtd/spi/spi-nor-ids.c | 37 +++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 7050ddc397..5d8bf05ff8 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -82,6 +82,7 @@ const struct flash_info spi_nor_ids[] = { /* EON -- en25xxx */ { INFO("en25q32b", 0x1c3016, 0, 64 * 1024, 64, 0) }, { INFO("en25q64", 0x1c3017, 0, 64 * 1024, 128, SECT_4K) }, + { INFO("en25q128b", 0x1c3018, 0, 64 * 1024, 256, 0) }, { INFO("en25qh128", 0x1c7018, 0, 64 * 1024, 256, 0) }, { INFO("en25s64", 0x1c3817, 0, 64 * 1024, 128, SECT_4K) }, #endif @@ -127,11 +128,17 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) + }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ /* ISSI */ { INFO("is25lq040b", 0x9d4013, 0, 64 * 1024, 8, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25lp008", 0x9d6014, 0, 64 * 1024, 16, SPI_NOR_QUAD_READ) }, + { INFO("is25lp016", 0x9d6015, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ) }, { INFO("is25lp032", 0x9d6016, 0, 64 * 1024, 64, 0) }, { INFO("is25lp064", 0x9d6017, 0, 64 * 1024, 128, 0) }, { INFO("is25lp128", 0x9d6018, 0, 64 * 1024, 256, @@ -140,6 +147,10 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ) }, { INFO("is25lp512", 0x9d601a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25lp01g", 0x9d601b, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wp008", 0x9d7014, 0, 64 * 1024, 16, SPI_NOR_QUAD_READ) }, + { INFO("is25wp016", 0x9d7015, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ) }, { INFO("is25wp032", 0x9d7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("is25wp064", 0x9d7017, 0, 64 * 1024, 128, @@ -151,6 +162,10 @@ const struct flash_info spi_nor_ids[] = { SPI_NOR_4B_OPCODES) }, { INFO("is25wp512", 0x9d701a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wp01g", 0x9d701b, 0, 64 * 1024, 2048, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("is25wx256", 0x9d5b19, 0, 128 * 1024, 256, + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ /* Macronix */ @@ -176,8 +191,11 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx25l25655e", 0xc22619, 0, 64 * 1024, 512, 0) }, { INFO("mx66l51235l", 0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66u51235f", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25u51245f", 0xc2953a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66u1g45g", 0xc2253b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66u2g45g", 0xc2253c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66l1g45g", 0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("mx66l2g45g", 0xc2201c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx25l1633e", 0xc22415, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) }, { INFO("mx25r6435f", 0xc22817, 0, 64 * 1024, 128, SECT_4K) }, { INFO("mx66uw2g345g", 0xc2943c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, @@ -208,8 +226,10 @@ const struct flash_info spi_nor_ids[] = { { INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, { INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE | SPI_NOR_4B_OPCODES) }, #ifdef CONFIG_SPI_FLASH_MT35XU + { INFO("mt35xl512aba", 0x2c5a1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) }, { INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) }, #endif /* CONFIG_SPI_FLASH_MT35XU */ + { INFO6("mt35xu01g", 0x2c5b1b, 0x104100, 128 * 1024, 1024, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, { INFO("mt35xu02g", 0x2c5b1c, 0, 128 * 1024, 2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ @@ -225,6 +245,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("s25fl512s_256k", 0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, { INFO("s25fl512s_64k", 0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, { INFO("s25fl512s_512k", 0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, + { INFO("s70fs01gs_256k", 0x010221, 0x4d00, 256 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, 0) }, { INFO("s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, 0) }, { INFO6("s25fl128s", 0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, @@ -275,6 +296,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("sst25wf040", 0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) }, { INFO("sst25wf080", 0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) }, { INFO("sst26vf064b", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("sst26wf016b", 0xbf2641, 0, 64 * 1024, 32, SECT_4K) }, { INFO("sst26wf016", 0xbf2651, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, { INFO("sst26wf032", 0xbf2622, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, { INFO("sst26wf064", 0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_SST26LOCK) }, @@ -311,11 +333,19 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q20bw", 0xef5012, 0, 64 * 1024, 4, SECT_4K) }, { INFO("w25q20ew", 0xef6012, 0, 64 * 1024, 4, SECT_4K) }, { INFO("w25q32", 0xef4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { + INFO("w25q16dw", 0xef6015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + }, { INFO("w25q32dw", 0xef6016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q16jv", 0xef7015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) + }, { INFO("w25q32jv", 0xef7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | @@ -362,6 +392,11 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q512jv", 0xef7119, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | @@ -370,6 +405,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q80", 0xef5014, 0, 64 * 1024, 16, SECT_4K) }, { INFO("w25q80bl", 0xef4014, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q16cl", 0xef4015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25q32bv", 0xef4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q64cv", 0xef4017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25q128", 0xef4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | @@ -378,6 +414,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25m512jw", 0xef6119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("w25m512jv", 0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("w25h02jv", 0xef9022, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, #endif #ifdef CONFIG_SPI_FLASH_XMC /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ -- 2.17.1

2 1

Adding a zynq board
by Christopher Bowman 04 Jul '22

04 Jul '22

Greetings, I have a board (Diligent Arty-Z7) for which I have a working U-boot. I’m not sure I’ve done it right but it does work on my board. I’d like to contribute this back and get it in U-boot. I see there is a configuration configs/xilinx_zynq_virt_defconfig which includes several boards. It would be attractive to simply add the device tree for my board to this list and have a working U-boot. However, as I understand it, each Zynq board needs to have some initial configuration done and this is done in the ps7_init_gpl.c file which I think is unique to every board. I don’t understand how the boards in the xilinx_zynq_virt_defconfig configuration are able to share a single ps7_init_gpl.c? Maybe they don’t? How do I determine if my board is compatible with the other boards if they’re sharing a ps7_init_gpl.c? Is it permissible to add a new config for a single zynq board or should I be trying to add it to xilinx_zynq_virt_defconfig? If someone could provide some perspective here or some direction on adding a new Zynq board that would be great. Thanks Christopher

2 1

[PATCH v3 1/3] drivers: tee: optee: remove unused probe local variable
by Etienne Carriere 04 Jul '22

04 Jul '22

Removes local variable child in optee_probe() that is not used. Cc: Patrick Delaunay <patrick.delaunay(a)foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere(a)linaro.org> --- No change since v2. New change not in v1 series. --- drivers/tee/optee/core.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index a89d62aaf0..c1f5fc4c7a 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -642,7 +642,6 @@ static int optee_probe(struct udevice *dev) { struct optee_pdata *pdata = dev_get_plat(dev); u32 sec_caps; - struct udevice *child; int ret; if (!is_optee_api(pdata->invoke_fn)) { @@ -673,7 +672,7 @@ static int optee_probe(struct udevice *dev) * only bind the drivers associated to the supported OP-TEE TA */ if (IS_ENABLED(CONFIG_RNG_OPTEE)) { - ret = device_bind_driver(dev, "optee-rng", "optee-rng", &child); + ret = device_bind_driver(dev, "optee-rng", "optee-rng", NULL); if (ret) return ret; } -- 2.25.1

3 8

[PATCH 1/3] ram: rk3399: Fix .set_rate_index() error handling
by Lee Jones 04 Jul '22

04 Jul '22

Functions pointed to by this op pointer can return non-zero values indicating an error. Ensure any error value is propagated back up the call-chain. Signed-off-by: Lee Jones <lee.jones(a)linaro.org> --- drivers/ram/rockchip/sdram_rk3399.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index c0a06dcaed..0af0fa9e7b 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -3005,7 +3005,9 @@ static int sdram_init(struct dram_info *dram, params->base.stride = calculate_stride(params); dram_all_config(dram, params); - dram->ops->set_rate_index(dram, params); + ret = dram->ops->set_rate_index(dram, params); + if (ret) + return ret; debug("Finish SDRAM initialization...\n"); return 0; -- 2.37.0.rc0.104.g0611611a94-goog

3 13

[PATCH] MAINTAINERS: Add Dario and Michael as nand maintainers
by Michael Trimarchi 03 Jul '22

03 Jul '22

Both of us are working on Nand subsystem on several architectures and we have boards and projects to improve the subsystem in uboot. The idea is to garantee quick feedback on patches sent on mailing list and most of the time the possibilities to test them. Cc: Dario Binacchi <dario.binacchi(a)amarulasolutions.com> Cc: Tom Rini <trini(a)konsulko.com> Signed-off-by: Michael Trimarchi <michael(a)amarulasolutions.com> --- MAINTAINERS | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index a15ba7abdc..7f27ff4c20 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1064,8 +1064,9 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-mmc.git F: drivers/mmc/ NAND FLASH -#M: Scott Wood <oss(a)buserror.net> -S: Orphaned (Since 2018-07) +M: Dario Binacchi <dario.binacchi(a)amarulasolutions.com> +M: Michael Trimarchi <michael(a)amarulasolutions.com> +S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-nand-flash.git F: drivers/mtd/nand/raw/ -- 2.25.1

3 3

[PATCH] board/BuR/*: replace maintainer of BuR boards
by Hannes Schmelzer 03 Jul '22

03 Jul '22

Since i'm leaving the company with end of june, the maintainership will be transferred to Wolfgang Wallner. Signed-off-by: Hannes Schmelzer <hannes.schmelzer(a)br-automation.com> Seriec-cc: trini(a)konsulko.com Series-version : 2 Series-changes : 2 - fix typo in Wolgangs email-address --- board/BuR/brppt1/MAINTAINERS | 2 +- board/BuR/brppt2/MAINTAINERS | 2 +- board/BuR/brsmarc1/MAINTAINERS | 2 +- board/BuR/brxre1/MAINTAINERS | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/BuR/brppt1/MAINTAINERS b/board/BuR/brppt1/MAINTAINERS index 9eddab4..6b45508 100644 --- a/board/BuR/brppt1/MAINTAINERS +++ b/board/BuR/brppt1/MAINTAINERS @@ -1,5 +1,5 @@ BRPPT1 BOARD -M: Hannes Schmelzer <hannes.schmelzer(a)br-automation.com> +M: Wolfgang Wallner <wolfgang.wallner(a)br-automation.com> S: Maintained F: board/BuR/brppt1/ F: include/configs/brppt1.h diff --git a/board/BuR/brppt2/MAINTAINERS b/board/BuR/brppt2/MAINTAINERS index a1b5bd4..fe65188 100644 --- a/board/BuR/brppt2/MAINTAINERS +++ b/board/BuR/brppt2/MAINTAINERS @@ -1,5 +1,5 @@ BUR_PPT2 BOARD -M: Hannes Schmelzer <hannes.schmelzer(a)br-automation.com> +M: Wolfgang Wallner <wolfgang.wallner(a)br-automation.com> S: Maintained F: board/BuR/brppt2/ F: include/configs/brppt2.h diff --git a/board/BuR/brsmarc1/MAINTAINERS b/board/BuR/brsmarc1/MAINTAINERS index c6dfc20..8d1fe21 100644 --- a/board/BuR/brsmarc1/MAINTAINERS +++ b/board/BuR/brsmarc1/MAINTAINERS @@ -1,5 +1,5 @@ BRSMARC1 BOARD -M: Hannes Schmelzer <hannes.schmelzer(a)br-automation.com> +M: Wolfgang Wallner <wolfgang.wallner(a)br-automation.com> S: Maintained F: board/BuR/brsmarc1/ F: include/configs/brsmarc1.h diff --git a/board/BuR/brxre1/MAINTAINERS b/board/BuR/brxre1/MAINTAINERS index eb0fe8b..5aa3671 100644 --- a/board/BuR/brxre1/MAINTAINERS +++ b/board/BuR/brxre1/MAINTAINERS @@ -1,5 +1,5 @@ BRXRE1 BOARD -M: Hannes Schmelzer <hannes.schmelzer(a)br-automation.com> +M: Wolfgang Wallner <wolfgang.wallner(a)br-automation.com> S: Maintained F: board/BuR/brxre1/ F: include/configs/brxre1.h -- 2.7.4

3 2

[PATCH] image: fit: Use stack allocation macro
by Joel Stanley 03 Jul '22

03 Jul '22

The documentation above the DEFINE_ALIGN_BUFFER says it's for use outside functions, but we're inside one. Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also includes the cache alignment. Fixes: b583348ca8c8 ("image: fit: Align hash output buffers") Signed-off-by: Joel Stanley <joel(a)jms.id.au> --- This fixes booting the ast2600-evb image in qemu, which was getting all zeroes for the output of the FIT hash check. The 'static' buffer was in BSS but the output image didn't contain a BSS section. The pointer was left pointing to the text, so the code was trying to write to the (read only?) text area in SPI NOR memory space. tools/mkimage.h | 3 +-- boot/image-fit.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/tools/mkimage.h b/tools/mkimage.h index 7652c8b001c3..f5ca65e2edfd 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -41,8 +41,7 @@ static inline ulong map_to_sysmem(void *ptr) return (ulong)(uintptr_t)ptr; } -#define ARCH_DMA_MINALIGN 1 -#define DEFINE_ALIGN_BUFFER(type, name, size, alugn) type name[size] +#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) type name[size] #define MKIMAGE_TMPFILE_SUFFIX ".tmp" #define MKIMAGE_MAX_TMPFILE_LEN 256 diff --git a/boot/image-fit.c b/boot/image-fit.c index f57d97f55229..df3e5df8836a 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -1264,8 +1264,7 @@ int calculate_hash(const void *data, int data_len, const char *name, static int fit_image_check_hash(const void *fit, int noffset, const void *data, size_t size, char **err_msgp) { - DEFINE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN, - ARCH_DMA_MINALIGN); + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN); int value_len; const char *algo; uint8_t *fit_value; -- 2.35.1

4 3

[PATCH 1/1] cmd: simplify do_adc_single()
by Heinrich Schuchardt 03 Jul '22

03 Jul '22

If argc is not < 3, it must be >= 3. If argc >= 3, argv[2] cannot be NULL. Fixes: 9de612ae4ded ("cmd: adc: Add support for storing ADC result in env variable") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- cmd/adc.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/cmd/adc.c b/cmd/adc.c index 8de9121cad..195efa8661 100644 --- a/cmd/adc.c +++ b/cmd/adc.c @@ -71,7 +71,6 @@ static int do_adc_info(struct cmd_tbl *cmdtp, int flag, int argc, static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - char *varname = NULL; struct udevice *dev; unsigned int data; int ret, uV, val; @@ -79,9 +78,6 @@ static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc, if (argc < 3) return CMD_RET_USAGE; - if (argc >= 3) - varname = argv[2]; - ret = adc_channel_single_shot(argv[1], simple_strtol(argv[2], NULL, 0), &data); if (ret) { @@ -99,8 +95,7 @@ static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc, printf("%u\n", data); } - if (varname) - env_set_ulong(varname, val); + env_set_ulong(argv[2], val); return CMD_RET_SUCCESS; } -- 2.34.1

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[PATCH v3 0/7] Add support for FlexSPI Boot for i.MX8m
by Mamta Shukla 02 Jul '22

02 Jul '22

This series of patch adds support for generating FlexSPI Header file and booting from QSPI on i.MX8m. Changes in v2: -Add check for error in case open() for fspi_fd in imx8mkimage.c fails -Remove extra line in commit message -Remove extra line in imx8mm_evk_fspi_defconfig -New patch in series to add an entry for imx8mm_evk_fspi_defconfig in board/freescale/imx8mm_evk/MAINTAINERS -New patch in series to add instructions to build and boot from QSPI Flash Changes in v3: -Fix Checkpatch ERROR: code indent should use tabs where possible -Fix Checkpatch ERROR for trailing spaces Mamta Shukla (7): tools: mkimage: Add support to generate FlexSPI Header for i.MX8m dts: imx8mm-uboot: Add support to pack FlexSPI Header using binman configs: Add config for enabling FSPI boot option for i.MX8m board: freescale: Add QSPI Boot support in spl for i.MX8m configs: imx8mm: Define CONFIG_SYS_UBOOT_BASE for i.MX8m board: freescale: Add entry for imx8mm_evk_fspi_defconfig doc: board: nxp: Add instructions to boot from QSPI arch/arm/dts/imx8mm-u-boot.dtsi | 20 +++ board/freescale/imx8mm_evk/MAINTAINERS | 1 + .../imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg | 9 ++ board/freescale/imx8mm_evk/spl.c | 2 + configs/imx8mm_evk_fspi_defconfig | 115 ++++++++++++++++++ doc/board/nxp/imx8mm_evk.rst | 37 +++++- include/configs/imx8mm_evk.h | 7 +- include/imximage.h | 38 ++++++ tools/Kconfig | 59 +++++++++ tools/imx8mimage.c | 81 +++++++++++- 10 files changed, 362 insertions(+), 7 deletions(-) create mode 100644 board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg create mode 100644 configs/imx8mm_evk_fspi_defconfig -- 2.25.1

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[PATCH] EFI: Fix ReadBlocks API reading incorrect sector for, UCLASS_PARTITION devices
by Paul Barbieri 02 Jul '22

02 Jul '22

From 7a7dd7f16352fc916279cca05a3fa617f8bbef64 Mon Sep 17 00:00:00 2001 From: Paul Barbieri <plb365(a)gmail.com> Date: Tue, 28 Jun 2022 20:24:33 -0400 Subject: [PATCH] EFI: Fix ReadBlocks API reading incorrect sector for UCLASS_PARTITION devices The requested partition disk sector incorrectly has the partition start sector added in twice for UCLASS_PARTITION devices. The efi_disk_rw_blocks() routine adds the diskobj->offset to the requested lba. When the device is a UCLASS_PARTITION, the dev_read() or dev_write() routine is called which adds part-gpt_part_info.start. This causes I/O to the wrong sector. Takahiro Akashi suggested removing the offset field from the efi_disk_obj structure since disk-uclass.c handles the partition start biasing. Device types other than UCLASS_PARTITION set the diskobj->offset field to zero which makes the field unnecessary. This change removes the offset field from the structure and removes all references from the code which is isolated to the lib/efi_loader/efi_disk.c module. This change also adds a test for the EFI ReadBlocks() API in the EFI selftest code. There is already a test for reading a FAT file. The new test uses ReadBlocks() to read the same "disk" block and compare it to the data read from the file system API. Signed-Off-by: Paul Barbieri <paul.barbieri(a)verizon.net> Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: AKASHI Takahiro <takahiro.akashi(a)linaro.org> --- lib/efi_loader/efi_disk.c | 8 +------- lib/efi_selftest/efi_selftest_block_device.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 7 deletions(-) diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c index 1e82f52dc0..1d700b2a6b 100644 --- a/lib/efi_loader/efi_disk.c +++ b/lib/efi_loader/efi_disk.c @@ -35,7 +35,6 @@ const efi_guid_t efi_system_partition_guid = PARTITION_SYSTEM_GUID; * @dp: device path to the block device * @part: partition * @volume: simple file system protocol of the partition - * @offset: offset into disk for simple partition * @dev: associated DM device */ struct efi_disk_obj { @@ -47,7 +46,6 @@ struct efi_disk_obj { struct efi_device_path *dp; unsigned int part; struct efi_simple_file_system_protocol *volume; - lbaint_t offset; struct udevice *dev; /* TODO: move it to efi_object */ }; @@ -117,7 +115,6 @@ static efi_status_t efi_disk_rw_blocks(struct efi_block_io *this, diskobj = container_of(this, struct efi_disk_obj, ops); blksz = diskobj->media.block_size; blocks = buffer_size / blksz; - lba += diskobj->offset; EFI_PRINT("blocks=%x lba=%llx blksz=%x dir=%d\n", blocks, lba, blksz, direction); @@ -440,13 +437,11 @@ static efi_status_t efi_disk_add_dev( diskobj->dp = efi_dp_append_node(dp_parent, node); efi_free_pool(node); - diskobj->offset = part_info->start; diskobj->media.last_block = part_info->size - 1; if (part_info->bootable & PART_EFI_SYSTEM_PARTITION) guid = &efi_system_partition_guid; } else { diskobj->dp = efi_dp_from_part(desc, part); - diskobj->offset = 0; diskobj->media.last_block = desc->lba - 1; } diskobj->part = part; @@ -501,12 +496,11 @@ static efi_status_t efi_disk_add_dev( *disk = diskobj; EFI_PRINT("BlockIO: part %u, present %d, logical %d, removable %d" - ", offset " LBAF ", last_block %llu\n", + ", last_block %llu\n", diskobj->part, diskobj->media.media_present, diskobj->media.logical_partition, diskobj->media.removable_media, - diskobj->offset, diskobj->media.last_block); /* Store first EFI system partition */ diff --git a/lib/efi_selftest/efi_selftest_block_device.c b/lib/efi_selftest/efi_selftest_block_device.c index 60fa655766..ef6bdafe2e 100644 --- a/lib/efi_selftest/efi_selftest_block_device.c +++ b/lib/efi_selftest/efi_selftest_block_device.c @@ -11,6 +11,7 @@ * ConnectController is used to setup partitions and to install the simple * file protocol. * A known file is read from the file system and verified. + * Test that the read_blocks API correctly reads a block from the device. */ #include <efi_selftest.h> @@ -312,6 +313,7 @@ static int execute(void) char buf[16] __aligned(ARCH_DMA_MINALIGN); u32 part1_size; u64 pos; + char block[512]; /* Connect controller to virtual disk */ ret = boottime->connect_controller(disk_handle, NULL, NULL, 1); @@ -449,6 +451,23 @@ static int execute(void) return EFI_ST_FAILURE; } + /* Test read_blocks() can read same file data. */ + boottime->set_mem(block, block_io_protocol->media->block_size, 0); + ret = block_io_protocol->read_blocks(block_io_protocol, + block_io_protocol->media->media_id, + (0x5000 >> LB_BLOCK_SIZE) - 1, + block_io_protocol->media->block_size, + block); + if (ret != EFI_SUCCESS) { + efi_st_error("ReadBlocks failed\n"); + return EFI_ST_FAILURE; + } + + if (memcmp(&block[1], buf, 11)) { + efi_st_error("Unexpected block content\n"); + return EFI_ST_FAILURE; + } + #ifdef CONFIG_FAT_WRITE /* Write file */ ret = root->open(root, &file, u"u-boot.txt", EFI_FILE_MODE_READ | -- 2.17.1

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