May 2022 - U-Boot

[PATCH] arm: dts: imx8mm-venice-gw700x: add support for GPY111 phy
by Tim Harvey 25 Jul '22

25 Jul '22

The TI DP83867 phy has been replaced with the MaxLinear GPY111 phy due to part availability. Add support for it: - increase post-reset time to 300ms per datasheet - leave tx-delay/rx-delay undefined in dt defaulting to 2.0ns Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi index 767024385156..c15e623f3cb8 100644 --- a/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-venice-gw700x-u-boot.dtsi @@ -8,7 +8,7 @@ &fec1 { phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; - phy-reset-post-delay = <1>; + phy-reset-post-delay = <300>; }; &pinctrl_fec1 { -- 2.17.1

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[PATCH 00/11] board: freescale: p1_p2_rdb_pc: Various cleanups and fixes
by Pali Rohár 23 Jul '22

23 Jul '22

This patch series contains various cleanups and fixes for shared P1*/P2* board code and preparation for introducing support for another P2020 board. Pali Rohár (11): board: freescale: p1_p2_rdb_pc: Do not hang in checkboard() board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations board: freescale: p1_p2_rdb_pc: Fix parsing negated upper 4 bits from boot input data board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM map board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct place board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addr board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address board: freescale: p1_p2_rdb_pc: Define SW macros for lower and upper NOR banks board: freescale: p1_p2_rdb_pc: Move BootROM change source macros to p1_p2_bootrom.h board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 20 ++- board/freescale/p1_p2_rdb_pc/tlb.c | 6 +- include/configs/p1_p2_bootrom.h | 46 +++++++ include/configs/p1_p2_rdb_pc.h | 130 +++++++++++++++----- 4 files changed, 164 insertions(+), 38 deletions(-) create mode 100644 include/configs/p1_p2_bootrom.h -- 2.20.1

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[PATCH] tlv_eeprom: Add missing CRC32 dependency
by Pali Rohár 21 Jul '22

21 Jul '22

tlv_eeprom uses crc32() function, so add dependency into Kconfig. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- cmd/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cmd/Kconfig b/cmd/Kconfig index 69c1814d24af..d513d808aa3d 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -167,6 +167,7 @@ config CMD_REGINFO config CMD_TLV_EEPROM bool "tlv_eeprom" depends on I2C_EEPROM + select CRC32 help Display and program the system EEPROM data block in ONIE Tlvinfo format. TLV stands for Type-Length-Value. @@ -175,6 +176,7 @@ config SPL_CMD_TLV_EEPROM bool "tlv_eeprom for SPL" depends on SPL_I2C_EEPROM select SPL_DRIVERS_MISC + select SPL_CRC32 help Read system EEPROM data block in ONIE Tlvinfo format from SPL. -- 2.20.1

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[PATCH] arch: mvebu: Disable by default unused peripherals in SPL
by Pali Rohár 21 Jul '22

21 Jul '22

SPL on mvebu loads proper U-Boot from custom Marvell kwbimage format and therefore support for other binary formats is not required to be present in SPL. Boot source of proper U-Boot is defined by compile time options and therefore it is not required to enable all possible and unused peripherals in SPL by default. This change decrease size of SPL binaries. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- common/spl/Kconfig | 2 ++ disk/Kconfig | 2 ++ drivers/mmc/Kconfig | 1 + drivers/usb/Kconfig | 1 + 4 files changed, 6 insertions(+) diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 50ff113cab21..0c8df271aa59 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -218,6 +218,7 @@ config SPL_BOOTCOUNT_LIMIT config SPL_RAW_IMAGE_SUPPORT bool "Support SPL loading and booting of RAW images" + default n if ARCH_MVEBU default n if (ARCH_MX6 && (SPL_MMC || SPL_SATA)) default y depends on !TI_SECURE_DEVICE @@ -228,6 +229,7 @@ config SPL_RAW_IMAGE_SUPPORT config SPL_LEGACY_IMAGE_FORMAT bool "Support SPL loading and booting of Legacy images" + default n if ARCH_MVEBU default y if !SPL_LOAD_FIT depends on !TI_SECURE_DEVICE help diff --git a/disk/Kconfig b/disk/Kconfig index 359af3b27e6d..81d8867ed7fc 100644 --- a/disk/Kconfig +++ b/disk/Kconfig @@ -60,6 +60,7 @@ config DOS_PARTITION config SPL_DOS_PARTITION bool "Enable MS Dos partition table for SPL" depends on SPL + default n if ARCH_MVEBU default n if ARCH_SUNXI default y if DOS_PARTITION select SPL_PARTITIONS @@ -130,6 +131,7 @@ config EFI_PARTITION_ENTRIES_OFF config SPL_EFI_PARTITION bool "Enable EFI GPT partition table for SPL" depends on SPL + default n if ARCH_MVEBU default n if ARCH_SUNXI default y if EFI_PARTITION select SPL_PARTITIONS diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index f04cc44e1973..847c0ef0acc7 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -45,6 +45,7 @@ config DM_MMC config SPL_DM_MMC bool "Enable MMC controllers using Driver Model in SPL" depends on SPL_DM && DM_MMC + default n if ARCH_MVEBU && !MVEBU_SPL_BOOT_DEVICE_MMC default y help This enables the MultiMediaCard (MMC) uclass which supports MMC and diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index ab1d061bd0d5..075e9682c435 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -50,6 +50,7 @@ config DM_USB config SPL_DM_USB bool "Enable driver model for USB host most in SPL" depends on SPL_DM && DM_USB + default n if ARCH_MVEBU default y config DM_USB_GADGET -- 2.20.1

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[PATCH 1/2] arm: mvebu: a3720: Set BOOT_TARGET_DEVICES list to enabled peripherals
by Pali Rohár 21 Jul '22

21 Jul '22

This allows to compile U-Boot without some boot option for some A3720 board which does not have that peripheral. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- include/configs/mvebu_armada-37xx.h | 42 ++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index a39db075eae9..2ed6125f5c43 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -40,13 +40,43 @@ #define CONFIG_LBA48 #define CONFIG_SYS_64BIT_LBA +#ifdef CONFIG_MMC +#define BOOT_TARGET_DEVICES_MMC(func, i) func(MMC, mmc, i) +#else +#define BOOT_TARGET_DEVICES_MMC(func, i) +#endif + +#ifdef CONFIG_USB_STORAGE +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + +#ifdef CONFIG_SCSI +#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) +#else +#define BOOT_TARGET_DEVICES_SCSI(func) +#endif + +#if defined(CONFIG_CMD_DHCP) && defined(CONFIG_CMD_PXE) +#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) +#else +#define BOOT_TARGET_DEVICES_PXE(func) +#endif + +#ifdef CONFIG_CMD_DHCP +#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DEVICES_DHCP(func) +#endif + #define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(SCSI, scsi, 0) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) + BOOT_TARGET_DEVICES_MMC(func, 1) \ + BOOT_TARGET_DEVICES_MMC(func, 0) \ + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_SCSI(func) \ + BOOT_TARGET_DEVICES_PXE(func) \ + BOOT_TARGET_DEVICES_DHCP(func) #include <config_distro_bootcmd.h> -- 2.20.1

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[PATCH v5 1/3] arm: mvebu: dts: sync DTS
by Robert Marko 21 Jul '22

21 Jul '22

Update the uDPU DTS to the version that is pending upstream [1][2][3][4]. [1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.… [2] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.… [3] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.… [4] https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.… Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> --- arch/arm/dts/armada-3720-uDPU.dts | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 1f534c0c65..f21a855fc6 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -16,7 +16,7 @@ / { model = "Methode uDPU Board"; - compatible = "methode,udpu", "marvell,armada3720"; + compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710"; chosen { stdout-path = "serial0:115200n8"; @@ -28,35 +28,34 @@ }; leds { - pinctrl-names = "default"; compatible = "gpio-leds"; - power1 { + led-power1 { label = "udpu:green:power"; gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; }; - power2 { + led-power2 { label = "udpu:red:power"; gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; }; - network1 { + led-network1 { label = "udpu:green:network"; gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; }; - network2 { + led-network2 { label = "udpu:red:network"; gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; }; - alarm1 { + led-alarm1 { label = "udpu:green:alarm"; gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; }; - alarm2 { + led-alarm2 { label = "udpu:red:alarm"; gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; }; @@ -99,7 +98,7 @@ pinctrl-names = "default"; pinctrl-0 = <&spi_quad_pins>; - spi-flash@0 { + flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <54000000>; @@ -153,14 +152,12 @@ scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - nct375@48 { - status = "okay"; + temp-sensor@48 { compatible = "ti,tmp75c"; reg = <0x48>; }; - nct375@49 { - status = "okay"; + temp-sensor@49 { compatible = "ti,tmp75c"; reg = <0x49>; }; -- 2.36.1

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[PATCH] arm64: mvebu: handle non-zero base address for RAM
by Chris Packham 21 Jul '22

21 Jul '22

board_get_usable_ram_top() conflated the RAM size with the top address of RAM. On systems where RAM starts at address 0 these numbers are the same so it went unnoticed. Update board_get_usable_ram_top() to take CONFIG_SYS_SDRAM_BASE into account when determining the top address. Signed-off-by: Chris Packham <judge.packham(a)gmail.com> --- I've got a 64-bit mvebu SoC/board that I plan on submitting in a few weeks. One of the gotchas with this board is that the physical address of the RAM starts at 0x2_00000000 (there's some seemingly unmovable I/O occupying the lower addresses). This was one of the earlier issues I hit with porting. I figured it was independent enough that I could send it out while I'm still working on the rest of the series. arch/arm/mach-mvebu/arm64-common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 5357aa554db4..238edbe6ba56 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -28,14 +28,13 @@ DECLARE_GLOBAL_DATA_PTR; * Currently only 2GiB are mapped for system memory. This is what * we pass to the U-Boot subsystem here. */ -#define USABLE_RAM_SIZE 0x80000000 +#define USABLE_RAM_SIZE 0x80000000ULL ulong board_get_usable_ram_top(ulong total_size) { - if (gd->ram_size > USABLE_RAM_SIZE) - return USABLE_RAM_SIZE; + unsigned long top = CONFIG_SYS_SDRAM_BASE + min(gd->ram_size, USABLE_RAM_SIZE); - return gd->ram_size; + return (gd->ram_top > top) ? top : gd->ram_top; } /* -- 2.36.1

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[PATCH] board: turris: Find atsha device by atsha driver
by Pali Rohár 21 Jul '22

21 Jul '22

It does not matter what is DT node name of atsha device. So find it via atsha driver and not by DT node name. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/CZ.NIC/turris_atsha_otp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/board/CZ.NIC/turris_atsha_otp.c b/board/CZ.NIC/turris_atsha_otp.c index 8c39f5e52414..e62b7ee2a49a 100644 --- a/board/CZ.NIC/turris_atsha_otp.c +++ b/board/CZ.NIC/turris_atsha_otp.c @@ -6,6 +6,7 @@ #include <env.h> #include <net.h> +#include <dm/device.h> #include <dm/uclass.h> #include <atsha204a-i2c.h> @@ -16,12 +17,14 @@ #define TURRIS_ATSHA_OTP_MAC0 3 #define TURRIS_ATSHA_OTP_MAC1 4 +extern U_BOOT_DRIVER(atsha204); + static struct udevice *get_atsha204a_dev(void) { /* Cannot be static because BSS does not have to be ready at this early stage */ struct udevice *dev; - if (uclass_get_device_by_name(UCLASS_MISC, "crypto@64", &dev)) { + if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(atsha204), &dev)) { puts("Cannot find ATSHA204A on I2C bus!\n"); dev = NULL; } -- 2.20.1

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[PATCH] i2c: ast_i2c: Remove SCL direct drive mode
by Eddie James 19 Jul '22

19 Jul '22

SCL direct drive mode prevents communication with devices that do clock stretching, so disable. The Linux driver doesn't use this mode, and the engine can handle clock stretching. Signed-off-by: Eddie James <eajames(a)linux.ibm.com> --- drivers/i2c/ast_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index 2d3fecaa14..8b24a260c0 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -76,7 +76,7 @@ static void ast_i2c_init_bus(struct udevice *dev) /* Enable Master Mode. Assuming single-master */ writel(I2CD_MASTER_EN | I2CD_M_SDA_LOCK_EN - | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, + | I2CD_MULTI_MASTER_DIS, &priv->regs->fcr); /* Enable Interrupts */ writel(I2CD_INTR_TX_ACK -- 2.27.0

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[PATCH 0/7] sunxi: F1C100s: enable MMC and SPI in U-Boot proper
by Andre Przywara 18 Jul '22

18 Jul '22

So far the U-Boot proper support for the Allwinner F1C100 family of SoCs was really limited: we could realistically only deal with FEL booting, as there was no storage or network device acessible from U-Boot proper. This series enables the MMC and SPI controller, to be able to actually load something from the device. This is made possible by the updates to the devicetree in Linux, which now describes those devices. The first patch is taken from George's/Yifan's older series, and adds DM_CLK support for the F1C100s. The DM_PINCTRL support was already added with the DM conversion a few weeks back. Patches 2-4 fix the SPI driver clock setup, and add support for the differing SPI clock on the F1C100. Patch 5 updates the devicetree files, freshly synced from linux-next. Patch 6 reverts a hack we introduced back then to fix the reset functionality, with the DT update this is now no longer needed. The final patch adds SPI flash support to the Licheepi Nano defconfig, as these boards mostly ship with SPI flash soldered. Please have a look and test! Cheers, Andre Andre Przywara (6): spi: sunxi: refactor SPI speed/mode programming spi: sunxi: improve SPI clock calculation spi: sunxi: Add support for F1C100s SPI controller sunxi: F1C100s: update DT files from Linux Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality" sunxi: licheepi_nano: enable SPI flash George Hilliard (1): clk: sunxi: implement clock driver for suniv f1c100s arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 31 ++++++ arch/arm/dts/suniv-f1c100s.dtsi | 104 ++++++++++++++++-- configs/licheepi_nano_defconfig | 4 +- drivers/clk/sunxi/Kconfig | 7 ++ drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_f1c100s.c | 74 +++++++++++++ drivers/spi/spi-sunxi.c | 109 +++++++++++-------- 7 files changed, 275 insertions(+), 55 deletions(-) create mode 100644 drivers/clk/sunxi/clk_f1c100s.c -- 2.35.3

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