May 2022 - U-Boot

[PATCH] RockPi4: Add UEFI capsule update support
by Sughosh Ganu 09 Sep '22

09 Sep '22

Add support for updating the idbloader and u-boot images through the UEFI capsule update functionality. Enable the modules required for supporting the functionality. The implementation is for the updatable images placed on a GPT partitioned storage device. With the GPT partition devices, the partition information can be obtained at runtime, and hence the dfu_alt_info variable needed for the updates is being populated at runtime. This requires the partitions containing the idbloader and u-boot images to be created with the PartitionTypeGUID values set to the corresponding image type GUID values defined in the platform's config header(ROCKPI_4{B,C}_IDBLOADER_IMAGE_GUID and ROCKPI_4{B,C}_UBOOT_IMAGE_GUID). Signed-off-by: Sughosh Ganu <sughosh.ganu(a)linaro.org> --- arch/arm/mach-rockchip/Kconfig | 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 190 ++++++++++++++++++++++++- configs/rock-pi-4-rk3399_defconfig | 4 + configs/rock-pi-4c-rk3399_defconfig | 4 + include/configs/rk3399_common.h | 16 +++ 5 files changed, 214 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 18aff5480b..6d13e7b92e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -246,6 +246,7 @@ config ROCKCHIP_RK3399 select DM_PMIC select DM_REGULATOR_FIXED select BOARD_LATE_INIT + imply PARTITION_TYPE_GUID imply PRE_CONSOLE_BUFFER imply ROCKCHIP_COMMON_BOARD imply ROCKCHIP_SDRAM_COMMON diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index abb76585cf..cc976d9471 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -5,11 +5,27 @@ #include <common.h> #include <dm.h> +#include <efi_loader.h> #include <init.h> #include <log.h> +#include <mmc.h> +#include <part.h> +#include <uuid.h> #include <asm/arch-rockchip/periph.h> #include <power/regulator.h> +#define ROCKPI4_UPDATABLE_IMAGES 2 + +#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +struct efi_fw_image fw_images[ROCKPI4_UPDATABLE_IMAGES] = {0}; + +struct efi_capsule_update_info update_info = { + .images = fw_images, +}; + +u8 num_image_type_guids = ARRAY_SIZE(fw_images); +#endif + #ifndef CONFIG_SPL_BUILD int board_early_init_f(void) { @@ -29,4 +45,176 @@ int board_early_init_f(void) out: return 0; } -#endif + +#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION) + +#define DFU_ALT_BUF_LEN SZ_1K + +static bool board_is_rockpi_4b(void) +{ + return CONFIG_IS_ENABLED(TARGET_EVB_RK3399) && + of_machine_is_compatible("radxa,rockpi4b"); +} + +static bool board_is_rockpi_4c(void) +{ + return CONFIG_IS_ENABLED(TARGET_EVB_RK3399) && + of_machine_is_compatible("radxa,rockpi4c"); +} + +static bool updatable_image(struct disk_partition *info) +{ + int i; + bool ret = false; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < ROCKPI4_UPDATABLE_IMAGES; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + ret = true; + break; + } + } + + return ret; +} + +static void set_image_index(struct disk_partition *info, int index) +{ + int i; + efi_guid_t image_type_guid; + + uuid_str_to_bin(info->type_guid, image_type_guid.b, + UUID_STR_FORMAT_GUID); + + for (i = 0; i < ROCKPI4_UPDATABLE_IMAGES; i++) { + if (!guidcmp(&fw_images[i].image_type_id, &image_type_guid)) { + fw_images[i].image_index = index; + break; + } + } +} + +static int get_mmc_desc(struct blk_desc **desc) +{ + int ret; + struct mmc *mmc; + struct udevice *dev; + + /* + * For now the firmware images are assumed to + * be on the SD card + */ + ret = uclass_get_device(UCLASS_MMC, 1, &dev); + if (ret) + return -1; + + mmc = mmc_get_mmc_dev(dev); + if (!mmc) + return -1; + + if (mmc_init(mmc)) + return -1; + + *desc = mmc_get_blk_desc(mmc); + if (!*desc) + return -1; + + return 0; +} + +void set_dfu_alt_info(char *interface, char *devstr) +{ + const char *name; + bool first = true; + int p, len, devnum, ret; + char buf[DFU_ALT_BUF_LEN]; + struct disk_partition info; + struct blk_desc *desc = NULL; + + ret = get_mmc_desc(&desc); + if (ret) + return; + + memset(buf, 0, sizeof(buf)); + name = blk_get_if_type_name(desc->if_type); + devnum = desc->devnum; + len = strlen(buf); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s %d=", name, devnum); + + for (p = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* Add entry to dfu_alt_info only for updatable images */ + if (updatable_image(&info)) { + if (!first) + len += snprintf(buf + len, + DFU_ALT_BUF_LEN - len, ";"); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, + "%s%d_%s part %d %d", + name, devnum, info.name, devnum, p); + first = false; + } + } + + log_debug("dfu_alt_info => %s\n", buf); + env_set("dfu_alt_info", buf); +} + +int rk_board_late_init(void) +{ + int p, i, ret; + struct disk_partition info; + struct blk_desc *desc = NULL; + + if (board_is_rockpi_4b()) { + efi_guid_t idbldr_image_type_guid = + ROCKPI_4B_IDBLOADER_IMAGE_GUID; + efi_guid_t uboot_image_type_guid = ROCKPI_4B_UBOOT_IMAGE_GUID; + + guidcpy(&fw_images[0].image_type_id, &idbldr_image_type_guid); + guidcpy(&fw_images[1].image_type_id, &uboot_image_type_guid); + + fw_images[0].fw_name = u"ROCKPI4B-IDBLOADER"; + fw_images[1].fw_name = u"ROCKPI4B-UBOOT"; + } else if (board_is_rockpi_4c()) { + efi_guid_t idbldr_image_type_guid = + ROCKPI_4C_IDBLOADER_IMAGE_GUID; + efi_guid_t uboot_image_type_guid = ROCKPI_4C_UBOOT_IMAGE_GUID; + + guidcpy(&fw_images[0].image_type_id, &idbldr_image_type_guid); + guidcpy(&fw_images[1].image_type_id, &uboot_image_type_guid); + + fw_images[0].fw_name = u"ROCKPI4C-IDBLOADER"; + fw_images[1].fw_name = u"ROCKPI4C-UBOOT"; + } + + ret = get_mmc_desc(&desc); + if (ret) + return ret; + + for (p = 1, i = 1; p <= MAX_SEARCH_PARTITIONS; p++) { + if (part_get_info(desc, p, &info)) + continue; + + /* + * Since we have a GPT partitioned device, the updatable + * images could be stored in any order. Populate the + * image_index at runtime. + */ + if (updatable_image(&info)) { + set_image_index(&info, i); + i++; + } + } + + return 0; +} +#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ +#endif /* !CONFIG_SPL_BUILD */ diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 80d1e63b59..ca3e217603 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y @@ -31,6 +32,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -76,3 +78,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index bda4b70dbf..4c89e7e918 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y @@ -31,6 +32,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DFU_MMC=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -76,3 +78,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 8e13737666..28b514a4ea 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -38,6 +38,22 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 +#define ROCKPI_4B_IDBLOADER_IMAGE_GUID \ + EFI_GUID(0x02f4d760, 0xcfd5, 0x43bd, 0x8e, 0x2d, \ + 0xa4, 0x2a, 0xcb, 0x33, 0xc6, 0x60) + +#define ROCKPI_4B_UBOOT_IMAGE_GUID \ + EFI_GUID(0x4ce292da, 0x1dd8, 0x428d, 0xa1, 0xc2, \ + 0x77, 0x74, 0x3e, 0xf8, 0xb9, 0x6e) + +#define ROCKPI_4C_IDBLOADER_IMAGE_GUID \ + EFI_GUID(0xfd68510c, 0x12d3, 0x4f0a, 0xb8, 0xd3, \ + 0xd8, 0x79, 0xe1, 0xd3, 0xa5, 0x40) + +#define ROCKPI_4C_UBOOT_IMAGE_GUID \ + EFI_GUID(0xb81fb4ae, 0xe4f3, 0x471b, 0x99, 0xb4, \ + 0x0b, 0x3d, 0xa5, 0x49, 0xce, 0x13) + #ifndef CONFIG_SPL_BUILD #define ENV_MEM_LAYOUT_SETTINGS \ -- 2.25.1

5 8

[PATCH 0/4] mmc: sandbox: Some small fixes
by Sean Anderson 08 Sep '22

08 Sep '22

Various small fixes which were found with valgrind. Sean Anderson (4): mmc: sandbox: Initialize the status register mmc: sandbox: Initialize backing buffer mmc: Import some defines for R1 responses mmc: sandbox: Set the response drivers/mmc/sandbox_mmc.c | 13 +++++++--- include/mmc.h | 52 +++++++++++++++++++++++++++++++++++++-- 2 files changed, 60 insertions(+), 5 deletions(-) -- 2.35.1

3 11

[PATCH 0/3] stm32mp: handle ck_usbo_48m clock provided by USBPHYC
by Patrick Delaunay 07 Sep '22

07 Sep '22

Update the RCC stm32mp1 clock driver to handle the USB_PHY_48 clock provided by USBPHYC and named "ck_usbo_48m". With this series, the clock dependencies for USB PHYC, USBOTG (including USB detection) and USBHOST are correctly managed. See Linux kernel commit "ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151" and "phy: stm32: register usbphyc as clock provider of ck_usbo_48m clock" Patrick Patrick Delaunay (3): phy: stm32-usbphyc: add counter of PLL consumer phy: stm32-usbphyc: usbphyc is a clock provider of ck_usbo_48m clock clk: stm32mp: handle ck_usbo_48m clock provided by USBPHYC drivers/clk/clk_stm32mp1.c | 35 ++++---- drivers/phy/phy-stm32-usbphyc.c | 155 ++++++++++++++++++++++++++------ 2 files changed, 147 insertions(+), 43 deletions(-) -- 2.25.1

5 21

[PATCH v2 0/6] net: fm: Verify Fman microcode
by Sean Anderson 07 Sep '22

07 Sep '22

Surprisingly, Fman microcode does not seem to be verified. This series aims to rectify this by introducing an optional FIT wrapper. This wrapper is made mandatory if FIT_SIGNATURE is enabled. NXP boards do not use this config, so the microcode will remain unverified for them. This is OK, since we do not want to break existing systems. This series depends on [1]. There is no logical dependency, but they modify adjacent #includes, so the past patch will not apply cleanly unless that series is applied. [1] https://lore.kernel.org/u-boot/20220422173032.2259019-1-sean.anderson@seco.… Changes in v2: - Document helpers - Split off Fman microcode verification patches into their own series - Split helper refactoring into a patch adding the helpers and one patch per subsystem. Sean Anderson (6): ARMv8/sec_firmware: Remove SEC_FIRMWARE_FIT_CNF_NAME image: fit: Add some helpers for getting data ARMv8/sec_firmware: Convert to use fit_get_data_conf_prop cmd: fpga: Convert to use fit_get_data_node net: Convert fit verification to use fit_get_data_* net: fm: Add support for FIT firmware arch/arm/cpu/armv8/sec_firmware.c | 52 ++-------------------- boot/image-fit.c | 37 ++++++++++++++++ cmd/fpga.c | 24 +++------- drivers/net/fm/fm.c | 18 ++++++++ drivers/net/fsl-mc/mc.c | 30 ++----------- drivers/net/pfe_eth/pfe_firmware.c | 40 +---------------- include/image.h | 70 ++++++++++++++++++++++++++++++ 7 files changed, 139 insertions(+), 132 deletions(-) -- 2.35.1.1320.gc452695387.dirty

2 13

[PATCH 0/2] powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector
by Pali Rohár 07 Sep '22

07 Sep '22

With this patch series, U-Boot binary u-boot.bin (or u-boot-with-spl.bin when SPL is used) for QorIQ pre-PBL platforms can be directly copied to SD card without need to process binary via external formatting tools. Tested on P2020 based board with SPL booting and also direct U-Boot booting without SPL. Depends on other powerpc mpc85xx patches: http://patchwork.ozlabs.org/project/uboot/list/?series=293592&state=* When using SPL, also following mmc fsl_esdhc_spl patches are required: http://patchwork.ozlabs.org/project/uboot/list/?series=293276&state=* And when using SPL and u-boot-with-spl.bin is stored on non-zero sector then also following patch is required: http://patchwork.ozlabs.org/project/uboot/patch/20220404163311.5853-1-pali@… Pali Rohár (2): powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector board: freescale: p1_p2_rdb_pc: Calculate offsets for eSDHC boot sector arch/powerpc/cpu/mpc85xx/Kconfig | 53 +++++++++++++++ arch/powerpc/cpu/mpc85xx/start.S | 86 +++++++++++++++++++++++++ arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 5 ++ arch/powerpc/cpu/mpc85xx/u-boot.lds | 5 ++ include/configs/p1_p2_rdb_pc.h | 7 +- 5 files changed, 155 insertions(+), 1 deletion(-) -- 2.20.1

4 16

[PATCH 1/3] board: freescale: p1_p2_rdb_pc: Add workaround for board reset reboot loop
by Pali Rohár 06 Sep '22

06 Sep '22

CPLD's system reset register on P1/P2 RDB boards is not autocleared after flipping it. If this register is set to one then CPLD triggers reset of CPU in few ms. This means that trying to reset board via CPLD system reset register cause reboot loop. To prevent this reboot loop, the only workaround is to try to clear CPLD's system reset register as early as possible. U-Boot is already doing it in its board_early_init_f() function, which seems to be enough as register is cleared prior CPLD triggers another reset. But board_early_init_f() is not called from SPL and therefore usage of SPL can cause reboot loop. To prevent reboot loop when using SPL, calls board_early_init_f() function in SPL too. For accessing CPLD memory space it is needed to have CPLD entry in TLB. With this change it is possible to trigger board reset via CPLD's system reset register on P2020 RDB board. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 10 ++++++++++ board/freescale/p1_p2_rdb_pc/spl.c | 6 ++++++ board/freescale/p1_p2_rdb_pc/tlb.c | 2 +- 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 7b168fa091b1..26ea8a525228 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -91,6 +91,16 @@ void board_cpld_init(void) out_8(&cpld_data->status_led, CPLD_STATUS_LED); out_8(&cpld_data->fxo_led, CPLD_FXO_LED); out_8(&cpld_data->fxs_led, CPLD_FXS_LED); + + /* + * CPLD's system reset register on P1/P2 RDB boards is not autocleared + * after flipping it. If this register is set to one then CPLD triggers + * reset of CPU in few ms. + * + * This means that trying to reset board via CPLD system reset register + * cause reboot loop. To prevent this reboot loop, the only workaround + * is to try to clear CPLD's system reset register as early as possible. + */ out_8(&cpld_data->system_rst, CPLD_SYS_RST); } diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 22156f2824ec..def28665960d 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -31,6 +31,12 @@ void board_init_f(ulong bootflag) u32 plat_ratio, bus_clk; ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + /* + * Call board_early_init_f() as early as possible as it workarounds + * reboot loop due to broken CPLD state machine for reset line. + */ + board_early_init_f(); + console_init_f(); /* Set pmuxcr to allow both i2c1 and i2c2 */ diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c index 13f3a1edf68d..2d431d6d0d90 100644 --- a/board/freescale/p1_p2_rdb_pc/tlb.c +++ b/board/freescale/p1_p2_rdb_pc/tlb.c @@ -61,11 +61,11 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_1M, 1), #endif +#endif /* not SPL */ SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_1M, 1), -#endif /* not SPL */ #ifdef CONFIG_SYS_NAND_BASE /* *I*G - NAND */ -- 2.20.1

2 13

[PATCH] common/console.c: use CONFIG_VAL() with PRE_CON_BUF_* variables
by Rasmus Villemoes 01 Sep '22

01 Sep '22

There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if and when that gets implemented, one would almost certainly want to use a different address and/or size for the buffer (e.g., U-Boot proper might specify an address in DRAM and a generous buffer, while SPL would be much more constrained). So a prerequisite for adding SPL_PRE_CONSOLE_BUFFER is to make the code use SPL_-specific values. No functional change. Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- common/console.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/common/console.c b/common/console.c index 92b1c93be1..dc071f1ed6 100644 --- a/common/console.c +++ b/common/console.c @@ -593,13 +593,13 @@ int tstc(void) #define PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL 1 #if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER) -#define CIRC_BUF_IDX(idx) ((idx) % (unsigned long)CONFIG_PRE_CON_BUF_SZ) +#define CIRC_BUF_IDX(idx) ((idx) % (unsigned long)CONFIG_VAL(PRE_CON_BUF_SZ)) static void pre_console_putc(const char c) { char *buffer; - buffer = map_sysmem(CONFIG_PRE_CON_BUF_ADDR, CONFIG_PRE_CON_BUF_SZ); + buffer = map_sysmem(CONFIG_VAL(PRE_CON_BUF_ADDR), CONFIG_VAL(PRE_CON_BUF_SZ)); buffer[CIRC_BUF_IDX(gd->precon_buf_idx++)] = c; @@ -615,15 +615,15 @@ static void pre_console_puts(const char *s) static void print_pre_console_buffer(int flushpoint) { unsigned long in = 0, out = 0; - char buf_out[CONFIG_PRE_CON_BUF_SZ + 1]; + char buf_out[CONFIG_VAL(PRE_CON_BUF_SZ) + 1]; char *buf_in; if (IS_ENABLED(CONFIG_SILENT_CONSOLE) && (gd->flags & GD_FLG_SILENT)) return; - buf_in = map_sysmem(CONFIG_PRE_CON_BUF_ADDR, CONFIG_PRE_CON_BUF_SZ); - if (gd->precon_buf_idx > CONFIG_PRE_CON_BUF_SZ) - in = gd->precon_buf_idx - CONFIG_PRE_CON_BUF_SZ; + buf_in = map_sysmem(CONFIG_VAL(PRE_CON_BUF_ADDR), CONFIG_VAL(PRE_CON_BUF_SZ)); + if (gd->precon_buf_idx > CONFIG_VAL(PRE_CON_BUF_SZ)) + in = gd->precon_buf_idx - CONFIG_VAL(PRE_CON_BUF_SZ); while (in < gd->precon_buf_idx) buf_out[out++] = buf_in[CIRC_BUF_IDX(in++)]; -- 2.31.1

3 5

[PULL] u-boot-riscv/master
by Leo Liang 30 Aug '22

30 Aug '22

Hi Tom, The following changes since commit 7e0edcadb09d55d5319fdc862041fd1b874476f5: Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi (2022-05-24 23:29:00 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-riscv.git for you to fetch changes up to c544b281cd3e549a4fcbf4ba9a05a5d72c9557dd: riscv: qemu: Set kernel_comp_addr_r for compressed kernel (2022-05-26 18:42:34 +0800) CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/12131 ---------------------------------------------------------------- Bin Meng (3): riscv: sifive: unmatched: Adjust for big ramdisk image riscv: sifive: unleashed: Set kernel_comp_addr_r for compressed kernel riscv: qemu: Set kernel_comp_addr_r for compressed kernel Heinrich Schuchardt (1): cmd/sbi: add implementation ID 6 - Coffer Leo Yu-Chi Liang (1): riscv: Clean up asm/io.h Michal Simek (1): riscv: remove CONFIG_ARCH_MAP_SYSMEM from io.h Rick Chen (2): riscv: ae350: Fix OF_BOARD boot failure riscv: ae350: Fix OF_BOARD boot failure arch/riscv/include/asm/io.h | 138 ----------------------------------- board/AndesTech/ax25-ae350/Kconfig | 1 + cmd/riscv/sbi.c | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + doc/board/sifive/unleashed.rst | 2 - include/configs/qemu-riscv.h | 10 ++- include/configs/sifive-unleashed.h | 10 ++- include/configs/sifive-unmatched.h | 10 +-- 11 files changed, 23 insertions(+), 153 deletions(-) Best regards, Leo

3 7

[PATCH 0/3] Conformance Profiles Table support in U-boot
by Jose Marinho 30 Aug '22

30 Aug '22

The Conformance Profiles Table (ECPT) table will be included in the UEFI specification 2.9+. The ECPT table was introduced in UEFI following the code-first path. The acceptance ticket can be viewed at: https://bugzilla.tianocore.org/show_bug.cgi?id=3591 This patch set implements the ECPT table in U-boot. Jose Marinho (3): efi: Create ECPT table efi: ECPT add EBBRv2.0 conformance profile cmd: efi: efidebug print ECPT table cmd/efidebug.c | 45 +++++++++++++++++++ include/efi_api.h | 14 ++++++ include/efi_loader.h | 9 ++++ lib/efi_loader/Kconfig | 12 +++++ lib/efi_loader/Makefile | 1 + lib/efi_loader/efi_conformance.c | 75 ++++++++++++++++++++++++++++++++ lib/efi_loader/efi_setup.c | 6 +++ 7 files changed, 162 insertions(+) create mode 100644 lib/efi_loader/efi_conformance.c -- 2.25.1

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[PATCH 1/2] xyz-modem: Wait infinitely for initial y-modem packet
by Pali Rohár 29 Aug '22

29 Aug '22

Now when command loady can be aborted / cancelled by CTRL+C, change wait timeout for initial packet to infinite. This would allow user to not be hurry when locating file which want to send. Commands loadb and loads already waits infinitely too. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- common/xyzModem.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/common/xyzModem.c b/common/xyzModem.c index ece25acb183b..d6be489a174b 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -449,8 +449,14 @@ xyzModem_stream_open (connection_info_t * info, int *err) return 0; } - while (retries-- > 0) + while (1) { + if (--retries <= 0) + { + retries = xyzModem_MAX_RETRIES; + crc_retries = xyzModem_MAX_RETRIES_WITH_CRC; + xyz.crc_mode = true; + } stat = xyzModem_get_hdr (); if (stat == 0) { -- 2.20.1

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