April 2022 - U-Boot

[PATCH v8 00/15] vpl: Introduce a verifying program loader
by Simon Glass 30 Apr '22

30 Apr '22

U-Boot provides a verified-boot feature based around FIT, but there is no standard way of implementing it for a board. At present the various required pieces must be built up separately, to produce a working implementation. In particular, there is no built-in support for selecting A/B boot or recovery mode. This series introduces VPL, a verified program loader phase for U-Boot. Its purpose is to run the verified-boot process and decide which SPL binary should be run. It is critical that this decision happens before SPL runs, since SPL sets up SDRAM and we need to be able to update the SDRAM-init code in the field. Adding VPL into the boot flow provides a standard place to implement verified boot. This series includes the phase itself, some useful Kconfig options and a sandbox_vpl build for sandbox. No verfied-boot support is provided in this series. Most of the patches in this series are fixes and improvements to docs and various Kconfig conditions for SPL. This series requires the earlier sandbox fix patches[1] to be applied first. A test is included to make sure that VPL runs correctly for sandbox, i.e. that the TPL -> VPL -> SPL -> U-Boot flow works. Future work will add an implementation of verified boot into VPL. [1] https://patchwork.ozlabs.org/project/uboot/list/?series=297248 Changes in v8: - Rename the VPL symbols in spl.c - Support SYSCON and REGMAP too - Update defconfig to account for option changes - Drop reference to old OF_HOSTFILE option - Add new patch to support running vpl tests Changes in v7: - Add a few more options - Rebase to master - Update some options based on settings in master Changes in v6: - Add docs for sandbox_vpl build - Drop TPL_HASH_SUPPORT patch since we only have SPL_HASH now Changes in v5: - Rebase this patch on mainline (for GPIO and MISC Kconfig renames) Changes in v4: - Add new patch to correct bloblist Kconfig dependencies - Add new patch to avoid building avb in SPL - Update spl_phase_prefix() for VPL - Tidy up some of the Makefile rules - Add options for blk, core, misc and tpl also - Add VPL_SIZE_LIMIT - Add a sandbox_vpl build - Update cover letter Changes in v3: - Move VPL Kconfig options to a separate patch - Add full build support for VPL - Add a VPL size check (Kconfig option in next patch) Changes in v2: - Add some more VPL Kconfig options Simon Glass (15): test/py: Add a way to start sandbox without a device tree sandbox: Avoid binman error when run without device tree doc: Convert SPL documentation to ReST doc: Expand SPL docs to explain the phase and config test: Tidy up test building with SPL bloblist: Correct Kconfig dependencies avb: Don't build in SPL Makefile: Simplify devicetree rules for SPL/TPL Makefile: Tidy up the TPL build rules Introduce Verifying Program Loader (VPL) vpl: Add Kconfig options for VPL sandbox: Add a build for VPL vpl: Support running vpl tests vpl: Test that VPL runs correctly through to U-Boot proper CI: Run VPL tests .azure-pipelines.yml | 3 + .gitlab-ci.yml | 6 + Kconfig | 10 ++ Makefile | 28 +++- arch/sandbox/Kconfig | 8 + arch/sandbox/cpu/cpu.c | 27 ++- arch/sandbox/cpu/spl.c | 12 +- arch/sandbox/dts/sandbox.dtsi | 10 +- board/sandbox/MAINTAINERS | 7 + common/Kconfig | 71 +++++++- common/Makefile | 2 +- common/spl/Kconfig | 234 +++++++++++++++++++++++++- common/spl/spl.c | 25 ++- configs/sandbox_vpl_defconfig | 251 ++++++++++++++++++++++++++++ doc/arch/sandbox.rst | 13 ++ doc/develop/index.rst | 1 + doc/{README.SPL => develop/spl.rst} | 75 +++++++-- drivers/Makefile | 2 + drivers/block/Kconfig | 12 ++ drivers/clk/Kconfig | 26 +++ drivers/core/Kconfig | 54 +++++- drivers/core/Makefile | 2 +- drivers/gpio/Kconfig | 11 ++ drivers/i2c/Kconfig | 11 ++ drivers/misc/Kconfig | 28 ++++ drivers/pinctrl/Kconfig | 18 +- drivers/rtc/Kconfig | 9 + drivers/serial/Kconfig | 20 +++ drivers/sysreset/Kconfig | 10 ++ drivers/timer/Kconfig | 10 ++ drivers/tpm/Kconfig | 30 ++++ dts/Kconfig | 17 ++ include/bootstage.h | 2 + include/linux/kconfig.h | 3 + include/spl.h | 22 ++- lib/Kconfig | 62 +++++++ scripts/Kbuild.include | 4 + scripts/Makefile.autoconf | 12 ++ scripts/Makefile.build | 4 + scripts/Makefile.lib | 5 + scripts/Makefile.spl | 37 ++-- test/py/conftest.py | 7 +- test/py/tests/test_help.py | 26 +++ test/py/tests/test_vpl.py | 34 ++++ test/py/u_boot_console_sandbox.py | 22 ++- 45 files changed, 1215 insertions(+), 68 deletions(-) create mode 100644 configs/sandbox_vpl_defconfig rename doc/{README.SPL => develop/spl.rst} (68%) create mode 100644 test/py/tests/test_vpl.py -- 2.36.0.464.gb9c8b46e94-goog

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[PATCH] efi_loader: don't call log with __func__ as parameter
by Heinrich Schuchardt 29 Apr '22

29 Apr '22

The log functions print file name, line number, and function name if selected via the log command or customizing. Don't print the function name twice. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- lib/efi_loader/efi_bootmgr.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 8c04ecbdc8..d1c14f1bbc 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -70,8 +70,8 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t *handle, if (lo.attributes & LOAD_OPTION_ACTIVE) { u32 attributes; - log_debug("%s: trying to load \"%ls\" from %pD\n", - __func__, lo.label, lo.file_path); + log_debug("trying to load \"%ls\" from %pD\n", lo.label, + lo.file_path); ret = EFI_CALL(efi_load_image(true, efi_root, lo.file_path, NULL, 0, handle)); @@ -187,8 +187,7 @@ efi_status_t efi_bootmgr_load(efi_handle_t *handle, void **load_options) num = size / sizeof(uint16_t); for (i = 0; i < num; i++) { - log_debug("%s trying to load Boot%04X\n", __func__, - bootorder[i]); + log_debug("trying to load Boot%04X\n", bootorder[i]); ret = try_load_entry(bootorder[i], handle, load_options); if (ret == EFI_SUCCESS) break; -- 2.34.1

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Error fsl_esdhc: Internal clock never stabilised.
by Pali Rohár 29 Apr '22

29 Apr '22

Hello! U-Boot prints error "fsl_esdhc: Internal clock never stabilised." on P2020 everytime when trying to access SD card. It happens with every tested SD card. Note that both read and write operation with SD card is working fine, U-Boot just prints that noisy error. For example: SD boot... No max bus width provided. Assume 8-bit supported. Second program loader running in sram... fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. Or: => mmc info fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. fsl_esdhc: Internal clock never stabilised. Device: FSL_SDHC Manufacturer ID: 3 OEM: 5344 Name: SA16G Bus Speed: 50000000 Mode: SD High Speed (50MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 14.8 GiB Bus Width: 1-bit Erase Group Size: 512 Bytes I tried to bisect this error and I figured out that U-Boot prints this error since beginning when this error message was added into fsl_esdhc driver. Do you have any idea what is wrong? And how to fix it?

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[PATCH 0/8] Fix misc ASAN reports
by Andrew Scull 29 Apr '22

29 Apr '22

I've been experimenting with ASAN on sandbox and turned up a few issues that are fixed in this series. Basic ASAN was easy to turn on, but integrating with dlmalloc was messier and fairly intrusive. Even when I had it working, there was only a small redzone between allocations which limits the usefulness. I saw another series on the list by Sean Anderson to enable valgrind which was finding a different set of issues, though there was one overlap that Sean is fixing with "[PATCH] IOMUX: Fix access past end of console_devices". With these issues fixed, I was able to run the dm tests without any ASAN issues. There are a couple of leaks reported at the end, but that's for another day. Andrew Scull (8): doc: Correct position of gdb '--args' parameter acpi: Fix buffer overflow in do_acpi_dump() x86: sandbox: Add missing PCI bar to barinfo usb: sandbox: Check for string end in copy_to_unicode() usb: sandbox: Bounds check read from buffer sound: Fix buffer overflow in square wave generation test: Fix pointer overrun in dm_test_devm_regmap() test: dm: devres: Remove use-after-free cmd/acpi.c | 2 +- doc/develop/tests_sandbox.rst | 2 +- drivers/power/acpi_pmc/pmc_emul.c | 1 + drivers/sound/sound.c | 6 ++---- drivers/usb/emul/sandbox_flash.c | 2 ++ drivers/usb/emul/usb-emul-uclass.c | 5 ++--- test/dm/devres.c | 5 +---- test/dm/regmap.c | 9 ++++----- 8 files changed, 14 insertions(+), 18 deletions(-) -- 2.35.1.1094.g7c7d902a7c-goog

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[PATCH] configs: imx8m{m, n}_venice: remove unneeded CONFIG_FEC_MXC_PHYADDR
by Tim Harvey 29 Apr '22

29 Apr '22

The IMX8M based Venice boards all have device-tree fec nodes that use proper dt with a phy-handle pointing to a phy with reg assigned to the proper phy address. There is no need to keep using the CONFIG_FEC_MXC_PHYADDR hack when a proper dt is used - remove it. Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- include/configs/imx8mm_venice.h | 1 - include/configs/imx8mn_venice.h | 1 - 2 files changed, 2 deletions(-) diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 1b26e0280e1c..28417c55b9b6 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -112,7 +112,6 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* FEC */ -#define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC #endif diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index a4826779022a..0379c27f11a5 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -108,7 +108,6 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* FEC */ -#define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC #endif -- 2.17.1

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[PATCH v2] crypto/fsl: fsl_rsa: Fix dcache issue in the driver
by Gaurav Jain 29 Apr '22

29 Apr '22

From: Ye Li <ye.li(a)nxp.com> issue: CAAM fails with key error when perform Modular Exponentiation using PKHA Block in CAAM Fix: add flush and invalidate dcache for keys, signature and output decrypted data processed by CAAM. Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver) Signed-off-by: Ye Li <ye.li(a)nxp.com> Reviewed-by: Gaurav Jain <gaurav.jain(a)nxp.com> Acked-by: Peng Fan <peng.fan(a)nxp.com> --- drivers/crypto/fsl/fsl_rsa.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c index 897ee855ea..38d4d5ddc4 100644 --- a/drivers/crypto/fsl/fsl_rsa.c +++ b/drivers/crypto/fsl/fsl_rsa.c @@ -36,12 +36,21 @@ int fsl_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, inline_cnstr_jobdesc_pkha_rsaexp(desc, &pkin, out, sig_len); + flush_dcache_range((ulong)sig, (ulong)sig + sig_len); + flush_dcache_range((ulong)prop->modulus, (ulong)(prop->modulus) + keylen); + flush_dcache_range((ulong)prop->public_exponent, + (ulong)(prop->public_exponent) + prop->exp_len); + flush_dcache_range((ulong)desc, (ulong)desc + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE)); + flush_dcache_range((ulong)out, (ulong)out + sig_len); + ret = run_descriptor_jr(desc); if (ret) { debug("%s: RSA failed to verify: %d\n", __func__, ret); return -EFAULT; } + invalidate_dcache_range((ulong)out, (ulong)out + sig_len); + return 0; } -- 2.25.1

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[PATCH] imx: drop CONFIG_MXC_UART_BASE
by Peng Fan (OSS) 29 Apr '22

29 Apr '22

From: Peng Fan <peng.fan(a)nxp.com> Since these boards has CONFIG_DM_SERIAL and/or CONFIG_SPL_DM_SERIAL, the legacy macro no need to be defined. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- include/configs/aristainetos2.h | 2 -- include/configs/imx8mm_evk.h | 1 - include/configs/imx8mn_evk.h | 1 - include/configs/imx8mp_evk.h | 1 - include/configs/mx7dsabresd.h | 1 - include/configs/somlabs_visionsom_6ull.h | 1 - include/configs/tbs2910.h | 1 - include/configs/verdin-imx8mm.h | 1 - include/configs/verdin-imx8mp.h | 1 - 9 files changed, 10 deletions(-) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 8ee97f1d4e3..27adae5d6bf 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -14,10 +14,8 @@ #define CONFIG_HOSTNAME "aristainetos2" #if (CONFIG_SYS_BOARD_VERSION == 5) -#define CONFIG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" #elif (CONFIG_SYS_BOARD_VERSION == 6) -#define CONFIG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" #endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 42b78485cfc..7dd66527c3d 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -68,7 +68,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 034132225c6..b20e0a5553d 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -75,7 +75,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index cc8d65cb54e..cbdd490a300 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -80,7 +80,6 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index aaad232f0e4..62e62c6701f 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -12,7 +12,6 @@ #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR #ifdef CONFIG_IMX_BOOTAUX /* Set to QSPI1 A flash at default */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index d4761296c75..e6aad386efe 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -16,7 +16,6 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index b7a94812f35..7af182524a6 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_BOOTMAPSZ 0x10000000 /* Serial console */ -#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */ /* Framebuffer */ #define CONFIG_IMX_HDMI diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index da3dc95f9ee..3d7f5a3380e 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -84,7 +84,6 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* UART */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 7b7407752c1..b166e750c27 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -101,7 +101,6 @@ #define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G) /* UART */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE SZ_2K -- 2.36.0

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Passing the index of booting MMC interface from SPL to u-boot.bin
by Da Shi Cao 29 Apr '22

29 Apr '22

On beaglebone black, which are based on TI AM3358, the booting of U-Boot is split into two phrases, MLO and u-boot.bin/img. There should be a way to pass the index of the booting MMC interface from MLO to u-boot, so that the uboot.env in the FAT file system on the booting card could be read from the booting MMC, rather than by the static configuration "ENV_FAT_DEVICE_AND_PART". A patch has been compiled and the same MLO and u-boot.bin/img pair could be used for both the eMMC and the uSD card for boot. I'd like to know where should I send this patch for review? Thanks, Dashi Cao

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fsl_hash.c: Alignment problem when using caam_hash() for FIT images
by Stefan Roese 29 Apr '22

29 Apr '22

Hi, while working on an LX2160 based board and updating to latest mainline I noticed problems using the HW accelerated hash functions on this platform, when trying to boot a FIT Kernel image. Here the resulting error message: ## Loading kernel from FIT Image at a0000000 ... Using 'conf-freescale_lx2160a.dtb' configuration Trying 'kernel-1' kernel subimage Verifying Hash Integrity ... sha256Error: Address arguments are not aligned CAAM was not setup properly or it is faulty error! Bad hash value for 'hash-1' hash node in 'kernel-1' image node Bad Data Hash ERROR: can't get kernel image! And here the addresses, printed from caam_hash(): caam_hash (171): pbuf=00000000a00000fc pout=00000000fbde6f80 buf_len=5291241 ARCH_DMA_MINALIGN=64 pbuf points to an area in the FIT image itself. So its not easy to change this. In some quick tests I've dropped the alignment check and have not seen any problems yet. The hash is calculated without any problems and seems to be okay. I might be just lucky though, not sure. So my basic question is: Is this alignment really necessary and required for both addresses in this function? If yes, do you have some suggestions on how to handle this? Other than allocating new aligned buffers in caam_hash() and memcpy'ing to those new buffers instead. BTW, this is not a preferred solution for me, as boot-time is crucial for my platform. Thanks, Stefan

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U-Boot and ethernet regression on mx6cuboxi
by Tom Rini 29 Apr '22

29 Apr '22

Hey, So my mx6cuboxi was out of my lab for a bit, and that's how this regression got in mainline. With: 4223fb0ee18d11462c55ac94198fdc2055f2c27c is the first bad commit commit 4223fb0ee18d11462c55ac94198fdc2055f2c27c Author: Tim Harvey <tharvey(a)gateworks.com> Date: Tue Mar 1 12:15:01 2022 -0800 net: fec: prevent undesired de-assertion of phy-reset on request I now see: => dhcp ethernet@2188000 Waiting for PHY auto negotiation to complete......... TIMEOUT ! Could not initialize PHY ethernet@2188000 BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 BOOTP broadcast 5 BOOTP broadcast 6 BOOTP broadcast 7 BOOTP broadcast 8 BOOTP broadcast 9 BOOTP broadcast 10 BOOTP broadcast 11 BOOTP broadcast 12 BOOTP broadcast 13 BOOTP broadcast 14 BOOTP broadcast 15 BOOTP broadcast 16 Any ideas? Thanks! -- Tom

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