March 2022 - U-Boot

[PATCH v3 00/26] binman: rockchip: Migrate from rockchip SPL_FIT_GENERATOR script
by Simon Glass 19 Mar '22

19 Mar '22

At present rockchip 64-bit boards make use of a FIT-generator script written in Python. The script supports splitting an ELF file into several 'loadable' nodes in the FIT. Binman does not current support this feature. This series adds binman support for ELF splitting. This works by adding a new 'fit,operation' property to the FIT subnodes, allowing this new way of generating nodes. Some other fixes and improvements are needed along the way. A new, common binman description is added for 64-bit boards which includes the required u-boot.itb file. The existing script is removed, so that only a few zynq boards are now using a SPL_FIT_GENERATOR script: avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 xilinx_zynqmp_virt Migration of those is hopefully in progress. Note however that tools/k3_fit_atf.sh remains, used by a few boards that enable CONFIG_TI_SECURE_DEVICE so this series is copied there too: am335x_hs_evm am335x_hs_evm_uart am43xx_hs_evm am57xx_hs_evm am57xx_hs_evm_usb am65x_hs_evm_a53 am65x_hs_evm_r5 dra7xx_hs_evm dra7xx_hs_evm_usb j721e_hs_evm_a72 j721e_hs_evm_r5 k2e_hs_evm k2g_hs_evm k2hk_hs_evm k2l_hs_evm Ivan Mikhaylov has sent a patch to help with these, but I need to take a look at the testing side. In any case they should really be using binman for the image generation. Changes in v3: - Fix 'whic' typo - Drop unnecessary variable - Add tests for an empty string/stringlist too - Rename some more things to 'extend' - Fix 'He' typo - Drop the base_node argument and use self._node instead - Rename function to _raise_subnode() so it is clear it is not like Raise() - Fix 'segmnet' typo - Use seq == 0 instead of 'not seq' - Add an offset to the FIT description Changes in v2: - Add new patch to make GetArgs() more flexible - Add new patch to remove remove_defconfig() - Add new patch to use re.fullmatch() to avoid extra check - Add new patch to correct Kconfig help for TPL_BINMAN_SYMBOLS - Add new patch to tidy up implementation of AddStringList() - Add new patch to rename load_segments() and module failure - Add new patch to tweak collect_contents_to_file() and docs - Add patch to rename ExpandToLimit to extend_to_limit - Add patch to rename ExpandEntries to gen_entries - Add new patch to refactor fit to generate output at the end - Add a patch to change how faked blobs are created - Add a patch to make fake blobs zero-sized by default - Add a patch to allow mkimage to use a non-zero fake-blob size - Rewrite this to use the new FIT entry-type implementation - Rename op-tee to tee-os - Rename op-tee to tee-os - Drop use of .itb2 - Drop patches previously applied - Add various suggestions from Alper Nebi Yasak - Add patches to refactor binman's FIT support Simon Glass (26): dtoc: Make GetArgs() more flexible moveconfig: Remove remove_defconfig() moveconfig: Use re.fullmatch() to avoid extra check spl: Correct Kconfig help for TPL_BINMAN_SYMBOLS dtoc: Tidy up implementation of AddStringList() elf: Rename load_segments() and module failure binman: Tweak collect_contents_to_file() and docs binman: Rename ExpandToLimit to extend_to_limit binman: Rename ExpandEntries to gen_entries binman: Refactor fit to generate output at the end binman: Rename tools parameter to btools binman: Change how faked blobs are created binman: Make fake blobs zero-sized by default binman: Allow mkimage to use a non-zero fake-blob size binman: Read the fit entries only once binman: Update fit to move node reading into the ReadNode() method binman: Fix some pylint warnings in fit binman: Add a consistent way to report errors with fit binman: Update fit to use node instead of subnode binman: Keep a separate list of entries for fit binman: Support splitting an ELF file into multiple nodes rockchip: evb-rk3288: Drop raw-image support rockchip: Include binman script in 64-bit boards rockchip: Support building the all output files in binman rockchip: Convert all boards to use binman rockchip: Drop the FIT generator script Makefile | 42 +- arch/arm/dts/px30-u-boot.dtsi | 2 + arch/arm/dts/rk3308-u-boot.dtsi | 2 + arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 2 + arch/arm/dts/rk3328-u-boot.dtsi | 2 + arch/arm/dts/rk3368-u-boot.dtsi | 1 + arch/arm/dts/rk3399-u-boot.dtsi | 5 +- arch/arm/dts/rk3568-u-boot.dtsi | 2 + arch/arm/dts/rockchip-u-boot.dtsi | 85 ++- arch/arm/mach-rockchip/Kconfig | 6 + arch/arm/mach-rockchip/make_fit_atf.py | 240 --------- boot/Kconfig | 3 +- common/spl/Kconfig | 6 +- configs/evb-rk3288_defconfig | 1 + tools/binman/binman.rst | 32 +- tools/binman/control.py | 2 +- tools/binman/elf.py | 6 +- tools/binman/elf_test.py | 18 +- tools/binman/entries.rst | 146 +++++ tools/binman/entry.py | 51 +- tools/binman/etype/_testing.py | 2 +- tools/binman/etype/blob.py | 10 +- tools/binman/etype/blob_ext_list.py | 2 +- tools/binman/etype/blob_phase.py | 2 +- tools/binman/etype/files.py | 2 +- tools/binman/etype/fit.py | 508 ++++++++++++++---- tools/binman/etype/gbb.py | 4 +- tools/binman/etype/intel_ifwi.py | 4 +- tools/binman/etype/mkimage.py | 19 +- tools/binman/etype/section.py | 24 +- tools/binman/etype/vblock.py | 4 +- tools/binman/ftest.py | 208 ++++++- ...88_expand_size.dts => 088_extend_size.dts} | 8 +- ...d_size_bad.dts => 089_extend_size_bad.dts} | 2 +- ..._entry_expand.dts => 121_entry_extend.dts} | 0 ...d_twice.dts => 122_entry_extend_twice.dts} | 0 ...ction.dts => 123_entry_extend_section.dts} | 0 tools/binman/test/224_fit_bad_oper.dts | 2 - tools/binman/test/225_expand_size_bad.dts | 10 + tools/binman/test/226_fit_split_elf.dts | 67 +++ tools/binman/test/227_fit_bad_dir.dts | 9 + tools/binman/test/228_fit_bad_dir_config.dts | 9 + tools/binman/test/229_mkimage_missing.dts | 18 + tools/dtoc/fdt.py | 4 +- tools/dtoc/fdt_util.py | 8 +- tools/dtoc/test/dtoc_test_simple.dts | 2 + tools/dtoc/test_fdt.py | 14 +- tools/moveconfig.py | 16 +- 48 files changed, 1080 insertions(+), 532 deletions(-) delete mode 100755 arch/arm/mach-rockchip/make_fit_atf.py rename tools/binman/test/{088_expand_size.dts => 088_extend_size.dts} (88%) rename tools/binman/test/{089_expand_size_bad.dts => 089_extend_size_bad.dts} (90%) rename tools/binman/test/{121_entry_expand.dts => 121_entry_extend.dts} (100%) rename tools/binman/test/{122_entry_expand_twice.dts => 122_entry_extend_twice.dts} (100%) rename tools/binman/test/{123_entry_expand_section.dts => 123_entry_extend_section.dts} (100%) create mode 100644 tools/binman/test/225_expand_size_bad.dts create mode 100644 tools/binman/test/226_fit_split_elf.dts create mode 100644 tools/binman/test/227_fit_bad_dir.dts create mode 100644 tools/binman/test/228_fit_bad_dir_config.dts create mode 100644 tools/binman/test/229_mkimage_missing.dts -- 2.35.1.616.g0bdcbb4464-goog

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[PATCH] binman: Complete elf test coverage
by Simon Glass 19 Mar '22

19 Mar '22

Add coverage for the new elf functions needed for the event_dump.py script. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- tools/binman/elf.py | 4 ++-- tools/binman/elf_test.py | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/tools/binman/elf.py b/tools/binman/elf.py index 940a476b931..afa05e58fdd 100644 --- a/tools/binman/elf.py +++ b/tools/binman/elf.py @@ -112,7 +112,7 @@ def GetFileOffset(fname, addr): int: Offset of that address in the ELF file, or None if not valid """ if not ELF_TOOLS: - raise ValueError('Python elftools package is not available') + raise ValueError("Python: No module named 'elftools'") with open(fname, 'rb') as fd: elf = ELFFile(fd) return _GetFileOffset(elf, addr) @@ -128,7 +128,7 @@ def GetSymbolFromAddress(fname, addr): str: Symbol name, or None if no symbol at that address """ if not ELF_TOOLS: - raise ValueError('Python elftools package is not available') + raise ValueError("Python: No module named 'elftools'") with open(fname, 'rb') as fd: elf = ELFFile(fd) syms = GetSymbols(fname, None) diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py index 555117d33ac..9d4fb3aa3b3 100644 --- a/tools/binman/elf_test.py +++ b/tools/binman/elf_test.py @@ -284,6 +284,43 @@ class TestElf(unittest.TestCase): elf.read_loadable_segments(tools.get_bytes(100, 100)) self.assertIn('Magic number does not match', str(e.exception)) + def test_get_file_offset(self): + """Test GetFileOffset()""" + fname = self.ElfTestFile('embed_data') + self.assertEqual(0x1000, elf.GetFileOffset(fname, 0)) + + def test_get_file_offset_fail(self): + """Test calling GetFileOffset() without elftools""" + try: + old_val = elf.ELF_TOOLS + elf.ELF_TOOLS = False + fname = self.ElfTestFile('embed_data') + with self.assertRaises(ValueError) as e: + elf.GetFileOffset(fname, 0) + self.assertIn("Python: No module named 'elftools'", + str(e.exception)) + finally: + elf.ELF_TOOLS = old_val + + def test_get_symbol_from_address(self): + """Test GetSymbolFromAddress()""" + fname = self.ElfTestFile('embed_data') + sym = elf.GetSymbolFromAddress(fname, 0x1000) + self.assertEqual('main', sym) + + def test_get_symbol_from_address_fail(self): + """Test calling GetSymbolFromAddress() without elftools""" + try: + old_val = elf.ELF_TOOLS + elf.ELF_TOOLS = False + fname = self.ElfTestFile('embed_data') + with self.assertRaises(ValueError) as e: + elf.GetSymbolFromAddress(fname, 0x1000) + self.assertIn("Python: No module named 'elftools'", + str(e.exception)) + finally: + elf.ELF_TOOLS = old_val + if __name__ == '__main__': unittest.main() -- 2.35.1.894.gb6a874cedc-goog

1 0

atsama5d27 SD card boot question
by Andrew Steinert 18 Mar '22

18 Mar '22

Hi, I am struggling to boot my image from a uSD card my issue I believe is that my uSD is connected to the SDMMC0 port instead of the SDMMC1. How can I save my changes in the output/build/linux4sam_6.2/arch/arm/boot/dts files so that they are included in my next make? Thanks, Andrew Steinert SMT Engineering 920.954.8324 x318 andrews(a)teamsmt.com<mailto:andrews@teamsmt.com> www.teamsmt.com<https://urldefense.com/v3/__http:/www.teamsmt.com/__;!!PhQDkBqkFGE!0ImBt7sD…>

1 0

[PATCH u-boot-net v2 00/14] u-boot-net refactors, fixes, cleanups
by Marek Behún 18 Mar '22

18 Mar '22

From: Marek Behún <marek.behun(a)nic.cz> Hello, this is v2 of https://patchwork.ozlabs.org/project/uboot/list/?series=290889, fixing typo in commit message of patch 2 and adding Reviewed-by tags. Marek Behún (14): net: mdio-uclass: fix type for phy_mode_str and phy_handle_str net: mdio-uclass: use ARRAY_SIZE() net: introduce helpers to get PHY ofnode from MAC net: mdio-uclass: add wrappers for read/write/reset operations treewide: use dm_mdio_read/write/reset() wrappers net: phy: fix parsing wrong property net: introduce helpers to get PHY interface mode from a device/ofnode treewide: Rename PHY_INTERFACE_MODE_COUNT to PHY_INTERFACE_MODE_MAX treewide: Rename PHY_INTERFACE_MODE_NONE to PHY_INTERFACE_MODE_NA phy: Move PHY_INTERFACE_MODE_NA to the beginning of the enum definition net: phy: xilinx: Check interface type in ->config(), not ->probe() net: phy: use ->is_c45 instead of is_10g_interface() bcmgenet, sun8i_emac: Don't connect PHY two times net: phy: don't require PHY interface mode during PHY creation board/CZ.NIC/turris_mox/turris_mox.c | 2 +- board/boundary/nitrogen6x/nitrogen6x.c | 2 +- board/freescale/corenet_ds/eth_hydra.c | 2 +- board/freescale/corenet_ds/eth_superhydra.c | 4 +- board/freescale/t104xrdb/eth.c | 4 +- board/gdsys/a38x/controlcenterdc.c | 7 +- board/gdsys/a38x/ihs_phys.c | 6 +- board/st/stm32f746-disco/stm32f746-disco.c | 13 +-- drivers/core/ofnode.c | 44 ++++++++ drivers/core/read.c | 10 ++ drivers/net/ag7xxx.c | 9 +- drivers/net/altera_tse.c | 17 +-- drivers/net/bcm6348-eth.c | 8 +- drivers/net/bcmgenet.c | 12 +- drivers/net/designware.c | 10 +- drivers/net/dwc_eth_qos.c | 40 +------ drivers/net/ethoc.c | 4 +- drivers/net/fec_mxc.c | 15 +-- drivers/net/fm/b4860.c | 8 +- drivers/net/fm/eth.c | 13 +-- drivers/net/fm/init.c | 8 +- drivers/net/fm/ls1043.c | 6 +- drivers/net/fm/ls1046.c | 8 +- drivers/net/fm/p1023.c | 4 +- drivers/net/fm/p4080.c | 6 +- drivers/net/fm/p5020.c | 6 +- drivers/net/fm/p5040.c | 6 +- drivers/net/fm/t1024.c | 4 +- drivers/net/fm/t1040.c | 4 +- drivers/net/fm/t2080.c | 6 +- drivers/net/fm/t4240.c | 6 +- drivers/net/fsl_enetc.c | 13 +-- drivers/net/ftgmac100.c | 11 +- drivers/net/higmacv300.c | 9 +- drivers/net/ldpaa_eth/ldpaa_eth.c | 28 +---- drivers/net/ldpaa_eth/ldpaa_wriop.c | 10 +- drivers/net/ldpaa_eth/ls1088a.c | 4 +- drivers/net/ldpaa_eth/ls2080a.c | 4 +- drivers/net/ldpaa_eth/lx2160a.c | 4 +- drivers/net/macb.c | 10 +- drivers/net/mdio_mux_sandbox.c | 6 +- drivers/net/mscc_eswitch/jr2_switch.c | 2 +- drivers/net/mscc_eswitch/luton_switch.c | 2 +- drivers/net/mscc_eswitch/ocelot_switch.c | 2 +- drivers/net/mscc_eswitch/serval_switch.c | 2 +- drivers/net/mscc_eswitch/servalt_switch.c | 2 +- drivers/net/mt7620-eth.c | 45 +++----- drivers/net/mtk_eth.c | 8 +- drivers/net/mvgbe.c | 7 +- drivers/net/mvneta.c | 11 +- drivers/net/mvpp2.c | 9 +- drivers/net/pch_gbe.c | 4 +- drivers/net/phy/aquantia.c | 2 +- drivers/net/phy/phy.c | 115 +++++++------------- drivers/net/phy/xilinx_gmii2rgmii.c | 14 +-- drivers/net/pic32_eth.c | 11 +- drivers/net/qe/dm_qe_uec.c | 11 +- drivers/net/ravb.c | 19 +--- drivers/net/sh_eth.c | 19 +--- drivers/net/sni_ave.c | 16 +-- drivers/net/sni_netsec.c | 10 +- drivers/net/sun8i_emac.c | 13 +-- drivers/net/sunxi_emac.c | 5 +- drivers/net/ti/am65-cpsw-nuss.c | 15 +-- drivers/net/ti/cpsw.c | 10 +- drivers/net/ti/keystone_net.c | 24 ++-- drivers/net/tsec.c | 9 +- drivers/net/xilinx_axi_emac.c | 10 +- drivers/net/zynq_gem.c | 9 +- include/_exports.h | 3 +- include/dm/ofnode.h | 27 +++++ include/dm/read.h | 36 ++++++ include/exports.h | 3 +- include/fm_eth.h | 2 +- include/miiphy.h | 31 ++++++ include/phy.h | 32 ++---- include/phy_interface.h | 11 +- include/vsc9953.h | 2 +- net/mdio-mux-uclass.c | 16 +-- net/mdio-uclass.c | 96 ++++++++-------- test/dm/mdio.c | 18 +-- test/dm/mdio_mux.c | 16 +-- 82 files changed, 469 insertions(+), 623 deletions(-) -- 2.34.1

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Fwd: [PATCH] spi: zynq_spi: add chip select decoder support
by Nikita Vasilev 18 Mar '22

18 Mar '22

>From b779cf5353b1544675a3399ee73749906df1bfc3 Mon Sep 17 00:00:00 2001 From: Nikita Vasilev <vasilevnikitad(a)gmail.com> Date: Fri, 18 Mar 2022 12:56:27 +0100 Subject: [PATCH] spi: zynq_spi: add chip select decoder support Since zynq_spi device is compatible with Linux Cadence SPI driver, which supports chip select (CS) decoder, this patch adds the same logic for u-boot Zynq SPI driver. As a reference, I have used Xilinx Linux kernel 93dc4dbd16d (xilinx-v2020.2). The SPI decoder feature has been tested on ZynqMP ARM processor and result has been compared with Linux Cadence SPI driver. Signed-off-by: Nikita Vasilev <vasilevnikitad(a)gmail.com> Cc: Jagan Teki <jteki(a)openedev.com> --- drivers/spi/zynq_spi.c | 33 ++++++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 9 deletions(-) diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index b3e0858eb9..40a43612fb 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -29,6 +29,7 @@ DECLARE_GLOBAL_DATA_PTR; #define ZYNQ_SPI_CR_CPHA_MASK BIT(2) /* Clock phase */ #define ZYNQ_SPI_CR_CPOL_MASK BIT(1) /* Clock polarity */ #define ZYNQ_SPI_CR_MSTREN_MASK BIT(0) /* Mode select */ +#define ZYNQ_SPI_CR_PERI_SEL BIT(9) /* Peripheral select decode */ #define ZYNQ_SPI_IXR_RXNEMPTY_MASK BIT(4) /* RX_FIFO_not_empty */ #define ZYNQ_SPI_IXR_TXOW_MASK BIT(2) /* TX_FIFO_not_full */ #define ZYNQ_SPI_IXR_ALL_MASK GENMASK(6, 0) /* All IXR bits */ @@ -62,6 +63,7 @@ struct zynq_spi_plat { u32 speed_hz; uint deactivate_delay_us; /* Delay to wait after deactivate */ uint activate_delay_us; /* Delay to wait after activate */ + u32 is_decoded_cs; }; /* zynq spi priv */ @@ -87,10 +89,13 @@ static int zynq_spi_of_to_plat(struct udevice *bus) plat->activate_delay_us = fdtdec_get_int(blob, node, "spi-activate-delay", 0); + plat->is_decoded_cs = dev_read_u32_default(bus, "is-decoded-cs", 0); + return 0; } -static void zynq_spi_init_hw(struct zynq_spi_priv *priv) +static void zynq_spi_init_hw(struct zynq_spi_priv *priv, + struct zynq_spi_platdata const *plat) { struct zynq_spi_regs *regs = priv->regs; u32 confr; @@ -114,6 +119,10 @@ static void zynq_spi_init_hw(struct zynq_spi_priv *priv) confr = ZYNQ_SPI_CR_MCS_MASK | ZYNQ_SPI_CR_CS_MASK | ZYNQ_SPI_CR_MSTREN_MASK; confr &= ~ZYNQ_SPI_CR_MSA_MASK; + + if (plat->is_decoded_cs) + confr |= ZYNQ_SPI_CR_PERI_SEL; + writel(confr, &regs->cr); /* Enable SPI */ @@ -150,7 +159,7 @@ static int zynq_spi_probe(struct udevice *bus) } /* init the zynq spi hw */ - zynq_spi_init_hw(priv); + zynq_spi_init_hw(priv, plat); plat->frequency = clock; plat->speed_hz = plat->frequency / 2; @@ -178,13 +187,19 @@ static void spi_cs_activate(struct udevice *dev) clrbits_le32(&regs->cr, ZYNQ_SPI_CR_CS_MASK); cr = readl(&regs->cr); - /* - * CS cal logic: CS[13:10] - * xxx0 - cs0 - * xx01 - cs1 - * x011 - cs2 - */ - cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK; + + if (plat->is_decoded_cs) { + cr |= (priv->cs << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK; + } else { + /* + * CS cal logic: CS[13:10] + * xxx0 - cs0 + * xx01 - cs1 + * x011 - cs2 + */ + cr |= (~(1 << priv->cs) << ZYNQ_SPI_CR_SS_SHIFT) & ZYNQ_SPI_CR_CS_MASK; + } + writel(cr, &regs->cr); if (plat->activate_delay_us) -- 2.32.0

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Fwd: [PATCH] spi: zynq_spi: add chip select decoder support
by Nikita Vasilev 18 Mar '22

18 Mar '22

Since zynq_spi device is compatible with Linux Cadence SPI driver, which supports chip select (CS) decoder, this patch adds the same logic for u-boot Zynq SPI driver. As a reference, I have used Xilinx Linux kernel 93dc4dbd16d (xilinx-v2020.2). The SPI decoder feature has been tested on ZynqMP ARM processor and result has been compared with Linux Cadence SPI driver. Signed-off-by: Nikita Vasilev <vasilevnikitad(a)gmail.com> Cc: Jagan Teki <jteki(a)openedev.com> --- drivers/spi/zynq_spi.c | 33 ++++++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 9 deletions(-) -- Best regards, Nikita Vasilev vasilevnikitad(a)gmail.com M: +31 6 57423319

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How to register a "clk-divider" with a "clk_div_table"
by dhu＠hodcarrier.org 18 Mar '22

18 Mar '22

Dear all, I am tying to port u-boot to new soc, now i am rewrite my clk driver to use "CCF" clk driver. I have find this api: - - - - - - - - - - - struct clk *clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags) - - - - - - - - - - - it seems don't have a agument to pass a divider table(struct clk_div_table), and it calls a "static" function below and pass a "NULL" pointer to argument `table'. (while this function is static, I should not call it in my driver to pass a divider table.) - - - - - - - - - - - static struct clk *_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table) - - - - - - - - - - - I also grep-ed the `clk_register_divider', there only `drivers/clk/ti/clk-k3.c' used it. my question is, what is the proper way to register a divider using ccf in u-boot. many thanks.

2 1

ARM A53 and initial MMU mapping for EL0/1/2/3 ?
by Joakim Tjernlund 18 Mar '22

18 Mar '22

Trying to figure out how I should map the MMU for normal RAM so it acessible from all ELx security states. So far I have this mem_map: /* memory mapped RAM. 32MB */ .virt = 0x60000000UL, .phys = 0x60000000UL, .size = 0x02000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE but starting to doubt that is correct, can someone suggest what to put in the .attrs field? Jocke

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[PATCH 0/2] Add pmic bootcount driver
by Philip Oberfichtner 18 Mar '22

18 Mar '22

This series adds a new bootcount driver. The required register definitions and the actual driver are separated in two patches. Philip Oberfichtner (2): power: pfuze100: Add MEMx register definitions bootcount: Add pmic pfuze100 bootcount driver drivers/bootcount/Kconfig | 7 ++ drivers/bootcount/Makefile | 1 + drivers/bootcount/bootcount_pmic_pfuze100.c | 83 +++++++++++++++++++++ include/power/pfuze100_pmic.h | 5 ++ 4 files changed, 96 insertions(+) create mode 100644 drivers/bootcount/bootcount_pmic_pfuze100.c -- 2.34.1

2 4

[PATCH] imx: Revert "imx: mx6ull: fix REFTOP_VBGADJ setting" and fix comments
by Ye Li 18 Mar '22

18 Mar '22

The change in commit c1af358 (imx: mx6ull: fix REFTOP_VBGADJ setting) is not correct. According to latest i.MX6ULL fuse table, the REFTOP_TRIM[2:0] fuse is defined as below. So the previous codes are correct, only need to fix the comments. Set the REFTOP_VBGADJ field in PMU_MISC0 register based on the REFTOP_TRIM fuse: '000" - set REFTOP_VBGADJ[2:0] to 3'b000 '001" - set REFTOP_VBGADJ[2:0] to 3'b001 '010" - set REFTOP_VBGADJ[2:0] to 3'b010 '011" - set REFTOP_VBGADJ[2:0] to 3'b011 '100" - set REFTOP_VBGADJ[2:0] to 3'b100 '101" - set REFTOP_VBGADJ[2:0] to 3'b101 '110" - set REFTOP_VBGADJ[2:0] to 3'b110 '111" - set REFTOP_VBGADJ[2:0] to 3'b111 Signed-off-by: Ye Li <ye.li(a)nxp.com> --- arch/arm/mach-imx/mx6/soc.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 03d8fd7..bb7dc42 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -394,23 +394,21 @@ static void init_bandgap(void) /* * On i.MX6ULL,we need to set VBGADJ bits according to the * REFTOP_TRIM[3:0] in fuse table - * 000 - set REFTOP_VBGADJ[2:0] to 3b'110, - * 110 - set REFTOP_VBGADJ[2:0] to 3b'000, - * 001 - set REFTOP_VBGADJ[2:0] to 3b'001, - * 010 - set REFTOP_VBGADJ[2:0] to 3b'010, - * 011 - set REFTOP_VBGADJ[2:0] to 3b'011, - * 100 - set REFTOP_VBGADJ[2:0] to 3b'100, - * 101 - set REFTOP_VBGADJ[2:0] to 3b'101, - * 111 - set REFTOP_VBGADJ[2:0] to 3b'111, + * 000 - set REFTOP_VBGADJ[2:0] to 3'b000 + * 001 - set REFTOP_VBGADJ[2:0] to 3'b001 + * 010 - set REFTOP_VBGADJ[2:0] to 3'b010 + * 011 - set REFTOP_VBGADJ[2:0] to 3'b011 + * 100 - set REFTOP_VBGADJ[2:0] to 3'b100 + * 101 - set REFTOP_VBGADJ[2:0] to 3'b101 + * 110 - set REFTOP_VBGADJ[2:0] to 3'b110 + * 111 - set REFTOP_VBGADJ[2:0] to 3'b111 */ if (is_mx6ull()) { - static const u32 map[] = {6, 1, 2, 3, 4, 5, 0, 7}; - val = readl(&fuse->mem0); val >>= OCOTP_MEM0_REFTOP_TRIM_SHIFT; val &= 0x7; - writel(map[val] << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT, + writel(val << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT, &anatop->ana_misc0_set); } } -- 2.7.4

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