March 2022 - U-Boot

[PATCH 1/1] doc: path to u-boot-spl.bin on SiFive Unmatched board
by Heinrich Schuchardt 11 Mar '22

11 Mar '22

u-boot-spl.bin is build in spl/. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt(a)canonical.com> --- doc/board/sifive/unmatched.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/board/sifive/unmatched.rst b/doc/board/sifive/unmatched.rst index 24a889991c..a99442277b 100644 --- a/doc/board/sifive/unmatched.rst +++ b/doc/board/sifive/unmatched.rst @@ -560,7 +560,7 @@ Write U-boot SPL and U-boot to their partitions. .. code-block:: none - dd if=u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync + dd if=spl/u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync dd if=u-boot.itb of=/dev/mtdblock0 bs=4096 seek=261 conv=sync Power off the board. -- 2.34.1

2 1

[PATCH v1 0/9] Add Nuvoton NPCM845 support
by Stanley Chu 11 Mar '22

11 Mar '22

The patch series add basic supoorts for NPCM845, which is Nuvoton's 4th-generation BMC (Baseboard Management Controller). Add drivers to support Clock,Timer,Uart,GPIO, Pinctrl, SPI Flash Access for NPCM8xx SoC. Stanley Chu (9): arm: nuvoton: Add support for Nuvoton NPCM845 BMC clk: nuvoton: Add support for NPCM845 timer: npcm: Add NPCM timer support serial: npcm: Add support for Nuvoton NPCM SoCs gpio: npcm: Add support for Nuvoton NPCM SoCs pinctrl: nuvoton: Add NPCM8xx pinctrl driver spi: npcm-fiu: add NPCM8xx FIU controller driver ARM: dts: Add Nuvoton NPCM845 device tree ARM: configs: Add defconfig for Nuvoton NPCM845 arch/arm/Kconfig | 9 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/nuvoton-common-npcm8xx.dtsi | 598 ++++++ arch/arm/dts/nuvoton-npcm845-evb.dts | 264 +++ arch/arm/dts/nuvoton-npcm845-pincfg.dtsi | 2007 ++++++++++++++++++++ arch/arm/dts/nuvoton-npcm8xx-pinctrl.dtsi | 623 +++++++ arch/arm/include/asm/arch-npcm8xx/clock.h | 164 ++ arch/arm/include/asm/arch-npcm8xx/espi.h | 23 + arch/arm/include/asm/arch-npcm8xx/fiu.h | 61 + arch/arm/include/asm/arch-npcm8xx/gcr.h | 313 ++++ arch/arm/include/asm/arch-npcm8xx/gpio.h | 11 + arch/arm/include/asm/arch-npcm8xx/rst.h | 32 + arch/arm/include/asm/arch-npcm8xx/uart.h | 82 + arch/arm/mach-nuvoton/Kconfig | 24 + arch/arm/mach-nuvoton/Makefile | 1 + arch/arm/mach-nuvoton/npcm8xx/Kconfig | 18 + arch/arm/mach-nuvoton/npcm8xx/Makefile | 1 + arch/arm/mach-nuvoton/npcm8xx/cpu.c | 170 ++ arch/arm/mach-nuvoton/npcm8xx/reset.c | 51 + board/nuvoton/arbel/Kconfig | 18 + board/nuvoton/arbel/MAINTAINERS | 7 + board/nuvoton/arbel/Makefile | 1 + board/nuvoton/arbel/arbel.c | 33 + configs/arbel_evb_defconfig | 77 + drivers/clk/Makefile | 1 + drivers/clk/nuvoton/Makefile | 1 + drivers/clk/nuvoton/clk_npcm8xx.c | 213 +++ drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/npcm_gpio.c | 133 ++ drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/nuvoton/Kconfig | 6 + drivers/pinctrl/nuvoton/Makefile | 1 + drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2042 +++++++++++++++++++++ drivers/serial/Kconfig | 7 + drivers/serial/Makefile | 1 + drivers/serial/serial_npcm.c | 137 ++ drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/npcm_fiu_spi.c | 311 ++++ drivers/timer/Kconfig | 7 + drivers/timer/Makefile | 1 + drivers/timer/npcm_timer.c | 82 + include/configs/arbel.h | 54 + include/dt-bindings/clock/npcm845-clock.h | 17 + 47 files changed, 7622 insertions(+) create mode 100644 arch/arm/dts/nuvoton-common-npcm8xx.dtsi create mode 100644 arch/arm/dts/nuvoton-npcm845-evb.dts create mode 100644 arch/arm/dts/nuvoton-npcm845-pincfg.dtsi create mode 100644 arch/arm/dts/nuvoton-npcm8xx-pinctrl.dtsi create mode 100644 arch/arm/include/asm/arch-npcm8xx/clock.h create mode 100644 arch/arm/include/asm/arch-npcm8xx/espi.h create mode 100644 arch/arm/include/asm/arch-npcm8xx/fiu.h create mode 100644 arch/arm/include/asm/arch-npcm8xx/gcr.h create mode 100644 arch/arm/include/asm/arch-npcm8xx/gpio.h create mode 100644 arch/arm/include/asm/arch-npcm8xx/rst.h create mode 100644 arch/arm/include/asm/arch-npcm8xx/uart.h create mode 100644 arch/arm/mach-nuvoton/Kconfig create mode 100644 arch/arm/mach-nuvoton/Makefile create mode 100644 arch/arm/mach-nuvoton/npcm8xx/Kconfig create mode 100644 arch/arm/mach-nuvoton/npcm8xx/Makefile create mode 100644 arch/arm/mach-nuvoton/npcm8xx/cpu.c create mode 100644 arch/arm/mach-nuvoton/npcm8xx/reset.c create mode 100644 board/nuvoton/arbel/Kconfig create mode 100644 board/nuvoton/arbel/MAINTAINERS create mode 100644 board/nuvoton/arbel/Makefile create mode 100644 board/nuvoton/arbel/arbel.c create mode 100644 configs/arbel_evb_defconfig create mode 100644 drivers/clk/nuvoton/Makefile create mode 100644 drivers/clk/nuvoton/clk_npcm8xx.c create mode 100644 drivers/gpio/npcm_gpio.c create mode 100644 drivers/pinctrl/nuvoton/Kconfig create mode 100644 drivers/pinctrl/nuvoton/Makefile create mode 100644 drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c create mode 100644 drivers/serial/serial_npcm.c create mode 100644 drivers/spi/npcm_fiu_spi.c create mode 100644 drivers/timer/npcm_timer.c create mode 100644 include/configs/arbel.h create mode 100644 include/dt-bindings/clock/npcm845-clock.h -- 2.17.1

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[PATCH 01/15] Convert CONFIG_ARMV7_SECURE_BASE et al to Kconfig
by Tom Rini 11 Mar '22

11 Mar '22

This converts the following to Kconfig: CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/cpu/armv7/Kconfig | 31 ++++++++++++++++++++++++++ configs/Bananapi_M2_Ultra_defconfig | 1 + configs/LicheePi_Zero_defconfig | 1 + configs/bananapi_m2_berry_defconfig | 1 + configs/mx7ulp_evk_defconfig | 1 + configs/mx7ulp_evk_plugin_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/pinecube_defconfig | 1 + include/configs/apalis-tk1.h | 4 ---- include/configs/cei-tk1-som.h | 4 ---- include/configs/jetson-tk1.h | 4 ---- include/configs/ls1021aiot.h | 2 -- include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 2 -- include/configs/mx7_common.h | 2 -- include/configs/mx7ulp_com.h | 2 -- include/configs/stm32mp15_common.h | 6 ----- include/configs/sun6i.h | 7 ------ include/configs/sun7i.h | 7 ------ include/configs/sun8i.h | 10 --------- 24 files changed, 41 insertions(+), 54 deletions(-) diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 2eeef3cba96c..f1e4e26b8f00 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -27,6 +27,37 @@ config ARMV7_BOOT_SEC_DEFAULT This can be overridden at run-time by setting the bootm_boot_mode env. variable to "sec" or "nonsec". +config HAS_ARMV7_SECURE_BASE + bool "Enable support for a ahardware secure memory area" + default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \ + || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || TEGRA124 + +config ARMV7_SECURE_BASE + hex "Base address for secure mode memory" + depends on HAS_ARMV7_SECURE_BASE + default 0xfff00000 if TEGRA124 + default 0x2ffc0000 if ARCH_STM32MP + default 0x2f000000 if ARCH_MX7ULP + default 0x10010000 if ARCH_LS1021A + default 0x00900000 if ARCH_MX7 + default 0x00044000 if MACH_SUN8I + default 0x00020000 if MACH_SUN6I || MACH_SUN7I + +config ARMV7_SECURE_RESERVE_SIZE + hex + depends on TEGRA124 && HAS_ARMV7_SECURE_BASE + default 0x100000 + help + Reserve top 1M for secure RAM + +config ARMV7_SECURE_MAX_SIZE + hex + depends on ARMV7_SECURE_BASE && ARCH_STM32MP || MACH_SUN6I \ + || MACH_SUN7I || MACH_SUN8I + default 0xbc00 if MACH_SUN8I && !MACH_SUN8I_H3 + default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3 + default 0x10000 + config ARMV7_VIRT bool "Enable support for hardware virtualization" if EXPERT depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 8917af3c93ac..a66aef0755ad 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH23" CONFIG_USB2_VBUS_PIN="PH23" +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index b50bae9bbdea..9815348badd1 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -4,4 +4,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set # CONFIG_NETDEVICES is not set diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index 2d65d0fd1989..a35fcdb64e8d 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_R40=y CONFIG_DRAM_CLK=576 CONFIG_MMC0_CD_PIN="PH13" CONFIG_USB1_VBUS_PIN="PH23" +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 4f641471acbc..192e9df2e49b 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_TARGET_MX7ULP_EVK=y +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SYS_LOAD_ADDR=0x60800000 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index 0f8e9e886ed0..a152c6e93a8a 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_TARGET_MX7ULP_EVK=y +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SYS_LOAD_ADDR=0x60800000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 706aacfea008..2dd40019ddac 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 CONFIG_SYS_CLK_FREQ=66666666 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 9cd479877ec8..0518d9932d5e 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 8ca1a60e1116..4fc0b124d86a 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -21,6 +21,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 CONFIG_SYS_CLK_FREQ=66666666 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 5575ee8115fc..433dda2362dd 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index 0c71d5941859..b02998e13008 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -7,6 +7,7 @@ CONFIG_SUNXI_DRAM_DDR3_1333=y CONFIG_DRAM_CLK=504 CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SPL_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 57192649ecc9..da935f77b9a6 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -114,8 +114,4 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -/* Reserve top 1M for secure RAM */ -#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 -#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 2c406d318666..1cc86091022b 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -28,8 +28,4 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -/* Reserve top 1M for secure RAM */ -#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 -#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index a3c385b6e22a..b4c42fd37229 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -26,8 +26,4 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -/* Reserve top 1M for secure RAM */ -#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 -#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 4e5228aa219b..810eee895b80 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index b6501e87b41f..27a074c745bd 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 824078dd27de..374220327835 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index fada8aa61db8..a2e4c80bd9a0 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - #define CONFIG_DEEP_SLEEP #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 2e976df6985f..76c374af2532 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -31,8 +31,6 @@ /* MMC */ -#define CONFIG_ARMV7_SECURE_BASE 0x00900000 - /* * If we have defined the OPTEE ram size and not OPTEE it means that we were * launched by OPTEE, because of that we shall skip all the low level diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 319de9b01429..d3ba1449279a 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -70,7 +70,5 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_ARMV7_SECURE_BASE 0x2F000000 - #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 175d546a158c..6b40cdb01779 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -10,12 +10,6 @@ #include <linux/sizes.h> #include <asm/arch/stm32.h> -#ifdef CONFIG_ARMV7_PSCI -/* PSCI support */ -#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE -#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE -#endif - /* * Configuration of the external SRAM memory used by U-Boot */ diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 1e490daac17d..0b1fedda1081 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -10,13 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * A31 specific configuration - */ - -#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE -#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 803a7514cc06..bc2779fa26f8 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -8,13 +8,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * A20 specific configuration - */ - -#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE -#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 563635636624..106139d0904a 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -14,16 +14,6 @@ #include <asm/arch/cpu.h> -#ifdef SUNXI_SRAM_A2_SIZE -/* - * If the SoC has enough SRAM A2, use that for the secure monitor. - * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes - * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware. - */ -#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024) -#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024) -#endif - /* * Include common sunxi configuration where most the settings are */ -- 2.25.1

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Re: [PATCH v1 1/9] arm: nuvoton: Add support for Nuvoton NPCM845 BMC
by Stanley Chu 11 Mar '22

11 Mar '22

Hi Jesse, Thanks for the comment, this will be addressed in the next patches. -- Stanley On Thu, Dec 16, 2021 at 6:16 AM Jesse Taube <mr.bossman075(a)gmail.com> wrote: > > > > On 12/15/21 13:32, Sean Anderson wrote: > > On 12/14/21 9:57 PM, Stanley Chu wrote: > >> Add basic support for the Nuvoton NPCM845 BMC. > >> > >> Signed-off-by: Stanley Chu <yschu(a)nuvoton.com> > >> --- > >> arch/arm/Kconfig | 9 + > >> arch/arm/Makefile | 1 + > >> arch/arm/include/asm/arch-npcm8xx/clock.h | 164 ++++++++++++ > >> arch/arm/include/asm/arch-npcm8xx/espi.h | 23 ++ > >> arch/arm/include/asm/arch-npcm8xx/gcr.h | 313 ++++++++++++++++++++++ > >> arch/arm/include/asm/arch-npcm8xx/gpio.h | 11 + > >> arch/arm/include/asm/arch-npcm8xx/rst.h | 32 +++ > >> arch/arm/mach-nuvoton/Kconfig | 24 ++ > >> arch/arm/mach-nuvoton/Makefile | 1 + > >> arch/arm/mach-nuvoton/npcm8xx/Kconfig | 18 ++ > >> arch/arm/mach-nuvoton/npcm8xx/Makefile | 1 + > >> arch/arm/mach-nuvoton/npcm8xx/cpu.c | 170 ++++++++++++ > >> arch/arm/mach-nuvoton/npcm8xx/reset.c | 51 ++++ > >> board/nuvoton/arbel/Kconfig | 18 ++ > >> board/nuvoton/arbel/Makefile | 1 + > >> board/nuvoton/arbel/arbel.c | 33 +++ > >> include/configs/arbel.h | 54 ++++ > >> 17 files changed, 924 insertions(+) > Hello World! > > Because I was CC'ed I guess I will keep myself up-to date. > This commit has 17 files changed and almost 1k insertions, > That is a relatively large commit. Would it be better to split > /arch/arm/include/asm > /arch/arm/mach-nuvoton > /board > /include/configs > into different commits. > I ask this because I split them for a patch I'm working on

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Re: [PATCH v1 1/9] arm: nuvoton: Add support for Nuvoton NPCM845 BMC
by Stanley Chu 11 Mar '22

11 Mar '22

Hi Sean, Thanks for the review. It is addressed in the gpio driver patch as below. https://patchwork.ozlabs.org/project/uboot/patch/20220225021450.18690-1-ysc… -- Stanley On Thu, Dec 16, 2021 at 6:30 AM Sean Anderson <seanga2(a)gmail.com> wrote: > > On 12/15/21 5:16 PM, Jesse Taube wrote: > > > > > > On 12/15/21 13:32, Sean Anderson wrote: > >> On 12/14/21 9:57 PM, Stanley Chu wrote: > >>> Add basic support for the Nuvoton NPCM845 BMC. > >>> > >>> Signed-off-by: Stanley Chu <yschu(a)nuvoton.com> > >>> --- > >>> arch/arm/Kconfig | 9 + > >>> arch/arm/Makefile | 1 + > >>> arch/arm/include/asm/arch-npcm8xx/clock.h | 164 ++++++++++++ > >>> arch/arm/include/asm/arch-npcm8xx/espi.h | 23 ++ > >>> arch/arm/include/asm/arch-npcm8xx/gcr.h | 313 ++++++++++++++++++++++ > >>> arch/arm/include/asm/arch-npcm8xx/gpio.h | 11 + > >>> arch/arm/include/asm/arch-npcm8xx/rst.h | 32 +++ > >>> arch/arm/mach-nuvoton/Kconfig | 24 ++ > >>> arch/arm/mach-nuvoton/Makefile | 1 + > >>> arch/arm/mach-nuvoton/npcm8xx/Kconfig | 18 ++ > >>> arch/arm/mach-nuvoton/npcm8xx/Makefile | 1 + > >>> arch/arm/mach-nuvoton/npcm8xx/cpu.c | 170 ++++++++++++ > >>> arch/arm/mach-nuvoton/npcm8xx/reset.c | 51 ++++ > >>> board/nuvoton/arbel/Kconfig | 18 ++ > >>> board/nuvoton/arbel/Makefile | 1 + > >>> board/nuvoton/arbel/arbel.c | 33 +++ > >>> include/configs/arbel.h | 54 ++++ > >>> 17 files changed, 924 insertions(+) > > Hello World! > > > > Because I was CC'ed I guess I will keep myself up-to date. > > This commit has 17 files changed and almost 1k insertions, > > That is a relatively large commit. Would it be better to split > > /arch/arm/include/asm > > /arch/arm/mach-nuvoton > > /board > > /include/configs > > into different commits. > > I ask this because I split them for a patch I'm working on > > Please submit the relevant headers with their drivers. > > For example, arch/arm/include/asm/arch-npcm8xx/gpio.h should go > in "[PATCH v1 5/9] gpio: npcm: Add support for Nuvoton NPCM SoCs" > > --Sean >

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[PATCH] imx8m{m,n}_venice: update env memory layout
by Tim Harvey 10 Mar '22

10 Mar '22

Update distro config env memory layout: - loadaddr=0x48200000 allows for 130MB area for uncompressing (ie FIT images, kernel_comp_addr_r) - fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel - scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt - ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script Signed-off-by: Tim Harvey <tharvey(a)gateworks.com> --- configs/imx8mm_venice_defconfig | 2 +- configs/imx8mn_venice_defconfig | 2 +- include/configs/imx8mm_venice.h | 9 +++++---- include/configs/imx8mn_venice.h | 9 +++++---- 4 files changed, 12 insertions(+), 10 deletions(-) diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index ad4e40d90d65..3ea3527cb0c0 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -21,7 +21,7 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_SYS_LOAD_ADDR=0x48200000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index b195f222dc19..089e03d84649 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -21,7 +21,7 @@ CONFIG_ENV_OFFSET_REDUND=0xff8000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_SYS_LOAD_ADDR=0x48200000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 455a8d0187d8..cbb138229f67 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -29,10 +29,11 @@ #endif #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x44000000\0" \ - "kernel_addr_r=0x42000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "fdt_addr_r=0x50200000\0" \ + "scriptaddr=0x50280000\0" \ + "ramdisk_addr_r=0x50300000\0" \ + "kernel_comp_addr_r=0x40200000\0" /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index e7bfcd70af2c..4c95893be4fc 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -26,10 +26,11 @@ #endif #define MEM_LAYOUT_ENV_SETTINGS \ - "fdt_addr_r=0x44000000\0" \ - "kernel_addr_r=0x42000000\0" \ - "ramdisk_addr_r=0x46400000\0" \ - "scriptaddr=0x46000000\0" + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "fdt_addr_r=0x50200000\0" \ + "scriptaddr=0x50280000\0" \ + "ramdisk_addr_r=0x50300000\0" \ + "kernel_comp_addr_r=0x40200000\0" /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD -- 2.17.1

3 5

[PATCH v6 0/4] add TCB driver for sama5d2
by Clément Léger 10 Mar '22

10 Mar '22

When booting under OP-TEE, the SYSC is secured which means the PIT is also not accessible by non-secure world. The TCB 0 however is always available for non-secure world and thus can be used. This series add a TCB driver and enables it in sama5d2 configs. --- Changes in V6: - Fix node ordering in device tree - Disable CONFIG_PIT_TIMER in sama5d2 configuration file - Fixed mach-at91/armv7/Makefile to allow building with TCB Changes in v5: - Fixed missing include in .dts file for IRQ defines - Add aic interrupt controller node to avoid DTC warnings Changes in v4: - Add missing interrupts property to tcb node Changes in v3: - Remove useless defines - Add printf in case of unsupported timers specified in device-tree - Add "syscon" compatible to tcb node Changes in v2: - Reworked driver to use existing Linux bindings Clément Léger (4): timer: atmel_tcb_timer: add atmel_tcb driver ARM: dts: at91: sama5d2: add AIC node ARM: dts: at91: sama5d2: add TCB node configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER MAINTAINERS | 1 + arch/arm/dts/sama5d2.dtsi | 26 ++++ arch/arm/mach-at91/armv7/Makefile | 2 + configs/sama5d2_icp_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_mmc_defconfig | 2 +- configs/sama5d2_ptc_ek_nandflash_defconfig | 2 +- configs/sama5d2_xplained_emmc_defconfig | 2 +- configs/sama5d2_xplained_mmc_defconfig | 2 +- configs/sama5d2_xplained_qspiflash_defconfig | 2 +- configs/sama5d2_xplained_spiflash_defconfig | 2 +- drivers/timer/Kconfig | 8 + drivers/timer/Makefile | 1 + drivers/timer/atmel_tcb_timer.c | 154 +++++++++++++++++++ 13 files changed, 199 insertions(+), 7 deletions(-) create mode 100644 drivers/timer/atmel_tcb_timer.c -- 2.34.1

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[PATCH 0/2] add and use reset_get_bulk_optional()
by Nikita Yushchenko 10 Mar '22

10 Mar '22

Nikita Yushchenko (2): reset: introduce reset_get_bulk_optional() spi: cadence_qspi: use reset_get_bulk_optional() drivers/reset/reset-uclass.c | 10 ++++++++++ drivers/spi/cadence_qspi.c | 11 ++++++----- include/reset.h | 21 +++++++++++++++++++++ 3 files changed, 37 insertions(+), 5 deletions(-) -- 2.30.2

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drivers: clk: stm32h7: Endless loop of dead in driver probe function
by Johannes (krjdev) Krottmayer 10 Mar '22

10 Mar '22

Hi, Some IMHO fatal issues in the the clock driver for the STM32H7 series driver. Affected driver: drivers/clk/clk_stm32h7.c Affected configs (boards): configs/stm32h750-art-pi_defconfig configs/stm32h743-disco_defconfig configs/stm32h743-eval_defconfig Description: The driver currently requires a external working clock source (HSE). No issues in the circuit are accepted by the current implementation. Also a fixed (defined) frequency of the external clock source. In the probe function stm32_clk_probe() from the driver there will be configure_clocks() called. Here are the issues. As code snippet from configure_clocks(): /* Switch on HSE */ setbits_le32(&regs->cr, RCC_CR_HSEON); while (!(readl(&regs->cr) & RCC_CR_HSERDY)) ; RCC_CR_HSERDY will here never set, when there is no external clock source or an issue in the circuit. -> Endless loop of dead. My possible fixes: At a timeout when reading the register and if the timeout is elapsed, print an error message and return with ETIMEDOUT, so the dm manger can call the hang() function. Johannes K.

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[PATCH v3] wdt: nuvoton: Add support for Nuvoton
by jimliu2 10 Mar '22

10 Mar '22

Add watchdog controller driver for NPCM7xx/npcm8xx Signed-off-by: jimliu2 <JJLIU0(a)nuvoton.com> --- Changes for v2: - coding Style cleanup - change register type from struct npcm_wdt to iomem Changes for v3: - remove common.h drivers/watchdog/Kconfig | 6 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/npcm_wdt.c | 118 ++++++++++++++++++++++++++++++++++++ 3 files changed, 125 insertions(+) create mode 100644 drivers/watchdog/npcm_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index f90f0ca02b..15edcf570f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -196,6 +196,12 @@ config WDT_MTK The watchdog timer is stopped when initialized. It performs full SoC reset. +config WDT_NPCM + bool "Nuvoton watchdog timer support" + depends on WDT && ARCH_NPCM + help + Nuvoton npcm7xx/npcm8xx watchdog. + config WDT_OCTEONTX bool "OcteonTX core watchdog support" depends on WDT && (ARCH_OCTEONTX || ARCH_OCTEONTX2) diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index a35bd559f5..1089cd21f5 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o obj-$(CONFIG_WDT_MTK) += mtk_wdt.o +obj-$(CONFIG_WDT_NPCM) += npcm_wdt.o obj-$(CONFIG_WDT_OCTEONTX) += octeontx_wdt.o obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o obj-$(CONFIG_WDT_SBSA) += sbsa_gwdt.o diff --git a/drivers/watchdog/npcm_wdt.c b/drivers/watchdog/npcm_wdt.c new file mode 100644 index 0000000000..333c06a4e7 --- /dev/null +++ b/drivers/watchdog/npcm_wdt.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 Nuvoton Technology, Inc + */ + +#include <dm.h> +#include <errno.h> +#include <log.h> +#include <wdt.h> +#include <asm/io.h> +#include <linux/delay.h> +#include <linux/err.h> + +#define NPCM_WTCLK (BIT(10) | BIT(11)) /* Clock divider */ +#define NPCM_WTE BIT(7) /* Enable */ +#define NPCM_WTIE BIT(6) /* Enable irq */ +#define NPCM_WTIS (BIT(4) | BIT(5)) /* Interval selection */ +#define NPCM_WTIF BIT(3) /* Interrupt flag*/ +#define NPCM_WTRF BIT(2) /* Reset flag */ +#define NPCM_WTRE BIT(1) /* Reset enable */ +#define NPCM_WTR BIT(0) /* Reset counter */ + +struct npcm_wdt_priv { + void __iomem *regs; +}; + +static int npcm_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) +{ + struct npcm_wdt_priv *priv = dev_get_priv(dev); + u32 time_out, val; + + time_out = (u32)(timeout_ms) / 1000; + if (time_out < 2) + val = 0x800; + else if (time_out < 3) + val = 0x420; + else if (time_out < 6) + val = 0x810; + else if (time_out < 11) + val = 0x430; + else if (time_out < 22) + val = 0x820; + else if (time_out < 44) + val = 0xC00; + else if (time_out < 87) + val = 0x830; + else if (time_out < 173) + val = 0xC10; + else if (time_out < 688) + val = 0xC20; + else + val = 0xC30; + + val |= NPCM_WTRE | NPCM_WTE | NPCM_WTR | NPCM_WTIE; + writel(val, priv->regs); + + return 0; +} + +static int npcm_wdt_stop(struct udevice *dev) +{ + struct npcm_wdt_priv *priv = dev_get_priv(dev); + + writel(0, priv->regs); + + return 0; +} + +static int npcm_wdt_reset(struct udevice *dev) +{ + struct npcm_wdt_priv *priv = dev_get_priv(dev); + + writel(NPCM_WTR | NPCM_WTRE | NPCM_WTE, priv->regs); + udelay(1000); + + return 0; +} + +static int npcm_wdt_of_to_plat(struct udevice *dev) +{ + struct npcm_wdt_priv *priv = dev_get_priv(dev); + + priv->regs = dev_read_addr_ptr(dev); + if (!priv->regs) + return -EINVAL; + + return 0; +} + +static const struct wdt_ops npcm_wdt_ops = { + .start = npcm_wdt_start, + .reset = npcm_wdt_reset, + .stop = npcm_wdt_stop, +}; + +static const struct udevice_id npcm_wdt_ids[] = { + { .compatible = "nuvoton,npcm750-wdt" }, + { .compatible = "nuvoton,npcm845-wdt" }, + { } +}; + +static int npcm_wdt_probe(struct udevice *dev) +{ + debug("%s() wdt%u\n", __func__, dev_seq(dev)); + npcm_wdt_stop(dev); + + return 0; +} + +U_BOOT_DRIVER(npcm_wdt) = { + .name = "npcm_wdt", + .id = UCLASS_WDT, + .of_match = npcm_wdt_ids, + .probe = npcm_wdt_probe, + .priv_auto = sizeof(struct npcm_wdt_priv), + .of_to_plat = npcm_wdt_of_to_plat, + .ops = &npcm_wdt_ops, +}; -- 2.17.1

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