February 2022 - U-Boot

[PATCH] rpi: always set fdt_addr to the correct value
by Marek Szyprowski 12 Apr '22

12 Apr '22

The fdt_addr env have meaning only for the current runtime and it depends on the dtb size or firmware version. If one save the environment to disk and the loads it on the latter boot, the fdt_addr might change, what result in passing incorrect dtb address to the kernel. Fix this by always setting the fdt_addr env. This fixes system operation after saving the env to disk and updating i.e. dtb files or firmware. Signed-off-by: Marek Szyprowski <m.szyprowski(a)samsung.com> --- board/raspberrypi/rpi/rpi.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index bc3cc597adb..6d6d2e69234 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -347,9 +347,6 @@ static void set_fdtfile(void) */ static void set_fdt_addr(void) { - if (env_get("fdt_addr")) - return; - if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC) return; -- 2.17.1

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[PATCH 1/2] ARM: imx: imx8m: Add 933 MHz PLL settings
by Marek Vasut 12 Apr '22

12 Apr '22

Add settings for operating PLL at 933 MHz. This setting is useful in case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 76132defc21..4db55f86081 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -48,6 +48,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) #ifdef CONFIG_SPL_BUILD static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), + PLL_1443X_RATE(933000000U, 311, 4, 1, 0), PLL_1443X_RATE(800000000U, 300, 9, 0, 0), PLL_1443X_RATE(750000000U, 250, 8, 0, 0), PLL_1443X_RATE(650000000U, 325, 3, 2, 0), -- 2.34.1

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[PATCH] pinctrl: nxp: don't automatically select DEVRES
by Angus Ainslie 12 Apr '22

12 Apr '22

If we select DEVRES here then it breaks building an imx8m SPL without DEVRES support. Signed-off-by: Angus Ainslie <angus(a)akkea.ca> --- drivers/pinctrl/nxp/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig index 4fb0916a37..3657e9deb9 100644 --- a/drivers/pinctrl/nxp/Kconfig +++ b/drivers/pinctrl/nxp/Kconfig @@ -92,7 +92,6 @@ config PINCTRL_IMX8 config PINCTRL_IMX8M bool "IMX8M pinctrl driver" depends on ARCH_IMX8M && PINCTRL_FULL - select DEVRES select PINCTRL_IMX help Say Y here to enable the imx8m pinctrl driver -- 2.25.1

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[PATCH 0/2] enable DM_SERIAL on imx8mn-evk and imx8mn-ddr4-evk
by Heiko Thiery 12 Apr '22

12 Apr '22

I was only able to test it on a 8MNANOD3L-EVK board. Please help testing this change on the other 2 eval boards (8MNANOLPD4-EVK, 8MNANOD4-EVK). Heiko Thiery (2): ARM: imx: imx8mn-evk: enable DM_SERIAL ARM: imx: imx8mn-ddr4-evk: enable DM_SERIAL configs/imx8mn_ddr4_evk_defconfig | 2 ++ configs/imx8mn_evk_defconfig | 2 ++ 2 files changed, 4 insertions(+) -- 2.30.2

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[PATCH] ARM: dts: net: dwc_eth_qos: Fix i.MX8MP compatible string
by Marek Vasut 12 Apr '22

12 Apr '22

The correct compatible string for i.MX8MP variant of DWC EQoS MAC is "nxp,imx8mp-dwmac-eqos", use it. Drop the two current users of the current wrong compatible string to avoid breaking them. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/dts/imx8mp-evk-u-boot.dtsi | 1 - arch/arm/dts/imx8mp-verdin-u-boot.dtsi | 1 - drivers/net/dwc_eth_qos.c | 2 +- 3 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index ab849ebaaca..7c3789273da 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -112,7 +112,6 @@ }; &eqos { - compatible = "fsl,imx-eqos"; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; diff --git a/arch/arm/dts/imx8mp-verdin-u-boot.dtsi b/arch/arm/dts/imx8mp-verdin-u-boot.dtsi index a57ad45ed63..26140a79ebe 100644 --- a/arch/arm/dts/imx8mp-verdin-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-verdin-u-boot.dtsi @@ -30,7 +30,6 @@ }; &eqos { - compatible = "fsl,imx-eqos"; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 22dad5b2030..ea0c2cfa5b2 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -2032,7 +2032,7 @@ static const struct udevice_id eqos_ids[] = { #endif #if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX) { - .compatible = "fsl,imx-eqos", + .compatible = "nxp,imx8mp-dwmac-eqos", .data = (ulong)&eqos_imx_config }, #endif -- 2.34.1

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[PATCH] pmic: pca9450: Add PCA9450C compatible string
by Marek Vasut 12 Apr '22

12 Apr '22

Add DT compatible string for PCA9450C PMIC. This is a variant of the PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator, and is software-wise compatible with the PCA9450B. This variant of the PCA9450 is designed for use as companion PMIC for i.MX8MP. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Fabio Estevam <festevam(a)denx.de> Cc: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- drivers/power/pmic/pca9450.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c index a886647f193..2394b196c56 100644 --- a/drivers/power/pmic/pca9450.c +++ b/drivers/power/pmic/pca9450.c @@ -83,6 +83,7 @@ static struct dm_pmic_ops pca9450_ops = { static const struct udevice_id pca9450_ids[] = { { .compatible = "nxp,pca9450a", .data = 0x25, }, { .compatible = "nxp,pca9450b", .data = 0x25, }, + { .compatible = "nxp,pca9450c", .data = 0x25, }, { } }; -- 2.34.1

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[PATCH] imx: imx8mm/imx8mn_beacon: Remove redundant code
by Adam Ford 12 Apr '22

12 Apr '22

The Ethernet controller and PHY use the device tree info to configure themselves, so it's not necessary to manually do it in the board file. This permits the removal of a bunch of headers as well. Signed-off-by: Adam Ford <aford173(a)gmail.com> diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c index c228bbf777..204235a3f8 100644 --- a/board/beacon/imx8mm/imx8mm_beacon.c +++ b/board/beacon/imx8mm/imx8mm_beacon.c @@ -1,52 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Compass Electronics Group, LLC + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks */ -#include <common.h> -#include <miiphy.h> -#include <netdev.h> #include <asm/global_data.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <asm/io.h> - DECLARE_GLOBAL_DATA_PTR; -#if IS_ENABLED(CONFIG_FEC_MXC) -static int setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} -#endif - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; } diff --git a/board/beacon/imx8mn/imx8mn_beacon.c b/board/beacon/imx8mn/imx8mn_beacon.c index 6397dac872..204235a3f8 100644 --- a/board/beacon/imx8mn/imx8mn_beacon.c +++ b/board/beacon/imx8mn/imx8mn_beacon.c @@ -1,52 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2020 Compass Electronics Group, LLC + * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks */ -#include <common.h> -#include <miiphy.h> -#include <netdev.h> - -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> #include <asm/global_data.h> -#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; -#if IS_ENABLED(CONFIG_FEC_MXC) -static int setup_fec(void) -{ - struct iomuxc_gpr_base_regs *gpr = - (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; - - /* Use 125M anatop REF_CLK1 for ENET1, not from external */ - clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); - - return 0; -} - -int board_phy_config(struct phy_device *phydev) -{ - /* enable rgmii rxc skew and phy mode select to RGMII copper */ - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); - - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); - phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); - - if (phydev->drv->config) - phydev->drv->config(phydev); - return 0; -} -#endif - int board_init(void) { - if (IS_ENABLED(CONFIG_FEC_MXC)) - setup_fec(); - return 0; } -- 2.34.1

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[PATCH] include/linux/byteorder: fix cpu_to_be32_array()
by Heinrich Schuchardt 12 Apr '22

12 Apr '22

In cpu_to_be32_array() and be32_to_cpu_array() we should not compare an int counter to a size_t parameter. Correct the type of the counter. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- include/linux/byteorder/generic.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/byteorder/generic.h b/include/linux/byteorder/generic.h index 8fae186d1a..bee0ff6033 100644 --- a/include/linux/byteorder/generic.h +++ b/include/linux/byteorder/generic.h @@ -190,7 +190,7 @@ static inline void be64_add_cpu(__be64 *var, u64 val) static inline void cpu_to_be32_array(__be32 *dst, const u32 *src, size_t len) { - int i; + size_t i; for (i = 0; i < len; i++) dst[i] = cpu_to_be32(src[i]); @@ -198,7 +198,7 @@ static inline void cpu_to_be32_array(__be32 *dst, const u32 *src, size_t len) static inline void be32_to_cpu_array(u32 *dst, const __be32 *src, size_t len) { - int i; + size_t i; for (i = 0; i < len; i++) dst[i] = be32_to_cpu(src[i]); -- 2.31.1

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[PATCH v2] boot: don't enable the non-secure boot commands by default if secure boot enabled
by Rover Mo 12 Apr '22

12 Apr '22

To prevent booting unsigned images, don't enable the non-secure boot commands(booti, bootz .etc) by default if secure boot enabled. Signed-off-by: Rover Mo <myzmzz(a)126.com> Cc: Heinrich Schuchardt <xypron.glpk(a)gmx.de> Cc: Simon Glass <sjg(a)chromium.org> --- Changes for v2: - Don't enable the non-secure boot commands too if !EFI_SECURE_BOOT - Update the help information - Changed commit title cmd/Kconfig | 11 +++++++++-- common/Kconfig.boot | 2 +- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index 5b30b13e43..98c588e638 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -203,15 +203,22 @@ config BOOTM_EFI config CMD_BOOTZ bool "bootz" + default y if !FIT_SIGNATURE && !EFI_SECURE_BOOT help Boot the Linux zImage + The bootz command is used for launching unsigned Linux zImage. + If you want to have secure boot either via signed FIT images or via + signed UEFI images, this option should be disabled. config CMD_BOOTI bool "booti" depends on ARM64 || RISCV - default y + default y if !FIT_SIGNATURE && !EFI_SECURE_BOOT help - Boot an AArch64 Linux Kernel image from memory. + Boot an AArch64/RISC-V Linux Kernel image from memory. + The booti command is used for launching unsigned AArch64 and RISC-V + Linux kernel images. If you want to have secure boot either via signed + FIT images or via signed UEFI images, this option should be disabled. config BOOTM_LINUX bool "Support booting Linux OS images" diff --git a/common/Kconfig.boot b/common/Kconfig.boot index a8d4be23a9..574f35b42e 100644 --- a/common/Kconfig.boot +++ b/common/Kconfig.boot @@ -283,7 +283,7 @@ endif # FIT config LEGACY_IMAGE_FORMAT bool "Enable support for the legacy image format" - default y if !FIT_SIGNATURE + default y if !FIT_SIGNATURE && !EFI_SECURE_BOOT help This option enables the legacy image format. It is enabled by default for backward compatibility, unless FIT_SIGNATURE is -- 2.25.1

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[PATCH v3] gpio: Enable hogging support in SPL
by Eddie James 10 Apr '22

10 Apr '22

Use the CONFIG macros to conditionally build the GPIO hogging support in either the SPL or U-Boot, or both, depending on the configuration. Also call the GPIO hog probe function in the common SPL board initialization as an equivalent to adding it to the U-Boot init sequence functions. Signed-off-by: Eddie James <eajames(a)linux.ibm.com> --- Changes since v2: - change #if to if() in gpio_post_bind Changes since v1: - remove #if guards around gpio include - change #if to if() in spl board_init_r common/spl/spl.c | 4 ++++ drivers/gpio/Kconfig | 10 ++++++++++ drivers/gpio/gpio-uclass.c | 8 ++++---- 3 files changed, 18 insertions(+), 4 deletions(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 884102bdea..36115e674d 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -20,6 +20,7 @@ #include <serial.h> #include <spl.h> #include <asm/global_data.h> +#include <asm/gpio.h> #include <asm/u-boot.h> #include <nand.h> #include <fat.h> @@ -739,6 +740,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2) } } + if (CONFIG_IS_ENABLED(GPIO_HOG)) + gpio_hog_probe_all(); + #if CONFIG_IS_ENABLED(BOARD_INIT) spl_board_init(); #endif diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 305a2dc563..4da2bdc10d 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -57,6 +57,16 @@ config GPIO_HOG is a mechanism providing automatic GPIO request and config- uration as part of the gpio-controller's driver probe function. +config SPL_GPIO_HOG + bool "Enable GPIO hog support in SPL" + depends on SPL_GPIO_SUPPORT + default n + help + Enable gpio hog support in SPL + The GPIO chip may contain GPIO hog definitions. GPIO hogging + is a mechanism providing automatic GPIO request and config- + uration as part of the gpio-controller's driver probe function. + config DM_GPIO_LOOKUP_LABEL bool "Enable searching for gpio labelnames" depends on DM_GPIO diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 125ae53d61..9075c7235d 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -1432,9 +1432,6 @@ void devm_gpiod_put(struct udevice *dev, struct gpio_desc *desc) static int gpio_post_bind(struct udevice *dev) { - struct udevice *child; - ofnode node; - #if defined(CONFIG_NEEDS_MANUAL_RELOC) struct dm_gpio_ops *ops = (struct dm_gpio_ops *)device_get_ops(dev); static int reloc_done; @@ -1465,7 +1462,10 @@ static int gpio_post_bind(struct udevice *dev) } #endif - if (CONFIG_IS_ENABLED(OF_REAL) && IS_ENABLED(CONFIG_GPIO_HOG)) { + if (CONFIG_IS_ENABLED(GPIO_HOG)) { + struct udevice *child; + ofnode node; + dev_for_each_subnode(node, dev) { if (ofnode_read_bool(node, "gpio-hog")) { const char *name = ofnode_get_name(node); -- 2.27.0

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