September 2021 - U-Boot

[PATCH] remoteproc: migrate uclass to livetree
by Patrick Delaunay 06 Oct '21

06 Oct '21

Use dev_ function to read the name and boolean to support a live tree. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- drivers/remoteproc/rproc-uclass.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c index 64c47c1e72..87e1ec7ad7 100644 --- a/drivers/remoteproc/rproc-uclass.c +++ b/drivers/remoteproc/rproc-uclass.c @@ -9,19 +9,15 @@ #define pr_fmt(fmt) "%s: " fmt, __func__ #include <common.h> #include <errno.h> -#include <fdtdec.h> #include <log.h> #include <malloc.h> #include <remoteproc.h> -#include <asm/global_data.h> #include <asm/io.h> #include <dm/device-internal.h> #include <dm.h> #include <dm/uclass.h> #include <dm/uclass-internal.h> -DECLARE_GLOBAL_DATA_PTR; - /** * for_each_remoteproc_device() - iterate through the list of rproc devices * @fn: check function to call per match, if this function returns fail, @@ -121,21 +117,13 @@ static int rproc_pre_probe(struct udevice *dev) if (!dev_get_plat(dev)) { #if CONFIG_IS_ENABLED(OF_CONTROL) - int node = dev_of_offset(dev); - const void *blob = gd->fdt_blob; bool tmp; - if (!blob) { - debug("'%s' no dt?\n", dev->name); - return -EINVAL; - } debug("'%s': using fdt\n", dev->name); - uc_pdata->name = fdt_getprop(blob, node, - "remoteproc-name", NULL); + uc_pdata->name = dev_read_string(dev, "remoteproc-name"); /* Default is internal memory mapped */ uc_pdata->mem_type = RPROC_INTERNAL_MEMORY_MAPPED; - tmp = fdtdec_get_bool(blob, node, - "remoteproc-internal-memory-mapped"); + tmp = dev_read_bool(dev, "remoteproc-internal-memory-mapped"); if (tmp) uc_pdata->mem_type = RPROC_INTERNAL_MEMORY_MAPPED; #else -- 2.25.1

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[PATCH 0/3] gpio: uclass enhancements for DM_GPIO drivers
by Samuel Holland 06 Oct '21

06 Oct '21

This series makes a couple of enhancements to the generic GPIO code that simplified updating some DM_GPIO drivers. Patches 1-2 add bounds checking when looking up GPIOs by name and from the device tree. After this, all functions that fill out a gpio_desc ensure the offset field is in bounds, so each driver doesn't need separate bounds checking in its ops functions. Patch 3 allows the GPIO flag translation code to be shared by drivers that use the same flags, but cannot use gpio_xlate_offs_flags directly. For example, the sunxi GPIO binding has 3 cells because it separates the bank and pin numbers. Samuel Holland (3): gpio: Verify validity of pin offsets when looking up names gpio: Verify validity of pin offsets from device trees gpio: Factor out DT flag translation drivers/gpio/gpio-uclass.c | 55 +++++++++++++++++++++++--------------- include/asm-generic/gpio.h | 8 ++++++ 2 files changed, 42 insertions(+), 21 deletions(-) -- 2.31.1

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[PATCH 0/4] Repeal and replace TZDRAM_ related config options
by Alexandru Gagniuc 06 Oct '21

06 Oct '21

When enabling OPTEE support in the config menu, one is asked for the TZDRAM region and OPTEE load address. It would seem that these are very important values, not just some half-assed bollocks. There are currently three sources of information regarding OPTEE and its associated DRAM region: 1) Devicetree "/reserved-memory" nodes 2) uImage and FIT load-address and entry-point 3) The CONFIG_s currently under scrutiny (1) and (2) are sufficient to identify and reject OP-TEE images which fall outside TZDRAM. Such a check might make sense in the context of not bricking a device. But if an incompatible image was already installed, the device is likely soft-bricked anyway and needs manual intervention. This series doesn't implement such a check. It is possible for (1) and (3) to be in conflict. Because the values in (3) default to 0x0, it is very likely to happen. Such a situation causes the "bootm" command to reject otherwise valid OP-TEE images. Thus a perfectly tuned u-boot which doesn't also set (3) will be non-functional with respect to OP-TEE images. This becomes confusing, and has caused yours truly a disproportionate amount of grief. Fortunately, SPL can also load OP-TEE images, and does not even look at the values in (3). It only uses (1) and (2) to determine the appropriate values for firing up OP-TEE. It is more reliable and easy to use than "bootm". We are able to remove these configs without breaking anything. This also resolves the problems with "bootm" mentioned earlier. I hypothesize that one could re-add the removed checks from optee_verify_image() by deriving TZDRAM information from (1) instead of (3). I chose not to implement it because I don't see the value. Alexandru Gagniuc (4): lib: optee: Avoid CONFIG_TZDRAM_* in optee_verify_bootm_image() lib: optee: Remove CONFIG_OPTEE_TZDRAM_BASE lib: optee: Remove CONFIG_OPTEE_LOAD_ADDR arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee arch/arm/mach-imx/mx7/Kconfig | 8 ++++++++ configs/warp7_bl33_defconfig | 1 - configs/warp7_defconfig | 2 -- include/configs/warp7.h | 5 ----- include/tee/optee.h | 14 -------------- lib/optee/Kconfig | 23 ----------------------- lib/optee/optee.c | 21 ++++++--------------- 7 files changed, 14 insertions(+), 60 deletions(-) -- 2.31.1

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[PATCH 1/2] lib: optee: remove the duplicate CONFIG_OPTEE
by Patrick Delaunay 06 Oct '21

06 Oct '21

The configuration CONFIG_OPTEE is defined 2 times: 1- in lib/optee/Kconfig for support of OPTEE images loaded by bootm command 2- in drivers/tee/optee/Kconfig for support of OP-TEE driver. It is abnormal to have the same CONFIG define for 2 purpose; and it is difficult to managed correctly their dependencies. Moreover CONFIG_SPL_OPTEE is defined in common/spl/Kconfig to manage OPTEE image load in SPL. This definition causes an issue with the macro CONFIG_IS_ENABLED(OPTEE) to test the availability of the OP-TEE driver. This patch cleans the configuration dependency with: - CONFIG_OPTEE_IMAGE (renamed) => support of OP-TEE image in U-Boot - CONFIG_SPL_OPTEE_IMAGE (renamed) => support of OP-TEE image in SPL - CONFIG_OPTEE (same) => support of OP-TEE driver in U-Boot - CONFIG_OPTEE_LIB (new) => support of OP-TEE library After this patch, the macro have the correct behavior: - CONFIG_IS_ENABLED(OPTEE_IMAGE) => Load of OP-TEE image is supported - CONFIG_IS_ENABLED(OPTEE) => OP-TEE driver is supported Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- arch/arm/mach-rockchip/sdram.c | 2 +- common/spl/Kconfig | 6 +++--- common/spl/Makefile | 2 +- common/spl/spl.c | 2 +- configs/evb-rk3229_defconfig | 2 +- configs/evb-rk3288_defconfig | 2 +- configs/odroid-go2_defconfig | 2 +- include/configs/mx7_common.h | 2 +- include/tee/optee.h | 6 +++--- lib/Makefile | 2 +- lib/optee/Kconfig | 24 ++++++++++++++---------- lib/optee/Makefile | 2 +- lib/optee/optee.c | 2 ++ 13 files changed, 31 insertions(+), 25 deletions(-) diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 28c379ef07..705ec7ba64 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -45,7 +45,7 @@ int dram_init_banksize(void) gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; #else -#ifdef CONFIG_SPL_OPTEE +#ifdef CONFIG_SPL_OPTEE_IMAGE struct tos_parameter_t *tos_parameter; tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE + diff --git a/common/spl/Kconfig b/common/spl/Kconfig index c155a3b5fc..cbf32badd3 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1333,11 +1333,11 @@ config SPL_AM33XX_ENABLE_RTC32K_OSC Enable access to the AM33xx RTC and select the external 32kHz clock source. -config SPL_OPTEE - bool "Support OP-TEE Trusted OS" +config SPL_OPTEE_IMAGE + bool "Support OP-TEE Trusted OS image in SPL" depends on ARM help - OP-TEE is an open source Trusted OS which is loaded by SPL. + OP-TEE is an open source Trusted OS which is loaded by SPL. More detail at: https://github.com/OP-TEE/optee_os config SPL_OPENSBI diff --git a/common/spl/Makefile b/common/spl/Makefile index c576a78126..b20f6fbe1a 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -22,7 +22,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o -obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o +obj-$(CONFIG_$(SPL_TPL_)OPTEE_IMAGE) += spl_optee.o obj-$(CONFIG_$(SPL_TPL_)OPENSBI) += spl_opensbi.o obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o diff --git a/common/spl/spl.c b/common/spl/spl.c index d55d3c2848..4439cde1ee 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -773,7 +773,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_invoke_atf(&spl_image); break; #endif -#if CONFIG_IS_ENABLED(OPTEE) +#if CONFIG_IS_ENABLED(OPTEE_IMAGE) case IH_OS_TEE: debug("Jumping to U-Boot via OP-TEE\n"); spl_board_prepare_for_optee(spl_image.fdt_addr); diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 02e19fa10c..f83041c768 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -24,7 +24,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_SPL_OPTEE=y +CONFIG_SPL_OPTEE_IMAGE=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB_MASS_STORAGE=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 658ddc9750..c4990a3070 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -22,7 +22,7 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -CONFIG_SPL_OPTEE=y +CONFIG_SPL_OPTEE_IMAGE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index aafec84f10..551f95f4f9 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -95,7 +95,7 @@ CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_SOUND=y CONFIG_SYSRESET=y -CONFIG_OPTEE=y +CONFIG_OPTEE_LIB=y CONFIG_DM_THERMAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 3d87690382..629b2c7c52 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -50,7 +50,7 @@ * initialization since it was already done by ATF or OPTEE */ #if (CONFIG_OPTEE_TZDRAM_SIZE != 0) -#ifndef CONFIG_OPTEE +#ifndef CONFIG_OPTEE_IMAGE #define CONFIG_SKIP_LOWLEVEL_INIT #endif #endif diff --git a/include/tee/optee.h b/include/tee/optee.h index ebdfe5e98d..2928597b61 100644 --- a/include/tee/optee.h +++ b/include/tee/optee.h @@ -43,7 +43,7 @@ optee_image_get_load_addr(const struct image_header *hdr) return optee_image_get_entry_point(hdr) - sizeof(struct optee_header); } -#if defined(CONFIG_OPTEE) +#if defined(CONFIG_OPTEE_IMAGE) int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start, unsigned long tzdram_len, unsigned long image_len); #else @@ -57,7 +57,7 @@ static inline int optee_verify_image(struct optee_header *hdr, #endif -#if defined(CONFIG_OPTEE) +#if defined(CONFIG_OPTEE_IMAGE) int optee_verify_bootm_image(unsigned long image_addr, unsigned long image_load_addr, unsigned long image_len); @@ -70,7 +70,7 @@ static inline int optee_verify_bootm_image(unsigned long image_addr, } #endif -#if defined(CONFIG_OPTEE) && defined(CONFIG_OF_LIBFDT) +#if defined(CONFIG_OPTEE_LIB) && defined(CONFIG_OF_LIBFDT) int optee_copy_fdt_nodes(void *new_blob); #else static inline int optee_copy_fdt_nodes(void *new_blob) diff --git a/lib/Makefile b/lib/Makefile index 8ba745faa0..47c5ac19cb 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_FIT) += libfdt/ obj-$(CONFIG_OF_LIVE) += of_live.o obj-$(CONFIG_CMD_DHRYSTONE) += dhry/ obj-$(CONFIG_ARCH_AT91) += at91/ -obj-$(CONFIG_OPTEE) += optee/ +obj-$(CONFIG_OPTEE_LIB) += optee/ obj-$(CONFIG_ASN1_DECODER) += asn1_decoder.o obj-y += crypto/ diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig index c398f9b953..e2a0541537 100644 --- a/lib/optee/Kconfig +++ b/lib/optee/Kconfig @@ -1,23 +1,27 @@ -config OPTEE +config OPTEE_LIB + bool "Support OPTEE library" + default y if OPTEE || OPTEE_IMAGE + help + Selecting this option will enable the shared OPTEE library code. + +config OPTEE_IMAGE bool "Support OPTEE images" help - U-Boot can be configured to boot OPTEE images. - Selecting this option will enable shared OPTEE library code and - enable an OPTEE specific bootm command that will perform additional - OPTEE specific checks before booting an OPTEE image created with - mkimage. + Selecting this option to boot OPTEE images. + This option enable the OPTEE specific checks done before booting + an OPTEE image created with mkimage config OPTEE_LOAD_ADDR hex "OPTEE load address" default 0x00000000 - depends on OPTEE + depends on OPTEE_LIB help The load address of the bootable OPTEE binary. config OPTEE_TZDRAM_SIZE hex "Amount of Trust-Zone RAM for the OPTEE image" default 0x0000000 - depends on OPTEE + depends on OPTEE_LIB help The size of pre-allocated Trust Zone DRAM to allocate for the OPTEE runtime. @@ -25,7 +29,7 @@ config OPTEE_TZDRAM_SIZE config OPTEE_TZDRAM_BASE hex "Base address of Trust-Zone RAM for the OPTEE image" default 0x00000000 - depends on OPTEE + depends on OPTEE_LIB help The base address of pre-allocated Trust Zone DRAM for the OPTEE runtime. @@ -33,7 +37,7 @@ config OPTEE_TZDRAM_BASE config BOOTM_OPTEE bool "Support OPTEE bootm command" select BOOTM_LINUX - depends on OPTEE + select OPTEE_IMAGE default n help Select this command to enable chain-loading of a Linux kernel diff --git a/lib/optee/Makefile b/lib/optee/Makefile index b692311864..9befe606d8 100644 --- a/lib/optee/Makefile +++ b/lib/optee/Makefile @@ -2,4 +2,4 @@ # # (C) Copyright 2017 Linaro -obj-$(CONFIG_OPTEE) += optee.o +obj-y += optee.o diff --git a/lib/optee/optee.c b/lib/optee/optee.c index 672690dc53..5676785cb5 100644 --- a/lib/optee/optee.c +++ b/lib/optee/optee.c @@ -20,6 +20,7 @@ "\n\theader lo=0x%08x hi=0x%08x size=0x%08lx arch=0x%08x" \ "\n\tuimage params 0x%08lx-0x%08lx\n" +#if defined(CONFIG_OPTEE_IMAGE) int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start, unsigned long tzdram_len, unsigned long image_len) { @@ -70,6 +71,7 @@ error: return ret; } +#endif #if defined(CONFIG_OF_LIBFDT) static int optee_copy_firmware_node(ofnode node, void *fdt_blob) -- 2.25.1

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[PATCH 0/6] Add support for SDM845 based boards, and SM-G9600
by dsankouski＠gmail.com 05 Oct '21

05 Oct '21

From: Dzmitry Sankouski <dsankouski(a)gmail.com> Snapdragon 845 - hi-end qualcomm chip, introduced in late 2017. Mostly used in flagship phones and tablets of 2018. Features: - arm64 arch - total of 8 Kryo 385 Gold / Silver cores - Hexagon 685 DSP - Adreno 630 GPU Tested only as second-stage bootloader. Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone, for China \ Hong Kong markets. Has unlockable bootloader, unlike SM-G960U (American market version), which allows running u-boot as a chain-loaded bootloader. Dzmitry Sankouski (6): serial: qcom: add support for GENI serial driver spmi: msm: add arbiter version 5 support pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoC clocks: qcom: add clocks for SDM845 debug uart SoC: qcom: add support for SDM845 board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) board MAINTAINERS | 2 + arch/arm/dts/Makefile | 1 + arch/arm/dts/sdm845.dtsi | 118 ++++ arch/arm/dts/starqltechn-uboot.dtsi | 39 ++ arch/arm/dts/starqltechn.dts | 53 ++ arch/arm/mach-snapdragon/Kconfig | 17 + arch/arm/mach-snapdragon/Makefile | 4 + arch/arm/mach-snapdragon/clock-sdm845.c | 92 +++ arch/arm/mach-snapdragon/clock-snapdragon.c | 1 + arch/arm/mach-snapdragon/clock-snapdragon.h | 3 +- .../include/mach/sysmap-sdm845.h | 42 ++ arch/arm/mach-snapdragon/init_sdm845.c | 82 +++ arch/arm/mach-snapdragon/pinctrl-sdm845.c | 44 ++ arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 1 + arch/arm/mach-snapdragon/pinctrl-snapdragon.h | 1 + arch/arm/mach-snapdragon/sysmap-sdm845.c | 31 + board/samsung/starqltechn/Kconfig | 14 + board/samsung/starqltechn/MAINTAINERS | 6 + board/samsung/starqltechn/Makefile | 9 + board/samsung/starqltechn/starqltechn.c | 10 + configs/starqltechn_defconfig | 33 + doc/board/qualcomm/index.rst | 1 + doc/board/qualcomm/sdm845.rst | 38 ++ .../serial/msm-geni-serial.txt | 6 + drivers/gpio/msm_gpio.c | 1 + drivers/gpio/pm8916_gpio.c | 8 +- drivers/serial/Kconfig | 17 + drivers/serial/Makefile | 1 + drivers/serial/serial_msm_geni.c | 602 ++++++++++++++++++ drivers/spmi/spmi-msm.c | 156 +++-- include/configs/sdm845.h | 33 + include/configs/starqltechn.h | 16 + 32 files changed, 1428 insertions(+), 54 deletions(-) create mode 100644 arch/arm/dts/sdm845.dtsi create mode 100644 arch/arm/dts/starqltechn-uboot.dtsi create mode 100644 arch/arm/dts/starqltechn.dts create mode 100644 arch/arm/mach-snapdragon/clock-sdm845.c create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-sdm845.h create mode 100644 arch/arm/mach-snapdragon/init_sdm845.c create mode 100644 arch/arm/mach-snapdragon/pinctrl-sdm845.c create mode 100644 arch/arm/mach-snapdragon/sysmap-sdm845.c create mode 100644 board/samsung/starqltechn/Kconfig create mode 100644 board/samsung/starqltechn/MAINTAINERS create mode 100644 board/samsung/starqltechn/Makefile create mode 100644 board/samsung/starqltechn/starqltechn.c create mode 100644 configs/starqltechn_defconfig create mode 100644 doc/board/qualcomm/sdm845.rst create mode 100644 doc/device-tree-bindings/serial/msm-geni-serial.txt create mode 100644 drivers/serial/serial_msm_geni.c create mode 100644 include/configs/sdm845.h create mode 100644 include/configs/starqltechn.h -- 2.20.1

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[PATCH v3 00/29] arm: dts: ls1028a: sync device tree with linux
by Michael Walle 05 Oct '21

05 Oct '21

This series sync the device tree of the LS1028A SoC with the linux one. To ease future debugging and reviewing, we first clean up the existing one, removing bogus nodes, moving all CCSR related nodes in /soc and update the drivers to accept the offical compatible strings. This was tested on a sl28 board, but the ls1028a.dtsi sync also affects the LS1028A-RDB and -QDS. It would be nice if someone could actually test it on such a board. I didn't sync the device trees for the NXP boards because u-boot related things aren't split into its own -u-boot.dtsi file. So I'll leave that task to NXP :) The following patch is a prerequisite for this series: https://patchwork.ozlabs.org/project/uboot/patch/20210825210510.24766-1-tri… changes since v2: - move the device tree nodes piece by piece and sort them to ease reviewing - fix PCI driver (bindings) - fix SATA driver (bindings) - fix USB driver (bindings) - split most changes which are caused by the sync of the linux device tree to own patches, eg. pcie io window, spi chip selects The final diff for the sync is much nicer now ;) changes since v1: - remove u-boot,dm-pre-reloc from rdb and qds boards - fix enetc0 and enetc2 labels Michael Walle (29): armv8: ls1028a: add IOMMU stream ID to vivante node arm: dts: ls1028a: remove /memory node arm: dts: ls1028a-{rdb,qds}: remove dm-pre-reloc property arm: dts: ls1028a: add an empty /soc arm: dts: ls1028a: move the clockgen node into /soc arm: dts: ls1028a: move I2C controller nodes into /soc arm: dts: ls1028a: move the FlexSPI controller node arm: dts: ls1028a: move the SPI and eSDHC controller nodes into /soc arm: dts: ls1028a: move the UART controller nodes into /soc arm: dts: ls1028a: move the low-power UART nodes into /soc arm: dts: ls1028a: move the GPIO controller nodes into /soc arm: dts: ls1028a: move SATA and USB controller nodes into /soc arm: dts: ls1028a: move the PCIe controller nodes into /soc arm: dts: ls1028a: move the watchdog node into /soc arm: dts: ls1028a: move the iRC node and its devices into /soc arm: dts: ls1028a: update the labels watchdog: sp805_wdt: use correct compatible string spi: fsl_dspi: add new compatible fsl,ls1021a-v1.0-dspi spi: fsl_dspi: rename num-cs to spi-num-chipselects serial: lpuart: add new compatible fsl,ls1028a-lpuart scsi: ceva: rename the resource name to match the linux kernel one usb: xhci: fsl: add new compatible fsl,ls1028a-dwc3 pci: layerscape: add official ls1028a binding support arm: dts: ls1028a: remove num-lanes in the PCIe controller nodes arm: dts: ls1028a: move the PCI I/O window to match arm: dts: ls1028a: disable the PCIe controller by default arm: dts: ls1028a: drop non-removable property from esdhc controller node arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux arm: dts: sl28: sync dtbs .../arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 1 + arch/arm/dts/fsl-ls1012a.dtsi | 4 +- .../dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi | 37 +- .../fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi | 2 +- .../arm/dts/fsl-ls1028a-kontron-sl28-var1.dts | 31 +- .../fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi | 8 + .../arm/dts/fsl-ls1028a-kontron-sl28-var2.dts | 46 +- .../fsl-ls1028a-kontron-sl28-var3-u-boot.dtsi | 2 +- .../fsl-ls1028a-kontron-sl28-var4-u-boot.dtsi | 4 +- .../arm/dts/fsl-ls1028a-kontron-sl28-var4.dts | 18 +- arch/arm/dts/fsl-ls1028a-kontron-sl28.dts | 256 ++- .../dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi | 4 +- .../dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi | 4 +- .../dts/fsl-ls1028a-qds-7777-sch-30841.dtsi | 12 +- .../dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi | 8 +- .../dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi | 4 +- .../fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi | 12 +- .../dts/fsl-ls1028a-qds-9999-sch-24801.dtsi | 12 +- arch/arm/dts/fsl-ls1028a-qds-duart.dts | 2 +- .../fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi | 12 +- .../fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi | 12 +- .../dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi | 6 +- .../dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi | 6 +- arch/arm/dts/fsl-ls1028a-qds.dtsi | 25 +- arch/arm/dts/fsl-ls1028a-rdb.dts | 31 +- arch/arm/dts/fsl-ls1028a.dtsi | 1443 ++++++++++++----- arch/arm/dts/fsl-ls1043a.dtsi | 6 +- arch/arm/dts/fsl-ls1046a.dtsi | 6 +- arch/arm/dts/fsl-ls1088a.dtsi | 4 +- arch/arm/dts/fsl-ls2080a.dtsi | 2 +- arch/arm/dts/fsl-lx2160a.dtsi | 6 +- arch/arm/dts/hi3660.dtsi | 4 +- arch/arm/dts/ls1021a.dtsi | 6 +- arch/arm/dts/vf.dtsi | 4 +- drivers/ata/sata_ceva.c | 2 +- drivers/pci/pcie_layerscape_rc.c | 61 +- drivers/serial/serial_lpuart.c | 2 + drivers/spi/fsl_dspi.c | 6 +- drivers/usb/host/xhci-fsl.c | 1 + drivers/watchdog/sp805_wdt.c | 2 +- .../dt-bindings/clock/fsl,qoriq-clockgen.h | 15 + 41 files changed, 1529 insertions(+), 600 deletions(-) create mode 100644 include/dt-bindings/clock/fsl,qoriq-clockgen.h -- 2.30.2

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[PATCH v1 0/2] Broadcom netXtreme driver and commands
by Bharat Kumar Reddy Gooty 05 Oct '21

05 Oct '21

From: Bharat Gooty <bharat.gooty(a)broadcom.com> Broadcom netXtreme controller supports multiple ports and multiple link speeds like 10/25/50/100G 1. Added driver support for netXtreme controller 2. Added commands to know the port used, supported speeds, configure link speeds and MAC address. Bharat Gooty (2): net: brcm: netXtreme driver cmd: brcm: netXtreme commands cmd/Kconfig | 2 + cmd/broadcom/Kconfig | 10 + cmd/broadcom/Makefile | 3 +- cmd/broadcom/bnxt.c | 237 ++++ drivers/net/Kconfig | 1 + drivers/net/Makefile | 1 + drivers/net/bnxt/Kconfig | 7 + drivers/net/bnxt/Makefile | 5 + drivers/net/bnxt/bnxt.c | 2025 +++++++++++++++++++++++++++++++++++ drivers/net/bnxt/bnxt_dbg.h | 538 ++++++++++ drivers/net/bnxt/pci_ids.h | 17 + include/broadcom/bnxt.h | 419 ++++++++ include/broadcom/bnxt_hsi.h | 889 +++++++++++++++ include/broadcom/bnxt_ver.h | 22 + 14 files changed, 4175 insertions(+), 1 deletion(-) create mode 100644 cmd/broadcom/Kconfig create mode 100644 cmd/broadcom/bnxt.c create mode 100644 drivers/net/bnxt/Kconfig create mode 100644 drivers/net/bnxt/Makefile create mode 100644 drivers/net/bnxt/bnxt.c create mode 100644 drivers/net/bnxt/bnxt_dbg.h create mode 100644 drivers/net/bnxt/pci_ids.h create mode 100644 include/broadcom/bnxt.h create mode 100644 include/broadcom/bnxt_hsi.h create mode 100644 include/broadcom/bnxt_ver.h -- 2.17.1 -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it.

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[PATCH] sunxi: h3: enable clock support for r_pio gpios
by Manuel Dipolt 05 Oct '21

05 Oct '21

This patch enables clock for the r_pio gpios for the h3 Signed-off-by: Manuel Dipolt <manuel.dipolt(a)robart.cc> --- drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_h3-r.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/gpio/sunxi_gpio.c | 9 +++++++ 3 files changed, 61 insertions(+) create mode 100644 drivers/clk/sunxi/clk_h3-r.c diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 36fb2aeb56..e93fe3c2f3 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -15,5 +15,6 @@ obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o +obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3-r.o obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_h3-r.c b/drivers/clk/sunxi/clk_h3-r.c new file mode 100644 index 0000000000..a314e37b87 --- /dev/null +++ b/drivers/clk/sunxi/clk_h3-r.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2021 RobArt GmbH + * Author: Manuel Dipolt <manuel.dipolt(a)robart.cc> + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-r-ccu.h> +#include <dt-bindings/reset/sun8i-r-ccu.h> + +static struct ccu_clk_gate h3_r_gates[] = { + [CLK_APB0_PIO] = GATE(0x28, BIT(0)), +}; + +static struct ccu_reset h3_r_resets[] = { + [RST_APB0_IR] = RESET(0x0b0, BIT(2)), + [RST_APB0_TIMER] = RESET(0x0b0, BIT(3)), + [RST_APB0_UART] = RESET(0x0b0, BIT(4)), + [RST_APB0_I2C] = RESET(0x0b0, BIT(6)), +}; + +static const struct ccu_desc h3_r_ccu_desc = { + .gates = h3_r_gates, + .resets = h3_r_resets, +}; + +static int h3_r_clk_bind(struct udevice *dev) +{ + return sunxi_reset_bind(dev, ARRAY_SIZE(h3_r_resets)); +} + +static const struct udevice_id h3_r_ccu_ids[] = { + { .compatible = "allwinner,sun8i-h3-r-ccu", + .data = (ulong)&h3_r_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun8i_h3_r) = { + .name = "sun8i_h3-r_ccu", + .id = UCLASS_CLK, + .of_match = h3_r_ccu_ids, + .priv_auto_alloc_size = sizeof(struct ccu_priv), + .ops = &sunxi_clk_ops, + .probe = sunxi_clk_probe, + .bind = h3_r_clk_bind, +}; + diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index cbed8d42b7..b505be4065 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -14,6 +14,7 @@ #include <errno.h> #include <fdtdec.h> #include <malloc.h> +#include <clk.h> #include <asm/arch/gpio.h> #include <asm/io.h> #include <asm/gpio.h> @@ -262,6 +263,14 @@ static int gpio_sunxi_probe(struct udevice *dev) { struct sunxi_gpio_platdata *plat = dev_get_platdata(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct clk gate_clk; + int ret; + + ret = clk_get_by_name(dev, "apb", &gate_clk); + + if (!ret) + clk_enable(&gate_clk); + /* Tell the uclass how many GPIOs we have */ if (plat) { -- 2.20.1

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[PATCH v8 0/5] Add SIMATIC IOT2050 board support
by Jan Kiszka 04 Oct '21

04 Oct '21

This is the baseline support for the SIMATIC IOT2050 devices. Changes in v8: - rebased - added support for product generation 2 board - align device trees with upstream [pending] kernel version - only warn on missing watchdog firmware binary - removed bits only needed for incomplete prueth support Changes in v7: - rebased - registered board doc with index Changes in v6: - rebased - converted board README to docs/board/siemens/iot2050.rst Changes in v5: - rebased - use DEFAULT_LINUX_BOOT_ENV from ti_armv7_common.h, rather than home-grown values - avoids misaligned kernel load address - no longer exposes issue around LMB reservations Changes in v4: - rebased - make rtd-wdt firmware a "loadable" inside U-Boot proper fit image, avoiding controversial embedding as object - improved mmc1 removal from boot_targets - fixed various build issues Changes in v3: - rebased - addressed several checkpatch warnings - a few #ifdef -> IS_ENABLED conversions - comment marker for SPDK identifier in .S file - trailing whitespaces - factored out rti_wdt_load_fw (less #ifdef) Changes in v2: - rebased - sync with upstream-accepted DT - add boot switch - include watchdog support Allows to boot mainline kernels and the BSP-derived kernel we currently ship as reference. Note that this baseline support lacks Ethernet drivers. We are working closely with TI to ensure that the to-be-upstreamed icssg-prueth driver will work both with new SR2.0 AM65x silicon as well as with SR1.0 which is used in the currently shipped IOT2050 devices. A staging tree for complete IOT2050 support can be found at [1]. Full image integration is available via [2]. Jan [1] https://github.com/siemens/u-boot/commits/jan/iot2050 [2] https://github.com/siemens/meta-iot2050 Jan Kiszka (5): arm: dts: Add IOT2050 device tree files board: siemens: Add support for SIMATIC IOT2050 devices arm64: dts: ti: k3-am65-mcu: Add RTI watchdog entry watchdog: rti_wdt: Add support for loading firmware iot2050: Enable watchdog support, but do not auto-start it arch/arm/dts/Makefile | 9 +- arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 173 +++++ arch/arm/dts/k3-am65-iot2050-common-pg1.dtsi | 46 ++ arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 51 ++ .../dts/k3-am65-iot2050-common-u-boot.dtsi | 99 +++ arch/arm/dts/k3-am65-iot2050-common.dtsi | 733 ++++++++++++++++++ arch/arm/dts/k3-am65-iot2050-spl.dts | 17 + arch/arm/dts/k3-am65-mcu.dtsi | 9 + .../dts/k3-am6528-iot2050-basic-common.dtsi | 63 ++ arch/arm/dts/k3-am6528-iot2050-basic-pg2.dts | 24 + arch/arm/dts/k3-am6528-iot2050-basic.dts | 24 + .../k3-am6548-iot2050-advanced-common.dtsi | 59 ++ .../dts/k3-am6548-iot2050-advanced-pg2.dts | 29 + arch/arm/dts/k3-am6548-iot2050-advanced.dts | 24 + arch/arm/mach-k3/Kconfig | 1 + board/siemens/iot2050/Kconfig | 32 + board/siemens/iot2050/MAINTAINERS | 9 + board/siemens/iot2050/Makefile | 10 + board/siemens/iot2050/board.c | 272 +++++++ board/siemens/iot2050/config.mk | 8 + configs/iot2050_defconfig | 136 ++++ doc/board/index.rst | 1 + doc/board/siemens/index.rst | 9 + doc/board/siemens/iot2050.rst | 78 ++ drivers/watchdog/Kconfig | 20 + drivers/watchdog/rti_wdt.c | 88 +++ include/configs/iot2050.h | 62 ++ tools/binman/missing-blob-help | 5 + 28 files changed, 2090 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am65-iot2050-boot-image.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg1.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-common.dtsi create mode 100644 arch/arm/dts/k3-am65-iot2050-spl.dts create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic-common.dtsi create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic-pg2.dts create mode 100644 arch/arm/dts/k3-am6528-iot2050-basic.dts create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-common.dtsi create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced.dts create mode 100644 board/siemens/iot2050/Kconfig create mode 100644 board/siemens/iot2050/MAINTAINERS create mode 100644 board/siemens/iot2050/Makefile create mode 100644 board/siemens/iot2050/board.c create mode 100644 board/siemens/iot2050/config.mk create mode 100644 configs/iot2050_defconfig create mode 100644 doc/board/siemens/index.rst create mode 100644 doc/board/siemens/iot2050.rst create mode 100644 include/configs/iot2050.h -- 2.31.1

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[PATCH] mtd: cqspi: Fix division by zero
by Marek Vasut 04 Oct '21

04 Oct '21

Both dummy.nbytes and dummy.buswidth may be zero. By not checking the later, it is possible to trigger division by zero and a crash. This does happen with tiny SPI NOR framework in SPL. Fix this by adding the check and returning zero dummy bytes in such a case. Fixes: 38b0852b0ea ("spi: cadence-qspi: Add support for octal DTR flashes") Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Vignesh R <vigneshr(a)ti.com> Cc: Pratyush Yadav <p.yadav(a)ti.com> --- drivers/spi/cadence_qspi_apb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index c36a652211a..429ee335db6 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -219,6 +219,9 @@ static unsigned int cadence_qspi_calc_dummy(const struct spi_mem_op *op, { unsigned int dummy_clk; + if (!op->dummy.nbytes || !op->dummy.buswidth) + return 0; + dummy_clk = op->dummy.nbytes * (8 / op->dummy.buswidth); if (dtr) dummy_clk /= 2; -- 2.33.0

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