August 2021 - U-Boot

[PATCH] rockchip: Fix u-boot-rockchip.bin build
by Johan Gunnarsson 11 Aug '21

11 Aug '21

Currently there are a few arm32 rockchip board configs that don't generate u-boot-rockchip.bin when running make because CONFIG_BINMAN is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64. Example builds that don't generate u-boot-rockchip.bin without this patch: export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make kylin-rk3036_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make rock_defconfig make export ARCH=arm export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- make tinker-rk3288_defconfig make Signed-off-by: Johan Gunnarsson <johan.gunnarsson(a)gmail.com> --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9de97cc101..5a8672cdd6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1791,7 +1791,7 @@ config ARCH_STM32MP config ARCH_ROCKCHIP bool "Support Rockchip SoCs" select BLK - select BINMAN if SPL_OPTEE + select BINMAN if SPL_OPTEE || (SPL && !ARM64) select DM select DM_GPIO select DM_I2C -- 2.25.1

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[PATCH 1/4] arm64: rk3399: r4s: correct the LEDS label name
by Xiaobo Tian 11 Aug '21

11 Aug '21

Correct the LEDS label name and remove the board type prefix, which is actually unnecessary here, removes the redefined system status LED pin. Signed-off-by: Xiaobo Tian <peterwillcn(a)gmail.com> --- arch/arm/dts/rk3399-nanopi-r4s.dts | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/rk3399-nanopi-r4s.dts b/arch/arm/dts/rk3399-nanopi-r4s.dts index 6f2cf17bf1..7470c26820 100644 --- a/arch/arm/dts/rk3399-nanopi-r4s.dts +++ b/arch/arm/dts/rk3399-nanopi-r4s.dts @@ -76,18 +76,17 @@ &leds { lan_led: led-1 { gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; - label = "nanopi-r4s:green:lan"; + label = "green:lan"; }; wan_led: led-2 { gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; - label = "nanopi-r4s:green:wan"; + label = "green:wan"; }; }; &leds_gpio { rockchip,pins = - <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; }; -- 2.32.0

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[PATCH v2 0/6] Toradex boards' specific patches
by Oleksandr Suvorov 11 Aug '21

11 Aug '21

There is the set of patches for Toradex boards. Changes in v2: - remove 2 patches not meet requirements. END Marcel Ziswiler (1): board: apalis-tk1: launch toradex easy installer in usb recovery Ming Liu (1): board: colibri_imx6: add board_fit_config_name_match to support FIT in SPL Oleksandr Suvorov (2): board: colibri-imx8x: update building documentation board: colibri_vf: fix compiling warning Stefan Agner (2): board: colibri_imx7: use SDP if USB serial downloader has been used board: toradex: make USB PID from config block optional board/toradex/apalis-tk1/apalis-tk1.c | 13 +++++++++-- board/toradex/colibri_imx6/colibri_imx6.c | 10 +++++++++ board/toradex/colibri_imx7/colibri_imx7.c | 10 +++++++++ board/toradex/colibri_vf/colibri_vf.c | 2 +- board/toradex/common/Kconfig | 10 +++++++++ board/toradex/common/tdx-common.c | 2 +- doc/board/toradex/colibri-imx8x.rst | 27 +++++++---------------- 7 files changed, 51 insertions(+), 23 deletions(-) -- 2.31.1

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[PATCH] rk3399: boot_devices fix spinor node name
by Artem Lapkin 11 Aug '21

11 Aug '21

Problem: board_spl_was_booted_from return wrong boot_devices[3] value /spi@ff1d0000 and same-as-spl dont work properly for SPINOR flash because arch/arm/mach-rockchip/spl-boot-order.c spl_node_to_boot_device need parse SPINOR flash node as UCLASS_SPI_FLASH spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000 > board_boot_order: could not map node @618 to a boot-device /sdhci@fe330000 > /mmc@fe320000 Solution: just change it to /spi@ff1d0000/flash@0 spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ... /spi@ff1d0000/flash@0 > /sdhci@fe330000 > /mmc@fe320000 Signed-off-by: Artem Lapkin <art(a)khadas.com> --- arch/arm/mach-rockchip/rk3399/rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 869d2159..69e0c8c2 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000", - [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000/flash@0", [BROM_BOOTSOURCE_SD] = "/mmc@fe320000", }; -- 2.25.1

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[PATCH v3 0/5] add measurement support
by Masahisa Kojima 11 Aug '21

11 Aug '21

This patch series add the support of measurement descibed in TCG PC Client PFP spec(Version 1.05 Revision 23). Eventlog generated with this patch series are tested on the aarch64 based machine(Socionext Developerbox) and fTPM running on OP-TEE. The eventlog result is almost same result as the one generated by edk2 running on the Devloperbox and Secure96. This patch series does not cover all measurement requirements described in TCG spec, the remaining items will be supported in the future. Major missing items in TCG PC Client PFP spec: 1) If the secure boot variables are updated after they are initially measured in PCR[7] and before ExitBootServices() has completed, the platform MAY be restarted OR the variables MUST be remeasured into PCR[7]. 2) SMBIOS structure measurement 3) "DeployedMode" and "AuditMode" measurement 4) EV_EFI_GPT_EVENT event 5) Measurement of U-boot itself. I assume U-boot measurement will be done by the former firmware such as trusted firmware. Masahisa Kojima (5): efi_loader: add secure boot variable measurement efi_loader: add boot variable measurement efi_loader: add ExitBootServices() measurement efi_loader: refactor efi_append_scrtm_version() efi_loader: add comment for efi_tcg2.h include/efi_loader.h | 5 + include/efi_tcg2.h | 77 +++++++- include/tpm-v2.h | 18 +- lib/efi_loader/efi_boottime.c | 25 +++ lib/efi_loader/efi_tcg2.c | 356 +++++++++++++++++++++++++++++++++- 5 files changed, 471 insertions(+), 10 deletions(-) -- 2.17.1

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[PATCH] arm: kirkwood: Goflex Home: Update board maintainer
by Tony Dinh 11 Aug '21

11 Aug '21

Change maintainer to me. Suriyan no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- board/Seagate/goflexhome/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/Seagate/goflexhome/MAINTAINERS b/board/Seagate/goflexhome/MAINTAINERS index 6d6a1ff4e3..a71b4ba1fe 100644 --- a/board/Seagate/goflexhome/MAINTAINERS +++ b/board/Seagate/goflexhome/MAINTAINERS @@ -1,5 +1,5 @@ GOFLEXHOME BOARD -M: Suriyan Ramasami <suriyan.r(a)gmail.com> +M: Tony Dinh <mibodhi(a)gmail.com> S: Maintained F: board/Seagate/goflexhome/ F: include/configs/goflexhome.h -- 2.20.1

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[PATCH] arm: kirkwood: Dockstar: Update board maintainer
by Tony Dinh 11 Aug '21

11 Aug '21

Change maintainer to me. Eric no longer has this board and wishes to see someone maintaining it actively. Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- board/Seagate/dockstar/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/Seagate/dockstar/MAINTAINERS b/board/Seagate/dockstar/MAINTAINERS index f259e58ae6..0f6243e257 100644 --- a/board/Seagate/dockstar/MAINTAINERS +++ b/board/Seagate/dockstar/MAINTAINERS @@ -1,5 +1,5 @@ DOCKSTAR BOARD -M: Eric Cooper <ecc(a)cmu.edu> +M: Tony Dinh <mibodhi(a)gmail.com> S: Maintained F: board/Seagate/dockstar/ F: include/configs/dockstar.h -- 2.20.1

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[PATCH] arm: mvebu: Hang if ddr3_init() fails
by Pali Rohár 11 Aug '21

11 Aug '21

If ddr3_init() fails then DDR was not initialized and we cannot load and execute U-Boot. We cannot continue, we cannot do anything in this case, so hang. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- arch/arm/mach-mvebu/spl.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 3b6bc3897090..f0cf60bb1488 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -345,7 +345,11 @@ void board_init_f(ulong dummy) serdes_phy_config(); /* Setup DDR */ - ddr3_init(); + ret = ddr3_init(); + if (ret) { + debug("ddr3_init() failed: %d\n", ret); + hang(); + } #endif /* Initialize Auto Voltage Scaling */ -- 2.20.1

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[PATCH] arm: a37xx: pci: Fix handling PIO config error responses
by Pali Rohár 11 Aug '21

11 Aug '21

Returning fabricated CRS value (0xFFFF0001) by PCIe Root Complex to OS is allowed only for 4-byte PCI_VENDOR_ID config read request and only when CRSSVE bit in Root Port PCIe device is enabled. In all other error PCIe Root Complex must return all-ones. So implement this logic in pci-aardvark.c driver properly. aardvark HW does not have Root Port PCIe device and U-Boot does not implement emulation of this device. So expect that CRSSVE bit is set as U-Boot can already handle CRS value for PCI_VENDOR_ID config read request. More callers of pci_bus_read_config() function in U-Boot do not check for return value, but check readback value. Therefore always fill readback value in pcie_advk_read_config() function. On error fill all-ones of correct size as it is required for PCIe Root Complex. And also correctly propagates error from failed config write request to return value of pcie_advk_write_config() function. Most U-Boot callers ignores this return value, but it is a good idea to return correct value from function. These issues about return value of failed config read requests, including special handling of CRS were reported by Lorenzo and Bjorn for Linux kernel driver pci-aardvark together with quotes from PCIe r4.0 spec, see details: https://lore.kernel.org/linux-pci/20210624213345.3617-1-pali@kernel.org/t/#u Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/pci/pci-aardvark.c | 52 +++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 1b9bae7cca72..815b26162f15 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -177,7 +177,6 @@ #define LINK_MAX_RETRIES 10 #define LINK_WAIT_TIMEOUT 100000 -#define CFG_RD_UR_VAL 0xFFFFFFFF #define CFG_RD_CRS_VAL 0xFFFF0001 /** @@ -263,12 +262,12 @@ static int pcie_advk_wait_pio(struct pcie_advk *pcie) * pcie_advk_check_pio_status() - Validate PIO status and get the read result * * @pcie: Pointer to the PCI bus - * @read: Read from or write to configuration space - true(read) false(write) - * @read_val: Pointer to the read result, only valid when read is true + * @allow_crs: Only for read requests, if CRS response is allowed + * @read_val: Pointer to the read result * */ static int pcie_advk_check_pio_status(struct pcie_advk *pcie, - bool read, + bool allow_crs, uint *read_val) { uint reg; @@ -286,22 +285,16 @@ static int pcie_advk_check_pio_status(struct pcie_advk *pcie, break; } /* Get the read result */ - if (read) + if (read_val) *read_val = advk_readl(pcie, PIO_RD_DATA); /* No error */ strcomp_status = NULL; break; case PIO_COMPLETION_STATUS_UR: - if (read) { - /* For reading, UR is not an error status. */ - *read_val = CFG_RD_UR_VAL; - strcomp_status = NULL; - } else { - strcomp_status = "UR"; - } + strcomp_status = "UR"; break; case PIO_COMPLETION_STATUS_CRS: - if (read) { + if (allow_crs && read_val) { /* For reading, CRS is not an error status. */ *read_val = CFG_RD_CRS_VAL; strcomp_status = NULL; @@ -352,6 +345,7 @@ static int pcie_advk_read_config(const struct udevice *bus, pci_dev_t bdf, enum pci_size_t size) { struct pcie_advk *pcie = dev_get_priv(bus); + bool allow_crs; uint reg; int ret; @@ -364,13 +358,17 @@ static int pcie_advk_read_config(const struct udevice *bus, pci_dev_t bdf, return 0; } + allow_crs = (offset == PCI_VENDOR_ID) && (size == 4); + if (advk_readl(pcie, PIO_START)) { dev_err(pcie->dev, "Previous PIO read/write transfer is still running\n"); - if (offset != PCI_VENDOR_ID) - return -EINVAL; - *valuep = CFG_RD_CRS_VAL; - return 0; + if (allow_crs) { + *valuep = CFG_RD_CRS_VAL; + return 0; + } + *valuep = pci_get_ff(size); + return -EINVAL; } /* Program the control register */ @@ -392,16 +390,20 @@ static int pcie_advk_read_config(const struct udevice *bus, pci_dev_t bdf, advk_writel(pcie, 1, PIO_START); if (!pcie_advk_wait_pio(pcie)) { - if (offset != PCI_VENDOR_ID) - return -EINVAL; - *valuep = CFG_RD_CRS_VAL; - return 0; + if (allow_crs) { + *valuep = CFG_RD_CRS_VAL; + return 0; + } + *valuep = pci_get_ff(size); + return -EINVAL; } /* Check PIO status and get the read result */ - ret = pcie_advk_check_pio_status(pcie, true, &reg); - if (ret) + ret = pcie_advk_check_pio_status(pcie, allow_crs, &reg); + if (ret) { + *valuep = pci_get_ff(size); return ret; + } dev_dbg(pcie->dev, "(addr,size,val)=(0x%04x, %d, 0x%08x)\n", offset, size, reg); @@ -511,9 +513,7 @@ static int pcie_advk_write_config(struct udevice *bus, pci_dev_t bdf, } /* Check PIO status */ - pcie_advk_check_pio_status(pcie, false, &reg); - - return 0; + return pcie_advk_check_pio_status(pcie, false, NULL); } /** -- 2.20.1

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[PATCH] arm: mvebu: sata_mv failed to identify HDDs during cold start
by Tony Dinh 11 Aug '21

11 Aug '21

During cold start, with some HDDs, mv_sata_identify() does not populate the ID words on the 1st ATA ID command. In fact, the first ATA ID command will only power up the drive, and then the ATA ID command processing is lost in the process. Tests with: - Seagate ST9250320AS 250GB HDD and Seagate ST4000DM004-2CV104 4TB HDD. - Zyxel NSA310S (Kirkwood 88F6702), Marvell Dreamplug (Kirkwood 88F6281), Seagate GoFlex Home (Kirkwood 88F6281), Pogoplug V4 (Kirkwood 88F6192). Observation: - The Seagate ST9250320AS 250GB took about 3 seconds to spin up. - The Seagate ST4000DM004-2CV104 4TB took about 8 seconds to spin up. - mv_sata_identify() did not populate the ID words after the call to mv_ata_exec_ata_cmd_nondma(). - Attempt to insert a long delay of 30 seconds, ie. mdelay(30_000), after the call to ata_wait_register() inside mv_ata_exec_ata_cmd_nondma() did not help with the 4TB drive. The ID words were still empty after that 30s delay. Patch Description: - Added a second ATA ID command in mv_sata_identify(), which will be executed if the 1st ATA ID command did not return with valid ID words. - Use the HDD drive capacity in the ID words as a successful indicator of ATA ID command. - In the scenario where a box is rebooted, the 1st ATA ID command is always successful, so there is no extra time wasted. - In the scenario where a box is cold started, the 1st ATA command is the power up command. The 2nd ATA ID command alleviates the uncertainty of how long we have to wait for the ID words to be populated by the SATA controller. Signed-off-by: Tony Dinh <mibodhi(a)gmail.com> --- drivers/ata/sata_mv.c | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 1012cb5374..7d1515d5f8 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -809,6 +809,7 @@ static int mv_ata_exec_ata_cmd_nondma(struct udevice *dev, int port, static int mv_sata_identify(struct udevice *dev, int port, u16 *id) { struct sata_fis_h2d h2d; + int len; memset(&h2d, 0, sizeof(struct sata_fis_h2d)); @@ -818,8 +819,32 @@ static int mv_sata_identify(struct udevice *dev, int port, u16 *id) /* Give device time to get operational */ mdelay(10); - return mv_ata_exec_ata_cmd_nondma(dev, port, &h2d, (u8 *)id, - ATA_ID_WORDS * 2, READ_CMD); + /* During cold start, with some HDDs, the first ATA ID command does + * not populate the ID words. In fact, the first ATA ID + * command will only power up the drive, and then the ATA ID command + * processing is lost in the process. + */ + len = mv_ata_exec_ata_cmd_nondma(dev, port, &h2d, (u8 *)id, + ATA_ID_WORDS * 2, READ_CMD); + + /* If drive capacity has been filled in, then it was successfully + * identified (the drive has been powered up before, i.e. + * this function is invoked during a reboot) + */ + if (ata_id_n_sectors(id) != 0) + return len; + + /* Issue the 2nd ATA ID command to make sure the ID words are + * populated properly. + */ + mdelay(10); + len = mv_ata_exec_ata_cmd_nondma(dev, port, &h2d, (u8 *)id, + ATA_ID_WORDS * 2, READ_CMD); + if (ata_id_n_sectors(id) != 0) + return len; + + printf("Err: Failed to identify SATA device %d\n", port); + return -1; } static void mv_sata_xfer_mode(struct udevice *dev, int port, u16 *id) -- 2.20.1

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