July 2021 - U-Boot

[PATCH 00/27] Add F1C100s based PocketGo handheld support
by Yifan Gu 20 Jan '22

20 Jan '22

This series add support for the PocketGo handheld, a low cost portable gaming console that is based on the Allwinner F1C100s chip. A significant portion of this patchset is authored by: - Icenowy Zheng <icenowy(a)aosc.io> - George Hilliard <thirtythreeforty(a)gmail.com> This patchset includes 4 parts necessary to make PocketGo work: - suniv + f1c100s support by Icenowy Zheng <icenowy(a)aosc.io>, rebased by George Hilliard <thirtythreeforty(a)gmail.com> and then by me. See: https://github.com/Icenowy/u-boot/commits/f1c100s-spiflash - additional support for suniv clock and MMC controller by George Hilliard, rebased. See: https://github.com/thirtythreeforty/u-boot/tree/f1c100s-v2019.04 - additional support for serial uart1, and misc fixes for compilation, SPL -> U-Boot proper load on F1C100s. - DTS and defconfig for PocketGo I have accidentally CC'ed a few people while testing git send-email, I am awfully sorry for my lack of experience in email-patch based workflows. This is my first time attempting to contribute to U-Boot. Cc: Jagan Teki <jagan(a)amarulasolutions.com> Cc: Andre Przywara <andre.przywara(a)arm.com> Cc: Icenowy Zheng <icenowy(a)aosc.io> Cc: George Hilliard <thirtythreeforty(a)gmail.com> George Hilliard (6): sunxi: Don't provide enable_cache() on suniv sunxi: implement clock driver for suniv f1c100s sunxi: gpio: Add support for suniv-f1c100s sunxi: spi: restore bus speed and mode after reset sunxi: spi: Add suniv pin controller support sunxi: suniv: add device tree nodes for f1c100s MMC controllers Icenowy Zheng (12): arm: arm926ejs: start.S: port save_boot_params support from armv7 code arm: arm926ej-s: add sunxi code sunxi: add support for suniv architecture sunxi: suniv: add support for Lichee Pi Nano sunxi: suniv: add boot sequence for SPL to try sunxi: spi-spl: add support for SUNIV sunxi: add SPI0 node for suniv sunxi: enable SPI NOR on Lichee Pi Nano sunxi: add defconfig for Lichee Pi Nano with SPI Flash support sunxi: add support for UART at PF for suniv sunxi: do not set PF MMC0 pinmux when PF uart is used sunxi: allow to enable MMC driver when using PF UART0 Yifan Gu (9): arm: dts: sunxi: do not renumber if mmc2 does not exist board: licheepi_nano: set CONFIG_MMC_SUNXI_SLOT_EXTRA sunxi: suniv: add missing header include for udelay sunxi: suniv: allow serial connection on uart1 sunxi: suniv: do not detect boot sector on suniv sunxi: suniv: set SYS_TEXT_BASE default sunxi: suniv: disable mmc optimization for suniv arm: dts: suniv: define uart1 pins arm: dts: add pocketgo handheld support arch/arm/cpu/arm926ejs/Makefile | 1 + arch/arm/cpu/arm926ejs/start.S | 19 + arch/arm/cpu/arm926ejs/sunxi/Makefile | 16 + arch/arm/cpu/arm926ejs/sunxi/config.mk | 6 + arch/arm/cpu/arm926ejs/sunxi/fel_utils.S | 38 ++ arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S | 68 +++ arch/arm/cpu/arm926ejs/sunxi/start.c | 1 + arch/arm/cpu/arm926ejs/sunxi/timer.c | 114 ++++ arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds | 63 +++ arch/arm/dts/Makefile | 3 + arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 58 ++ arch/arm/dts/suniv-f1c100s-pocketgo.dts | 48 ++ arch/arm/dts/suniv-f1c100s.dtsi | 6 + arch/arm/dts/suniv.dtsi | 253 +++++++++ arch/arm/dts/sunxi-u-boot.dtsi | 2 + arch/arm/include/asm/arch-sunxi/clock.h | 2 +- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 21 + arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 8 + arch/arm/include/asm/arch-sunxi/dram.h | 2 + arch/arm/include/asm/arch-sunxi/dram_suniv.h | 47 ++ arch/arm/include/asm/arch-sunxi/gpio.h | 3 + arch/arm/mach-sunxi/Kconfig | 16 +- arch/arm/mach-sunxi/Makefile | 2 + arch/arm/mach-sunxi/board.c | 37 +- arch/arm/mach-sunxi/clock.c | 3 +- arch/arm/mach-sunxi/clock_sun6i.c | 47 +- arch/arm/mach-sunxi/cpu_info.c | 2 + arch/arm/mach-sunxi/dram_helpers.c | 4 + arch/arm/mach-sunxi/dram_suniv.c | 497 ++++++++++++++++++ arch/arm/mach-sunxi/spl_spi_sunxi.c | 13 + board/sunxi/board.c | 8 +- common/Kconfig.boot | 3 +- configs/licheepi_nano_defconfig | 10 + configs/licheepi_nano_spiflash_defconfig | 26 + configs/pocketgo_defconfig | 12 + drivers/clk/sunxi/Kconfig | 7 + drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_f1c100s.c | 66 +++ drivers/gpio/sunxi_gpio.c | 6 + drivers/mmc/Kconfig | 2 +- drivers/mmc/sunxi_mmc.c | 6 +- drivers/spi/spi-sunxi.c | 12 +- include/configs/suniv.h | 15 + include/configs/sunxi-common.h | 69 ++- include/dt-bindings/clock/suniv-ccu.h | 69 +++ include/dt-bindings/reset/suniv-ccu.h | 37 ++ 46 files changed, 1715 insertions(+), 34 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/sunxi/Makefile create mode 100644 arch/arm/cpu/arm926ejs/sunxi/config.mk create mode 100644 arch/arm/cpu/arm926ejs/sunxi/fel_utils.S create mode 100644 arch/arm/cpu/arm926ejs/sunxi/lowlevel_init.S create mode 100644 arch/arm/cpu/arm926ejs/sunxi/start.c create mode 100644 arch/arm/cpu/arm926ejs/sunxi/timer.c create mode 100644 arch/arm/cpu/arm926ejs/sunxi/u-boot-spl.lds create mode 100644 arch/arm/dts/suniv-f1c100s-licheepi-nano.dts create mode 100644 arch/arm/dts/suniv-f1c100s-pocketgo.dts create mode 100644 arch/arm/dts/suniv-f1c100s.dtsi create mode 100644 arch/arm/dts/suniv.dtsi create mode 100644 arch/arm/include/asm/arch-sunxi/dram_suniv.h create mode 100644 arch/arm/mach-sunxi/dram_suniv.c create mode 100644 configs/licheepi_nano_defconfig create mode 100644 configs/licheepi_nano_spiflash_defconfig create mode 100644 configs/pocketgo_defconfig create mode 100644 drivers/clk/sunxi/clk_f1c100s.c create mode 100644 include/configs/suniv.h create mode 100644 include/dt-bindings/clock/suniv-ccu.h create mode 100644 include/dt-bindings/reset/suniv-ccu.h -- 2.25.1

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[PATCH 0/6] arm: sunxi: v3s: add ethernet support
by Andreas Rehn 15 Jan '22

15 Jan '22

This patchset enables ethernet on Allwinner V3/Sochip S3 SoCs. It is tested with an LicheePi Zero Dock board in combination with different switches and one direct link. Test scenario: Download mainline kernel and device-tree over tftp and start kernel with nfs rootfs. Without [PATCH 6/6], i wasn't able to get a stable connection on 100 Mb full duplex switches with autonegation enabled. Maybe the internal phy has a different behavior on softreset then others which results in a delayed established link. Andreas Rehn (6): dts: sunxi: add licheepi-zero-dock clk: sunxi: v3s: Implement EMAC clocks/resets clk: sunxi: v3s: fix tabs / spaces net: sun8i-emac: add v3s pinmux setting dts: sunxi: v3s: enable emac support net: sun8i-emac: v3s: fix soft reset timeout arch/arm/dts/Makefile | 3 ++- arch/arm/dts/sun8i-v3s-licheepi-zero-dock.dts | 11 +++++++++++ arch/arm/dts/sun8i-v3s.dtsi | 10 +++++++++- board/sunxi/MAINTAINERS | 5 +++++ configs/LicheePi_Zero_dock_defconfig | 7 +++++++ drivers/clk/sunxi/clk_v3s.c | 10 ++++++++-- drivers/net/sun8i_emac.c | 5 ++++- 7 files changed, 46 insertions(+), 5 deletions(-) create mode 100644 configs/LicheePi_Zero_dock_defconfig -- 2.25.1

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IMX8MM SD UHS support
by Tim Harvey 14 Jan '22

14 Jan '22

Greetings, In 50b1a69cee0d ("ARM: dts: imx8m: add UHS or HS400/HS400ES properties") u-boot dt props were added to enable UHS and HS400 on a couple of IMX8MM boards including the imx8mm-evk and in the subsequent patch enabled the config items. While I see this making a huge difference for eMMC performance in U-Boot I find it doesn't do anything for microSD performance. The issue appears to be that sd_get_capabilities() is not appropriately detecting UHS speeds on cards that appropriately detect as SDR104/DDR50 in Linux: u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 1b OEM: 534d Name: 00000 Bus Speed: 50000000 Mode: SD High Speed (50MHz) card capabilities: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz)] ^^^^ no SDR104 detected for this card host capabilities: widths [4, 1] modes [MMC legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz), UHS DDR50 (50MHz), UHS SDR104 (208MHz)] Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 14.9 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes The same card in Linux shows the following upon insertion and performance tests show that it is operating at SDR104 speeds: mmc1: new ultra high speed SDR104 SDHC card at address 0001 I haven't found very good documentation on the SD switch settings to understand if something is wrong in the U-Boot implementation of of sd_get_capabilities() and I suppose it also could be an issue in sdhci-esdhc-imx.c. Any ideas where to look? Anyone see SDR104 cards being detected properly for other platforms? Best regards, Tim

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[PATCH] net: emaclite: fix possible underflow bug
by Tianrui Wei 10 Jan '22

10 Jan '22

This commit fixes a corner case when length < first_read. which would cause the last argument of xemaclite_alignedread to be a very large unsigned integer. Signed-off-by: Tianrui Wei <tianrui-wei(a)outlook.com> --- drivers/net/xilinx_emaclite.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 43fc36dc6a..3b8f0f4678 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -526,7 +526,7 @@ try_again: } /* Read the rest of the packet which is longer then first read */ - if (length != first_read) + if (length >= first_read) xemaclite_alignedread(addr + first_read, etherrxbuff + first_read, length - first_read); -- 2.32.0

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Re: Broken arc toolchain
by Alexey Brodkin 18 Dec '21

18 Dec '21

Hi Tom and Simon, So there're a couple of things involved indeed. 1. As Tom correctly mentioned we used to use SNSP pre-built tools for ARC in TravisCI previously. And frankly the reason was we needed something GCC 8.x based while on some other arches such a new GCC triggered extra problems, see https://lists.denx.de/pipermail/u-boot/2018-May/329577.html. So I updated ARC pre-built versions and we kept using it. 2. Now, that particular "mcpu" was never added into upstream GCC because we wanted to re-implement it a bit nicer, thus any up-to-date vanilla GCC won't accept it as opposed to tools built from SNPS' GCC port [which has it https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/commit/84a3ee38…]. 3. IIRC "-mcpu=hs4x_rel31" is basically an umbrella option for some options combination based on generic "-mcpu=hs4x" so we may probably update HSDK-4xD flags to be buildable by vanialla GGC. But anyways the simples short-term solution is to use our pre-built tools, latest of which are avaialble here https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/…. And for U-Boot elf32 version is what I would suggest to use, so please use https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/…. Moreover since by default for ARC we use U-Boot built-in libgcc the same one little-endian toolchain might be safely used for building our big-endian configs equally well. If more info or actions needed, please let me know. -Alexey ________________________________ From: Tom Rini Sent: Saturday, July 10, 2021 11:22 PM To: Simon Glass Cc: U-Boot Mailing List; Alexey Brodkin; Eugeniy Paltsev Subject: Re: Broken arc toolchain On Sat, Jul 10, 2021 at 02:11:30PM -0600, Simon Glass wrote: > Hi, > > I see this: > > $ buildman --fetch-arch arc > > Downloading toolchain for arch 'arc' > Checking: https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/9.2.0/ > Downloading: https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/9.2.0/x86_64-gc… > Unpacking to: /home/sglass/.buildman-toolchains > Testing > - looking in > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/.' > - looking in > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/bin' > - found > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/bin/arc-linux-gcc' > - looking in > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/usr/bin' > Tool chain test: OK, arch='arc', priority 5 > > $ buildman -A hsdk_4xd > /home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/bin/arc-linux- > $ buildman hsdk_4xd > ... > arc-linux-gcc: error: unrecognized argument in option '-mcpu=hs4x_rel31 > > > Do you have any thoughts on what is wrong, please? There's two parts. The first part is I keep forgetting to update buildman to fetch the latest toolchains from kernel.org, it should be grabbing 11.1.0 now, not 9.2.0. The second part is that arc, nds32 and xtensa have non-standard toolchain locations, see tools/docker/Dockerfile for where to fetch. -- Tom

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[PATCH 0/5] board: mediatek: pumpkin: add fastboot support
by Fabien Parent 16 Dec '21

16 Dec '21

This series adds USB/Fastboot support on MT8516 Pumpkin board. Fabien Parent (5): arm: dts: mt8516: add support for USB arm: dts: mt8516-pumpkin: enable usb port board: mediatek: pumpkin: initialize usb device configs: pumpkin: enable USB gadget configs: pumpkin: enable fastboot arch/arm/dts/mt8516-pumpkin.dts | 10 ++++++++++ arch/arm/dts/mt8516.dtsi | 14 ++++++++++++++ board/mediatek/pumpkin/pumpkin.c | 17 +++++++++++++++++ configs/pumpkin_defconfig | 15 ++++++++++++++- 4 files changed, 55 insertions(+), 1 deletion(-) -- 2.28.0

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[PATCH] clk: fix clk_get_rate() documentation
by Giulio Benetti 15 Dec '21

15 Dec '21

clk_get_rate() can't and doesn't return -ve on error, it actually returns 0 on error or a value greater than 0 on success. So let's fix its documentation. Signed-off-by: Giulio Benetti <giulio.benetti(a)benettiengineering.com> --- include/clk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/clk.h b/include/clk.h index ca6b85fa6f..a833d6a27b 100644 --- a/include/clk.h +++ b/include/clk.h @@ -344,7 +344,7 @@ int clk_free(struct clk *clk); * * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). - * @return clock rate in Hz, or -ve error code. + * @return clock rate in Hz on success, or 0 on error. */ ulong clk_get_rate(struct clk *clk); -- 2.25.1

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[PATCH 0/3] dtoc: Improve support for 'ranges' property
by Simon Glass 07 Dec '21

07 Dec '21

An empty ranges property confuses dtoc at present and it dies with an error. This series fixes this and a few related things. Simon Glass (3): dtoc: Rename is_wider_than() to reduce confusion dtoc: Fix widening an int array to an int dtoc: Support widening a bool value arch/sandbox/dts/sandbox.dtsi | 2 ++ test/dm/of_platdata.c | 7 ++--- tools/dtoc/fdt.py | 40 +++++++++++++++++++--------- tools/dtoc/test/dtoc_test_simple.dts | 2 ++ tools/dtoc/test_dtoc.py | 9 ++++--- tools/dtoc/test_fdt.py | 29 +++++++++++++++++--- 6 files changed, 68 insertions(+), 21 deletions(-) -- 2.32.0.432.gabb21c7263-goog

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[PATCH v2 1/3] phy-sun4i-usb: Fix sun8i_r40_cfg
by qianfanguijin＠163.com 07 Dec '21

07 Dec '21

From: qianfan Zhao <qianfanguijin(a)163.com> the r40 has the same configurations with a33, disable enable_pmu_unk1 and phy0_dual_route feature. Signed-off-by: qianfan Zhao <qianfanguijin(a)163.com> --- drivers/phy/allwinner/phy-sun4i-usb.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index 5723c98032..5ea05a207d 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -589,8 +589,6 @@ static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = { .disc_thresh = 3, .phyctl_offset = REG_PHYCTL_A33, .dedicated_clocks = true, - .enable_pmu_unk1 = true, - .phy0_dual_route = true, }; static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = { -- 2.17.1

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[PATCH v2 3/6] clk: sunxi: v3s: fix tabs / spaces
by Andreas Rehn 07 Dec '21

07 Dec '21

align CLK_USB_PHY0 with tabs Signed-off-by: Andreas Rehn <rehn.andreas86(a)gmail.com> --- drivers/clk/sunxi/clk_v3s.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 55fc597043..bc6b7b4870 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -29,7 +29,7 @@ static struct ccu_clk_gate v3s_gates[] = { [CLK_SPI0] = GATE(0x0a0, BIT(31)), - [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), + [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), }; static struct ccu_reset v3s_resets[] = { -- 2.25.1

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