July 2021 - U-Boot

[PATCH] dtoc: Check that a parent is not missing
by Simon Glass 31 Jul '21

31 Jul '21

With of-platdata-inst we want to set up a reference to each devices' parent device, if there is one. If we find that the device has a parent (i.e. is not a root node) but it is not in the list of devices being written, then we cannot create the reference. Report an error in this case, since it indicates that the parent node is either missing a compatible string, is disabled, or perhaps does not have any properties because it was not tagged for SPL. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- tools/dtoc/dtb_platdata.py | 9 ++++++++ tools/dtoc/test/dtoc_test_noparent.dts | 32 ++++++++++++++++++++++++++ tools/dtoc/test_dtoc.py | 10 ++++++++ 3 files changed, 51 insertions(+) create mode 100644 tools/dtoc/test/dtoc_test_noparent.dts diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index 2d42480a9a5..a951a5a2264 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -749,6 +749,15 @@ class DtbPlatdata(): break if node.parent and node.parent.parent: + if node.parent not in self._valid_nodes: + # This might indicate that the parent node is not in the + # SPL/TPL devicetree but the child is. For example if we are + # dealing with of-platdata in TPL, the parent has a + # u-boot,dm-spl tag but the child has u-boot,dm-pre-reloc. In + # this case the child node exists in TPL but the parent does + # not. + raise ValueError("Node '%s' requires parent node '%s' but it is not in the valid list" % + (node.path, node.parent.path)) self.buf('\t.parent\t\t= DM_DEVICE_REF(%s),\n' % node.parent.var_name) if priv_name: diff --git a/tools/dtoc/test/dtoc_test_noparent.dts b/tools/dtoc/test/dtoc_test_noparent.dts new file mode 100644 index 00000000000..5a820301e72 --- /dev/null +++ b/tools/dtoc/test/dtoc_test_noparent.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test device tree file for dtoc + * + * Copyright 2017 Google, Inc + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + i2c@0 { + compatible = "sandbox,i2c"; + u-boot,dm-pre-tpl; + #address-cells = <1>; + #size-cells = <0>; + spl-test { + u-boot,dm-pre-reloc; + compatible = "sandbox,spl-test"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + pmic@9 { + compatible = "sandbox,pmic"; + u-boot,dm-pre-reloc; + reg = <9>; + low-power; + }; + }; + }; +}; diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index 0b2805feed2..863ede90b7a 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -1830,3 +1830,13 @@ U_BOOT_DRVINFO(spl_test2) = { dtb_file = get_dtb_file('dtoc_test_single_reg.dts') output = tools.GetOutputFilename('output') self.run_test(['struct'], dtb_file, output) + + def test_missing_parent(self): + """Test detection of a parent node with no properties""" + dtb_file = get_dtb_file('dtoc_test_noparent.dts', capture_stderr=True) + output = tools.GetOutputFilename('output') + with self.assertRaises(ValueError) as exc: + self.run_test(['device'], dtb_file, output, instantiate=True) + self.assertIn("Node '/i2c@0/spl-test/pmic@9' requires parent node " + "'/i2c@0/spl-test' but it is not in the valid list", + str(exc.exception)) -- 2.32.0.93.g670b81a890-goog

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[PATCH 1/2] pinctrl: change result for unsupported API
by Patrick Delaunay 31 Jul '21

31 Jul '21

Use the return value ENOSYS for unsupported API - pinctrl_generic_set_state - pinctrl_select_state Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- include/dm/pinctrl.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 695e78ad0d..8b869c4fbf 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -495,7 +495,7 @@ int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config); static inline int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config) { - return -EINVAL; + return -ENOSYS; } #endif @@ -512,7 +512,7 @@ int pinctrl_select_state(struct udevice *dev, const char *statename); static inline int pinctrl_select_state(struct udevice *dev, const char *statename) { - return -EINVAL; + return -ENOSYS; } #endif -- 2.25.1

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[PATCH 1/1] lib/ecdsa: Fix LibreSSL before v2.7.0
by Artem Panfilov 31 Jul '21

31 Jul '21

Fix LibreSSL compilation for versions before v2.7.0. Fix following compilation issue when CONFIG_TOOLS_LIBCRYPTO is enabled: tools/lib/ecdsa/ecdsa-libcrypto.o: In function `prepare_ctx': ecdsa-libcrypto.c:(.text+0x94): undefined reference to `OPENSSL_init_ssl' ecdsa-libcrypto.c:(.text+0x148): undefined reference to `EC_GROUP_order_bits' tools/lib/ecdsa/ecdsa-libcrypto.o: In function `ecdsa_check_signature.isra.0': ecdsa-libcrypto.c:(.text+0x32c): undefined reference to `ECDSA_SIG_set0' tools/lib/ecdsa/ecdsa-libcrypto.o: In function `ecdsa_sign': ecdsa-libcrypto.c:(.text+0x42c): undefined reference to `ECDSA_SIG_get0' ecdsa-libcrypto.c:(.text+0x443): undefined reference to `BN_bn2binpad' ecdsa-libcrypto.c:(.text+0x455): undefined reference to `BN_bn2binpad' tools/lib/ecdsa/ecdsa-libcrypto.o: In function `ecdsa_add_verify_data': ecdsa-libcrypto.c:(.text+0x5fa): undefined reference to `EC_GROUP_order_bits' ecdsa-libcrypto.c:(.text+0x642): undefined reference to `EC_POINT_get_affine_coordinates' Signed-off-by: Artem Panfilov <panfilov.artyom(a)gmail.com> --- lib/ecdsa/ecdsa-libcrypto.c | 80 ++++++++++++++++++++++++++++++++++++- 1 file changed, 79 insertions(+), 1 deletion(-) diff --git a/lib/ecdsa/ecdsa-libcrypto.c b/lib/ecdsa/ecdsa-libcrypto.c index 1757a14562..50aa093acd 100644 --- a/lib/ecdsa/ecdsa-libcrypto.c +++ b/lib/ecdsa/ecdsa-libcrypto.c @@ -24,6 +24,70 @@ #include <openssl/ec.h> #include <openssl/bn.h> +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ + (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) +#include <openssl/err.h> + +static int EC_GROUP_order_bits(const EC_GROUP *group) +{ + int ret = 0; + BIGNUM *order; + + if (!group) + return ret; + + order = BN_new(); + + if (!order) { + ERR_clear_error(); + return ret; + } + + if (!EC_GROUP_get_order(group, order, NULL)) { + ERR_clear_error(); + BN_free(order); + return ret; + } + + ret = BN_num_bits(order); + BN_free(order); + return ret; +} + +static void ECDSA_SIG_get0(const ECDSA_SIG *sig, const BIGNUM **pr, const BIGNUM **ps) +{ + if (pr != NULL) + *pr = sig->r; + if (ps != NULL) + *ps = sig->s; +} + +static int ECDSA_SIG_set0(ECDSA_SIG *sig, BIGNUM *r, BIGNUM *s) +{ + if (r == NULL || s == NULL) + return 0; + BN_clear_free(sig->r); + BN_clear_free(sig->s); + sig->r = r; + sig->s = s; + return 1; +} + +int BN_bn2binpad(const BIGNUM *a, unsigned char *to, int tolen) +{ + int n = BN_num_bytes(a); + + if (n < 0 || n > tolen) + return -1; + + memset(to, 0, tolen - n); + if (BN_bn2bin(a, to + tolen - n) < 0) + return -1; + + return tolen; +} +#endif + /* Image signing context for openssl-libcrypto */ struct signer { EVP_PKEY *evp_key; /* Pointer to EVP_PKEY object */ @@ -34,9 +98,18 @@ struct signer { static int alloc_ctx(struct signer *ctx, const struct image_sign_info *info) { + int ret = 0; + memset(ctx, 0, sizeof(*ctx)); - if (!OPENSSL_init_ssl(0, NULL)) { +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ +(defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) + ret = SSL_library_init(); +#else + ret = OPENSSL_init_ssl(0, NULL); +#endif + + if (!ret) { fprintf(stderr, "Failure to init SSL library\n"); return -1; } @@ -285,7 +358,12 @@ static int do_add(struct signer *ctx, void *fdt, const char *key_node_name) x = BN_new(); y = BN_new(); point = EC_KEY_get0_public_key(ctx->ecdsa_key); +#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ +(defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x02070000fL) + EC_POINT_get_affine_coordinates_GFp(group, point, x, y, NULL); +#else EC_POINT_get_affine_coordinates(group, point, x, y, NULL); +#endif ret = fdt_setprop_string(fdt, key_node, "ecdsa,curve", curve_name); if (ret < 0) -- 2.25.1

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[PATCH 1/4] clk: k210: Fix checking if ulongs are less than 0
by Sean Anderson 31 Jul '21

31 Jul '21

Some clock functions return ulong but still have "negative" errors. To deal with this, cast the relevant arguments to long. Fixes: 609bd60b94 ("clk: k210: Rewrite to remove CCF") Reported-by: Coverity Scan <scan-admin(a)coverity.com> Signed-off-by: Sean Anderson <seanga2(a)gmail.com> --- drivers/clk/clk_kendryte.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk_kendryte.c b/drivers/clk/clk_kendryte.c index 3148756968..37bd624eca 100644 --- a/drivers/clk/clk_kendryte.c +++ b/drivers/clk/clk_kendryte.c @@ -439,7 +439,7 @@ static const struct k210_clk_params k210_clks[] = { #ifdef CONFIG_CLK_K210_SET_RATE static int k210_pll_enable(struct k210_clk_priv *priv, int id); static int k210_pll_disable(struct k210_clk_priv *priv, int id); -static ulong k210_pll_get_rate(struct k210_clk_priv *priv, int id, ulong rate_in); +static ulong k210_pll_get_rate(struct k210_clk_priv *priv, int id, long rate_in); /* * The PLL included with the Kendryte K210 appears to be a True Circuits, Inc. @@ -841,7 +841,7 @@ TEST_STATIC int k210_pll_calc_config(u32 rate, u32 rate_in, } static ulong k210_pll_set_rate(struct k210_clk_priv *priv, int id, ulong rate, - ulong rate_in) + long rate_in) { int err; const struct k210_pll_params *pll = &k210_plls[id]; @@ -890,7 +890,7 @@ static ulong k210_pll_set_rate(struct k210_clk_priv *priv, int id, ulong rate, #endif /* CONFIG_CLK_K210_SET_RATE */ static ulong k210_pll_get_rate(struct k210_clk_priv *priv, int id, - ulong rate_in) + long rate_in) { u64 r, f, od; u32 reg = readl(priv->base + k210_plls[id].off); -- 2.32.0

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[PATCH u-boot-mvebu] arm64: a37xx: pinctrl: Correct PWM pins definitions
by Marek Behún 31 Jul '21

31 Jul '21

The PWM pins on North Bridge on Armada 37xx can be configured into PWM or GPIO functions. When in PWM function, each pin can also be configured to drive low on 0 and tri-state on 1 (LED mode). The current definitions handle this by declaring two pin groups for each pin: - group "pwmN" with functions "pwm" and "gpio" - group "ledN_od" ("od" for open drain) with functions "led" and "gpio" This is semantically incorrect. The correct definition for each pin should be one group with three functions: "pwm", "led" and "gpio". Change the "pwmN" groups to support "led" function. Remove "ledN_od" groups. This cannot break backwards compatibility with older device trees: no device tree uses it since there is no PWM driver for this SOC yet. Also "ledN_od" groups are not even documented. Signed-off-by: Marek Behún <marek.behun(a)nic.cz> --- This was recently applied also in Linux, see https://lore.kernel.org/linux-gpio/CACRpkdbkWxw8wEOt2nsiYKLw+=TjFrJX=WYALup… --- .../pinctrl/marvell,armada-37xx-pinctrl.txt | 8 ++++---- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 17 ++++++++--------- 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt index 86ec11361c..3139a99fa9 100644 --- a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt +++ b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt @@ -38,19 +38,19 @@ group emmc_nb group pwm0 - pin 11 (GPIO1-11) - - functions pwm, gpio + - functions pwm, led, gpio group pwm1 - pin 12 - - functions pwm, gpio + - functions pwm, led, gpio group pwm2 - pin 13 - - functions pwm, gpio + - functions pwm, led, gpio group pwm3 - pin 14 - - functions pwm, gpio + - functions pwm, led, gpio group pmic1 - pin 7 diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c index b9d389e70f..1cf1f06f10 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -160,10 +160,14 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"), PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"), PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"), - PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"), - PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"), - PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"), - PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"), + PIN_GRP_GPIO_3("pwm0", 11, 1, BIT(3) | BIT(20), 0, BIT(20), BIT(3), + "pwm", "led"), + PIN_GRP_GPIO_3("pwm1", 11, 1, BIT(4) | BIT(21), 0, BIT(21), BIT(4), + "pwm", "led"), + PIN_GRP_GPIO_3("pwm2", 11, 1, BIT(5) | BIT(22), 0, BIT(22), BIT(5), + "pwm", "led"), + PIN_GRP_GPIO_3("pwm3", 11, 1, BIT(6) | BIT(23), 0, BIT(23), BIT(6), + "pwm", "led"), PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"), PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"), PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), @@ -177,11 +181,6 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) | BIT(13) | BIT(14) | BIT(19), BIT(1) | BIT(13) | BIT(14), BIT(1) | BIT(19), 18, 2, "gpio", "uart"), - PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"), - PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"), - PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"), - PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"), - }; static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { -- 2.31.1

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[PATCH u-boot-mvebu v3 00/41] kwboot / kwbimage improvements reducing image size
by Marek Behún 31 Jul '21

31 Jul '21

Hi Stefan and others, this is v3 of the series of improvements to kwboot, kwbimage and mvebu, with main motivation the reduction of KWB image size. CI successful, see https://dev.azure.com/u-boot/u-boot/_build/results?buildId=2569&view=results Changes since v2: - rebased 2 patches that wouldn't apply anymore - fixed controlcenterdc build (updated patch 39) - changed "main U-Boot" phrases to "U-Boot proper" in commit messages - added Stefan's Reviewed-by tags Changes since v1: - change of cover letter message + information about boot times added - some additional small fix patches are added - we do not remove the SPL code for loading U-Boot, but add the option to make BootROM do it. By default SPL code is used to load main U-Boot binary, since it seems to be faster than BootROM (at least on Turris Omnia). If users want to use BootROM for this, they need to disable the necessary media (SPI NOR / NAND / SATA) support in SPL This series makes correct usage of BootROM's code for loading U-Boot from NOR / NAND: currently, only SPL is read by BootROM and the main U-Boot is read by SPL. We can use BootROM to also load main U-Boot. This reduces the size of the u-boot-spl.bin by about ~7 KiB, since it does not need to contain code for reading NOR / NAND. This patch series makes it possible to use BootROM for this, but since SPL code may read the main U-Boot binary faster, we leave it to board maintainers to decide whether they want to use BootROM or SPL code to load the main U-Boot binary. (The rule of thumb, I guess, is to use SPL if you have enough space, and BootROM if you need the additional 7 KiB.) This patch series also reduces the size of the u-boot-spl.kwb binary by addutuibak ~29 KiB (depending on board, this is on Turris Omnia), by getting rid of the offseting of main U-Boot binary to a specific point on the boot device, and instead using information from the kwbimage header to find main U-Boot binary. On Turris Omnia, the size differences and boot time differences are: before after after with booting via BootROM u-boot-spl.kwb 901632 B 872960 B 864768 B u-boot-spl.bin 115526 B 115898 B 107994 B boot time 2426 ms 2411 ms 3283 ms As can be seen, after this patch series, when still loading main U-Boot binary via SPL code, the boot time is on Turris Omnia reduced from 2426 ms to 2411 ms. When booting via BootROM is preferred, the boot time increases to 3283 ms, but we save additional 7 KiB in the u-boot-spl.kwb binary. Before merging, this series should be tested on as many relevant boards as possible. The affected boards are: - clearfog - controlcenterdc - db-88f6720 - db-88f6820-amc - db-88f6820-gp - db-mv784mp-gp - ds414 - helios4 - theadorable_debug - turris_omnia - x530 Marek Behún (2): tools: kwbimage: Add constant for SDIO bootfrom tools: kwbimage: Cosmetic fix - remove redundant space character Pali Rohár (39): tools: kwbimage: Fix compilation without CONFIG_SYS_U_BOOT_OFFS tools: kwbimage: Simplify aligning and calculating checksum tools: kwbimage: Align SPI and NAND images to 256 bytes tools: kwbimage: Fix generation of SATA, SDIO and PCIe images tools: kwbimage: Don't crash when binary file name does not contain '/' tools: kwbimage: Fix check for v0 extended header checksum tools: kwbimage: Validate extended headers of v1 images tools: kwbimage: Validate data checksum of v1 images tools: kwbimage: Print size of binary header in kwbimage_print_header() tools: kwbimage: Use -a parameter (load address) for v1 images tools: kwbimage: Change maximum number of arguments in binary header to 256 tools: kwbimage: Fix calculating size of binary header tools: kwbimage: Add support for more BINARY headers tools: kwbimage: Don't parse PAYLOAD keyword tools: kwbimage: Add support for DATA command also for v1 images tools: kwbimage: Add support for a new DATA_DELAY command tools: kwbimage: Do not hide usage of secure header under CONFIG_ARMADA_38X tools: kwbimage: Mark all BootROM structures __packed tools: dumpimage: Fix crashing when trying to extract data from kwbimage tools: dumpimage: Show error message when trying to extract data from kwbimage tools: kwboot: Fix wrong parameter passed to read() tools: kwboot: Fix restoring terminal tools: kwboot: Print trailing newline after terminal is terminated tools: kwboot: Cosmetic fix - add missing curly brackets tools: kwboot: Check for v1 header size tools: kwboot: Fix checking image header version arm: mvebu: Fix return_to_bootrom() arm: mvebu: Mark return_to_bootrom() as a noreturn function arm: mvebu: Implement return_to_bootrom() via U-Boot's SPL framework arm: mvebu: Use U-Boot's SPL BootROM framework for booting from NAND/UART SPL: Add support for specifying offset between header and image SPL: Add support for parsing board / BootROM specific image types arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header arm: mvebu: Remove legacy U-Boot header from kwbimage v1 files tools: kwbimage: Remove v1 kwbimage SPL padding to CONFIG_SYS_U_BOOT_OFFS bytes arm: mvebu: Remove unused macro CONFIG_SYS_U_BOOT_OFFS arm: mvebu: gdsys: Remove custom spl_board_init() kwbimage: Add support for extracting images via dumpimage tool kwbimage: Update help message about how to extract from an existing image Makefile | 2 +- arch/arm/mach-mvebu/Kconfig | 26 +- arch/arm/mach-mvebu/include/mach/cpu.h | 2 +- arch/arm/mach-mvebu/lowlevel_spl.S | 3 +- arch/arm/mach-mvebu/spl.c | 248 ++++++++++++-- board/gdsys/a38x/Makefile | 2 +- board/gdsys/a38x/spl.c | 20 -- board/kobol/helios4/Kconfig | 5 - board/solidrun/clearfog/Kconfig | 5 - common/spl/Kconfig | 4 +- common/spl/spl.c | 9 + common/spl/spl_mmc.c | 16 +- common/spl/spl_sata.c | 12 +- common/spl/spl_spi.c | 2 +- configs/clearfog_defconfig | 1 - configs/controlcenterdc_defconfig | 2 - configs/db-88f6720_defconfig | 1 - configs/db-88f6820-amc_defconfig | 1 - configs/db-88f6820-gp_defconfig | 2 - configs/db-mv784mp-gp_defconfig | 1 - configs/ds414_defconfig | 1 - configs/helios4_defconfig | 1 - configs/maxbcm_defconfig | 1 - configs/theadorable_debug_defconfig | 1 - configs/turris_omnia_defconfig | 1 - configs/x530_defconfig | 1 - include/configs/clearfog.h | 7 +- include/configs/controlcenterdc.h | 9 - include/configs/db-88f6720.h | 3 - include/configs/db-88f6820-amc.h | 5 - include/configs/db-88f6820-gp.h | 7 - include/configs/db-mv784mp-gp.h | 3 - include/configs/ds414.h | 5 - include/configs/helios4.h | 7 +- include/configs/theadorable.h | 3 - include/configs/turris_omnia.h | 7 - include/configs/x530.h | 3 - include/spl.h | 1 + scripts/config_whitelist.txt | 1 - tools/Makefile | 8 - tools/kwbimage.c | 437 ++++++++++++++++++------- tools/kwbimage.h | 54 ++- tools/kwboot.c | 24 +- 43 files changed, 651 insertions(+), 303 deletions(-) delete mode 100644 board/gdsys/a38x/spl.c -- 2.31.1

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[PATCH 1/2] x86: tsc: Rename X86_TSC_TIMER_EARLY_FREQ to X86_TSC_TIMER_FREQ
by Bin Meng 31 Jul '21

31 Jul '21

Currently there are two places to specify the x86 TSC timer frequency with one in Kconfig used for early timer and the other one in device tree used when the frequency cannot be determined from hardware. This may potentially create an inconsistent config where the 2 values do not match. Let's use the one specified in Kconfig in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- arch/x86/cpu/quark/Kconfig | 4 ++-- arch/x86/dts/galileo.dts | 2 +- drivers/timer/Kconfig | 8 ++++---- drivers/timer/tsc_timer.c | 5 +++-- 4 files changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 430cce184d..61bb5792c8 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -130,8 +130,8 @@ config SYS_CAR_SIZE Space in bytes in eSRAM used as Cache-As-ARM (CAR). Note this size must not exceed eSRAM's total size. -config X86_TSC_TIMER_EARLY_FREQ +config X86_TSC_TIMER_FREQ int - default 400 + default 400000000 endif diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 501047124e..b5ba1181dd 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -42,7 +42,7 @@ }; tsc-timer { - clock-frequency = <400000000>; + clock-frequency = <CONFIG_X86_TSC_TIMER_FREQ>; }; mrc { diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index ee81dfa776..8913142654 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -124,12 +124,12 @@ config RENESAS_OSTM_TIMER Enables support for the Renesas OSTM Timer driver. This timer is present on Renesas RZ/A1 R7S72100 SoCs. -config X86_TSC_TIMER_EARLY_FREQ - int "x86 TSC timer frequency in MHz when used as the early timer" +config X86_TSC_TIMER_FREQ + int "x86 TSC timer frequency in Hz" depends on X86_TSC_TIMER - default 1000 + default 1000000000 help - Sets the estimated CPU frequency in MHz when TSC is used as the + Sets the estimated CPU frequency in Hz when TSC is used as the early timer and the frequency can neither be calibrated via some hardware ways, nor got from device tree at the time when device tree is not available yet. diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 7d19a99622..adef50c374 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -425,12 +425,13 @@ static void tsc_timer_ensure_setup(bool early) goto done; if (early) - fast_calibrate = CONFIG_X86_TSC_TIMER_EARLY_FREQ; + gd->arch.clock_rate = CONFIG_X86_TSC_TIMER_FREQ; else return; done: - gd->arch.clock_rate = fast_calibrate * 1000000; + if (!gd->arch.clock_rate) + gd->arch.clock_rate = fast_calibrate * 1000000; } gd->arch.tsc_inited = true; } -- 2.25.1

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[PATCH] x86: kconfig: Drop ROM_NEEDS_BLOBS and BUILD_ROM
by Bin Meng 31 Jul '21

31 Jul '21

These 2 options are no longer needed as now binman is used to build u-boot.rom. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- Kconfig | 21 --------------------- arch/x86/Kconfig | 2 -- arch/x86/cpu/quark/Kconfig | 1 - doc/arch/x86.rst | 13 ++----------- 4 files changed, 2 insertions(+), 35 deletions(-) diff --git a/Kconfig b/Kconfig index 76c0cdacb0..a6c42b902f 100644 --- a/Kconfig +++ b/Kconfig @@ -343,27 +343,6 @@ config HAS_ROM Enables building of a u-boot.rom target. This collects U-Boot and any necessary binary blobs. -config ROM_NEEDS_BLOBS - bool - depends on HAS_ROM - help - Enable this if building the u-boot.rom target needs binary blobs, and - so cannot be done normally. In this case, U-Boot will only build the - ROM if the required blobs exist. If not, you will see an warning like: - - Image 'main-section' is missing external blobs and is non-functional: - intel-descriptor intel-me intel-refcode intel-vga intel-mrc - -config BUILD_ROM - bool "Build U-Boot as BIOS replacement" - depends on HAS_ROM - default y if !ROM_NEEDS_BLOBS - help - This option allows to build a ROM version of U-Boot. - The build process generally requires several binary blobs - which are not shipped in the U-Boot source tree. - Please, see doc/arch/x86.rst for details. - config SPL_IMAGE string "SPL image used in the combined SPL+U-Boot image" default "spl/boot.bin" if ARCH_AT91 && SPL_NAND_SUPPORT diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 970bdff37f..300b48505e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -364,7 +364,6 @@ config HAVE_FSP depends on !EFI select USE_HOB select HAS_ROM - select ROM_NEEDS_BLOBS help Select this option to add an Firmware Support Package binary to the resulting U-Boot image. It is a binary blob which U-Boot uses @@ -525,7 +524,6 @@ config ENABLE_MRC_CACHE config HAVE_MRC bool "Add a System Agent binary" select HAS_ROM - select ROM_NEEDS_BLOBS depends on !HAVE_FSP help Select this option to add a System Agent binary to diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 2fee38aed7..430cce184d 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -24,7 +24,6 @@ if INTEL_QUARK config HAVE_RMU bool "Add a Remote Management Unit (RMU) binary" - select ROM_NEEDS_BLOBS help Select this option to add a Remote Management Unit (RMU) binary to the resulting U-Boot image. It is a data block (up to 64K) of diff --git a/doc/arch/x86.rst b/doc/arch/x86.rst index 2ebfed871b..0fdd43be80 100644 --- a/doc/arch/x86.rst +++ b/doc/arch/x86.rst @@ -42,17 +42,8 @@ Build Instructions for U-Boot as BIOS replacement (bare mode) ------------------------------------------------------------- Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a little bit tricky, as generally it requires several binary blobs which are not -shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is -not turned on by default in the U-Boot source tree. Firstly, you need turn it -on by enabling the ROM build either via an environment variable:: - - $ export BUILD_ROM=y - -or via configuration:: - - CONFIG_BUILD_ROM=y - -Both tell the Makefile to build u-boot.rom as a target. +shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build may +print some warnings if required binary blobs (e.g.: FSP) are not present. CPU Microcode ------------- -- 2.25.1

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[PATCH] x86: crownbay: Adjust VGA rom address
by Bin Meng 31 Jul '21

31 Jul '21

binman complains when binary blobs are present: Node '/binman/rom/intel-vga': Offset 0xfff90000 (4294508544) overlaps with previous entry '/binman/rom/u-boot-dtb-with-ucode' ending at 0xfff9204c (4294516812) Adjust VGA rom address to 0xfffa0000 so that u-boot.rom image can be successfully built again. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- configs/crownbay_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 0258f31089..af8fb0d805 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -10,6 +10,7 @@ CONFIG_VENDOR_INTEL=y CONFIG_TARGET_CROWNBAY=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y +CONFIG_VGA_BIOS_ADDR=0xfffa0000 CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_FIT=y -- 2.25.1

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[PATCH v1 1/1] x86: tangier: Fix DMA controller IRQ polarity in CSRT
by Andy Shevchenko 31 Jul '21

31 Jul '21

IRQ polarity in CSRT has the same definition as by ACPI specification chapter 19.6.64 "Interrupt (Interrupt Resource Descriptor Macro)", i.e. ActiveHigh is 0, and ActiveLow is 1. On Intel Tangier the DMA controller IRQ polarity is ActiveHigh. Note, in DSDT (see southcluster.asl) it's described correctly. Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller") Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/cpu/tangier/acpi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index 41bd177e095f..82f4ce5a34a4 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -89,8 +89,8 @@ static u32 acpi_fill_csrt_dma(struct acpi_csrt_group *grp) si->mmio_base_low = 0xff192000; si->mmio_base_high = 0; si->gsi_interrupt = 32; - si->interrupt_polarity = 1; - si->interrupt_mode = 0; + si->interrupt_polarity = 0; /* Active High */ + si->interrupt_mode = 0; /* Level triggered */ si->num_channels = 8; si->dma_address_width = 32; si->base_request_line = 0; -- 2.30.2

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