May 2021 - U-Boot

[PATCH] riscv: booti: do not force relocation if force_reloc is not set
by Vitaly Wool 15 Jul '21

15 Jul '21

If force_reloc flag is not set and booti is called for an address ouside RAM (i. e. QSPI NOR flash), we should honor that and not try to force relocation in a bogus fashion. Signed-off-by: Vitaly Wool <vitaly.wool(a)konsulko.com> --- arch/riscv/lib/image.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c index 7357d3b07d..2032c2c399 100644 --- a/arch/riscv/lib/image.c +++ b/arch/riscv/lib/image.c @@ -48,7 +48,12 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, return -EINVAL; } *size = lhdr->image_size; - *relocated_addr = gd->ram_base + lhdr->text_offset; + if (force_reloc || + (gd->ram_base <= image && image < gd->ram_base + gd->ram_size)) { + *relocated_addr = gd->ram_base + lhdr->text_offset; + } else { + *relocated_addr = image; + } unmap_sysmem(lhdr); -- 2.29.2

2 1

[[PATCH] tools: image-host: fix wrong return value
by liu.ming50＠gmail.com 15 Jul '21

15 Jul '21

From: Ming Liu <liu.ming50(a)gmail.com> The return value '-ENOSPC' of fit_set_timestamp function does not match the caller fit_image_write_sig's expection which is '-FDT_ERR_NOSPACE'. Fix it by not calling fit_set_timestamp, but call fdt_setprop instead. This fixes a following mkimage error: | Can't write signature for 'signature@1' signature node in | 'conf(a)imx6ull-colibri-wifi-eval-v3.dtb' conf node: <unknown error> | mkimage Can't add hashes to FIT blob: -1 Signed-off-by: Ming Liu <liu.ming50(a)gmail.com> --- tools/image-host.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/image-host.c b/tools/image-host.c index 270d36fe45..73095461a7 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -132,8 +132,10 @@ static int fit_image_write_sig(void *fit, int noffset, uint8_t *value, if (!ret) { time_t timestamp = imagetool_get_source_date(cmdname, time(NULL)); + uint32_t t = cpu_to_uimage(timestamp); - ret = fit_set_timestamp(fit, noffset, timestamp); + ret = fdt_setprop(fit, noffset, FIT_TIMESTAMP_PROP, &t, + sizeof(uint32_t)); } if (region_prop && !ret) { uint32_t strdata[2]; -- 2.29.0

3 2

[PATCH] tools/fitimage: add missing linebreak for some messages
by Sven Roederer 15 Jul '21

15 Jul '21

Add a linebreak to two messages and fix punctuation. Signed-off-by: Sven Roederer <devel-sven(a)geroedel.de> --- tools/fit_image.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/fit_image.c b/tools/fit_image.c index ae30f80783..f4f372ba62 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -524,7 +524,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) /* Check if an offset for the external data was set. */ if (params->external_offset > 0) { if (params->external_offset < new_size) { - debug("External offset %x overlaps FIT length %x", + debug("External offset %x overlaps FIT length %x\n", params->external_offset, new_size); ret = -EINVAL; goto err; @@ -737,7 +737,7 @@ static int fit_handle_file(struct image_tool_params *params) if (strlen (params->imagefile) + strlen (MKIMAGE_TMPFILE_SUFFIX) + 1 > sizeof (tmpfile)) { fprintf (stderr, "%s: Image file name (%s) too long, " - "can't create tmpfile", + "can't create tmpfile.\n", params->imagefile, params->cmdname); return (EXIT_FAILURE); } -- 2.20.1

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[PATCH] fixdep: remove leftover handling of IS_BUILTIN/IS_MODULE
by Rasmus Villemoes 15 Jul '21

15 Jul '21

I removed CONFIG_IS_BUILTIN and CONFIG_IS_MODULE in commit 7d78a4547d ("linux/kconfig.h: remove unused helper macros"), but fixdep.c still looks for those. It's harmless, but also pointless and possibly confusing to a future reader. Fixes: 7d78a4547d ("linux/kconfig.h: remove unused helper macros") Signed-off-by: Rasmus Villemoes <rasmus.villemoes(a)prevas.dk> --- scripts/basic/fixdep.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c index 6d59cf8c07..5ced0f6b06 100644 --- a/scripts/basic/fixdep.c +++ b/scripts/basic/fixdep.c @@ -257,13 +257,9 @@ static void parse_config_file(const char *p) /* * U-Boot also handles * CONFIG_IS_ENABLED(...) - * CONFIG_IS_BUILTIN(...) - * CONFIG_IS_MODULE(...) * CONFIG_VAL(...) */ if ((q - p == 10 && !memcmp(p, "IS_ENABLED(", 11)) || - (q - p == 10 && !memcmp(p, "IS_BUILTIN(", 11)) || - (q - p == 9 && !memcmp(p, "IS_MODULE(", 10)) || (q - p == 3 && !memcmp(p, "VAL(", 4))) { p = q + 1; q = p; -- 2.29.2

2 1

[PATCH] mkimage: allow -l to work on block devices on Linux
by yann.dirson＠blade-group.com 15 Jul '21

15 Jul '21

From: Yann Dirson <yann(a)blade-group.com> When "mkimage -l" was run on a block device it would fail with erroneous message, because fstat reports a size of zero for those: mkimage: Bad size: "/dev/sdb4" is not valid image This patch identifies the "is a block device" case and reports it as such, and if it knows how to determine the size of a block device on the current OS, proceeds. As shown in http://www.mit.edu/afs.new/sipb/user/tytso/e2fsprogs/lib/blkid/getsize.c this is no portable task, and I only handled the case of a modern Linux kernel, which is what I can test. Signed-off-by: Yann Dirson <yann(a)blade-group.com> --- tools/mkimage.c | 30 +++++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/tools/mkimage.c b/tools/mkimage.c index cc7b242faf..302bfcf971 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -12,6 +12,9 @@ #include "imximage.h" #include <image.h> #include <version.h> +#ifdef __linux__ +#include <sys/ioctl.h> +#endif static void copy_file(int, const char *, int); @@ -402,6 +405,7 @@ int main(int argc, char **argv) } if (params.lflag || params.fflag) { + uint64_t size; /* * list header information of existing image */ @@ -412,14 +416,34 @@ int main(int argc, char **argv) exit (EXIT_FAILURE); } - if ((unsigned)sbuf.st_size < tparams->header_size) { + if ((sbuf.st_mode & S_IFMT) == S_IFBLK) { +#ifdef __linux__ +#if defined(__linux__) && defined(_IOR) && !defined(BLKGETSIZE64) +#define BLKGETSIZE64 _IOR(0x12,114,size_t) /* return device size in bytes (u64 *arg) */ +#endif + if (ioctl(ifd, BLKGETSIZE64, &size) < 0) { + fprintf (stderr, + "%s: failed to get size of block device \"%s\"\n", + params.cmdname, params.imagefile); + exit (EXIT_FAILURE); + } +#else fprintf (stderr, - "%s: Bad size: \"%s\" is not valid image\n", + "%s: \"%s\" is block device, don't know how to get its size\n", params.cmdname, params.imagefile); exit (EXIT_FAILURE); +#endif + } else if ((unsigned)sbuf.st_size < tparams->header_size) { + fprintf (stderr, + "%s: Bad size: \"%s\" is not valid image: size %ld < %u\n", + params.cmdname, params.imagefile, + sbuf.st_size, tparams->header_size); + exit (EXIT_FAILURE); + } else { + size = sbuf.st_size; } - ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0); + ptr = mmap(0, size, PROT_READ, MAP_SHARED, ifd, 0); if (ptr == MAP_FAILED) { fprintf (stderr, "%s: Can't read %s: %s\n", params.cmdname, params.imagefile, -- 2.30.2

2 1

[PATCH 1/4] phy: phy-imx8mq-usb: Add USB PHY driver for i.MX8MQ
by Ye Li 13 Jul '21

13 Jul '21

Add the USB PHY driver for i.MX8MQ to work with DWC3 USB controller. Signed-off-by: Ye Li <ye.li(a)nxp.com> --- drivers/phy/Kconfig | 7 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-imx8mq-usb.c | 197 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 205 insertions(+) create mode 100644 drivers/phy/phy-imx8mq-usb.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 008186a..09cb744 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -268,5 +268,12 @@ config PHY_MTK_TPHY multi-ports is first version, otherwise is second veriosn, so you can easily distinguish them by banks layout. +config PHY_IMX8MQ_USB + bool "NXP i.MX8MQ USB PHY Driver" + depends on PHY + depends on IMX8MQ + help + Support the USB3.0 PHY in NXP i.MX8MQ SoC + source "drivers/phy/rockchip/Kconfig" endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 3c4a673..c6ad3b1 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_MT7620_USB_PHY) += mt7620-usb-phy.o obj-$(CONFIG_MT76X8_USB_PHY) += mt76x8-usb-phy.o obj-$(CONFIG_PHY_DA8XX_USB) += phy-da8xx-usb.o obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o +obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o diff --git a/drivers/phy/phy-imx8mq-usb.c b/drivers/phy/phy-imx8mq-usb.c new file mode 100644 index 0000000..afbc7ad --- /dev/null +++ b/drivers/phy/phy-imx8mq-usb.c @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + * + */ + +#include <common.h> +#include <asm/io.h> +#include <dm.h> +#include <errno.h> +#include <generic-phy.h> +#include <linux/bitops.h> +#include <linux/err.h> +#include <clk.h> + +#define PHY_CTRL0 0x0 +#define PHY_CTRL0_REF_SSP_EN BIT(2) +#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5) +#define PHY_CTRL0_FSEL_24M 0x2a +#define PHY_CTRL0_FSEL_100M 0x27 +#define PHY_CTRL0_SSC_RANGE_MASK GENMASK(23, 21) +#define PHY_CTRL0_SSC_RANGE_4003PPM (0x2 << 21) + +#define PHY_CTRL1 0x4 +#define PHY_CTRL1_RESET BIT(0) +#define PHY_CTRL1_COMMONONN BIT(1) +#define PHY_CTRL1_ATERESET BIT(3) +#define PHY_CTRL1_DCDENB BIT(17) +#define PHY_CTRL1_CHRGSEL BIT(18) +#define PHY_CTRL1_VDATSRCENB0 BIT(19) +#define PHY_CTRL1_VDATDETENB0 BIT(20) + +#define PHY_CTRL2 0x8 +#define PHY_CTRL2_TXENABLEN0 BIT(8) +#define PHY_CTRL2_OTG_DISABLE BIT(9) + +#define PHY_CTRL3 0xc +#define PHY_CTRL3_COMPDISTUNE_MASK GENMASK(2, 0) +#define PHY_CTRL3_TXPREEMP_TUNE_MASK GENMASK(16, 15) +#define PHY_CTRL3_TXPREEMP_TUNE_SHIFT 15 +#define PHY_CTRL3_TXRISE_TUNE_MASK GENMASK(21, 20) +#define PHY_CTRL3_TXRISE_TUNE_SHIFT 20 +/* 1111: +24% ... 0000: -6% step: 2% */ +#define PHY_CTRL3_TXVREF_TUNE_MASK GENMASK(25, 22) +#define PHY_CTRL3_TXVREF_TUNE_SHIFT 22 +#define PHY_CTRL3_TX_VBOOST_LEVEL_MASK GENMASK(31, 29) +#define PHY_CTRL3_TX_VBOOST_LEVEL_SHIFT 29 + +#define PHY_CTRL4 0x10 +#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(20, 15) +#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_SHIFT 15 + +#define PHY_CTRL5 0x14 +#define PHY_CTRL5_DMPWD_OVERRIDE_SEL BIT(23) +#define PHY_CTRL5_DMPWD_OVERRIDE BIT(22) +#define PHY_CTRL5_DPPWD_OVERRIDE_SEL BIT(21) +#define PHY_CTRL5_DPPWD_OVERRIDE BIT(20) +#define PHY_CTRL5_PCS_TX_SWING_FULL_MASK GENMASK(6, 0) + +#define PHY_CTRL6 0x18 +#define PHY_CTRL6_RXTERM_OVERRIDE_SEL BIT(29) +#define PHY_CTRL6_ALT_CLK_EN BIT(1) +#define PHY_CTRL6_ALT_CLK_SEL BIT(0) + +#define PHY_STS0 0x40 +#define PHY_STS0_OTGSESSVLD BIT(7) +#define PHY_STS0_CHGDET BIT(4) +#define PHY_STS0_FSVPLUS BIT(3) +#define PHY_STS0_FSVMINUS BIT(2) + +struct imx8mq_usb_phy { +#if CONFIG_IS_ENABLED(CLK) + struct clk phy_clk; +#endif + void __iomem *base; +}; + +static const struct udevice_id imx8mq_usb_phy_of_match[] = { + { + .compatible = "fsl,imx8mq-usb-phy", + }, + {}, +}; + +static int imx8mq_usb_phy_init(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); + u32 value; + + value = readl(imx_phy->base + PHY_CTRL1); + value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 | + PHY_CTRL1_COMMONONN); + value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET; + writel(value, imx_phy->base + PHY_CTRL1); + + value = readl(imx_phy->base + PHY_CTRL0); + value |= PHY_CTRL0_REF_SSP_EN; + value &= ~PHY_CTRL0_SSC_RANGE_MASK; + value |= PHY_CTRL0_SSC_RANGE_4003PPM; + writel(value, imx_phy->base + PHY_CTRL0); + + value = readl(imx_phy->base + PHY_CTRL2); + value |= PHY_CTRL2_TXENABLEN0; + writel(value, imx_phy->base + PHY_CTRL2); + + value = readl(imx_phy->base + PHY_CTRL1); + value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET); + writel(value, imx_phy->base + PHY_CTRL1); + + return 0; +} + +static int imx8mq_usb_phy_power_on(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); + u32 value; + +#if CONFIG_IS_ENABLED(CLK) + int ret; + ret = clk_enable(&imx_phy->phy_clk); + if (ret) { + printf("Failed to enable usb phy clock\n"); + return ret; + } +#endif + + /* Disable rx term override */ + value = readl(imx_phy->base + PHY_CTRL6); + value &= ~PHY_CTRL6_RXTERM_OVERRIDE_SEL; + writel(value, imx_phy->base + PHY_CTRL6); + + return 0; +} + +static int imx8mq_usb_phy_power_off(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct imx8mq_usb_phy *imx_phy = dev_get_priv(dev); + u32 value; + + /* Override rx term to be 0 */ + value = readl(imx_phy->base + PHY_CTRL6); + value |= PHY_CTRL6_RXTERM_OVERRIDE_SEL; + writel(value, imx_phy->base + PHY_CTRL6); + +#if CONFIG_IS_ENABLED(CLK) + clk_disable(&imx_phy->phy_clk); +#endif + + return 0; +} + +static int imx8mq_usb_phy_exit(struct phy *usb_phy) +{ + return imx8mq_usb_phy_power_off(usb_phy); +} + +struct phy_ops imx8mq_usb_phy_ops = { + .init = imx8mq_usb_phy_init, + .power_on = imx8mq_usb_phy_power_on, + .power_off = imx8mq_usb_phy_power_off, + .exit = imx8mq_usb_phy_exit, +}; + +int imx8mq_usb_phy_probe(struct udevice *dev) +{ + struct imx8mq_usb_phy *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + + if (!priv->base) + return -EINVAL; + +#if CONFIG_IS_ENABLED(CLK) + int ret; + + /* Assigned clock already set clock */ + ret = clk_get_by_name(dev, "phy", &priv->phy_clk); + if (ret) { + printf("Failed to get usb phy clock\n"); + return ret; + } +#endif + + return 0; +} + +U_BOOT_DRIVER(nxp_imx8mq_usb_phy) = { + .name = "nxp_imx8mq_usb_phy", + .id = UCLASS_PHY, + .of_match = imx8mq_usb_phy_of_match, + .probe = imx8mq_usb_phy_probe, + .ops = &imx8mq_usb_phy_ops, + .priv_auto = sizeof(struct imx8mq_usb_phy), +}; -- 2.7.4

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[PATCH] arch: cache: cp15: Add mmu_set_region_dcache_behaviour() when SYS_DCACHE_OFF is enable
by Patrice Chotard 10 Jul '21

10 Jul '21

From: Patrice Chotard <patrice.chotard(a)st.com> Fix following compilation issue when SYS_DCACHE_OFF is enable: drivers/misc/scmi_agent.c:128: undefined reference to `mmu_set_region_dcache_behaviour' when SYS_DCACHE_OFF is enable, mmu_set_region_dcache_behaviour() must be defined. Signed-off-by: Patrice Chotard <patrice.chotard(a)st.com> Signed-off-by: Patrice Chotard <patrice.chotard(a)foss.st.com> --- arch/arm/lib/cache-cp15.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 24050e5bdd..f1703ead96 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -97,12 +97,6 @@ void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, mmu_page_table_flush(startpt, stoppt); } -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option) -{ - mmu_set_region_dcache_behaviour_phys(start, start, size, option); -} - __weak void dram_bank_mmu_setup(int bank) { struct bd_info *bd = gd->bd; @@ -314,6 +308,12 @@ int dcache_status(void) { return 0; /* always off */ } + +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ +} + #else void dcache_enable(void) { @@ -329,4 +329,10 @@ int dcache_status(void) { return (get_cr() & CR_C) != 0; } + +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + mmu_set_region_dcache_behaviour_phys(start, start, size, option); +} #endif -- 2.17.1

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[PATCH v4] armv8: Handle EL2 Host mode
by Mark Kettenis 10 Jul '21

10 Jul '21

On implementations that support VHE, the layout of the CPTR_EL2 register depends on whether HCR_EL2.E2H is set. If the bit is set, CPTR_EL2 uses the same layout as CPACR_EL1 and can in fact be accessed through that register. In that case, jump to the EL1 code to enable access to the FP/SIMD registers. This allows U-Boot to run on systems that pass control to U-Boot in EL2 with EL2 Host mode enabled such as machines using Apple's M1 SoC. Signed-off-by: Mark Kettenis <kettenis(a)openbsd.org> --- v4: use EL1 codepath when HCR_EL2.E2H is set suggested by Marc Zyngier <maz(a)kernel.org> v2: rename label arch/arm/cpu/armv8/start.S | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 662449156b..9e9c6140cd 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -132,11 +132,13 @@ pie_fixup_done: msr cntfrq_el0, x0 /* Initialize CNTFRQ */ #endif b 0f -2: set_vbar vbar_el2, x0 +2: mrs x1, hcr_el2 + tbnz x1, #34, 1f /* HCR_EL2.E2H */ + set_vbar vbar_el2, x0 mov x0, #0x33ff msr cptr_el2, x0 /* Enable FP/SIMD */ b 0f -1: set_vbar vbar_el1, x0 +1: set_vbar vbar_el1, x0 mov x0, #3 << 20 msr cpacr_el1, x0 /* Enable FP/SIMD */ 0: -- 2.30.0

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[PATCH v3 00/20] TI/Cadence: Add Sierra/Torrent SERDES driver
by Kishon Vijay Abraham I 09 Jul '21

09 Jul '21

Patch series adds Sierra and Torrent SERDES driver for the SERDES used in TI's K3 platforms. This SERDES is used by USB3, PCIe and Ethernet. This series is mostly an adaptation of drivers added in upstream Linux kernel. Changes from v2: 1) Re-worked "Handle gracefully NULL pointers" to fix Simons comments 2) Ported the part that allows creating clocks without explicit sub-nodes in DT from the upstream linux kernel. Changes from v1: 1) Fixed string comparison strncmp() to remove "==" 2) Added a test for node name comparison to ignore unit address in test/dm 3) Added better commit message in "drivers: reset: Handle gracefully NULL pointers" Alan Douglas (1): phy: cadence: Add driver for Sierra PHY Aswath Govindraju (7): dt-bindings: phy: Add definitions for additional phy types phy: cadence: Add driver for Torrent SERDES board: ti: j721e: Add support for probing and configuring Torrent serdes on J7200 arm: dts: k3-j7200-main: Add DT node for torrent serdes arm: dts: k3-j7200-common-proc-board: Enable SERDES DT arm: dts: k3-j7200-common-proc-board-u-boot: Add u-boot tags for torrent serdes configs: j7200_evm_a72_defconfig: Add config for torrent serdes and common clock framework Jean-Jacques Hiblot (2): phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC configs: j721e_evm_a72: Enable the drivers required for the USB3 support Kishon Vijay Abraham I (10): dm: core: Add helper to compare node names dm: test: Add test case to check node name ignoring unit address drivers: reset: Handle gracefully NULL pointers dt-bindings: phy: Add defines for AM64 SERDES Wrapper dt-bindings: phy: cadence-torrent: Add defines for refclk driver dt-bindings: ti-serdes-mux: Add defines for AM64 SoC usb: cdns3: cdns3-ti: Fix clk_get_by_name() to get the correct name ARM: dts: k3-j721e: Add the entries required for USB3 support on USB0 env: ti: j721e-evm: Add env variable to power on & reset QSGMII PHY in J7200 EVM configs: j7200_evm_a72: Enhance bootcmd to configure ethernet PHY .../k3-j7200-common-proc-board-u-boot.dtsi | 12 + arch/arm/dts/k3-j7200-common-proc-board.dts | 23 + arch/arm/dts/k3-j7200-main.dtsi | 63 + .../k3-j721e-common-proc-board-u-boot.dtsi | 19 +- board/ti/j721e/evm.c | 34 +- configs/j7200_evm_a72_defconfig | 9 +- configs/j721e_evm_a72_defconfig | 6 + drivers/core/ofnode.c | 13 + drivers/phy/Kconfig | 3 + drivers/phy/Makefile | 2 + drivers/phy/cadence/Kconfig | 11 + drivers/phy/cadence/Makefile | 2 + drivers/phy/cadence/phy-cadence-sierra.c | 757 +++++ drivers/phy/cadence/phy-cadence-torrent.c | 2468 +++++++++++++++++ drivers/phy/ti/Kconfig | 9 + drivers/phy/ti/Makefile | 1 + drivers/phy/ti/phy-j721e-wiz.c | 1154 ++++++++ drivers/reset/reset-uclass.c | 35 +- drivers/usb/cdns3/cdns3-ti.c | 2 +- include/configs/j721e_evm.h | 16 +- include/dm/ofnode.h | 10 + include/dt-bindings/mux/ti-serdes.h | 5 + include/dt-bindings/phy/phy-cadence.h | 20 + include/dt-bindings/phy/phy-ti.h | 21 + include/dt-bindings/phy/phy.h | 1 + test/dm/core.c | 14 + 26 files changed, 4700 insertions(+), 10 deletions(-) create mode 100644 drivers/phy/cadence/Kconfig create mode 100644 drivers/phy/cadence/Makefile create mode 100644 drivers/phy/cadence/phy-cadence-sierra.c create mode 100644 drivers/phy/cadence/phy-cadence-torrent.c create mode 100644 drivers/phy/ti/Kconfig create mode 100644 drivers/phy/ti/Makefile create mode 100644 drivers/phy/ti/phy-j721e-wiz.c create mode 100644 include/dt-bindings/phy/phy-cadence.h create mode 100644 include/dt-bindings/phy/phy-ti.h -- 2.17.1

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[PATCH u-boot-marvell 0/5] Support higher baudrates on Armada 3720 UART
by Marek Behún 09 Jul '21

09 Jul '21

This series adds support for more baudrates on Armada 3720 UART (up to 6 MBaud). Marek Behún (1): clk: armada-37xx: Set DM_FLAG_PRE_RELOC Pali Rohár (4): serial: a37xx: Fix parent clock rate value and divider calculation serial: a37xx: Use TBG as parent clock serial: a37xx: Switch to XTAL clock when booting Linux kernel arm: mvebu: a37xx: Enable more baudrates drivers/clk/mvebu/armada-37xx-periph.c | 1 + drivers/clk/mvebu/armada-37xx-tbg.c | 1 + drivers/serial/serial_mvebu_a3700.c | 179 ++++++++++++++++++++++++- include/configs/mvebu_armada-37xx.h | 9 +- include/configs/turris_mox.h | 9 +- 5 files changed, 190 insertions(+), 9 deletions(-) -- 2.26.3

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