May 2021 - U-Boot

[PATCH] efi_loader: Clean up tcg2 once in case of failure
by Ilias Apalodimas 11 May '21

11 May '21

efi_init_event_log() calls tcg2_uninit() in case of failure. We can skip that since the function is called on efi_tcg2_register() which also cleans up if an error occurs Signed-off-by: Ilias Apalodimas <ilias.apalodimas(a)linaro.org> --- lib/efi_loader/efi_tcg2.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 94e8f22bbb69..570cc746ed4e 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -1053,12 +1053,8 @@ static efi_status_t efi_init_event_log(void) event_log.last_event_size = event_log.pos; ret = create_final_event(); - if (ret != EFI_SUCCESS) - goto out; - return EFI_SUCCESS; out: - tcg2_uninit(); return ret; } -- 2.31.0

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[PATCH v3 0/2] arm: octeontx2: Add base support for Marvell OcteonTX2 CN913x DB
by Stefan Roese 11 May '21

11 May '21

This patchset adds the base support for the Marvell OcteonTX2 CN913x DB board and includes required dts/dtsi files and the defconfig files for this. Thanks, Stefan Changes in v3: - Changed board MAINTAINERS to reflect the latest changes of added files Changes in v2: - Changed commit text from CN9132 to CN913x as it supports all variants - Merge identical DT nodes from the A & B variants into the common dtsi files - Change Copyright notice to 2018-2021 as requested by Marvell - Changed commit text from CN9132 to CN913x as it supports all variants - Renamed default defconfig to mvebu_db_cn9130_defconfig - Removed NAND booting defconfig and added small README Stefan Roese (2): arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN913x DB arm: octeontx2: Add Octeon TX2 CN913x DB support arch/arm/dts/Makefile | 6 + arch/arm/dts/cn9130-db-A.dts | 55 ++++ arch/arm/dts/cn9130-db-B.dts | 51 ++++ arch/arm/dts/cn9130-db-dev-info.dtsi | 44 +++ arch/arm/dts/cn9130-db.dtsi | 316 +++++++++++++++++++++ arch/arm/dts/cn9131-db-A.dts | 54 ++++ arch/arm/dts/cn9131-db-B.dts | 69 +++++ arch/arm/dts/cn9131-db.dtsi | 166 +++++++++++ arch/arm/dts/cn9132-db-A.dts | 13 + arch/arm/dts/cn9132-db-B.dts | 13 + arch/arm/dts/cn9132-db.dtsi | 217 ++++++++++++++ board/Marvell/octeontx2_cn913x/MAINTAINERS | 1 + board/Marvell/octeontx2_cn913x/README | 24 ++ configs/mvebu_db_cn9130_defconfig | 89 ++++++ 14 files changed, 1118 insertions(+) create mode 100644 arch/arm/dts/cn9130-db-A.dts create mode 100644 arch/arm/dts/cn9130-db-B.dts create mode 100644 arch/arm/dts/cn9130-db-dev-info.dtsi create mode 100644 arch/arm/dts/cn9130-db.dtsi create mode 100644 arch/arm/dts/cn9131-db-A.dts create mode 100644 arch/arm/dts/cn9131-db-B.dts create mode 100644 arch/arm/dts/cn9131-db.dtsi create mode 100644 arch/arm/dts/cn9132-db-A.dts create mode 100644 arch/arm/dts/cn9132-db-B.dts create mode 100644 arch/arm/dts/cn9132-db.dtsi create mode 100644 board/Marvell/octeontx2_cn913x/README create mode 100644 configs/mvebu_db_cn9130_defconfig -- 2.31.1

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[PATCH v2 0/2] arm: octeontx2: Add base support for Marvell OcteonTX2 CN913x DB
by Stefan Roese 11 May '21

11 May '21

This patchset adds the base support for the Marvell OcteonTX2 CN913x DB board and includes required dts/dtsi files and the defconfig files for this. Thanks, Stefan Changes in v2: - Changed commit text from CN9132 to CN913x as it supports all variants - Merge identical DT nodes from the A & B variants into the common dtsi files - Change Copyright notice to 2018-2021 as requested by Marvell - Changed commit text from CN9132 to CN913x as it supports all variants - Renamed default defconfig to mvebu_db_cn9130_defconfig - Removed NAND booting defconfig and added small README Stefan Roese (2): arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN913x DB arm: octeontx2: Add Octeon TX2 CN913x DB support arch/arm/dts/Makefile | 6 + arch/arm/dts/cn9130-db-A.dts | 55 ++++ arch/arm/dts/cn9130-db-B.dts | 51 ++++ arch/arm/dts/cn9130-db-dev-info.dtsi | 44 +++ arch/arm/dts/cn9130-db.dtsi | 316 +++++++++++++++++++++ arch/arm/dts/cn9131-db-A.dts | 54 ++++ arch/arm/dts/cn9131-db-B.dts | 69 +++++ arch/arm/dts/cn9131-db.dtsi | 166 +++++++++++ arch/arm/dts/cn9132-db-A.dts | 13 + arch/arm/dts/cn9132-db-B.dts | 13 + arch/arm/dts/cn9132-db.dtsi | 217 ++++++++++++++ board/Marvell/octeontx2_cn913x/MAINTAINERS | 2 + board/Marvell/octeontx2_cn913x/README | 24 ++ configs/mvebu_db_cn9130_defconfig | 89 ++++++ 14 files changed, 1119 insertions(+) create mode 100644 arch/arm/dts/cn9130-db-A.dts create mode 100644 arch/arm/dts/cn9130-db-B.dts create mode 100644 arch/arm/dts/cn9130-db-dev-info.dtsi create mode 100644 arch/arm/dts/cn9130-db.dtsi create mode 100644 arch/arm/dts/cn9131-db-A.dts create mode 100644 arch/arm/dts/cn9131-db-B.dts create mode 100644 arch/arm/dts/cn9131-db.dtsi create mode 100644 arch/arm/dts/cn9132-db-A.dts create mode 100644 arch/arm/dts/cn9132-db-B.dts create mode 100644 arch/arm/dts/cn9132-db.dtsi create mode 100644 board/Marvell/octeontx2_cn913x/README create mode 100644 configs/mvebu_db_cn9130_defconfig -- 2.31.1

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[PATCH v2 0/4] Add support for embedding public key in platform's dtb
by Sughosh Ganu 11 May '21

11 May '21

These patches add support for embedding the public key efi signature list(esl) file into the platform's device tree. The current solution for the Qemu arm64 platform has the public key as part of an overlay, and stored on the Efi System Partition(ESP). Having the provision to embed the public key into the platform's dtb which is then concatenated with the u-boot binary is a better approach, recommended by Heinrich[1]. Patch 1 removes the existing additional check for authenticating the capsule using the env variable. Patch 2 add two config symbols, EFI_PKEY_DTB_EMBED and EFI_PKEY_FILE which are used for enabling embedding of the public key in the dtb, and specifying the esl file name. Patch 3 adds a function for retrieving the public key which has been embedded in the platform's dtb. Patch 4 adds the functionality to embed the esl file into the platform's dtb during the platform build. I have tested this functionality on the STM32MP157C DK2 board, and it works as expected. [1] - https://lists.denx.de/pipermail/u-boot/2021-March/442867.html Changes since V1: * As pointed out by Heinrich in the review, remove the extra check of the env variable 'capsule_authentication_enabled'for authenticating the capsule. The capsule authentication will now be done based on whether the corresponding config symbol is enabled. * Provide a default name for public key file, eficapsule.esl as suggested by Heinrich. * Remove the superfluous default n statement for EFI_PKEY_DTB_EMBED * Remove the weak function, and add the functionality to retrieve the public key under the config symbol CONFIG_EFI_PKEY_DTB_EMBED. Sughosh Ganu (4): efi_loader: capsule: Remove the check for capsule_authentication_enabled environment variable efi_loader: Kconfig: Add symbols for embedding the public key into the platform's dtb efi_capsule: Add a function to get the public key needed for capsule authentication Makefile: Add provision for embedding public key in platform's dtb Makefile | 10 +++++++ board/emulation/common/qemu_capsule.c | 6 ---- lib/efi_loader/Kconfig | 15 ++++++++++ lib/efi_loader/efi_capsule.c | 43 +++++++++++++++++++++++---- lib/efi_loader/efi_firmware.c | 5 ++-- 5 files changed, 65 insertions(+), 14 deletions(-) -- 2.17.1

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Re: FW: [PATCH v5 05/13] binman: Add support for RISC-V OpenSBI fw_dynamic blob
by Rick Chen 11 May '21

11 May '21

> From: Bin Meng <bmeng.cn(a)gmail.com> > Sent: Monday, May 10, 2021 8:24 PM > To: Simon Glass <sjg(a)chromium.org>; Rick Jian-Zhi Chen(陳建志) <rick(a)andestech.com>; u-boot(a)lists.denx.de > Cc: Bin Meng <bmeng.cn(a)gmail.com> > Subject: [PATCH v5 05/13] binman: Add support for RISC-V OpenSBI fw_dynamic blob > > Add an entry for RISC-V OpenSBI's 'fw_dynamic' firmware payload. > > Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> > Reviewed-by: Simon Glass <sjg(a)chromium.org> > > --- > > (no changes since v2) > > Changes in v2: > - drop "size = <16>" in the binman node > > tools/binman/entries.rst | 13 +++++++++++++ > tools/binman/etype/opensbi.py | 23 +++++++++++++++++++++++ > tools/binman/ftest.py | 7 +++++++ > tools/binman/test/201_opensbi.dts | 14 ++++++++++++++ > 4 files changed, 57 insertions(+) Reviewed-by: Rick Chen <rick(a)andestech.com>

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[PATCH 00/17] Fix various coverity warnings
by Simon Glass 11 May '21

11 May '21

This series includes fixes for various coverity warnings reported in recent months. Unfortunately I am not sure how to fix the clock problems, as the fix produces test failures, so the last two patches are marked RFC. I hope that Stephen or Jean-Jacques can take a look. Simon Glass (17): sandbox: net: Ensure host name is always a valid string video: Check return value in pwm_backlight_of_to_plat() sandbox: Indicate NULL-pointer access in 'sigsegv' command test: Rename final check in setexpr_test_backref() tools: Avoid showing return value of clock_gettime() reset: Avoid a warning in devm_reset_bulk_get_by_node() reset: Avoid a warning in devm_regmap_init() test: Avoid random numbers in dm_test_devm_regmap() dm: core: Check uclass_get() return value when dumping sandbox: scmi: Indicate dead code for coverity sandbox: cros_ec: Update error handling when reading matrix cbfs: Check offset range when reading a file pinctrl: Avoid coverity warning when checking width tpm: Check outgoing command size sandbox: Silence coverity warning in state_read_file() clk: Detect failure to set defaults RFC: clk: Return error code from clk_set_default_get_by_id() arch/sandbox/cpu/state.c | 1 + cmd/sandbox/exception.c | 2 ++ drivers/clk/clk-uclass.c | 8 ++++++-- drivers/core/dump.c | 7 ++++--- drivers/core/regmap.c | 1 + drivers/firmware/scmi/sandbox-scmi_devices.c | 1 + drivers/misc/cros_ec_sandbox.c | 12 +++++++----- drivers/net/sandbox-raw.c | 2 +- drivers/pinctrl/pinctrl-single.c | 1 + drivers/reset/reset-uclass.c | 2 ++ drivers/video/pwm_backlight.c | 6 ++++-- fs/cbfs/cbfs.c | 2 ++ lib/tpm-common.c | 5 +++++ test/cmd/setexpr.c | 2 -- test/dm/clk.c | 9 +++++++++ test/dm/regmap.c | 3 +-- tools/image-host.c | 8 ++++---- 17 files changed, 51 insertions(+), 21 deletions(-) -- 2.31.1.607.g51e8a6a459-goog

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[PATCH v3 00/14] arm64: synquacer: Add SynQuacer/DeveloperBox support
by Masami Hiramatsu 11 May '21

11 May '21

Hello, Here is the 3rd version of the series (including some fixes for build errors) to add SynQuacer/DeveloperBox 96board EE suport on U-Boot. This series includes not only DeveloperBox support but also some fixes for the issues which I faced while porting U-Boot on the DeveloperBox. First 3 patches are fixes, next 1 patch is a code cleanup for generic gpio for arm. The next 7 patches adding DeveloperBox devices and board support. The last 2 patches are related to the UEFI capsule update. Previous version is here: https://lists.denx.de/pipermail/u-boot/2021-April/447529.html Changes in v3 ------------- I've dropped the spi-nor-ids update patch because it causes a regression. [01/14]: - To enable USB XHCI support, I pick my pci patch again in this version. [05/14]: - Change the config name to positive and selected by the opposite CONFIG_ARCH_*. (Build checked by Github CI) [07/14]: - Rename config name to MMC_SDHCI_F_SDH30. - Remove unneeded wait in drivers/mmc/sdhci.c. - Rename probe function to f_sdh30_sdhci_probe. [10/14]: - Use generic nor flash instead of specific mx25u51245g. (chip parameters will be searched by the register value) [11/14]: - Enable CONFIG_MMC_SDHCI_F_SDH30. - Enable CONFIG_CMD_GENERIC (fstype command) for distro boot. - Remove unneeded CONFIG_ONLY_GENERIC_GPIO. [12/14]: New patch to fix DFU error on MTD (for Capsule update) [13/14]: - Fix a typo in dfu_alt_info. DeveloperBox ============ DeveloperBox is a certified 96boards Enterprise Edition board. The board/SoC has: - * Socionext SC2A11 24-cores ARM Cortex-A53 on tbe Mini-ATX form factor motherboard * 4 DIMM slots (4GB DDR4-2400 UDIMM shipped by default) * 1 4xPCIe Gen2 slot and 2 1xPCIe Gen2 slots (1x slots are connected via PCIe bridge chip) * 4 USB-3.0 ports * 2 SATA ports * 1 GbE network port * 1 USB-UART serial port (micro USB) * 64MB SPI NOR Flash * 8GB eMMC Flash Storage * 96boards LS connector The DeveloperBox schematic can be found here: - https://www.96boards.org/documentation/enterprise/developerbox/hardware-doc… And the other documents can be found here: - https://www.96boards.org/documentation/enterprise/developerbox/ Currently, the U-Boot port supports: - * USB * eMMC * SPI-NOR * SATA * GbE The DeveloperBox boots the TF-A and EDK2 as a main bootloader by default. The DeveloperBox U-Boot port will replace the EDK2 and boot from TF-A as BL33, but no need to combine with it. Thank you, --- Jassi Brar (3): mmc: synquacer: Add SynQuacer F_SDH30 SDHCI driver spi: synquacer: Add HSSPI SPI controller driver for SynQuacer net: synquacer: Add netsec driver Masami Hiramatsu (11): pci: Update the highest subordinate bus number for bridge setup ata: ahci-pci: Use scsi_ops to initialize ops dm: pci: Skip setting VGA bridge bits if parent device is the host bus efi: Fix to use null handle to create new handle for efi_fmp_raw gpio: Introduce CONFIG_GPIO_EXTRA_HEADER to cleanup #ifdefs pci: synquacer: Add SynQuacer ECAM based PCIe driver ARM: dts: synquacer: Add device trees for DeveloperBox board: synquacer: Add DeveloperBox 96boards EE support dfu_mtd: Ignore non-implemented lock device failure doc: qemu: arm64: Fix the documentation of capsule update configs: synquacer: Enable EFI capsule update support arch/arm/Kconfig | 108 ++ arch/arm/dts/Makefile | 2 arch/arm/dts/synquacer-sc2a11-caches.dtsi | 73 + .../dts/synquacer-sc2a11-developerbox-u-boot.dtsi | 57 + arch/arm/dts/synquacer-sc2a11-developerbox.dts | 56 + arch/arm/dts/synquacer-sc2a11.dtsi | 595 ++++++++++ arch/arm/include/asm/gpio.h | 8 board/socionext/developerbox/Kconfig | 36 + board/socionext/developerbox/MAINTAINERS | 13 board/socionext/developerbox/Makefile | 9 board/socionext/developerbox/developerbox.c | 145 +++ configs/synquacer_developerbox_defconfig | 109 ++ doc/board/emulation/qemu_capsule_update.rst | 11 doc/board/index.rst | 1 doc/board/socionext/developerbox.rst | 87 ++ doc/board/socionext/index.rst | 9 drivers/ata/ahci-pci.c | 2 drivers/dfu/dfu_mtd.c | 2 drivers/mmc/Kconfig | 10 drivers/mmc/Makefile | 1 drivers/mmc/f_sdh30.c | 81 + drivers/net/Kconfig | 8 drivers/net/Makefile | 1 drivers/net/sni_netsec.c | 1134 ++++++++++++++++++++ drivers/pci/Kconfig | 12 drivers/pci/Makefile | 1 drivers/pci/pci-uclass.c | 6 drivers/pci/pcie_ecam_synquacer.c | 600 +++++++++++ drivers/spi/Kconfig | 8 drivers/spi/Makefile | 1 drivers/spi/spi-synquacer.c | 491 +++++++++ include/configs/synquacer.h | 112 ++ lib/efi_loader/efi_capsule.c | 2 33 files changed, 3774 insertions(+), 17 deletions(-) create mode 100644 arch/arm/dts/synquacer-sc2a11-caches.dtsi create mode 100644 arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi create mode 100644 arch/arm/dts/synquacer-sc2a11-developerbox.dts create mode 100644 arch/arm/dts/synquacer-sc2a11.dtsi create mode 100644 board/socionext/developerbox/Kconfig create mode 100644 board/socionext/developerbox/MAINTAINERS create mode 100644 board/socionext/developerbox/Makefile create mode 100644 board/socionext/developerbox/developerbox.c create mode 100644 configs/synquacer_developerbox_defconfig create mode 100644 doc/board/socionext/developerbox.rst create mode 100644 doc/board/socionext/index.rst create mode 100644 drivers/mmc/f_sdh30.c create mode 100644 drivers/net/sni_netsec.c create mode 100644 drivers/pci/pcie_ecam_synquacer.c create mode 100644 drivers/spi/spi-synquacer.c create mode 100644 include/configs/synquacer.h -- Masami Hiramatsu <masami.hiramatsu(a)linaro.org>

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Please pull u-boot-x86
by Bin Meng 10 May '21

10 May '21

Hi Tom, This PR includes the following changes for v2021.07 release: - x86: correct regwidth prompt in cbsysinfo - virtio: convert README.virtio to reST Azure results: PASS https://dev.azure.com/bmeng/GitHub/_build/results?buildId=364&view=results The following changes since commit 07b53103b7a6c228ae8b74ae720b9c5d219ee7fd: Merge https://source.denx.de/u-boot/custodians/u-boot-riscv (2021-05-07 08:57:32 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-x86 for you to fetch changes up to 200fdd3bff569369f9264e648ddc9c02547b6186: MAINTAINERS: Add an entry for VirtIO (2021-05-10 13:56:12 +0800) ---------------------------------------------------------------- Bin Meng (2): doc: develop: Convert README.virtio to reST MAINTAINERS: Add an entry for VirtIO Simon Glass (1): x86: Correct regwidth prompt in cbsysinfo MAINTAINERS | 12 ++++++++++++ cmd/x86/cbsysinfo.c | 2 +- doc/develop/driver-model/index.rst | 1 + doc/{README.virtio => develop/driver-model/virtio.rst} | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------------------- 4 files changed, 76 insertions(+), 29 deletions(-) rename doc/{README.virtio => develop/driver-model/virtio.rst} (86%) Regards, Bin

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[PATCH v5 00/13] riscv: Switch to use binman to generate u-boot.itb
by Bin Meng 10 May '21

10 May '21

This series updates binman to handle creation of u-boot.itb image for RISC-V boards. Azure results: PASS https://dev.azure.com/bmeng/GitHub/_build/results?buildId=363&view=results The following tests were performed: * booting qemu-riscv{32|64}_spl_defconfig on QEMU virt * booting sifive_unleashed_defconfig on QEMU sifive_u AE350 SPL defconfigs are not tested. @Rick, could you please test and report? The series is available at u-boot-x86/riscv_binman for testing. Changes in v5: - update binman.rst for OF_BOARD or OF_PRIOR_STAGE usage Changes in v4: - update the makefile dependency on u-boot.img instead of u-boot.bin Changes in v3: - Fix the opensbi entry type in binman.dtsi - new patch: "lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBED" - rename the Kconfig option name to BINMAN_STANDALONE_FDT - make BINMAN_STANDALONE_FDT default y for OF_BOARD as well - reword the Kconfig option help message a little bit - new patch: "riscv: ae350: Switch to use binman to generate u-boot.itb" - remove USE_SPL_FIT_GENERATOR in ae350_ defconfigs Changes in v2: - drop patch: "binman: test: Correct the name of 170_fit_fdt_missing_prop.dts", as it was based on a wrong version - drop patch: "makefile: Update clean rule to remove files generated by binman", as it is better to refactor binman to generate all intermediate files for makefile to clean - drop "size = <16>" in the binman node - new patch: "binman: Support packaging U-Boot for scenarios like OF_PRIOR_STAGE" - new patch: "riscv: dts: Sort build targets in alphabetical order" - new patch: "riscv: qemu: Switch to use binman to generate u-boot.itb" - new patch: "riscv: Drop USE_SPL_FIT_GENERATOR" Bin Meng (13): common: kconfig: Correct a typo in SPL_LOAD_FIT binman: Correct '-a' description in the doc binman: Correct the comment for ATF entry type binman: test: Rename 172_fit_fdt.dts to 170_fit_fdt.dts binman: Add support for RISC-V OpenSBI fw_dynamic blob makefile: Pass OpenSBI blob to binman make rules riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBED binman: Support packaging U-Boot for scenarios like OF_BOARD or OF_PRIOR_STAGE riscv: dts: Sort build targets in alphabetical order riscv: qemu: Switch to use binman to generate u-boot.itb riscv: ae350: Switch to use binman to generate u-boot.itb riscv: Drop USE_SPL_FIT_GENERATOR Makefile | 4 +- arch/riscv/cpu/generic/Kconfig | 1 + arch/riscv/dts/Makefile | 3 +- arch/riscv/dts/ae350_32.dts | 2 + arch/riscv/dts/ae350_64.dts | 2 + arch/riscv/dts/binman.dtsi | 78 ++++++++++++++ .../dts/hifive-unleashed-a00-u-boot.dtsi | 1 + arch/riscv/dts/qemu-virt.dts | 8 ++ arch/riscv/lib/mkimage_fit_opensbi.sh | 100 ------------------ board/AndesTech/ax25-ae350/Kconfig | 1 + board/sifive/unleashed/Kconfig | 1 + common/Kconfig.boot | 5 +- configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/qemu-riscv32_spl_defconfig | 1 + configs/qemu-riscv64_spl_defconfig | 1 + dts/Kconfig | 18 ++++ lib/Kconfig | 2 +- tools/binman/binman.rst | 28 ++++- tools/binman/entries.rst | 13 +++ tools/binman/etype/atf_bl31.py | 2 +- tools/binman/etype/opensbi.py | 23 ++++ tools/binman/ftest.py | 17 ++- .../test/{172_fit_fdt.dts => 170_fit_fdt.dts} | 0 tools/binman/test/201_opensbi.dts | 14 +++ 27 files changed, 215 insertions(+), 114 deletions(-) create mode 100644 arch/riscv/dts/binman.dtsi create mode 100644 arch/riscv/dts/qemu-virt.dts delete mode 100755 arch/riscv/lib/mkimage_fit_opensbi.sh create mode 100644 tools/binman/etype/opensbi.py rename tools/binman/test/{172_fit_fdt.dts => 170_fit_fdt.dts} (100%) create mode 100644 tools/binman/test/201_opensbi.dts -- 2.25.1

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[PATCHv3 00/26] J72xx: HSM rearch support series
by Tero Kristo 10 May '21

10 May '21

Hello, Resurrecting this series; v2 [1] was sort of put on hold due to some org changes at TI. Sorry about the delay caused by this. Anyways, v3 is mostly just a rebase of this series on top of 2021.07-rc1, and addition of some new data to support new boot modes for j721e and j7200. This series has been tested on top of Dave's DDR driver series [2]; on both J721e and J7200 boards. Here are the details of changes compared to v2: old-patch #2: removed (incorporated to Dave's DDR series now) patch #12 & #13: squashed in some fixes for clock rate handling patch #17: data additions patch #21: squashed in a fix handle the boot headers properly patch #22: new patch patch #26: new patch to address the timer issues uncovered by Dario's fix to omap timer code (commit 11326f379329: omap: timer: fix the rate setting) Rest of the changes are basically just rebases. -Tero [1] https://www.mail-archive.com/u-boot@lists.denx.de/msg390172.html [2] https://www.mail-archive.com/u-boot@lists.denx.de/msg405657.html

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