May 2021 - U-Boot

[PATCH v2 1/2] board:pm9263 - Switch to use DM_ETH
by Ilko Iliev 13 May '21

13 May '21

- Enable CONFIG_DM_ETH in configs/pm9263_defconfig - Drop legacy initialization in board/ronetix/pm9263.c - Remove network related setting from include/configs/pm9263.h Signed-off-by: Ilko Iliev <iliev(a)ronetix.at> --- Changes to v2: - improve commit message --- board/ronetix/pm9263/pm9263.c | 57 ----------------------------------- configs/pm9263_defconfig | 2 ++ include/configs/pm9263.h | 6 ---- 3 files changed, 2 insertions(+), 63 deletions(-) diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 95c0dec4db..46494b043f 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -19,10 +19,6 @@ #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) -#include <net.h> -#endif -#include <netdev.h> #include <asm/mach-types.h> DECLARE_GLOBAL_DATA_PTR; @@ -73,41 +69,6 @@ static void pm9263_nand_hw_init(void) } #endif -#ifdef CONFIG_MACB -static void pm9263_macb_hw_init(void) -{ - /* - * PB27 enables the 50MHz oscillator for Ethernet PHY - * 1 - enable - * 0 - disable - */ - at91_set_pio_output(AT91_PIO_PORTB, 27, 1); - at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable */ - - at91_periph_clk_enable(ATMEL_ID_EMAC); - - /* - * Disable pull-up on: - * RXDV (PC25) => PHY normal mode (not Test mode) - * ERX0 (PE25) => PHY ADDR0 - * ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0 - * - * PHY has internal pull-down - */ - - at91_set_pio_pullup(AT91_PIO_PORTC, 25, 0); - at91_set_pio_pullup(AT91_PIO_PORTE, 25, 0); - at91_set_pio_pullup(AT91_PIO_PORTE, 26, 0); - - /* Re-enable pull-up */ - at91_set_pio_pullup(AT91_PIO_PORTC, 25, 1); - at91_set_pio_pullup(AT91_PIO_PORTE, 25, 1); - at91_set_pio_pullup(AT91_PIO_PORTE, 26, 1); - - at91_macb_hw_init(); -} -#endif - #ifdef CONFIG_LCD #ifdef CONFIG_LCD_IN_PSRAM @@ -233,9 +194,6 @@ int board_init(void) #ifdef CONFIG_CMD_NAND pm9263_nand_hw_init(); #endif -#ifdef CONFIG_MACB - pm9263_macb_hw_init(); -#endif #ifdef CONFIG_USB_OHCI_NEW at91_uhp_hw_init(); #endif @@ -261,21 +219,6 @@ int dram_init_banksize(void) return 0; } -#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) -{ -} -#endif - -int board_eth_init(struct bd_info *bis) -{ - int rc = 0; -#ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x01); -#endif - return rc; -} - #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard (void) { diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 817a9847be..ef18e742d2 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -50,6 +50,8 @@ CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y +CONFIG_DM_ETH=y +CONFIG_MACB=y CONFIG_DM_SERIAL=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 6c882b6ff9..7b028751bd 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -204,12 +204,6 @@ AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED | \ AT91_MATRIX_SCFG_SLOT_CYCLE(255)) -/* Ethernet */ -#define CONFIG_MACB 1 -#define CONFIG_RMII 1 -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R 1 - /* USB */ #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_PLLB -- 2.25.1

2 1

[PATCH v3] board:pm9261 - Remove network support
by Ilko Iliev 13 May '21

13 May '21

The network support is removed because there is no DM for Davicom DM9000. Signed-off-by: Ilko Iliev <iliev(a)ronetix.at> --- board/ronetix/pm9261/pm9261.c | 54 ----------------------------------- configs/pm9261_defconfig | 4 +-- include/configs/pm9261.h | 9 ------ 3 files changed, 2 insertions(+), 65 deletions(-) diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 5be2c5e192..fe52c7c176 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -20,10 +20,6 @@ #include <asm/arch/at91_matrix.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) -#include <net.h> -#endif -#include <netdev.h> #include <asm/mach-types.h> DECLARE_GLOBAL_DATA_PTR; @@ -80,36 +76,6 @@ static void pm9261_nand_hw_init(void) } #endif - -#ifdef CONFIG_DRIVER_DM9000 -static void pm9261_dm9000_hw_init(void) -{ - struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; - - /* Configure SMC CS2 for DM9000 */ - writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | - AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), - &smc->cs[2].setup); - - writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | - AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), - &smc->cs[2].pulse); - - writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), - &smc->cs[2].cycle); - - writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | - AT91_SMC_MODE_EXNW_DISABLE | - AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | - AT91_SMC_MODE_TDF_CYCLE(1), - &smc->cs[2].mode); - - /* Configure Interrupt pin as input, no pull-up */ - at91_periph_clk_enable(ATMEL_ID_PIOA); - at91_set_pio_input(AT91_PIO_PORTA, 24, 0); -} -#endif - int board_early_init_f(void) { return 0; @@ -132,13 +98,6 @@ int board_init(void) return 0; } -#ifdef CONFIG_DRIVER_DM9000 -int board_eth_init(struct bd_info *bis) -{ - return dm9000_initialize(bis); -} -#endif - int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -155,19 +114,6 @@ int dram_init_banksize(void) return 0; } -#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) -{ -#ifdef CONFIG_DRIVER_DM9000 - /* - * Initialize ethernet HW addr prior to starting Linux, - * needed for nfsroot - */ - eth_init(); -#endif -} -#endif - #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard (void) { diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index e0a2ae18c6..b27fc8dbc1 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -25,8 +25,6 @@ CONFIG_SYS_PROMPT="pm9261> " CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0,nand0=nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),-(rootfs);nand:-(nand)" @@ -34,6 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x10040000 +# CONFIG_NET is not set CONFIG_DM=y CONFIG_BLK=y CONFIG_CLK=y @@ -62,3 +61,4 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_LCD=y +CONFIG_REGEX=y diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 2cc47d1237..382d19a241 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -173,15 +173,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* Ethernet */ -#define CONFIG_DRIVER_DM9000 1 -#define CONFIG_DM9000_BASE 0x30000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 4) -#define CONFIG_DM9000_USE_16BIT 1 -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R 1 - /* USB */ #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_PLLB -- 2.25.1

2 1

[PATCH] pci: layerscape-ep: Add check of the PCIe controller enablement
by Biwen Li 13 May '21

13 May '21

From: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> Stop to initialize the PCIe controller if it's disabled by RCW. Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou(a)nxp.com> --- drivers/pci/pcie_layerscape_ep.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c index c7231635e4..f2813aeef6 100644 --- a/drivers/pci/pcie_layerscape_ep.c +++ b/drivers/pci/pcie_layerscape_ep.c @@ -269,6 +269,10 @@ static int ls_pcie_ep_probe(struct udevice *dev) pcie->idx = ((unsigned long)pcie->dbi - PCIE_SYS_BASE_ADDR) / PCIE_CCSR_SIZE; + /* This controller is disabled by RCW */ + if (!is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx))) + return 0; + pcie->big_endian = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "big-endian"); -- 2.17.1

1 0

[PATCH v5 0/3] PE/COFF measurement support
by Masahisa Kojima 13 May '21

13 May '21

This patch series add the PE/COFF measurement support. Extending PCR and Event Log is tested with fTPM running as a OP-TEE TA. Unit test will be added in the separate series. Masahisa Kojima (3): efi_loader: expose efi_image_parse() even if UEFI Secure Boot is disabled efi_loader: add PE/COFF image measurement efi_loader: add FIT_SIGNATURE option to use hash_calculate() include/efi_loader.h | 6 + include/efi_tcg2.h | 9 ++ include/tpm-v2.h | 18 +++ lib/efi_loader/Kconfig | 9 ++ lib/efi_loader/Makefile | 2 +- lib/efi_loader/efi_image_loader.c | 123 +++++++++++++++--- lib/efi_loader/efi_signature.c | 67 +--------- lib/efi_loader/efi_tcg2.c | 207 ++++++++++++++++++++++++++++-- lib/efi_loader/efi_var_common.c | 3 + 9 files changed, 352 insertions(+), 92 deletions(-) -- 2.17.1

3 6

[PATCH] mvebu: x530: Reduce SPL image size
by Stefan Roese 13 May '21

13 May '21

Currently, building U-Boot for x530 fails since the SPL image is too big. This patch reduces the SPL size by changing the following Kconfig options: Enable CONFIG_SPL_TINY_MEMSET Disable CONFIG_SPI_FLASH_BAR By disabling CONFIG_SPI_FLASH_BAR, the tiny SPI NOR framework can be used. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Chris Packham <chris.packham(a)alliedtelesis.co.nz> Cc: Pratyush Yadav <p.yadav(a)ti.com> Cc: Tom Rini <trini(a)konsulko.com> --- configs/x530_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 890c94b5c1fe..76574c4de4be 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -62,7 +62,6 @@ CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_PXA3XX=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=50000000 -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y @@ -84,3 +83,4 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_WDT=y CONFIG_WDT_ORION=y +CONFIG_SPL_TINY_MEMSET=y -- 2.31.1

3 5

[PATCH v2] mmc: Update environment variable with active partition
by Reuben Dowle 13 May '21

13 May '21

This patch allows uboot scripts make choices about where to boot from based on the active mmc boot partition. This allows having two copies of kernel, filesystems etc, and choosing which to boot from based off of the active bootloader partition. Signed-off-by: Reuben Dowle <reuben.dowle(a)4rf.com> --- cmd/mmc.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/cmd/mmc.c b/cmd/mmc.c index a10f137..afa8e7b 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -808,7 +808,7 @@ static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag, return CMD_RET_SUCCESS; } -static int mmc_partconf_print(struct mmc *mmc) +static int mmc_partconf_print(struct mmc *mmc, const char *varname) { u8 ack, access, part; @@ -821,6 +821,9 @@ static int mmc_partconf_print(struct mmc *mmc) ack = EXT_CSD_EXTRACT_BOOT_ACK(mmc->part_config); part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + if(varname) + env_set_hex(varname, part); + printf("EXT_CSD[179], PARTITION_CONFIG:\n" "BOOT_ACK: 0x%x\n" "BOOT_PARTITION_ENABLE: 0x%x\n" @@ -836,7 +839,7 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, struct mmc *mmc; u8 ack, part_num, access; - if (argc != 2 && argc != 5) + if (argc != 2 && argc != 3 && argc != 5) return CMD_RET_USAGE; dev = simple_strtoul(argv[1], NULL, 10); @@ -850,8 +853,8 @@ static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag, return CMD_RET_FAILURE; } - if (argc == 2) - return mmc_partconf_print(mmc); + if (argc == 2 || argc == 3) + return mmc_partconf_print(mmc, argc == 3 ? argv[2] : NULL); ack = simple_strtoul(argv[2], NULL, 10); part_num = simple_strtoul(argv[3], NULL, 10); @@ -1061,8 +1064,11 @@ U_BOOT_CMD( " - Set the BOOT_BUS_WIDTH field of the specified device\n" "mmc bootpart-resize <dev> <boot part size MB> <RPMB part size MB>\n" " - Change sizes of boot and RPMB partitions of specified device\n" - "mmc partconf <dev> [boot_ack boot_partition partition_access]\n" - " - Show or change the bits of the PARTITION_CONFIG field of the specified device\n" + "mmc partconf <dev> [varname]\n" + " - Show the bits of the PARTITION_CONFIG field of the specified device,\n" + " optionally storing the boot_partion value into <varname>" + "mmc partconf <dev> <boot_ack> <boot_partition> <partition_access>\n" + " - Change the bits of the PARTITION_CONFIG field of the specified device\n" "mmc rst-function <dev> <value>\n" " - Change the RST_n_FUNCTION field of the specified device\n" " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" -- 2.7.4

3 4

[scan-admin@coverity.com: New Defects reported by Coverity Scan for Das U-Boot]
by Tom Rini 13 May '21

13 May '21

----- Forwarded message from scan-admin(a)coverity.com ----- Date: Mon, 10 May 2021 21:17:32 +0000 (UTC) From: scan-admin(a)coverity.com To: tom.rini(a)gmail.com Subject: New Defects reported by Coverity Scan for Das U-Boot Hi, Please find the latest report on new defect(s) introduced to Das U-Boot found with Coverity Scan. 1 new defect(s) introduced to Das U-Boot found with Coverity Scan. 3 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 331544: Null pointer dereferences (REVERSE_INULL) /drivers/core/ofnode.c: 317 in ofnode_get_addr_size_index() ________________________________________________________________________________________________________ *** CID 331544: Null pointer dereferences (REVERSE_INULL) /drivers/core/ofnode.c: 317 in ofnode_get_addr_size_index() 311 uint flags; 312 313 prop_val = of_get_address(ofnode_to_np(node), index, &size64, 314 &flags); 315 if (!prop_val) 316 return FDT_ADDR_T_NONE; >>> CID 331544: Null pointer dereferences (REVERSE_INULL) >>> Null-checking "size" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. 317 if (size) 318 *size = size64; 319 320 ns = of_n_size_cells(ofnode_to_np(node)); 321 322 if (IS_ENABLED(CONFIG_OF_TRANSLATE) && ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… To manage Coverity Scan email notifications for "tom.rini(a)gmail.com", click https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… ----- End forwarded message ----- -- Tom

2 1

Re: [PATCH] riscv: ax25-ae350: doc: Fix minor format issues
by Rick Chen 13 May '21

13 May '21

> From: Bin Meng <bmeng.cn(a)gmail.com> > Sent: Wednesday, May 12, 2021 11:26 PM > To: Rick Jian-Zhi Chen(陳建志) <rick(a)andestech.com>; u-boot(a)lists.denx.de > Cc: Bin Meng <bmeng.cn(a)gmail.com> > Subject: [PATCH] riscv: ax25-ae350: doc: Fix minor format issues > > This fixes two minor format issues of the ax25-ae350 reST file. > > Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> > --- > > doc/board/AndesTech/ax25-ae350.rst | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) Reviewed-by: Rick Chen <rick(a)andestech.com>

1 0

[PATCH 1/2 v2] Add out4.ru O4-iMX-NANO board
by Oleh Kravchenko 13 May '21

13 May '21

Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg(a)kaa.org.ua> Cc: Stefano Babic <sbabic(a)denx.de> --- MAINTAINERS | 10 + arch/arm/dts/Makefile | 3 + arch/arm/dts/o4-imx-nano.dts | 241 ++++++++++++++++++ arch/arm/dts/o4-imx6ull-nano.dtsi | 87 +++++++ arch/arm/mach-imx/mx6/Kconfig | 13 + .../out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg | 91 +++++++ board/out4/o4-imx6ull-nano/Kconfig | 57 +++++ .../o4-imx6ull-nano/MT41K256M16HA-125E.cfg | 91 +++++++ board/out4/o4-imx6ull-nano/Makefile | 4 + board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c | 86 +++++++ configs/o4-imx6ull-nano_defconfig | 103 ++++++++ include/configs/o4-imx6ull-nano.h | 25 ++ 12 files changed, 811 insertions(+) create mode 100644 arch/arm/dts/o4-imx-nano.dts create mode 100644 arch/arm/dts/o4-imx6ull-nano.dtsi create mode 100644 board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg create mode 100644 board/out4/o4-imx6ull-nano/Kconfig create mode 100644 board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg create mode 100644 board/out4/o4-imx6ull-nano/Makefile create mode 100644 board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c create mode 100644 configs/o4-imx6ull-nano_defconfig create mode 100644 include/configs/o4-imx6ull-nano.h diff --git a/MAINTAINERS b/MAINTAINERS index c6dd9bf838..786476c016 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -916,6 +916,16 @@ S: Orphaned (Since 2017-01) T: git https://source.denx.de/u-boot/custodians/u-boot-onenand.git F: drivers/mtd/onenand/ +OUT4-IMX6ULL-NANO BOARD +M: Oleh Kravchenko <oleg(a)kaa.org.ua> +S: Maintained +T: git https://github.com/Oleh-Kravchenko/u-boot-out4.git +F: arch/arm/dts/o4-imx-nano.dts +F: arch/arm/dts/o4-imx6ull-nano.dtsi +F: board/out4 +F: configs/o4-imx6ull-nano_defconfig +F: include/configs/o4-imx6ull-nano.h + PATMAN M: Simon Glass <sjg(a)chromium.org> S: Maintained diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9a8de46272..0b2de37280 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -764,6 +764,9 @@ dtb-$(CONFIG_ARCH_MX6) += \ imx6-apalis.dtb \ imx6-colibri.dtb +dtb-$(CONFIG_O4_IMX_NANO) += \ + o4-imx-nano.dtb + dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7d-sdb-qspi.dtb \ imx7-colibri-emmc.dtb \ diff --git a/arch/arm/dts/o4-imx-nano.dts b/arch/arm/dts/o4-imx-nano.dts new file mode 100644 index 0000000000..d1785b7dc7 --- /dev/null +++ b/arch/arm/dts/o4-imx-nano.dts @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> + +/dts-v1/; + +#include <dt-bindings/leds/common.h> + +#include "o4-imx6ull-nano.dtsi" + +/ { + model = "O4-iMX-NANO"; + compatible = "out4,o4-imx-nano", + "out4,o4-imx6ull-nano", + "fsl,imx6ull"; + + aliases { + mmc1 = &usdhc1; + }; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + + led@0 { + color = <LED_COLOR_ID_RED>; + gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>; + reg = <0>; + }; + + led@1 { + color = <LED_COLOR_ID_GREEN>; + gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>; + reg = <1>; + }; + + led@2 { + gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_BLUE>; + reg = <2>; + }; + + led@3 { + color = <LED_COLOR_ID_RED>; + gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>; + reg = <3>; + }; + + led@4 { + color = <LED_COLOR_ID_GREEN>; + gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>; + reg = <4>; + }; + + led@5 { + color = <LED_COLOR_ID_BLUE>; + gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>; + reg = <5>; + }; + }; + + usbotg1_vbus: reg_usbotg1_vbus { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pcf8574a 6 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb0"; + }; + + usbotg2_vbus: reg_usbotg2_vbus { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&pcf8574a 7 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb1"; + }; +}; + +&iomuxc { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 + >; + }; + + pinctrl_mdio: mdiogrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_CSI_HSYNC__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_CSI_VSYNC__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b8b0 + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b8b0 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020 + MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 + >; + }; +}; + +&uart1 { + pinctrl-0 = <&pinctrl_uart1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usdhc1 { + bus-width = <4>; + no-1-8-v; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-names = "default"; + status = "okay"; + wakeup-source; +}; + +&fec1 { + phy-handle = <&phy0>; + phy-mode = "rmii"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-names = "default"; + status = "okay"; +}; + +&fec2 { + phy-handle = <&phy1>; + phy-mode = "rmii"; + phy-reset-duration = <250>; + phy-reset-post-delay = <100>; + phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_fec2 &pinctrl_mdio>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy0_irq>; + pinctrl-names = "default"; + reg = <0>; + }; + + phy1: ethernet-phy@1 { + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + interrupt-parent = <&gpio5>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_phy1_irq>; + pinctrl-names = "default"; + reg = <1>; + }; + }; +}; + +&usbotg1 { + dr_mode = "host"; + status = "okay"; + vbus-supply = <&usbotg1_vbus>; +}; + +&usbotg2 { + dr_mode = "host"; + status = "okay"; + vbus-supply = <&usbotg2_vbus>; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + pinctrl-names = "default", "gpio"; + scl-gpios = <&gpio4 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pcf8574a: gpio@38 { + compatible = "nxp,pcf8574a"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x38>; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1>; + status = "okay"; +}; + +&uart2 { + linux,rs485-enabled-at-boot-time; + pinctrl-0 = <&pinctrl_uart2>; + pinctrl-names = "default"; + status = "okay"; + uart-has-rtscts; +}; diff --git a/arch/arm/dts/o4-imx6ull-nano.dtsi b/arch/arm/dts/o4-imx6ull-nano.dtsi new file mode 100644 index 0000000000..3fefa80eae --- /dev/null +++ b/arch/arm/dts/o4-imx6ull-nano.dtsi @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> + +/dts-v1/; + +#include "imx6ull.dtsi" + +/ { + model = "O4-iMX6ULL-NANO"; + compatible = "out4,o4-imx6ull-nano", "fsl,imx6ull"; + + aliases { + mmc0 = &usdhc2; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; +}; + +&iomuxc { + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + >; + }; + + pinctrl_fec1: fec1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + >; + }; + + pinctrl_fec2: fec2grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + >; + }; + + pinctrl_phy0_irq: phy0grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x79 + >; + }; + + pinctrl_phy1_irq: phy1grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 + >; + }; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + non-removable; + keep-power-in-suspend; + wakeup-source; + bus-width = <8>; + status = "okay"; +}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 92fb4c4f23..419ae79cd0 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -688,6 +688,18 @@ config TARGET_BRPPT2 Support B&R BRPPT2 platform based on Freescale's iMX6 SoC + +config TARGET_O4_IMX6ULL_NANO + bool "O4-iMX6ULL-NANO" + depends on MX6ULL + select BOARD_LATE_INIT + select DM + select DM_THERMAL + imply CMD_DM + help + Support for www.out4.ru O4-iMX6UL-NANO platform + based on Freescale's i.MX6UL/i.MX6ULL SoC. + endchoice config SYS_SOC @@ -747,5 +759,6 @@ source "board/udoo/neo/Kconfig" source "board/wandboard/Kconfig" source "board/warp/Kconfig" source "board/BuR/brppt2/Kconfig" +source "board/out4/o4-imx6ull-nano/Kconfig" endif diff --git a/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg b/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg new file mode 100644 index 0000000000..c0dcfe9a0c --- /dev/null +++ b/board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 +BOOT_FROM sd + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +/* Samsung K4B4G1646D-BCMA */ +DATA 4 0x020e04b4 0x000c0000 +DATA 4 0x020e04ac 0x00000000 +DATA 4 0x020e027c 0x00000030 +DATA 4 0x020e0250 0x00000030 +DATA 4 0x020e024c 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e0288 0x000c0030 +DATA 4 0x020e0270 0x00000000 +DATA 4 0x020e0260 0x00000030 +DATA 4 0x020e0264 0x00000030 +DATA 4 0x020e04a0 0x00000030 +DATA 4 0x020e0494 0x00020000 +DATA 4 0x020e0280 0x00000030 +DATA 4 0x020e0284 0x00000030 +DATA 4 0x020e04b0 0x00020000 +DATA 4 0x020e0498 0x00000030 +DATA 4 0x020e04a4 0x00000030 +DATA 4 0x020e0244 0x00000030 +DATA 4 0x020e0248 0x00000030 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x00030009 +DATA 4 0x021b083c 0x01440148 +DATA 4 0x021b0848 0x40403640 +DATA 4 0x021b0850 0x4040322a +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x1b333030 +DATA 4 0x021b000c 0x676b52f2 +DATA 4 0x021b0010 0x926d0b63 +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006b1023 +DATA 4 0x021b0040 0x0000004f +DATA 4 0x021b0000 0x84180000 +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15108030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00007800 +DATA 4 0x021b0818 0x00000227 +DATA 4 0x021b0004 0x0002552d +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 diff --git a/board/out4/o4-imx6ull-nano/Kconfig b/board/out4/o4-imx6ull-nano/Kconfig new file mode 100644 index 0000000000..c2497d521f --- /dev/null +++ b/board/out4/o4-imx6ull-nano/Kconfig @@ -0,0 +1,57 @@ +if TARGET_O4_IMX6ULL_NANO + +config SYS_BOARD + default "o4-imx6ull-nano" + +config SYS_VENDOR + default "out4" + +config SYS_CONFIG_NAME + default "o4-imx6ull-nano" + +choice + prompt "Memory model" + default K4B4G1646D_BCMA + help + Memory type setup. + + Please choose correct memory model here. + +config K4B4G1646D_BCMA + bool "K4B4G1646D-BCMA 256Mx16 (512 MiB/chip)" + help + Samsung DDR3 SDRAM + K4B4G1646D-BCMA + +config MT41K256M16HA_125E + bool "MT41K256M16HA-125:E 256Mx16 (512 MiB/chip)" + help + Micron DDR3L SDRAM + MT41K256M16HA-125:E + +endchoice + +choice + prompt "Mainboard model" + default O4_IMX_NANO + help + Mainboard setup. + + Please choose correct main board model here. + +config O4_IMX_NANO + bool "O4-iMX-NANO" + help + A baseboard for EV-iMX280-NANO module: + https://out4.ru/products/board/18-o4-imx-nano.html + +endchoice + +config IMX_CONFIG + default "board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg" if K4B4G1646D_BCMA + default "board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg" if MT41K256M16HA_125E + +config DEFAULT_DEVICE_TREE + default "o4-imx-nano" if O4_IMX_NANO + +endif diff --git a/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg b/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg new file mode 100644 index 0000000000..6f823a7272 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2016 Freescale Semiconductor, Inc. +// Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 +BOOT_FROM sd + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +/* Micron MT41K256M16HA-125:E */ +DATA 4 0x020e04b4 0x000c0000 +DATA 4 0x020e04ac 0x00000000 +DATA 4 0x020e027c 0x00000030 +DATA 4 0x020e0250 0x00000030 +DATA 4 0x020e024c 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e0288 0x000c0030 +DATA 4 0x020e0270 0x00000000 +DATA 4 0x020e0260 0x00000030 +DATA 4 0x020e0264 0x00000030 +DATA 4 0x020e04a0 0x00000030 +DATA 4 0x020e0494 0x00020000 +DATA 4 0x020e0280 0x00000030 +DATA 4 0x020e0284 0x00000030 +DATA 4 0x020e04b0 0x00020000 +DATA 4 0x020e0498 0x00000030 +DATA 4 0x020e04a4 0x00000030 +DATA 4 0x020e0244 0x00000030 +DATA 4 0x020e0248 0x00000030 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x0005000b +DATA 4 0x021b083c 0x01400144 +DATA 4 0x021b0848 0x4040343a +DATA 4 0x021b0850 0x4040342a +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b082c 0xf3333333 +DATA 4 0x021b0830 0xf3333333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b0004 0x0002002d +DATA 4 0x021b0008 0x1b333030 +DATA 4 0x021b000c 0x676b52f2 +DATA 4 0x021b0010 0x91eb0b63 +DATA 4 0x021b0014 0x01ff00db +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x006b1023 +DATA 4 0x021b0040 0x0000004f +DATA 4 0x021b0000 0x84180000 +DATA 4 0x021b0890 0x00400000 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15108030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00007800 +DATA 4 0x021b0818 0x00000227 +DATA 4 0x021b0004 0x0002552d +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 diff --git a/board/out4/o4-imx6ull-nano/Makefile b/board/out4/o4-imx6ull-nano/Makefile new file mode 100644 index 0000000000..a3f4646d9e --- /dev/null +++ b/board/out4/o4-imx6ull-nano/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> + +obj-y := o4-imx6ull-nano.o diff --git a/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c new file mode 100644 index 0000000000..fec1755c32 --- /dev/null +++ b/board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> + +#include <asm/arch-mx6/clock.h> +#include <asm/arch/sys_proto.h> +#include <asm/global_data.h> +#include <asm/mach-imx/boot_mode.h> +#include <common.h> +#include <env.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +int board_early_init_f(void) +{ + return 0; +} + +static int setup_fec_clock(void) +{ + if (IS_ENABLED(CONFIG_FEC_MXC) && !IS_ENABLED(CONFIG_CLK_IMX6Q)) { + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + int ret; + + /* + * Use 50M anatop loopback REF_CLK1 for ENET1, + * clear gpr1[13], set gpr1[17]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(0, ENET_50MHZ); + if (ret) + return ret; + + /* + * Use 50M anatop loopback REF_CLK2 for ENET2, + * clear gpr1[14], set gpr1[18]. + */ + clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); + + ret = enable_fec_anatop_clock(1, ENET_50MHZ); + if (ret) + return ret; + + enable_enet_clk(1); + } + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return setup_fec_clock(); +} + +int board_late_init(void) +{ + if (IS_ENABLED(CONFIG_CMD_BMODE)) + add_board_boot_modes(NULL); + + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { + const char *model; + + model = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + if (model) + env_set("board_name", model); + } + + if (is_boot_from_usb()) { + env_set("bootcmd", "run bootcmd_mfg"); + env_set("bootdelay", "0"); + } + + return 0; +} diff --git a/configs/o4-imx6ull-nano_defconfig b/configs/o4-imx6ull-nano_defconfig new file mode 100644 index 0000000000..906a3afe5d --- /dev/null +++ b/configs/o4-imx6ull-nano_defconfig @@ -0,0 +1,103 @@ +CONFIG_ARCH_MX6=y +CONFIG_ARM=y +CONFIG_DEFAULT_DEVICE_TREE="o4-imx-nano" +CONFIG_HUSH_PARSER=y +CONFIG_IMX_MODULE_FUSE=y +CONFIG_MX6ULL=y +CONFIG_O4_IMX_NANO=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_TARGET_O4_IMX6ULL_NANO=y + +# CONFIG_K4B4G1646D_BCMA is not set +CONFIG_MT41K256M16HA_125E=y + +# Device Tree +CONFIG_OF_CONTROL=y +CONFIG_OF_LIBFDT_OVERLAY=y + +# Environment +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y + +# Clock driver for imx6ull is not implemented +# CONFIG_CLK_IMX6Q=y + +# Thermal +CONFIG_DM_THERMAL=y +CONFIG_IMX_THERMAL=y + +# Serial +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y + +# eMMC support +CONFIG_CMD_MMC=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SUPPORT_EMMC_RPMB=y + +# GPIO support +CONFIG_CMD_GPIO=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y + +# USB support +CONFIG_CI_UDC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_DM_USB=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y + +# Fastboot support +CONFIG_CMD_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_USB_FUNCTION_FASTBOOT=y + +# Ethernet support +CONFIG_CMD_DHCP=y +CONFIG_CMD_MDIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_FEC_MXC=y +CONFIG_FEC_MXC_MDIO_BASE=0x020b4000 +CONFIG_FEC_MXC_SHARE_MDIO=y +CONFIG_MII=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y + +# I2C +CONFIG_CMD_I2C=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y + +# Watchdog support is broken +# CONFIG_CMD_WDT=y +# CONFIG_IMX_WATCHDOG=y +# CONFIG_SYSRESET_WATCHDOG=y +# CONFIG_WATCHDOG_RESET_DISABLE=y +# CONFIG_WDT=y + +# VBUS +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y + +# misc +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_PART=y diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h new file mode 100644 index 0000000000..23308b6d01 --- /dev/null +++ b/include/configs/o4-imx6ull-nano.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright (C) 2021 Oleh Kravchenko <oleg(a)kaa.org.ua> */ + +#ifndef __O4_IMX6ULL_NANO_CONFIG_H +#define __O4_IMX6ULL_NANO_CONFIG_H + +#include "mx6_common.h" + +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#if IS_ENABLED(CONFIG_CMD_USB) +# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif /* CONFIG_CMD_USB */ + +#if IS_ENABLED(CONFIG_FEC_MXC) +# define CONFIG_FEC_XCV_TYPE RMII +#endif /* CONFIG_FEC_MXC */ + +#endif /* __O4_IMX6ULL_NANO_CONFIG_H */ -- 2.26.3

1 1

[GIT PULL] TI changes for v2021.07 rc3
by Lokesh Vutla 13 May '21

13 May '21

Hi Tom, Please find the PR for master branch targeted for v2021.07-rc1 release. Details about the PR are updated in the tag message. There are addition of new platform in this PR. I understand it is not expected to send these this late in the release. However, these are posted sometime ago and I could not spend time on these patches due to personal reasons. Please consider this as an exception and accept this PR. I ll try not to repeat this in future PRs. Gitlab build report: https://source.denx.de/u-boot/custodians/u-boot-ti/-/pipelines/7474 The following changes since commit b107761b817c421fb8eadee739656e1db38686c3: Prepare v2021.07-rc2 (2021-05-10 17:03:22 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-ti.git tags/ti-v2021.07-rc3 for you to fetch changes up to bbc9da58b332bd44e51ac5579040ea984b2f963b: ARM: dts: k3-am642-sk: Add ethernet related DT nodes (2021-05-12 16:36:39 +0530) ---------------------------------------------------------------- - Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver ---------------------------------------------------------------- Dario Binacchi (5): clk: ti: add custom API for memory access clk: ti: change clk_ti_latch() signature clk: ti: gate: use custom API for memory access clk: ti: am3-dpll: use custom API for memory access Revert "fdt: translate address if #size-cells = <0>" Dave Gerlach (30): arm: mach-k3: Add basic support for AM642 SoC definition arm: mach-k3: am642: Unlock all applicable control MMR registers arm: mach-k3: am642: Store boot info from ROM arm: mach-k3: am642: Load SYSFW binary and config from boot media arm: mach-k3: am642: Use mmc start and stop callbacks mmc: sdhci_am654: Add Support for TI's AM642 SoC mailbox: k3-sec-proxy: Extend valid thread IDs board: ti: am64x: Add board support for am64x evm dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64 arm: dts: ti: Add Support for AM642 SoC arm: dts: k3-am642: Add initial support for EVM arm: dts: k3-am642: Add r5 specific dt support configs: am64x_evm_r5: Add Initial support configs: am64x_evm_a53: Add Initial support dt-bindings: memory-controller: Add K3 AM64 DDRSS compatible ram: k3-j721e: lpddr4_address_slice_0_macros: Fix indentation issues ram: k3-j721e: lpddr4_data_slice_0_macros: Fix indentation issues ram: k3-j721e: lpddr4_data_slice_1_macros: Fix indentation issues ram: k3-j721e: lpddr4_data_slice_2_macros: Fix indentation issues ram: k3-j721e: lpddr4_data_slice_3_macros: Fix indentation issues ram: k3-j721e: lpddr4_ddr_controller_macros: Fix indentation issues ram: k3-j721e: lpddr4_phy_core_macros: Fix indentation issues ram: k3-j721e: lpddr4_pi_macros: Fix indentation issues ram: k3-j721e: lpddr4_ctl_regs: Fix checkpatch issue for types ram: k3-j721e: Rename to k3-ddrss ram: k3-ddrss: Introduce top-level CONFIG_K3_DDRSS ram: k3-ddrss: Introduce common driver with J7 SoC support ram: k3-ddrss: Introduce support for AM642 SoCs arm: dts: k3-am642: Add ddr node arm: mach-k3: am642: Add support for triggering ddr init from SPL Keerthy (2): arm: mach-k3: am642: Add support for boot device detection armv8: mach-k3: am642: Add custom MMU support Lokesh Vutla (19): ram: k3-ddrss: Enable vtt regulator if present soc: ti: k3-socinfo: Add entry for AM64X SoC family board: ti: am64x: Add support for reading eeprom data board: ti: am64x: Enable support for reading EEPROM in R5 SPL board: ti: am64x: Add support for detecting multiple device trees arm: am64x: Add support for selecting DT based on EEPROM include: configs: am64x: Avoid overlap of BSS and stack area include: configs: am64x_evm: Optimize size of SPL BSS include: configs: Update env for selecting right dtb arm: dts: k3-am64-evm: Make chip id available before pre-reloc arm: dts: k3-am642-r5-evm: Do not use power-domains for I2C arm: dts: am642-evm: Add I2C nodes arm: dts: am642-sk: Add initial sk dts arm: dts: am642-r5-sk: Add r5 specific dts configs: am64x_evm_r5: Enable checks for spl and stack sizes configs: am64x_evm_r5: Enable support for building multiple device trees configs: am64x_evm_a53: Enable configs for printing cpuinfo configs: am64x_evm_a53: Enable support for reading eeprom configs: am64x_evm_a53: Enable support for building multiple dtbs Nishanth Menon (3): arm: dts: k3-am64-main: Add GPIO nodes arm: dts: k3-am642-r5-evm: Add GPIO DDR VTT regulator configs: am64x_evm_r5: Enable GPIO regulator Suman Anna (1): arm: mach-k3: am642: Shut down R5 core after ATF startup on A53 Vignesh Raghavendra (13): board: ti: am64x: Parse MAC address from board EEPROM firmware: ti_sci: Update ti_sci_cmd_rm_udmap_tx_ch_cfg() API to the latest soc: ti: k3-navss-ringacc: Add AM64 ringacc support soc: ti: k3-navss-ringacc: Remove unused ring modes dma: ti: k3-psil-am654: Drop unused PSIL EP static data dma: ti: k3-psil: Extend PSIL EP data extension for AM64 dma: ti: k3-psil-am64: Add AM64 PSIL endpoint data dma: ti: k3-udma: Add BCDMA and PKTDMA support net: ti: am65-cpsw-nuss: Prepare to support non primary ext port net: ti: am65-cpsw-nuss: Don't cache disabled port ID net: ti: am65-cpsw-nuss: Add a new compatible for AM64 ARM: dts: k3-am64-main: Add CPSW DT nodes ARM: dts: k3-am642-sk: Add ethernet related DT nodes arch/arm/dts/Makefile | 4 + arch/arm/dts/k3-am64-ddr.dtsi | 2205 +++++ arch/arm/dts/k3-am64-evm-ddr4-1600MTs.dtsi | 2187 +++++ arch/arm/dts/k3-am64-main.dtsi | 567 ++ arch/arm/dts/k3-am64-mcu.dtsi | 76 + arch/arm/dts/k3-am64-sk-lp4-1333MTs.dtsi | 2190 +++++ arch/arm/dts/k3-am64.dtsi | 107 + arch/arm/dts/k3-am642-evm-u-boot.dtsi | 99 + arch/arm/dts/k3-am642-evm.dts | 339 + arch/arm/dts/k3-am642-r5-evm.dts | 204 + arch/arm/dts/k3-am642-r5-sk.dts | 145 + arch/arm/dts/k3-am642-sk-u-boot.dtsi | 103 + arch/arm/dts/k3-am642-sk.dts | 156 + arch/arm/dts/k3-am642.dtsi | 65 + arch/arm/mach-k3/Kconfig | 15 +- arch/arm/mach-k3/Makefile | 1 + arch/arm/mach-k3/am642_init.c | 315 + arch/arm/mach-k3/arm64-mmu.c | 41 + arch/arm/mach-k3/include/mach/am64_hardware.h | 55 + arch/arm/mach-k3/include/mach/am64_spl.h | 44 + arch/arm/mach-k3/include/mach/hardware.h | 4 + arch/arm/mach-k3/include/mach/spl.h | 4 + arch/sandbox/dts/test.dts | 21 - board/ti/am64x/Kconfig | 62 + board/ti/am64x/MAINTAINERS | 8 + board/ti/am64x/Makefile | 8 + board/ti/am64x/evm.c | 154 + board/ti/j721e/Kconfig | 4 +- common/fdt_support.c | 6 +- configs/am64x_evm_a53_defconfig | 104 + configs/am64x_evm_r5_defconfig | 107 + .../memory-controller/k3-j721e-ddrss.txt | 3 +- drivers/clk/ti/clk-am3-dpll.c | 86 +- drivers/clk/ti/clk-divider.c | 20 +- drivers/clk/ti/clk-gate.c | 23 +- drivers/clk/ti/clk-mux.c | 20 +- drivers/clk/ti/clk.c | 95 +- drivers/clk/ti/clk.h | 15 +- drivers/core/Kconfig | 12 - drivers/core/fdtaddr.c | 2 +- drivers/core/of_addr.c | 13 +- drivers/core/ofnode.c | 7 +- drivers/core/root.c | 3 - drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-am64.c | 156 + drivers/dma/ti/k3-psil-am654.c | 32 +- drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 + drivers/dma/ti/k3-psil.h | 16 + drivers/dma/ti/k3-udma.c | 1003 ++- drivers/firmware/ti_sci.c | 3 + drivers/firmware/ti_sci.h | 18 + drivers/mailbox/k3-sec-proxy.c | 10 +- drivers/mmc/am654_sdhci.c | 18 + drivers/net/ti/am65-cpsw-nuss.c | 5 +- drivers/ram/Kconfig | 24 +- drivers/ram/Makefile | 2 +- drivers/ram/k3-ddrss/16bit/lpddr4_16bit_if.h | 108 + .../ram/k3-ddrss/16bit/lpddr4_16bit_obj_if.h | 14 + .../k3-ddrss/16bit/lpddr4_16bit_structs_if.h | 15 + .../16bit/lpddr4_address_slice_0_macros.h | 624 ++ .../16bit/lpddr4_address_slice_1_macros.h | 624 ++ .../16bit/lpddr4_address_slice_2_macros.h | 624 ++ drivers/ram/k3-ddrss/16bit/lpddr4_ctl_regs.h | 1306 +++ .../k3-ddrss/16bit/lpddr4_ctl_regs_rw_masks.h | 23 + .../16bit/lpddr4_data_slice_0_macros.h | 2036 +++++ .../16bit/lpddr4_data_slice_1_macros.h | 2036 +++++ .../16bit/lpddr4_ddr_controller_macros.h | 6436 ++++++++++++++ .../k3-ddrss/16bit/lpddr4_phy_core_macros.h | 1838 ++++ drivers/ram/k3-ddrss/16bit/lpddr4_pi_macros.h | 5784 ++++++++++++ drivers/ram/k3-ddrss/32bit/lpddr4_32bit_if.h | 91 + .../ram/k3-ddrss/32bit/lpddr4_32bit_obj_if.h | 14 + .../k3-ddrss/32bit/lpddr4_32bit_structs_if.h | 15 + .../32bit}/lpddr4_address_slice_0_macros.h | 343 +- drivers/ram/k3-ddrss/32bit/lpddr4_ctl_regs.h | 1545 ++++ .../k3-ddrss/32bit/lpddr4_ctl_regs_rw_masks.h | 23 + .../32bit}/lpddr4_data_slice_0_macros.h | 1443 ++- .../32bit}/lpddr4_data_slice_1_macros.h | 1363 ++- .../32bit}/lpddr4_data_slice_2_macros.h | 1363 ++- .../32bit}/lpddr4_data_slice_3_macros.h | 1363 ++- .../32bit/lpddr4_ddr_controller_macros.h | 7792 ++++++++++++++++ .../32bit}/lpddr4_phy_core_macros.h | 1397 ++- drivers/ram/k3-ddrss/32bit/lpddr4_pi_macros.h | 5396 ++++++++++++ drivers/ram/k3-ddrss/Makefile | 17 + drivers/ram/k3-ddrss/cps_drv_lpddr4.h | 102 + .../k3-j721e-ddrss.c => k3-ddrss/k3-ddrss.c} | 289 +- drivers/ram/k3-ddrss/lpddr4.c | 1079 +++ drivers/ram/k3-ddrss/lpddr4.h | 73 + drivers/ram/k3-ddrss/lpddr4_16bit.c | 396 + drivers/ram/k3-ddrss/lpddr4_16bit.h | 33 + .../k3-ddrss/lpddr4_16bit_ctl_regs_rw_masks.c | 1309 +++ drivers/ram/k3-ddrss/lpddr4_16bit_sanity.h | 257 + drivers/ram/k3-ddrss/lpddr4_32bit.c | 302 + drivers/ram/k3-ddrss/lpddr4_32bit.h | 30 + .../k3-ddrss/lpddr4_32bit_ctl_regs_rw_masks.c | 1548 ++++ drivers/ram/k3-ddrss/lpddr4_32bit_sanity.h | 223 + drivers/ram/k3-ddrss/lpddr4_if.h | 144 + drivers/ram/k3-ddrss/lpddr4_obj_if.c | 51 + drivers/ram/k3-ddrss/lpddr4_obj_if.h | 86 + .../{k3-j721e => k3-ddrss}/lpddr4_private.h | 0 drivers/ram/k3-ddrss/lpddr4_sanity.h | 445 + drivers/ram/k3-ddrss/lpddr4_structs_if.h | 51 + drivers/ram/k3-j721e/Makefile | 8 - drivers/ram/k3-j721e/cps_drv_lpddr4.h | 119 - drivers/ram/k3-j721e/lpddr4.c | 2105 ----- drivers/ram/k3-j721e/lpddr4_ctl_regs.h | 1546 ---- .../k3-j721e/lpddr4_ddr_controller_macros.h | 7793 ----------------- drivers/ram/k3-j721e/lpddr4_if.h | 578 -- drivers/ram/k3-j721e/lpddr4_obj_if.c | 55 - drivers/ram/k3-j721e/lpddr4_obj_if.h | 383 - drivers/ram/k3-j721e/lpddr4_pi_macros.h | 5397 ------------ drivers/ram/k3-j721e/lpddr4_sanity.h | 1165 --- drivers/ram/k3-j721e/lpddr4_structs_if.h | 121 - drivers/soc/soc_ti_k3.c | 4 + drivers/soc/ti/k3-navss-ringacc.c | 530 +- include/asm-generic/global_data.h | 24 - include/configs/am64x_evm.h | 113 + include/dt-bindings/pinctrl/k3.h | 5 +- include/linux/soc/ti/k3-navss-ringacc.h | 22 +- include/linux/soc/ti/ti_sci_protocol.h | 14 + test/dm/test-fdt.c | 68 - 121 files changed, 57482 insertions(+), 23609 deletions(-) create mode 100644 arch/arm/dts/k3-am64-ddr.dtsi create mode 100644 arch/arm/dts/k3-am64-evm-ddr4-1600MTs.dtsi create mode 100644 arch/arm/dts/k3-am64-main.dtsi create mode 100644 arch/arm/dts/k3-am64-mcu.dtsi create mode 100644 arch/arm/dts/k3-am64-sk-lp4-1333MTs.dtsi create mode 100644 arch/arm/dts/k3-am64.dtsi create mode 100644 arch/arm/dts/k3-am642-evm-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am642-evm.dts create mode 100644 arch/arm/dts/k3-am642-r5-evm.dts create mode 100644 arch/arm/dts/k3-am642-r5-sk.dts create mode 100644 arch/arm/dts/k3-am642-sk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am642-sk.dts create mode 100644 arch/arm/dts/k3-am642.dtsi create mode 100644 arch/arm/mach-k3/am642_init.c create mode 100644 arch/arm/mach-k3/include/mach/am64_hardware.h create mode 100644 arch/arm/mach-k3/include/mach/am64_spl.h create mode 100644 board/ti/am64x/Kconfig create mode 100644 board/ti/am64x/MAINTAINERS create mode 100644 board/ti/am64x/Makefile create mode 100644 board/ti/am64x/evm.c create mode 100644 configs/am64x_evm_a53_defconfig create mode 100644 configs/am64x_evm_r5_defconfig create mode 100644 drivers/dma/ti/k3-psil-am64.c create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_16bit_if.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_16bit_obj_if.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_16bit_structs_if.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_address_slice_0_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_address_slice_1_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_address_slice_2_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_ctl_regs.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_ctl_regs_rw_masks.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_data_slice_0_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_data_slice_1_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_ddr_controller_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_phy_core_macros.h create mode 100644 drivers/ram/k3-ddrss/16bit/lpddr4_pi_macros.h create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_32bit_if.h create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_32bit_obj_if.h create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_32bit_structs_if.h rename drivers/ram/{k3-j721e => k3-ddrss/32bit}/lpddr4_address_slice_0_macros.h (76%) create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_ctl_regs.h create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_ctl_regs_rw_masks.h rename drivers/ram/{k3-j721e => k3-ddrss/32bit}/lpddr4_data_slice_0_macros.h (64%) rename drivers/ram/{k3-j721e => k3-ddrss/32bit}/lpddr4_data_slice_1_macros.h (66%) rename drivers/ram/{k3-j721e => k3-ddrss/32bit}/lpddr4_data_slice_2_macros.h (66%) rename drivers/ram/{k3-j721e => k3-ddrss/32bit}/lpddr4_data_slice_3_macros.h (66%) create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_ddr_controller_macros.h rename drivers/ram/{k3-j721e => k3-ddrss/32bit}/lpddr4_phy_core_macros.h (60%) create mode 100644 drivers/ram/k3-ddrss/32bit/lpddr4_pi_macros.h create mode 100644 drivers/ram/k3-ddrss/Makefile create mode 100644 drivers/ram/k3-ddrss/cps_drv_lpddr4.h rename drivers/ram/{k3-j721e/k3-j721e-ddrss.c => k3-ddrss/k3-ddrss.c} (51%) create mode 100644 drivers/ram/k3-ddrss/lpddr4.c create mode 100644 drivers/ram/k3-ddrss/lpddr4.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_16bit.c create mode 100644 drivers/ram/k3-ddrss/lpddr4_16bit.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_16bit_ctl_regs_rw_masks.c create mode 100644 drivers/ram/k3-ddrss/lpddr4_16bit_sanity.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_32bit.c create mode 100644 drivers/ram/k3-ddrss/lpddr4_32bit.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_32bit_ctl_regs_rw_masks.c create mode 100644 drivers/ram/k3-ddrss/lpddr4_32bit_sanity.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_if.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_obj_if.c create mode 100644 drivers/ram/k3-ddrss/lpddr4_obj_if.h rename drivers/ram/{k3-j721e => k3-ddrss}/lpddr4_private.h (100%) create mode 100644 drivers/ram/k3-ddrss/lpddr4_sanity.h create mode 100644 drivers/ram/k3-ddrss/lpddr4_structs_if.h delete mode 100644 drivers/ram/k3-j721e/Makefile delete mode 100644 drivers/ram/k3-j721e/cps_drv_lpddr4.h delete mode 100644 drivers/ram/k3-j721e/lpddr4.c delete mode 100644 drivers/ram/k3-j721e/lpddr4_ctl_regs.h delete mode 100644 drivers/ram/k3-j721e/lpddr4_ddr_controller_macros.h delete mode 100644 drivers/ram/k3-j721e/lpddr4_if.h delete mode 100644 drivers/ram/k3-j721e/lpddr4_obj_if.c delete mode 100644 drivers/ram/k3-j721e/lpddr4_obj_if.h delete mode 100644 drivers/ram/k3-j721e/lpddr4_pi_macros.h delete mode 100644 drivers/ram/k3-j721e/lpddr4_sanity.h delete mode 100644 drivers/ram/k3-j721e/lpddr4_structs_if.h create mode 100644 include/configs/am64x_evm.h -- 2.30.0

2 1