May 2021 - U-Boot

Pull request for efi-2021-07-rc3
by Heinrich Schuchardt 18 May '21

18 May '21

Dear Tom, The following changes since commit feddbdb55f47b94f9f6695dc19a826953f893f7a: Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2021-05-17 10:01:56 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2021-07-rc3 for you to fetch changes up to 87316da05f2fd49d3709275e64ef0c5980366ade: lib: introduce HASH_CALCULATE option (2021-05-18 12:36:13 +0200) Gitlab CI showed no issues: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/7574 ---------------------------------------------------------------- Pull request for efi-2021-07-rc3 Documentation: * add a man-page for the size command * add man-page for extension command to index Bug fixes: * avoid build failure due to missing SHA512 hardware acceleration * correct error handling in TCG2 protocol * don't let user disable capsule authentication * correct reading directories via UEFI API ---------------------------------------------------------------- Heinrich Schuchardt (4): doc: man-page for size command doc: extension.rst missing in doc/usage/index.rst efi_loader: build warning in efi_tcg2_hash_log_extend_event hash: Kconfig option for SHA512 hardware acceleration Ilias Apalodimas (4): efi_loader: Clean up tcg2 once in case of failure efi_loader: Uninstall the TCG2 protocol if logging s-crtm fails efi_loader: Don't stop EFI subsystem init if installing TCG2 fails efi_loader: Fix Kconfig for EFI_TCG2 protocol Masahisa Kojima (1): lib: introduce HASH_CALCULATE option Peng Fan (1): efi_loader: loosen buffer parameter check in efi_file_read_int Sughosh Ganu (1): efi_loader: capsule: Remove the check for capsule_authentication_enabled environment variable board/emulation/common/qemu_capsule.c | 6 ----- common/Kconfig.boot | 1 + common/hash.c | 8 +++--- doc/usage/index.rst | 2 ++ doc/usage/size.rst | 40 +++++++++++++++++++++++++++++ lib/Kconfig | 24 ++++++++++++++---- lib/Makefile | 2 +- lib/efi_loader/Kconfig | 8 ++++++ lib/efi_loader/efi_file.c | 2 +- lib/efi_loader/efi_firmware.c | 5 ++-- lib/efi_loader/efi_tcg2.c | 47 ++++++++++++++++++++++++----------- 11 files changed, 110 insertions(+), 35 deletions(-) create mode 100644 doc/usage/size.rst

2 1

[PULL] u-boot-riscv/master
by Leo Liang 18 May '21

18 May '21

Hi Tom, CI result: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7572 The following changes since commit e644dfbb1786a4a3308b068e1f61cd9e2dfac237: configs: Resync with savedefconfig (2021-05-15 08:10:13 -0400) are available in the Git repository at: git@source.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 89419279f4fe6bfd68dd518059ef2007295f1cb4: riscv: Group assembly optimized implementation of memory routines into a submenu (2021-05-17 16:47:33 +0800) ---------------------------------------------------------------- Bin Meng (4): riscv: ax25-ae350: doc: Fix minor format issues riscv: Split SiFive CLINT support between SPL and U-Boot proper riscv: Fix memmove and optimise memcpy when misalign riscv: Group assembly optimized implementation of memory routines into a submenu Sean Anderson (1): riscv: Fix arch_fixup_fdt always failing without /chosen arch/riscv/Kconfig | 13 ++- arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/generic/Kconfig | 3 +- arch/riscv/include/asm/global_data.h | 2 +- arch/riscv/lib/Makefile | 2 +- arch/riscv/lib/fdt_fixup.c | 11 ++- arch/riscv/lib/memcpy.S | 223 +++++++++++++++++++++++++++++------------------ arch/riscv/lib/memmove.S | 176 +++++++++++++++++++++++++------------ doc/board/AndesTech/ax25-ae350.rst | 4 +- drivers/timer/Makefile | 2 +- 10 files changed, 284 insertions(+), 154 deletions(-) Best regards, Leo

2 1

[PATCH v3] Fix flashing of eMMC user area with Fastboot
by Oleh Kravchenko 18 May '21

18 May '21

'gpt' and 'mmc0' fastboot partitions have been treated as the same device, but it is wrong. Signed-off-by: Oleh Kravchenko <oleg(a)kaa.org.ua> Cc: Pantelis Antoniou <panto(a)antoniou-consulting.com> Cc: Marek Vasut <marex(a)denx.de> --- Changes for v2: - code cleanup; Changes for v3: - QA passed at https://github.com/u-boot/u-boot/pull/75; drivers/fastboot/fb_mmc.c | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c index 2f3837e559..647d3f6c1b 100644 --- a/drivers/fastboot/fb_mmc.c +++ b/drivers/fastboot/fb_mmc.c @@ -532,12 +532,7 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer, #endif #if CONFIG_IS_ENABLED(EFI_PARTITION) -#ifndef CONFIG_FASTBOOT_MMC_USER_SUPPORT if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0) { -#else - if (strcmp(cmd, CONFIG_FASTBOOT_GPT_NAME) == 0 || - strcmp(cmd, CONFIG_FASTBOOT_MMC_USER_NAME) == 0) { -#endif dev_desc = fastboot_mmc_get_dev(response); if (!dev_desc) return; @@ -599,9 +594,29 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer, } #endif +#if CONFIG_IS_ENABLED(FASTBOOT_MMC_USER_SUPPORT) + if (strcmp(cmd, CONFIG_FASTBOOT_MMC_USER_NAME) == 0) { + dev_desc = fastboot_mmc_get_dev(response); + if (!dev_desc) + return; + + memset(&info, 0, sizeof(info)); + info.start = 0; + info.size = dev_desc->lba; + info.blksz = dev_desc->blksz; + strlcpy((char *)&info.name, cmd, sizeof(info.name)); + + goto write_image; + } +#endif + if (fastboot_mmc_get_part_info(cmd, &dev_desc, &info, response) < 0) return; +#if CONFIG_IS_ENABLED(FASTBOOT_MMC_USER_SUPPORT) +write_image: +#endif + if (is_sparse_image(download_buffer)) { struct fb_mmc_sparse sparse_priv; struct sparse_storage sparse; -- 2.26.3

3 13

[PATCH] drivers: pci: pcie_dw_common: fix Werror compilation error
by Green Wan 18 May '21

18 May '21

Fix compilation error when Werror is turned on. The warning could possible break some CI builds. Signed-off-by: Green Wan <green.wan(a)sifive.com> --- drivers/pci/pcie_dw_common.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c index 785fd3aad0..fde7c36558 100644 --- a/drivers/pci/pcie_dw_common.c +++ b/drivers/pci/pcie_dw_common.c @@ -213,7 +213,7 @@ int pcie_dw_read_config(const struct udevice *bus, pci_dev_t bdf, va_address = set_cfg_address(pcie, bdf, offset); - value = readl(va_address); + value = readl((void __iomem *)va_address); debug("(addr,val)=(0x%04x, 0x%08lx)\n", offset, value); *valuep = pci_conv_32_to_size(value, offset, size); @@ -257,9 +257,9 @@ int pcie_dw_write_config(struct udevice *bus, pci_dev_t bdf, va_address = set_cfg_address(pcie, bdf, offset); - old = readl(va_address); + old = readl((void __iomem *)va_address); value = pci_conv_size_to_32(old, value, offset, size); - writel(value, va_address); + writel(value, (void __iomem *)va_address); return pcie_dw_prog_outbound_atu_unroll(pcie, PCIE_ATU_REGION_INDEX1, PCIE_ATU_TYPE_IO, pcie->io.phys_start, @@ -337,28 +337,28 @@ void pcie_dw_setup_host(struct pcie_dw *pci) pci->cfg_base, pci->cfg_base + pci->cfg_size, pci->cfg_size); - dev_dbg(pci->dev, "IO space: [0x%llx - 0x%llx, size 0x%lx]\n", + dev_dbg(pci->dev, "IO space: [0x%llx - 0x%llx, size 0x%llx]\n", pci->io.phys_start, pci->io.phys_start + pci->io.size, pci->io.size); - dev_dbg(pci->dev, "IO bus: [0x%lx - 0x%lx, size 0x%lx]\n", + dev_dbg(pci->dev, "IO bus: [0x%llx - 0x%llx, size 0x%llx]\n", pci->io.bus_start, pci->io.bus_start + pci->io.size, pci->io.size); - dev_dbg(pci->dev, "MEM space: [0x%llx - 0x%llx, size 0x%lx]\n", + dev_dbg(pci->dev, "MEM space: [0x%llx - 0x%llx, size 0x%llx]\n", pci->mem.phys_start, pci->mem.phys_start + pci->mem.size, pci->mem.size); - dev_dbg(pci->dev, "MEM bus: [0x%lx - 0x%lx, size 0x%lx]\n", + dev_dbg(pci->dev, "MEM bus: [0x%llx - 0x%llx, size 0x%llx]\n", pci->mem.bus_start, pci->mem.bus_start + pci->mem.size, pci->mem.size); if (pci->prefetch.size) { - dev_dbg(pci->dev, "PREFETCH space: [0x%llx - 0x%llx, size 0x%lx]\n", + dev_dbg(pci->dev, "PREFETCH space: [0x%llx - 0x%llx, size 0x%llx]\n", pci->prefetch.phys_start, pci->prefetch.phys_start + pci->prefetch.size, pci->prefetch.size); - dev_dbg(pci->dev, "PREFETCH bus: [0x%lx - 0x%lx, size 0x%lx]\n", + dev_dbg(pci->dev, "PREFETCH bus: [0x%llx - 0x%llx, size 0x%llx]\n", pci->prefetch.bus_start, pci->prefetch.bus_start + pci->prefetch.size, pci->prefetch.size); } -- 2.31.0

1 0

[PATCH 1/2] cmd: pinmux: update result of do_status
by Patrick Delaunay 18 May '21

18 May '21

Update the result of do_status and alway returns a CMD_RET_ value (-ENOSYS was a possible result of show_pinmux). This patch also adds pincontrol name in error messages (dev->name) and treats correctly the status sub command when pin-controller device is not selected. Signed-off-by: Patrick Delaunay <patrick.delaunay(a)st.com> --- cmd/pinmux.c | 44 +++++++++++++++++++----------------- test/py/tests/test_pinmux.py | 4 ++-- 2 files changed, 25 insertions(+), 23 deletions(-) diff --git a/cmd/pinmux.c b/cmd/pinmux.c index 9942b15419..af04c95a46 100644 --- a/cmd/pinmux.c +++ b/cmd/pinmux.c @@ -41,7 +41,7 @@ static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_SUCCESS; } -static int show_pinmux(struct udevice *dev) +static void show_pinmux(struct udevice *dev) { char pin_name[PINNAME_SIZE]; char pin_mux[PINMUX_SIZE]; @@ -51,54 +51,56 @@ static int show_pinmux(struct udevice *dev) pins_count = pinctrl_get_pins_count(dev); - if (pins_count == -ENOSYS) { - printf("Ops get_pins_count not supported\n"); - return pins_count; + if (pins_count < 0) { + printf("Ops get_pins_count not supported by %s\n", dev->name); + return; } for (i = 0; i < pins_count; i++) { ret = pinctrl_get_pin_name(dev, i, pin_name, PINNAME_SIZE); - if (ret == -ENOSYS) { - printf("Ops get_pin_name not supported\n"); - return ret; + if (ret) { + printf("Ops get_pin_name error (%d) by %s\n", + ret, dev->name); + return; } ret = pinctrl_get_pin_muxing(dev, i, pin_mux, PINMUX_SIZE); if (ret) { - printf("Ops get_pin_muxing error (%d)\n", ret); - return ret; + printf("Ops get_pin_muxing error (%d) by %s in %s\n", + ret, pin_name, dev->name); + return; } printf("%-*s: %-*s\n", PINNAME_SIZE, pin_name, PINMUX_SIZE, pin_mux); } - - return 0; } static int do_status(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct udevice *dev; - int ret = CMD_RET_USAGE; - if (currdev && (argc < 2 || strcmp(argv[1], "-a"))) - return show_pinmux(currdev); + if (argc < 2) { + if (!currdev) { + printf("pin-controller device not selected\n"); + return CMD_RET_FAILURE; + } + show_pinmux(currdev); + return CMD_RET_SUCCESS; + } - if (argc < 2 || strcmp(argv[1], "-a")) - return ret; + if (strcmp(argv[1], "-a")) + return CMD_RET_USAGE; uclass_foreach_dev_probe(UCLASS_PINCTRL, dev) { /* insert a separator between each pin-controller display */ printf("--------------------------\n"); printf("%s:\n", dev->name); - ret = show_pinmux(dev); - if (ret < 0) - printf("Can't display pin muxing for %s\n", - dev->name); + show_pinmux(dev); } - return ret; + return CMD_RET_SUCCESS; } static int do_list(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/test/py/tests/test_pinmux.py b/test/py/tests/test_pinmux.py index 0cbbae000c..b3ae2ab024 100644 --- a/test/py/tests/test_pinmux.py +++ b/test/py/tests/test_pinmux.py @@ -13,9 +13,9 @@ def test_pinmux_usage_1(u_boot_console): @pytest.mark.buildconfigspec('cmd_pinmux') def test_pinmux_usage_2(u_boot_console): """Test that 'pinmux status' executed without previous "pinmux dev" - command displays pinmux usage.""" + command displays error message.""" output = u_boot_console.run_command('pinmux status') - assert 'Usage:' in output + assert 'pin-controller device not selected' in output @pytest.mark.buildconfigspec('cmd_pinmux') @pytest.mark.boardspec('sandbox') -- 2.17.1

4 9

[PATCH v3] dm: core: Add address translation in fdt_get_resource
by Patrick Delaunay 18 May '21

18 May '21

Today of_address_to_resource() is called only in ofnode_read_resource() for livetree support and fdt_get_resource() is called when livetree is not supported. The fdt_get_resource() doesn't do the address translation so when it is required, but the address translation is done by ofnode_read_resource() caller, for example in drivers/firmware/scmi/smt.c::scmi_dt_get_smt_buffer() { ... ret = ofnode_read_resource(args.node, 0, &resource); if (ret) return ret; faddr = cpu_to_fdt32(resource.start); paddr = ofnode_translate_address(args.node, &faddr); ... The both behavior should be aligned and the address translation must be called in fdt_get_resource() and removed for each caller. Fixes: a44810123f9e ("dm: core: Add dev_read_resource() to read device resources") Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- This patch allows to remove the workaround in smci/smt.c introduced by [1]. But it impact with all user of - ofnode_read_resource - ofnode_read_resource_byname - dev_read_resource - dev_read_resource_byname After my first check, the only impacts are in drivers/net/mscc_eswitch => I remove the unnecessary translate after code review, this patch need to be verify on real hardware I proposed to merge the workaround [1] as soon as possible to avoid issue on stm32mp1 platform and this patch can be merged when it will be acked by mscc_eswitch maintainers and other API users. [1] "scmi: translate the resource only when livetree is not activated" http://patchwork.ozlabs.org/project/uboot/list/?series=236526&state=* Changes in v3: - add test dm_test_read_resource Changes in v2: - remove translate in luton_switch.c:luton_probe() drivers/firmware/scmi/smt.c | 12 +-------- drivers/net/mscc_eswitch/jr2_switch.c | 4 +-- drivers/net/mscc_eswitch/luton_switch.c | 5 +--- drivers/net/mscc_eswitch/ocelot_switch.c | 4 +-- drivers/net/mscc_eswitch/serval_switch.c | 4 +-- drivers/net/mscc_eswitch/servalt_switch.c | 4 +-- lib/fdtdec.c | 6 ++++- test/dm/test-fdt.c | 33 +++++++++++++++++++++++ 8 files changed, 44 insertions(+), 28 deletions(-) diff --git a/drivers/firmware/scmi/smt.c b/drivers/firmware/scmi/smt.c index f1915c0074..e60c2aebc8 100644 --- a/drivers/firmware/scmi/smt.c +++ b/drivers/firmware/scmi/smt.c @@ -30,8 +30,6 @@ int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt) int ret; struct ofnode_phandle_args args; struct resource resource; - fdt32_t faddr; - phys_addr_t paddr; ret = dev_read_phandle_with_args(dev, "shmem", NULL, 0, 0, &args); if (ret) @@ -41,21 +39,13 @@ int scmi_dt_get_smt_buffer(struct udevice *dev, struct scmi_smt *smt) if (ret) return ret; - /* TEMP workaround for ofnode_read_resource translation issue */ - if (of_live_active()) { - paddr = resource.start; - } else { - faddr = cpu_to_fdt32(resource.start); - paddr = ofnode_translate_address(args.node, &faddr); - } - smt->size = resource_size(&resource); if (smt->size < sizeof(struct scmi_smt_header)) { dev_err(dev, "Shared memory buffer too small\n"); return -EINVAL; } - smt->buf = devm_ioremap(dev, paddr, smt->size); + smt->buf = devm_ioremap(dev, resource.start, smt->size); if (!smt->buf) return -ENOMEM; diff --git a/drivers/net/mscc_eswitch/jr2_switch.c b/drivers/net/mscc_eswitch/jr2_switch.c index 570d5a5109..d1e5b61ea5 100644 --- a/drivers/net/mscc_eswitch/jr2_switch.c +++ b/drivers/net/mscc_eswitch/jr2_switch.c @@ -863,7 +863,6 @@ static int jr2_probe(struct udevice *dev) int i; int ret; struct resource res; - fdt32_t faddr; phys_addr_t addr_base; unsigned long addr_size; ofnode eth_node, node, mdio_node; @@ -926,9 +925,8 @@ static int jr2_probe(struct udevice *dev) if (ofnode_read_resource(mdio_node, 0, &res)) return -ENOMEM; - faddr = cpu_to_fdt32(res.start); - addr_base = ofnode_translate_address(mdio_node, &faddr); + addr_base = res.start; addr_size = res.end - res.start; /* If the bus is new then create a new bus */ diff --git a/drivers/net/mscc_eswitch/luton_switch.c b/drivers/net/mscc_eswitch/luton_switch.c index 54afa14c9d..73c950d118 100644 --- a/drivers/net/mscc_eswitch/luton_switch.c +++ b/drivers/net/mscc_eswitch/luton_switch.c @@ -588,7 +588,6 @@ static int luton_probe(struct udevice *dev) struct luton_private *priv = dev_get_priv(dev); int i, ret; struct resource res; - fdt32_t faddr; phys_addr_t addr_base; unsigned long addr_size; ofnode eth_node, node, mdio_node; @@ -658,9 +657,7 @@ static int luton_probe(struct udevice *dev) if (ofnode_read_resource(mdio_node, 0, &res)) return -ENOMEM; - faddr = cpu_to_fdt32(res.start); - - addr_base = ofnode_translate_address(mdio_node, &faddr); + addr_base = res.start; addr_size = res.end - res.start; /* If the bus is new then create a new bus */ diff --git a/drivers/net/mscc_eswitch/ocelot_switch.c b/drivers/net/mscc_eswitch/ocelot_switch.c index 19e725c6f9..d1d0a489ab 100644 --- a/drivers/net/mscc_eswitch/ocelot_switch.c +++ b/drivers/net/mscc_eswitch/ocelot_switch.c @@ -530,7 +530,6 @@ static int ocelot_probe(struct udevice *dev) struct ocelot_private *priv = dev_get_priv(dev); int i, ret; struct resource res; - fdt32_t faddr; phys_addr_t addr_base; unsigned long addr_size; ofnode eth_node, node, mdio_node; @@ -578,9 +577,8 @@ static int ocelot_probe(struct udevice *dev) if (ofnode_read_resource(mdio_node, 0, &res)) return -ENOMEM; - faddr = cpu_to_fdt32(res.start); - addr_base = ofnode_translate_address(mdio_node, &faddr); + addr_base = res.start; addr_size = res.end - res.start; /* If the bus is new then create a new bus */ diff --git a/drivers/net/mscc_eswitch/serval_switch.c b/drivers/net/mscc_eswitch/serval_switch.c index 09ce33452d..c4b81f7529 100644 --- a/drivers/net/mscc_eswitch/serval_switch.c +++ b/drivers/net/mscc_eswitch/serval_switch.c @@ -482,7 +482,6 @@ static int serval_probe(struct udevice *dev) struct serval_private *priv = dev_get_priv(dev); int i, ret; struct resource res; - fdt32_t faddr; phys_addr_t addr_base; unsigned long addr_size; ofnode eth_node, node, mdio_node; @@ -533,9 +532,8 @@ static int serval_probe(struct udevice *dev) if (ofnode_read_resource(mdio_node, 0, &res)) return -ENOMEM; - faddr = cpu_to_fdt32(res.start); - addr_base = ofnode_translate_address(mdio_node, &faddr); + addr_base = res.start; addr_size = res.end - res.start; /* If the bus is new then create a new bus */ diff --git a/drivers/net/mscc_eswitch/servalt_switch.c b/drivers/net/mscc_eswitch/servalt_switch.c index 4a4e9e4054..f114086ece 100644 --- a/drivers/net/mscc_eswitch/servalt_switch.c +++ b/drivers/net/mscc_eswitch/servalt_switch.c @@ -412,7 +412,6 @@ static int servalt_probe(struct udevice *dev) struct servalt_private *priv = dev_get_priv(dev); int i; struct resource res; - fdt32_t faddr; phys_addr_t addr_base; unsigned long addr_size; ofnode eth_node, node, mdio_node; @@ -461,9 +460,8 @@ static int servalt_probe(struct udevice *dev) if (ofnode_read_resource(mdio_node, 0, &res)) return -ENOMEM; - faddr = cpu_to_fdt32(res.start); - addr_base = ofnode_translate_address(mdio_node, &faddr); + addr_base = res.start; addr_size = res.end - res.start; /* If the bus is new then create a new bus */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 864589193b..4b097fb588 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -942,7 +942,11 @@ int fdt_get_resource(const void *fdt, int node, const char *property, while (ptr + na + ns <= end) { if (i == index) { - res->start = fdtdec_get_number(ptr, na); + if (CONFIG_IS_ENABLED(OF_TRANSLATE)) + res->start = fdt_translate_address(fdt, node, ptr); + else + res->start = fdtdec_get_number(ptr, na); + res->end = res->start; res->end += fdtdec_get_number(&ptr[na], ns) - 1; return 0; diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 6552d09ba3..4d82e7c96d 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -20,6 +20,7 @@ #include <dm/util.h> #include <dm/lists.h> #include <dm/of_access.h> +#include <linux/ioport.h> #include <test/test.h> #include <test/ut.h> @@ -1233,3 +1234,35 @@ static int dm_test_decode_display_timing(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_decode_display_timing, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + +/* Test read_resourcee() */ +static int dm_test_read_resource(struct unit_test_state *uts) +{ + struct udevice *dev; + struct resource res; + + /* test resource without translation */ + ut_assertok(uclass_find_device_by_name(UCLASS_SIMPLE_BUS, "syscon@2", &dev)); + ut_assertok(dev_read_resource(dev, 0, &res)); + ut_asserteq(0x40, res.start); + ut_asserteq(0x44, res.end); + ut_assertok(dev_read_resource(dev, 1, &res)); + ut_asserteq(0x48, res.start); + ut_asserteq(0x4D, res.end); + + /* test resource with translation */ + ut_assertok(uclass_find_device_by_name(UCLASS_TEST_DUMMY, "dev@1,100", &dev)); + ut_assertok(dev_read_resource(dev, 0, &res)); + ut_asserteq(0x9000, res.start); + ut_asserteq(0x9FFF, res.end); + + /* test named resource */ + ut_assertok(uclass_find_device_by_name(UCLASS_TEST_DUMMY, "dev@0,0", &dev)); + ut_assertok(dev_read_resource_byname(dev, "sandbox-dummy-0", &res)); + ut_asserteq(0x8000, res.start); + ut_asserteq(0x8FFF, res.end); + + return 0; +} + +DM_TEST(dm_test_read_resource, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); -- 2.17.1

3 2

[PATCH] hash: Kconfig option for SHA512 hardware acceleration
by Heinrich Schuchardt 18 May '21

18 May '21

Commit a479f103dc1c ("hash: Allow for SHA512 hardware implementations") defined function definitions for hardware accelerated SHA384 and SHA512. If CONFIG_SHA_HW_ACCEL=y, these functions are used. We already have boards using CONFIG_SHA_HW_ACCEL=y but none implements the new functions hw_sha384() and hw_sha512(). For implementing the EFI TCG2 protocol we need SHA384 and SHA512. The missing hardware acceleration functions lead to build errors on boards like peach-pi_defconfig. Introduce a new Kconfig symbol CONFIG_SHA512_HW_ACCEL to control if the functions hw_sha384() and hw_sha512() shall be used to implement the SHA384 and SHA512 algorithms. Fixes: a479f103dc1c ("hash: Allow for SHA512 hardware implementations") Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- This patch replaces hash: revert Allow for SHA512 hardware implementations https://lists.denx.de/pipermail/u-boot/2021-May/449648.html https://patchwork.ozlabs.org/project/uboot/patch/20210512170040.137058-1-xy… --- common/hash.c | 8 ++++---- lib/Kconfig | 21 ++++++++++++++++----- 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/common/hash.c b/common/hash.c index 10dff7ddb0..90cf46bcba 100644 --- a/common/hash.c +++ b/common/hash.c @@ -260,12 +260,12 @@ static struct hash_algo hash_algo[] = { .name = "sha384", .digest_size = SHA384_SUM_LEN, .chunk_size = CHUNKSZ_SHA384, -#ifdef CONFIG_SHA_HW_ACCEL +#ifdef CONFIG_SHA512_HW_ACCEL .hash_func_ws = hw_sha384, #else .hash_func_ws = sha384_csum_wd, #endif -#ifdef CONFIG_SHA_PROG_HW_ACCEL +#if defined(CONFIG_SHA512_HW_ACCEL) && defined(CONFIG_SHA_PROG_HW_ACCEL) .hash_init = hw_sha_init, .hash_update = hw_sha_update, .hash_finish = hw_sha_finish, @@ -281,12 +281,12 @@ static struct hash_algo hash_algo[] = { .name = "sha512", .digest_size = SHA512_SUM_LEN, .chunk_size = CHUNKSZ_SHA512, -#ifdef CONFIG_SHA_HW_ACCEL +#ifdef CONFIG_SHA512_HW_ACCEL .hash_func_ws = hw_sha512, #else .hash_func_ws = sha512_csum_wd, #endif -#ifdef CONFIG_SHA_PROG_HW_ACCEL +#if defined(CONFIG_SHA512_HW_ACCEL) && defined(CONFIG_SHA_PROG_HW_ACCEL) .hash_init = hw_sha_init, .hash_update = hw_sha_update, .hash_finish = hw_sha_finish, diff --git a/lib/Kconfig b/lib/Kconfig index 6d2d41de30..e9b7b5dc49 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -389,21 +389,32 @@ config SHA384 (digest). config SHA_HW_ACCEL - bool "Enable hashing using hardware" + bool "Enable hardware acceleration for SHA hash functions" help - This option enables hardware acceleration for SHA hashing. - This affects the 'hash' command and also the hash_lookup_algo() - function. + This option enables hardware acceleration for the SHA1 and SHA256 + hashing algorithms. This affects the 'hash' command and also the + hash_lookup_algo() function. + +if SHA_HW_ACCEL + +config SHA512_HW_ACCEL + bool "Enable hardware acceleration for SHA512" + depends on SHA512_ALGO + help + This option enables hardware acceleration for the SHA384 andSHA512 + hashing algorithms. This affects the 'hash' command and also the + hash_lookup_algo() function. config SHA_PROG_HW_ACCEL bool "Enable Progressive hashing support using hardware" - depends on SHA_HW_ACCEL help This option enables hardware-acceleration for SHA progressive hashing. Data can be streamed in a block at a time and the hashing is performed in hardware. +endif + config MD5 bool "Support MD5 algorithm" help -- 2.30.2

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[PATCH v9 0/8] Add FU740 chip and HiFive Unmatched board support
by Green Wan 18 May '21

18 May '21

This patch set is to add SiFive fu740 chip and HiFive Unmatched board support. Patches are split into several parts: - [PATCH v9 1/8] support for fu740 cpu - [PATCH v9 2/8] support for fu740 clk driver - [PATCH v9 3/8] rename and support for fu740 ram driver - [PATCH v9 4/8] add pcie driver - [PATCH v9 5/8] dts for SiFive fu740 - [PATCH v9 6/8] dts for SiFive Unmatched board - [PATCH v9 7/8] add Unmatched board support - [PATCH v9 8/8] clear feature disable CSR Description - For fu740 cpu support, reuse most of fu540 cpu. - For prci driver, add one abstract layer to separate fu540 and fu740. Move orignal fu540 code to separate files. - For pcie driver, it depends on gpio, prci, clk and reset drivers to do init&reset works. Also based on pcie_dw_common.c - Align with Linux DT file. Tests and patch checks - Able to boot both unmatched and unleashed boards. - PCIe tests . M.2 NVMe SSD . e1000 compatibale ethernet adapter (ping&tftpboot) . pci-to-usb adapter(usb mass storage) - checkpatch is performed. To keep code derived from other boards the same, ignore some warnings/errors in [PATCH 7/8]. Changlogs - V9 . applied http://patchwork.ozlabs.org/project/uboot/patch/20210511120412.25065-1-bmen… . append clear feature disable CSR patch to the last - V8 . Add #include <asm/global_data.h> back to sifive_clint.c in [PATCH v8 1/7] . Remove unused CLK_SIFIVE_FU540_PRCI from Kconfig [PATCH v8 2/8] and remove CONFIG_CLK_SIFIVE_PRCI=y from unleashed config in [PATCH v8 7/7] . Remove ECAM compatible string to align with Linux pcie driver and add Reviewed-by to [PATCH v8 4/7] . Drop last patch [PATCH v7 8/8] for drivers/net/macb.c and use the same compatible string, 'sifive,fu540-c000-gem', to align with Linux driver. - V7 . Rebase to latest master branch . Moved dts for fu740 patch [v6 1/7] to [v7 5/8] and seperate dts of Unmatched board from [v6 6/7] into [v7 6/8] . Applied PCIe refactoring patch to base on the common code in pcie_dw_common.c - V6 . Remove redundant DT string for 1.2GHz CPU clock and squash to [1/7] - V5 . Fix unleashed build error in patch [6/8] . Append one more set for 1.2GHz CPU speed . Add "#include <asm/global_data.h>" back to sifive_ddr.c . Add Reviewed-by to [4/8] and [7/8] - V4 . fixed incorrect file name in ./board/sifive/unmatched/Makefile . fixed link in doc/board/sifive/index.rst, passed 'make htmldocs' - V3 . Rebase to unleashed rename v2 patch . Rename doc/board/sifive/unmatched.rst board/sifive/unmatched/unmatched.c . Fix tail whitespace . Add 'git mv' info to ram driver and merge patch back to one . Add comment to macb driver for PLL hardware quirk . Add reviewed-by to patch [6/7] . Add 'gpio-poweroff' node for upcoming opensbi integration - V2 . Rebase to unleashed rename patch . remove unnessaary fu540 changes . split ram driver patch into 2 to keep 'git mv' info . use a shorter name for unmatched support . Remove redundant&incorrect temperature-sensor in DT . Remove unnecessary USB EHCI & OHCI from defconfig . Revised fu740 doc . Fixed year of copyright . Add reviewed-by received in v1 patch Green Wan (8): riscv: cpu: fu740: Add support for cpu fu740 drivers: clk: add fu740 support drivers: ram: sifive: rename fu540_ddr and add fu740 support drivers: pci: add pcie support for fu740 riscv: dts: add fu740 support riscv: dts: add SiFive Unmatched board support board: sifive: add HiFive Unmatched board support riscv: cpu: fu740: clear feature disable CSR arch/riscv/Kconfig | 5 + arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/fu740/Kconfig | 37 + arch/riscv/cpu/fu740/Makefile | 12 + arch/riscv/cpu/fu740/cache.c | 55 + arch/riscv/cpu/fu740/cpu.c | 22 + arch/riscv/cpu/fu740/dram.c | 38 + arch/riscv/cpu/fu740/spl.c | 38 + arch/riscv/dts/Makefile | 1 + arch/riscv/dts/fu740-c000-u-boot.dtsi | 105 ++ arch/riscv/dts/fu740-c000.dtsi | 329 ++++ .../dts/fu740-hifive-unmatched-a00-ddr.dtsi | 1489 +++++++++++++++++ .../dts/hifive-unmatched-a00-u-boot.dtsi | 40 + arch/riscv/dts/hifive-unmatched-a00.dts | 259 +++ arch/riscv/include/asm/arch-fu740/cache.h | 14 + arch/riscv/include/asm/arch-fu740/clk.h | 14 + arch/riscv/include/asm/arch-fu740/gpio.h | 38 + arch/riscv/include/asm/arch-fu740/reset.h | 13 + arch/riscv/include/asm/arch-fu740/spl.h | 14 + board/sifive/unleashed/Kconfig | 1 + board/sifive/unmatched/Kconfig | 50 + board/sifive/unmatched/MAINTAINERS | 9 + board/sifive/unmatched/Makefile | 9 + board/sifive/unmatched/spl.c | 85 + board/sifive/unmatched/unmatched.c | 24 + common/spl/Kconfig | 4 +- configs/sifive_unmatched_defconfig | 54 + doc/board/sifive/index.rst | 1 + doc/board/sifive/unmatched.rst | 536 ++++++ drivers/clk/sifive/Kconfig | 8 +- drivers/clk/sifive/Makefile | 4 +- drivers/clk/sifive/fu540-prci.c | 769 +-------- drivers/clk/sifive/fu540-prci.h | 22 + drivers/clk/sifive/fu740-prci.c | 158 ++ drivers/clk/sifive/fu740-prci.h | 22 + drivers/clk/sifive/sifive-prci.c | 733 ++++++++ drivers/clk/sifive/sifive-prci.h | 323 ++++ drivers/pci/Kconfig | 10 + drivers/pci/Makefile | 1 + drivers/pci/pcie_dw_sifive.c | 507 ++++++ drivers/ram/sifive/Kconfig | 8 +- drivers/ram/sifive/Makefile | 2 +- .../ram/sifive/{fu540_ddr.c => sifive_ddr.c} | 89 +- drivers/reset/Kconfig | 2 +- include/configs/sifive-unmatched.h | 85 + include/dt-bindings/clock/sifive-fu740-prci.h | 25 + include/dt-bindings/reset/sifive-fu740-prci.h | 19 + 47 files changed, 5279 insertions(+), 806 deletions(-) create mode 100644 arch/riscv/cpu/fu740/Kconfig create mode 100644 arch/riscv/cpu/fu740/Makefile create mode 100644 arch/riscv/cpu/fu740/cache.c create mode 100644 arch/riscv/cpu/fu740/cpu.c create mode 100644 arch/riscv/cpu/fu740/dram.c create mode 100644 arch/riscv/cpu/fu740/spl.c create mode 100644 arch/riscv/dts/fu740-c000-u-boot.dtsi create mode 100644 arch/riscv/dts/fu740-c000.dtsi create mode 100644 arch/riscv/dts/fu740-hifive-unmatched-a00-ddr.dtsi create mode 100644 arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi create mode 100644 arch/riscv/dts/hifive-unmatched-a00.dts create mode 100644 arch/riscv/include/asm/arch-fu740/cache.h create mode 100644 arch/riscv/include/asm/arch-fu740/clk.h create mode 100644 arch/riscv/include/asm/arch-fu740/gpio.h create mode 100644 arch/riscv/include/asm/arch-fu740/reset.h create mode 100644 arch/riscv/include/asm/arch-fu740/spl.h create mode 100644 board/sifive/unmatched/Kconfig create mode 100644 board/sifive/unmatched/MAINTAINERS create mode 100644 board/sifive/unmatched/Makefile create mode 100644 board/sifive/unmatched/spl.c create mode 100644 board/sifive/unmatched/unmatched.c create mode 100644 configs/sifive_unmatched_defconfig create mode 100644 doc/board/sifive/unmatched.rst create mode 100644 drivers/clk/sifive/fu540-prci.h create mode 100644 drivers/clk/sifive/fu740-prci.c create mode 100644 drivers/clk/sifive/fu740-prci.h create mode 100644 drivers/clk/sifive/sifive-prci.c create mode 100644 drivers/clk/sifive/sifive-prci.h create mode 100644 drivers/pci/pcie_dw_sifive.c rename drivers/ram/sifive/{fu540_ddr.c => sifive_ddr.c} (81%) create mode 100644 include/configs/sifive-unmatched.h create mode 100644 include/dt-bindings/clock/sifive-fu740-prci.h create mode 100644 include/dt-bindings/reset/sifive-fu740-prci.h -- 2.31.0

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[PATCH 1/1] xilinx: disable Unicode capitalization
by Heinrich Schuchardt 18 May '21

18 May '21

Save some KiB when building xilinx_versal_virt_defconfig by disabling Unicode capitalization support. This avoids build failures when adding new features for the UEFI sub-system. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- It would be preferable to have a size check for the u-boot binary. This would avoid seeing problems only during execution. --- configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 707693713a..8bc2ff4a4c 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -111,3 +111,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_UNICODE_CAPITALIZATION is not set -- 2.30.2

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[PATCH] riscv: ae350: Increase malloc size for binman spl flow
by Andes 18 May '21

18 May '21

From: Rick Chen <rick(a)andestech.com> It will need larger heap size for u-boot-spl to load u-boot.itb which be generated from binman than USE_SPL_FIT_GENERATOR. Signed-off-by: Rick Chen <rick(a)andestech.com> --- configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + 4 files changed, 4 insertions(+) diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 25b4ada..e8dc816 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_TARGET_AX25_AE350=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index c5d7ac3..418170c 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ae350_32" diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 61637a9..d23b56c 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_TARGET_AX25_AE350=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 6c63382..7826ae4 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -2,6 +2,7 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ae350_64" -- 2.7.4

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