April 2021 - U-Boot

[PATCH 01/16] ls1012aqds_tfa_SECURE_BOOT: Remove unused CONFIG_SCSI_AHCI
by Tom Rini 12 Apr '21

12 Apr '21

Signed-off-by: Tom Rini <trini(a)konsulko.com> --- configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 8f6ca820a24b..214a2bb9e735 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y -CONFIG_SCSI_AHCI=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y -- 2.17.1

5 37

[patch v4 0/9] rk3399 (Pinebook pro) EDP support
by Arnaud Patard 11 Apr '21

11 Apr '21

This patchset add support for the rk3399 eDP. It has been tested on the pinebook pro and Google Kevin chromeos devices. The changes have been written by studying the linux code, since I didn't find any manual for theses part of the RK3399 SoC. On the linux kernel side, on recent kernels, it needs commit "pwm: rockchip: Keep enabled PWMs running while probing" otherwise the pinebook pro will freeze when probing the display. Changes since v3: - Fix typos - Remove plat->base change. The plat->base modification was more to get a predictible framebuffer address. - Fix debug format patch to use 0x%ld Changes since v2: - Respect alphabetical order in uboot.dtsi in patch "rk3399-pinebook-pro-u-boot.dtsi: Enable edp" - drop "configs/pinebook-pro-rk3399_defconfig: enable SYS_USB_EVENT_POLL_VIA_INT_QUEUE" (pbp_defconfig_usb_poll.patch) patch, since the same change has been merged with change https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip/-/commit/b197c934b… - change patch subjects. Changes since v1: - Add reset support for the VOP and eDP. This was needed and it appears to also solve the issue with warm reset. - Fix a debug string in the vop driver - Drop the patch "drivers/video/rockchip/rk_edp.c: Change clock rate". - Address various comments

2 10

[PATCH v3 1/2] video: backlight: Support PWMs without a known period_ns
by Alper Nebi Yasak 11 Apr '21

11 Apr '21

The PWM device provided by Chrome OS EC doesn't really support anything other than setting a relative duty cycle. To support it as a backlight, this patch makes the PWM period optional in the device tree and pretends the valid brightness range is its period_ns. Also adds a sandbox test for a PWM channel that has a fixed period, checking that the resulting duty_cycle matches on a set_config() even if the requested period_ns can't be set. Signed-off-by: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- Changes in v3: - Add tag: "Reviewed-by: Simon Glass <sjg(a)chromium.org>" - Adjust to match recently merged duty cycle calculation fix. v2: https://patchwork.ozlabs.org/project/uboot/patch/20200926200851.4388-1-alpe… Changes in v2: - Add sandbox test to pwm.c (using sandbox_pwm's channel 2) - Add comments to pwm_set_config() and pwm_ops->set_config() v1: https://patchwork.ozlabs.org/project/uboot/patch/20200923165231.18188-1-alp… drivers/pwm/sandbox_pwm.c | 11 +++++++++-- drivers/video/pwm_backlight.c | 20 ++++++++++++++------ include/pwm.h | 8 ++++++++ test/dm/pwm.c | 11 +++++++++++ 4 files changed, 42 insertions(+), 8 deletions(-) diff --git a/drivers/pwm/sandbox_pwm.c b/drivers/pwm/sandbox_pwm.c index 28988187e039..3fd2e78c909d 100644 --- a/drivers/pwm/sandbox_pwm.c +++ b/drivers/pwm/sandbox_pwm.c @@ -59,8 +59,15 @@ static int sandbox_pwm_set_config(struct udevice *dev, uint channel, if (channel >= NUM_CHANNELS) return -ENOSPC; chan = &priv->chan[channel]; - chan->period_ns = period_ns; - chan->duty_ns = duty_ns; + + if (channel == 2) { + /* Pretend to have some fixed period */ + chan->period_ns = 4096; + chan->duty_ns = duty_ns * 4096 / period_ns; + } else { + chan->period_ns = period_ns; + chan->duty_ns = duty_ns; + } return 0; } diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c index 9519180ceb39..18b7a00b033c 100644 --- a/drivers/video/pwm_backlight.c +++ b/drivers/video/pwm_backlight.c @@ -62,10 +62,17 @@ static int set_pwm(struct pwm_backlight_priv *priv) uint duty_cycle; int ret; - duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / - (priv->max_level - priv->min_level); - ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, - duty_cycle); + if (priv->period_ns) { + duty_cycle = priv->period_ns * (priv->cur_level - priv->min_level) / + (priv->max_level - priv->min_level); + ret = pwm_set_config(priv->pwm, priv->channel, priv->period_ns, + duty_cycle); + } else { + /* PWM driver will internally scale these like the above. */ + ret = pwm_set_config(priv->pwm, priv->channel, + priv->max_level - priv->min_level, + priv->cur_level - priv->min_level); + } if (ret) return log_ret(ret); @@ -213,10 +220,11 @@ static int pwm_backlight_ofdata_to_platdata(struct udevice *dev) log_debug("Cannot get PWM: ret=%d\n", ret); return log_ret(ret); } - if (args.args_count < 2) + if (args.args_count < 1) return log_msg_ret("Not enough arguments to pwm\n", -EINVAL); priv->channel = args.args[0]; - priv->period_ns = args.args[1]; + if (args.args_count > 1) + priv->period_ns = args.args[1]; if (args.args_count > 2) priv->polarity = args.args[2]; diff --git a/include/pwm.h b/include/pwm.h index 54ae3e64c310..97bda0856e6c 100644 --- a/include/pwm.h +++ b/include/pwm.h @@ -15,6 +15,10 @@ struct pwm_ops { /** * set_config() - Set the PWM configuration * + * Change both the PWM device's period and it's duty period if + * possible. Otherwise, set an appropriate duty period that best + * matches the given period_ns / duty_ns ratio for the device. + * * @dev: PWM device to update * @channel: PWM channel to update * @period_ns: PWM period in nanoseconds @@ -49,6 +53,10 @@ struct pwm_ops { /** * pwm_set_config() - Set the PWM configuration * + * Change both the PWM device's period and it's duty period if + * possible. Otherwise, set an appropriate duty period that best + * matches the given period_ns / duty_ns ratio for the device. + * * @dev: PWM device to update * @channel: PWM channel to update * @period_ns: PWM period in nanoseconds diff --git a/test/dm/pwm.c b/test/dm/pwm.c index 0de6dba1ba64..b624cf3d6558 100644 --- a/test/dm/pwm.c +++ b/test/dm/pwm.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <pwm.h> +#include <asm/test.h> #include <dm/test.h> #include <test/test.h> #include <test/ut.h> @@ -14,6 +15,10 @@ static int dm_test_pwm_base(struct unit_test_state *uts) { struct udevice *dev; + uint period_ns; + uint duty_ns; + bool enable; + bool polarity; ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev)); ut_assertnonnull(dev); @@ -24,6 +29,12 @@ static int dm_test_pwm_base(struct unit_test_state *uts) ut_asserteq(-ENOSPC, pwm_set_enable(dev, 3, true)); ut_assertok(pwm_set_invert(dev, 0, true)); + ut_assertok(pwm_set_config(dev, 2, 100, 50)); + ut_assertok(sandbox_pwm_get_config(dev, 2, &period_ns, &duty_ns, + &enable, &polarity)); + ut_asserteq(period_ns, 4096); + ut_asserteq(duty_ns, 50 * 4096 / 100); + ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev)); ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PWM, 2, &dev)); -- 2.28.0

2 3

[PATCH] video: SIMPLE_PANEL depends on DM_GPIO
by Asherah Connor 11 Apr '21

11 Apr '21

SIMPLE_PANEL currently only depends on PANEL && BACKLIGHT, but the code makes references to dm_gpio_set_value and gpio_request_by_name. These are defined in drivers/gpio/gpio-uclass.c, so a dependency on DM_GPIO corrects these link errors: aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight': /home/kameliya/u-boot/drivers/video/simple_panel.c:42: undefined reference to `dm_gpio_set_value' aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight': /home/kameliya/u-boot/drivers/video/simple_panel.c:27: undefined reference to `dm_gpio_set_value' aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_of_to_plat': /home/kameliya/u-boot/drivers/video/simple_panel.c:72: undefined reference to `gpio_request_by_name' This issue is only exposed if you have a board which enables CONFIG_DM_VIDEO without CONFIG_DM_GPIO; so far, none do, but soon a QEMU board may. Signed-off-by: Asherah Connor <ashe(a)kivikakk.ee> --- drivers/video/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 667157c2e9..220c008f8a 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -209,7 +209,7 @@ config PANEL config SIMPLE_PANEL bool "Enable simple panel support" - depends on PANEL && BACKLIGHT + depends on PANEL && BACKLIGHT && DM_GPIO default y help This turns on a simple panel driver that enables a compatible -- 2.20.1

2 1

[PATCH] finish removing mb862xx video driver
by Trevor Woerner 11 Apr '21

11 Apr '21

drivers/video/mb862xx.c was removed in commit 9c1e098fb92de38f0017585658dd50c3009c84ab from December 2020, however, this last little remnant in drivers/video/cfb_console.c remained. Signed-off-by: Trevor Woerner <twoerner(a)gmail.com> --- drivers/video/cfb_console.c | 14 -------------- scripts/config_whitelist.txt | 1 - 2 files changed, 15 deletions(-) diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 27ff7163f3..1f491a48d6 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -81,20 +81,6 @@ #define VIDEO_FB_16BPP_WORD_SWAP #endif -/* - * Defines for the MB862xx driver - */ -#ifdef CONFIG_VIDEO_MB862xx - -#ifdef CONFIG_VIDEO_CORALP -#define VIDEO_FB_LITTLE_ENDIAN -#endif -#ifdef CONFIG_VIDEO_MB862xx_ACCEL -#define VIDEO_HW_RECTFILL -#define VIDEO_HW_BITBLT -#endif -#endif - /* * Defines for the i.MX31 driver (mx3fb.c) */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 43295eec7d..be47961c31 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3943,7 +3943,6 @@ CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP CONFIG_VIDEO_BCM2835 CONFIG_VIDEO_BMP_LOGO -CONFIG_VIDEO_CORALP CONFIG_VIDEO_DA8XX CONFIG_VIDEO_FONT_4X6 CONFIG_VIDEO_LCD_I2C_BUS -- 2.30.0.rc0

2 1

[PATCH] board_f: cosmetic: change the debug trace to KB in reserve_video
by Patrick Delaunay 11 Apr '21

11 Apr '21

Update the debug trace for the reserved video memory to KB as indicated in the message with "%luk"; before the patch the computed size gd->relocaddr - addr is in bytes. This patch aligns the debug trace in reserve_video() with others functions, for example on stm32mp157c-dk2: - Reserving 3080192k for video at: dfd00000 + Reserving 3008k for video at: dfd00000 Reserving 873k for U-Boot at: dfc25000 Reserving 32776k for malloc() at: ddc23000 Reserving 72 Bytes for Board Info at: ddc22fb0 Reserving 280 Bytes for Global Data at: ddc22e90 Reserving 119072 Bytes for FDT at: ddc05d70 Reserving 0x278 Bytes for bootstage at: ddc05af0 Fixes: 5630d2fbc50f3035 ("board: Show memory for frame buffers") Signed-off-by: Patrick Delaunay <patrick.delaunay(a)foss.st.com> --- common/board_f.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/board_f.c b/common/board_f.c index 0cddf0359d..203e965799 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -394,7 +394,7 @@ static int reserve_video(void) if (ret) return ret; debug("Reserving %luk for video at: %08lx\n", - (unsigned long)gd->relocaddr - addr, addr); + ((unsigned long)gd->relocaddr - addr) >> 10, addr); gd->relocaddr = addr; #elif defined(CONFIG_LCD) # ifdef CONFIG_FB_ADDR -- 2.17.1

3 2

[RFC 1/1] tegra: video: fix tegra_dc_sor_config_panel()
by Heinrich Schuchardt 11 Apr '21

11 Apr '21

Bitwise OR has a higher operator precedence than the ternary conditional. Add the missing parentheses. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- I don't have a Tegra system. But the current U-Boot code seems to be incorrect. 2 << CSTM_ROTCLK_SHIFT | is_lvds is always true with and without the shift. Best regards Heinrich --- drivers/video/tegra124/sor.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c index 95976ee573..ef1a2e6dc0 100644 --- a/drivers/video/tegra124/sor.c +++ b/drivers/video/tegra124/sor.c @@ -671,8 +671,8 @@ static void tegra_dc_sor_config_panel(struct tegra_dc_sor_data *sor, CSTM_ROTCLK_DEFAULT_MASK | CSTM_LVDS_EN_ENABLE, 2 << CSTM_ROTCLK_SHIFT | - is_lvds ? CSTM_LVDS_EN_ENABLE : - CSTM_LVDS_EN_DISABLE); + (is_lvds ? CSTM_LVDS_EN_ENABLE : + CSTM_LVDS_EN_DISABLE)); tegra_dc_sor_config_pwm(sor, 1024, 1024); } -- 2.30.2

2 1

[PATCH] video: Fix line padding calculation for 16 and 24 BPP bitmaps
by Sylwester Nawrocki 11 Apr '21

11 Apr '21

Each row in the pixel array in the bitmap file is padded if necessary so the row size is always a multiple of 4 bytes. In current code the complement of row size to a multiple of 4 bytes is further unnecessarily multiplied by the pixel size. This results in incorrect displaying of bitmaps having row size that is not a multiple of 4 bytes. Fix this by removing the unnecessary multiplication. Tested with 24BPP bitmap and XRGB32 display. Signed-off-by: Sylwester Nawrocki <s.nawrocki(a)samsung.com> --- drivers/video/video_bmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c index 5a4d12c68d..5537378781 100644 --- a/drivers/video/video_bmp.c +++ b/drivers/video/video_bmp.c @@ -328,7 +328,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, for (j = 0; j < width; j++) fb_put_word(&fb, &bmap); - bmap += (padded_width - width) * 2; + bmap += (padded_width - width); fb -= width * 2 + priv->line_length; } break; @@ -352,7 +352,7 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y, } } fb -= priv->line_length + width * (bpix / 8); - bmap += (padded_width - width) * 3; + bmap += (padded_width - width); } break; #endif /* CONFIG_BMP_24BPP */ -- 2.17.1

3 2

[PATCH 1/2] clk: renesas: Only ever access documented bits in clock driver teardown
by Marek Vasut 11 Apr '21

11 Apr '21

The clock driver used a heavy-handed approach where it turned off all available clocks, while also possibly setting bits which are not documented in the R-Car datasheet. Update the tables so that only the bits which are documented are set or cleared when tearing down the clock driver. Note that the only clock left running before booting Linux are now MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> Cc: Simon Glass <sjg(a)chromium.org> Cc: Tom Rini <trini(a)konsulko.com> --- drivers/clk/renesas/r8a7795-cpg-mssr.c | 22 +++++++++++----------- drivers/clk/renesas/r8a7796-cpg-mssr.c | 22 +++++++++++----------- drivers/clk/renesas/r8a77965-cpg-mssr.c | 24 ++++++++++++------------ drivers/clk/renesas/r8a77970-cpg-mssr.c | 22 +++++++++++----------- drivers/clk/renesas/r8a77980-cpg-mssr.c | 24 ++++++++++++------------ drivers/clk/renesas/r8a77990-cpg-mssr.c | 24 ++++++++++++------------ drivers/clk/renesas/r8a77995-cpg-mssr.c | 24 ++++++++++++------------ 7 files changed, 81 insertions(+), 81 deletions(-) diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c index 101f6583fa..b137564962 100644 --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c @@ -327,17 +327,17 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { }; static const struct mstp_stop_table r8a7795_mstp_table[] = { - { 0x00640800, 0x0, 0x00640800, 0 }, - { 0xF3EE9390, 0x0, 0xF3EE9390, 0 }, - { 0x340FAFDC, 0x2040, 0x340FAFDC, 0 }, - { 0xD80C7CDF, 0x400, 0xD80C7CDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0x40BFFF46, 0x0, 0x40BFFF46, 0 }, - { 0xE5FBEECF, 0x0, 0xE5FBEECF, 0 }, - { 0x39FFFF0E, 0x0, 0x39FFFF0E, 0 }, - { 0x01F19FF4, 0x0, 0x01F19FF4, 0 }, - { 0xFFDFFFFF, 0x0, 0xFFDFFFFF, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0xc3ec13a0, 0x0, 0xc3ec13a0, 0 }, + { 0x040e2fdc, 0x2000, 0x040e2fdc, 0 }, + { 0xf4cc7cdf, 0x400, 0xf4cc7cdf, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff46, 0x0, 0x40dfff46, 0 }, + { 0xc5e8ccce, 0x0, 0xc5e8ccce, 0 }, + { 0x39ffdf3f, 0x0, 0x39ffdf3f, 0 }, + { 0x01f09ff6, 0x0, 0x01f09ff6, 0 }, + { 0xfddfdffe, 0x0, 0xfddfdffe, 0 }, + { 0xfffeffe0, 0x0, 0xfffeffe0, 0 }, { 0x00000000, 0x0, 0x00000000, 0 }, }; diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 3c17bcbb18..6745305a59 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -306,17 +306,17 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { static const struct mstp_stop_table r8a7796_mstp_table[] = { { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0xd3e813a0, 0x0, 0xd3e813a0, 0 }, + { 0x040e2fdc, 0x2000, 0x040e2fdc, 0 }, + { 0xd00c7cdf, 0x400, 0xd00c7cdf, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff46, 0x0, 0x40dfff46, 0 }, + { 0x84ea888e, 0x0, 0x84ea888e, 0 }, + { 0x29df5e1c, 0x0, 0x29df5e1c, 0 }, + { 0x01c01ff7, 0x0, 0x01f01ff7, 0 }, + { 0xfddfdffe, 0x0, 0xfddfdffe, 0 }, + { 0xfffeffe0, 0x0, 0xfffeffe0, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a7796_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index 5f37f6285f..8d792bceee 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -303,18 +303,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { }; static const struct mstp_stop_table r8a77965_mstp_table[] = { - { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0xc3e813a0, 0x0, 0xc3e813a0, 0 }, + { 0x040e2fdc, 0x2000, 0x040e2fdc, 0 }, + { 0xd0cc7cdf, 0x400, 0xd0cc7cdf, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff46, 0x0, 0x40dfff46, 0 }, + { 0x84c8888c, 0x0, 0x84c8888c, 0 }, + { 0x29bf5d1c, 0x0, 0x29bf5d1c, 0 }, + { 0x00c09ff7, 0x0, 0x01c09ff7, 0 }, + { 0xfddfdffe, 0x0, 0xfddfdffe, 0 }, + { 0xfffeffe0, 0x0, 0xfffeffe0, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77965_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c index bafe4bbb09..b2b32be946 100644 --- a/drivers/clk/renesas/r8a77970-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c @@ -181,17 +181,17 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[8] = { static const struct mstp_stop_table r8a77970_mstp_table[] = { { 0x00230000, 0x0, 0x00230000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x14062FD8, 0x2040, 0x14062FD8, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0x83FFFFFF, 0x0, 0x83FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x7FF3FFF4, 0x0, 0x7FF3FFF4, 0 }, - { 0xFBF7FF97, 0x0, 0xFBF7FF97, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x0be00000, 0x0, 0x0be00000, 0 }, + { 0x04062fd8, 0x2080, 0x04062fd8, 0 }, + { 0x00c0c0df, 0x0, 0x00c0c0df, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x00de0028, 0x0, 0x00de0028, 0 }, + { 0x00800008, 0x0, 0x00800008, 0 }, + { 0x09010000, 0x0, 0x09010000, 0 }, + { 0x7ff21f00, 0x0, 0x7ff21f00, 0 }, + { 0xf8025f84, 0x0, 0xf8025f84, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77970_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c index a202005121..cf96309d12 100644 --- a/drivers/clk/renesas/r8a77980-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c @@ -203,18 +203,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[4] = { }; static const struct mstp_stop_table r8a77980_mstp_table[] = { - { 0x00230000, 0x0, 0x00230000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x14062FD8, 0x2040, 0x14062FD8, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0x83FFFFFF, 0x0, 0x83FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x7FF3FFF4, 0x0, 0x7FF3FFF4, 0 }, - { 0xFBF7FF97, 0x0, 0xFBF7FF97, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00230010, 0x0, 0x00230010, 0 }, + { 0x0be06c06, 0x0, 0x0be06c06, 0 }, + { 0x0006afd8, 0x2080, 0x0006afd8, 0 }, + { 0x00c8c0df, 0x0, 0x00c8c0df, 0 }, + { 0x80008004, 0x180, 0x80008004, 0 }, + { 0xbffe0021, 0x0, 0xbffe0021, 0 }, + { 0x1a841138, 0x0, 0x1a841138, 0 }, + { 0x090180c0, 0x0, 0x090180c0, 0 }, + { 0xfff27ff0, 0x0, 0xfff27ff0, 0 }, + { 0xf80a5f84, 0x0, 0xf80a5f84, 0 }, + { 0x0000001f, 0x0, 0x0000001f, 0 }, + { 0x00030000, 0x0, 0x00030000, 0 }, }; static const void *r8a77980_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c index 5cc9270869..e983296b3a 100644 --- a/drivers/clk/renesas/r8a77990-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c @@ -263,18 +263,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] = { }; static const struct mstp_stop_table r8a77990_mstp_table[] = { - { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0xc3e81000, 0x0, 0xc3e81000, 0 }, + { 0x000e2fdc, 0x2000, 0x000e2fd8, 0 }, + { 0xd0c86cd7, 0x400, 0xd0c86cd7, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40dfff44, 0x0, 0x40dfff44, 0 }, + { 0x84c8888c, 0x0, 0x84c8888c, 0 }, + { 0x09951c18, 0x0, 0x09951c18, 0 }, + { 0x008010c7, 0x0, 0x008010c7, 0 }, + { 0xfddfdfdc, 0x0, 0xfddfdfdc, 0 }, + { 0xfffeffe8, 0x0, 0xfffeffe8, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77990_get_pll_config(const u32 cpg_mode) diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index eef154bc82..fb1df6d10e 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -202,18 +202,18 @@ static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] = { }; static const struct mstp_stop_table r8a77995_mstp_table[] = { - { 0x00200000, 0x0, 0x00200000, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, - { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, - { 0x80000184, 0x180, 0x80000184, 0 }, - { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, - { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, - { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, - { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, - { 0x000000B7, 0x0, 0x000000B7, 0 }, + { 0x00210000, 0x0, 0x00210000, 0 }, + { 0x03e01000, 0x0, 0x03e01000, 0 }, + { 0x000e2fdc, 0x2000, 0x000e2fd8, 0 }, + { 0xc00014df, 0x400, 0xc00014df, 0 }, + { 0x80000004, 0x180, 0x80000004, 0 }, + { 0x40d20004, 0x0, 0x40d20004, 0 }, + { 0x08c0008c, 0x0, 0x08c0008c, 0 }, + { 0x09941c18, 0x0, 0x09941c18, 0 }, + { 0x00801087, 0x0, 0x00801087, 0 }, + { 0xf143dfc0, 0x0, 0xf143dfc0, 0 }, + { 0x063e1820, 0x0, 0x063e1820, 0 }, + { 0x00000000, 0x0, 0x00000000, 0 }, }; static const void *r8a77995_get_pll_config(const u32 cpg_mode) -- 2.30.2

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[PATCH] ARM: renesas: Scrub duplicate memory nodes from DT on Gen3
by Marek Vasut 11 Apr '21

11 Apr '21

Scrub duplicate /memory@* node entries here. Some R-Car DTs might contain multiple /memory@* nodes, however fdt_fixup_memory_banks() either generates single /memory node or updates the first /memory node. Any remaining memory nodes are thus potential duplicates. However, it is not possible to delete all the memory nodes right away, since some of those might not be DRAM memory nodes, but some sort of other memory. Thus, delete only the memory nodes which are in the R-Car3 DBSC ranges. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> --- arch/arm/mach-rmobile/Kconfig | 1 + board/renesas/rcar-common/common.c | 80 ++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index 8cef3f5675..41322b2c4c 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -13,6 +13,7 @@ config RCAR_GEN3 select ARM64 select PHY select CMD_CACHE + select OF_BOARD_SETUP select PINCTRL select PINCONF select PINCTRL_PFC diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c index e77357968a..c53a74ae74 100644 --- a/board/renesas/rcar-common/common.c +++ b/board/renesas/rcar-common/common.c @@ -43,4 +43,84 @@ int dram_init_banksize(void) return 0; } + +#if defined(CONFIG_OF_BOARD_SETUP) +static int is_mem_overlap(void *blob, int first_mem_node, int curr_mem_node) +{ + struct fdt_resource first_mem_res, curr_mem_res; + int curr_mem_reg, first_mem_reg = 0; + int ret; + + for (;;) { + ret = fdt_get_resource(blob, first_mem_node, "reg", + first_mem_reg++, &first_mem_res); + if (ret) /* No more entries, no overlap found */ + return 0; + + curr_mem_reg = 0; + for (;;) { + ret = fdt_get_resource(blob, curr_mem_node, "reg", + curr_mem_reg++, &curr_mem_res); + if (ret) /* No more entries, check next tuple */ + break; + + if (curr_mem_res.end < first_mem_res.start) + continue; + + if (curr_mem_res.start >= first_mem_res.end) + continue; + + debug("Overlap found: 0x%llx..0x%llx / 0x%llx..0x%llx\n", + first_mem_res.start, first_mem_res.end, + curr_mem_res.start, curr_mem_res.end); + + return 1; + } + } + + return 0; +} + +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* + * Scrub duplicate /memory@* node entries here. Some R-Car DTs might + * contain multiple /memory@* nodes, however fdt_fixup_memory_banks() + * either generates single /memory node or updates the first /memory + * node. Any remaining memory nodes are thus potential duplicates. + * + * However, it is not possible to delete all the memory nodes right + * away, since some of those might not be DRAM memory nodes, but some + * sort of other memory. Thus, delete only the memory nodes which are + * in the R-Car3 DBSC ranges. + */ + int mem = 0, first_mem_node = 0; + + for (;;) { + mem = fdt_node_offset_by_prop_value(blob, mem, + "device_type", "memory", 7); + if (mem < 0) + break; + if (!fdtdec_get_is_enabled(blob, mem)) + continue; + + /* First memory node, patched by U-Boot */ + if (!first_mem_node) { + first_mem_node = mem; + continue; + } + + /* Check the remaining nodes and delete duplicates */ + if (!is_mem_overlap(blob, first_mem_node, mem)) + continue; + + /* Delete duplicate node, start again */ + fdt_del_node(blob, mem); + first_mem_node = 0; + mem = 0; + } + + return 0; +} +#endif #endif -- 2.30.2

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