February 2021 - U-Boot

[RFC PATCH 1/3] net: phy: Add a generic phy file for TI generic PHYs
by Dan Murphy 27 Apr '21

27 Apr '21

Add a TI Generic init file that will initialize TI PHYs that follow that not require special handling. These PHYs can connect with the standard MII register set. This generice file will register the PHY IDs and names of the PHYs so when the command 'mdio list' is executed the PHY name will display as opposed to 'Generic PHY'. The DP8382X PHY series is a generic PHY that requires the generic registration. The DP83867 driver was updated to rename the init to a more PHY specific init call. Signed-off-by: Dan Murphy <dmurphy(a)ti.com> --- configs/am65x_evm_a53_defconfig | 2 +- configs/am65x_hs_evm_a53_defconfig | 2 +- configs/dra7xx_evm_defconfig | 2 +- configs/dra7xx_hs_evm_defconfig | 2 +- configs/dra7xx_hs_evm_usb_defconfig | 2 +- configs/j721e_evm_a72_defconfig | 2 +- configs/j721e_hs_evm_a72_defconfig | 2 +- configs/k2g_evm_defconfig | 2 +- configs/xilinx_versal_virt_defconfig | 2 +- configs/xilinx_zynqmp_virt_defconfig | 2 +- drivers/net/phy/Kconfig | 8 ++ drivers/net/phy/Makefile | 3 +- drivers/net/phy/dp83867.c | 3 +- drivers/net/phy/ti_phy_init.c | 106 +++++++++++++++++++++++++++ drivers/net/phy/ti_phy_init.h | 16 ++++ 15 files changed, 144 insertions(+), 12 deletions(-) create mode 100644 drivers/net/phy/ti_phy_init.c create mode 100644 drivers/net/phy/ti_phy_init.h diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 542bbd992c53..7051d6c40505 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -101,7 +101,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_E1000=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 9f43cee39611..29da3826f12a 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -103,7 +103,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_E1000=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 4d765da4e052..19c024889155 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -86,7 +86,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_SPANSION=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_MII=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index c25d4ce5c142..e97f1a3ba338 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -89,7 +89,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_SPANSION=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_MII=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 8e74496b2ccd..46970e31f02e 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -87,7 +87,7 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_MII=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index e9e82bb4309d..784a6ff396c3 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -124,7 +124,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_TI_AM65_CPSW_NUSS=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index a723e2718e5e..dd93a955cefd 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -114,7 +114,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y CONFIG_TI_AM65_CPSW_NUSS=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 5abf5faa450e..f47b1cabe9a8 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -58,7 +58,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index e8c349261207..eb2a26bc2c7d 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -61,7 +61,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_NATSEMI=y CONFIG_PHY_REALTEK=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_PHY_VITESSE=y CONFIG_PHY_FIXED=y CONFIG_PHY_GIGE=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 7b09edd78e1b..5c320f93fe5f 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -101,7 +101,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_PHY_NATSEMI=y CONFIG_PHY_REALTEK=y -CONFIG_PHY_TI=y +CONFIG_PHY_DP83867=y CONFIG_PHY_VITESSE=y CONFIG_PHY_XILINX_GMII2RGMII=y CONFIG_PHY_FIXED=y diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index d1f049e62ab7..e366f10afc59 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -244,6 +244,14 @@ config PHY_TERANETICS config PHY_TI bool "Texas Instruments Ethernet PHYs support" +config PHY_TI_GENERIC + select PHY_TI + bool "Texas Instruments Ethernet PHYs support" + +config PHY_DP83867 + select PHY_TI + bool "Texas Instruments Ethernet DP83867 PHY support" + config PHY_VITESSE bool "Vitesse Ethernet PHYs support" diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 1d81516ecd1d..9c6d31718c00 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -25,7 +25,8 @@ obj-$(CONFIG_PHY_NATSEMI) += natsemi.o obj-$(CONFIG_PHY_REALTEK) += realtek.o obj-$(CONFIG_PHY_SMSC) += smsc.o obj-$(CONFIG_PHY_TERANETICS) += teranetics.o -obj-$(CONFIG_PHY_TI) += dp83867.o +obj-$(CONFIG_PHY_TI) += ti_phy_init.o +obj-$(CONFIG_PHY_DP83867) += dp83867.o obj-$(CONFIG_PHY_XILINX) += xilinx_phy.o obj-$(CONFIG_PHY_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o obj-$(CONFIG_PHY_VITESSE) += vitesse.o diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 50804c130efd..c9ed4a44d4db 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -12,6 +12,7 @@ #include <dm.h> #include <dt-bindings/net/ti-dp83867.h> +#include "ti_phy_init.h" /* TI DP83867 */ #define DP83867_DEVADDR 0x1f @@ -428,7 +429,7 @@ static struct phy_driver DP83867_driver = { .shutdown = &genphy_shutdown, }; -int phy_ti_init(void) +int phy_dp83867_init(void) { phy_register(&DP83867_driver); return 0; diff --git a/drivers/net/phy/ti_phy_init.c b/drivers/net/phy/ti_phy_init.c new file mode 100644 index 000000000000..11c4c166b2f5 --- /dev/null +++ b/drivers/net/phy/ti_phy_init.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * TI Generic PHY Init to register all TI Ethernet PHYs + * + * Author: Dan Murphy <dmurphy(a)ti.com> + * + * Copyright (C) 2019 Texas Instruments Inc. + */ + +#include <phy.h> + +#define DP83822_PHY_ID 0x2000a240 +#define DP83825S_PHY_ID 0x2000a140 +#define DP83825I_PHY_ID 0x2000a150 +#define DP83825CM_PHY_ID 0x2000a160 +#define DP83825CS_PHY_ID 0x2000a170 +#define DP83826C_PHY_ID 0x2000a130 +#define DP83826NC_PHY_ID 0x2000a110 + +static struct phy_driver dp83822_driver = { + .name = "TI DP83822", + .uid = DP83822_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +static struct phy_driver dp83825s_driver = { + .name = "TI DP83825S", + .uid = DP83825S_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +static struct phy_driver dp83825i_driver = { + .name = "TI DP83825I", + .uid = DP83825I_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +static struct phy_driver dp83825m_driver = { + .name = "TI DP83825M", + .uid = DP83825CM_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +static struct phy_driver dp83825cs_driver = { + .name = "TI DP83825CS", + .uid = DP83825CS_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +static struct phy_driver dp83826c_driver = { + .name = "TI DP83826C", + .uid = DP83826C_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; +static struct phy_driver dp83826nc_driver = { + .name = "TI DP83826NC", + .uid = DP83826NC_PHY_ID, + .mask = 0xfffffff0, + .features = PHY_BASIC_FEATURES, + .config = &genphy_config_aneg, + .startup = &genphy_startup, + .shutdown = &genphy_shutdown, +}; + +int phy_ti_init(void) +{ +#ifdef CONFIG_PHY_DP83867 + phy_dp83867_init(); +#endif + +#ifdef CONFIG_PHY_TI_GENERIC + phy_register(&dp83822_driver); + phy_register(&dp83825s_driver); + phy_register(&dp83825i_driver); + phy_register(&dp83825m_driver); + phy_register(&dp83825cs_driver); + phy_register(&dp83826c_driver); + phy_register(&dp83826nc_driver); +#endif + + return 0; +} diff --git a/drivers/net/phy/ti_phy_init.h b/drivers/net/phy/ti_phy_init.h new file mode 100644 index 000000000000..309da2aacccb --- /dev/null +++ b/drivers/net/phy/ti_phy_init.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * TI Generic Ethernet PHY + * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c + * + * Author: Dan Murphy <dmurphy(a)ti.com> + * + * Copyright (C) 2019 Texas Instruments Inc. + */ + +#ifndef _TI_GEN_PHY_H +#define _TI_GEN_PHY_H + +int phy_dp83867_init(void); + +#endif /* _TI_GEN_PHY_H */ -- 2.25.1

4 14

[PATCH v1 00/50] mips: octeon: Add serdes and device helper support incl. DM PCIe driver
by Stefan Roese 25 Apr '21

25 Apr '21

This patchset adds the serdes and (mostly networking) device helper macros and functions, needed to support the still missing Octeon II / III devices in mainline U-Boot. Please excuse the massive amount of files in this patch series. Also the sometimes huge files (mostly headers with register definitions) that I needed to include. The infrastructure code with all the headers is ported without any intended functional changes from the 2013 Cavium / Marvell U-Boot version. It has undergone many hours of extensive code cleanup and reformatting. Some of it done by using tools (checkpatch, Lindent, clang format etc) and also some of it done manually, as I couldn't find some tools that could do the needed work in a reliable and functional way. The result is that checkpatch now only throws a "few" warnings that are left. Some of those can't be removed without an even more extensive cleanup / rewrite of the code, like the addition of typedefs. The added headers and helper functions will be used by the upcoming support for the Octeon II / III networking drivers, including PHY & switch support. It was not easily possible to split these infrastructure files into a separate patchset, as it is heavily interconnected in the common QLM/DLM serdes interface initialization. The result is, that the upcoming ethernet driver support will be much smaller (this is at least my current assumption). The added PCIe RC support with the included DM PCIe driver is the first driver making use of this Octeon serdes infrastructure. This has been tested with an Intel E1000 PCIe network card in the Octeon 7304 EBB. Thanks, Stefan Aaron Williams (42): mips: octeon: Add misc cvmx-helper header files mips: octeon: Add cvmx-agl-defs.h header file mips: octeon: Add cvmx-asxx-defs.h header file mips: octeon: Add cvmx-bgxx-defs.h header file mips: octeon: Add cvmx-ciu-defs.h header file mips: octeon: Add cvmx-dbg-defs.h header file mips: octeon: Add cvmx-dpi-defs.h header file mips: octeon: Add cvmx-dtx-defs.h header file mips: octeon: Add cvmx-fpa-defs.h header file mips: octeon: Add cvmx-gmxx-defs.h header file mips: octeon: Add cvmx-gserx-defs.h header file mips: octeon: Add cvmx-ipd-defs.h header file mips: octeon: Add cvmx-l2c-defs.h header file mips: octeon: Add cvmx-mio-defs.h header file mips: octeon: Add cvmx-npi-defs.h header file mips: octeon: Add cvmx-pcieepx-defs.h header file mips: octeon: Add cvmx-pciercx-defs.h header file mips: octeon: Add cvmx-pcsx-defs.h header file mips: octeon: Add cvmx-pemx-defs.h header file mips: octeon: Add cvmx-pepx-defs.h header file mips: octeon: Add cvmx-pip-defs.h header file mips: octeon: Add cvmx-pki-defs.h header file mips: octeon: Add cvmx-pko-defs.h header file mips: octeon: Add cvmx-pow-defs.h header file mips: octeon: Add cvmx-rst-defs.h header file mips: octeon: Add cvmx-sata-defs.h header file mips: octeon: Add cvmx-sli-defs.h header file mips: octeon: Add cvmx-smix-defs.h header file mips: octeon: Add cvmx-sriomaintx-defs.h header file mips: octeon: Add cvmx-sriox-defs.h header file mips: octeon: Add cvmx-sso-defs.h header file mips: octeon: Add misc remaining header files mips: octeon: Add cvmx-helper-cfg.c mips: octeon: Add cvmx-helper-fdt.c mips: octeon: Add cvmx-helper-jtag.c mips: octeon: Add cvmx-helper-util.c mips: octeon: Add cvmx-helper.c mips: octeon: Add cvmx-pcie.c mips: octeon: Add cvmx-qlm.c mips: octeon: Add octeon_fdt.c mips: octeon: Add octeon_qlm.c mips: octeon: octeon_ebb7304: Add board specific QLM init code Stefan Roese (8): mips: global_data.h: Add Octeon specific data to arch_global_data struct mips: octeon: Misc changes required because of the newly added headers mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to mach mips: octeon: Makefile: Enable building of the newly added C files mips: octeon: Kconfig: Enable CONFIG_SYS_PCI_64BIT mips: octeon: mrvl,cn73xx.dtsi: Add PCIe controller DT node mips: octeon: Add Octeon PCIe host controller driver mips: octeon: octeon_ebb7304_defconfig: Enable Octeon PCIe and E1000 arch/mips/dts/mrvl,cn73xx.dtsi | 16 + arch/mips/include/asm/global_data.h | 9 + arch/mips/mach-octeon/Kconfig | 4 + arch/mips/mach-octeon/Makefile | 11 + arch/mips/mach-octeon/bootoctlinux.c | 1 + arch/mips/mach-octeon/cvmx-bootmem.c | 6 - arch/mips/mach-octeon/cvmx-coremask.c | 1 + arch/mips/mach-octeon/cvmx-helper-cfg.c | 1914 ++++ arch/mips/mach-octeon/cvmx-helper-fdt.c | 970 ++ arch/mips/mach-octeon/cvmx-helper-jtag.c | 172 + arch/mips/mach-octeon/cvmx-helper-util.c | 1225 +++ arch/mips/mach-octeon/cvmx-helper.c | 2611 +++++ arch/mips/mach-octeon/cvmx-pcie.c | 2487 +++++ arch/mips/mach-octeon/cvmx-qlm.c | 2350 +++++ .../mach-octeon/include/mach/cvmx-address.h | 209 + .../mach-octeon/include/mach/cvmx-agl-defs.h | 3135 ++++++ .../mach-octeon/include/mach/cvmx-asxx-defs.h | 709 ++ .../mach-octeon/include/mach/cvmx-bgxx-defs.h | 4106 +++++++ .../mach-octeon/include/mach/cvmx-ciu-defs.h | 7351 +++++++++++++ .../mach-octeon/include/mach/cvmx-cmd-queue.h | 441 + .../mach-octeon/include/mach/cvmx-csr-enums.h | 87 + arch/mips/mach-octeon/include/mach/cvmx-csr.h | 78 + .../mach-octeon/include/mach/cvmx-dbg-defs.h | 33 + .../mach-octeon/include/mach/cvmx-dpi-defs.h | 1460 +++ .../mach-octeon/include/mach/cvmx-dtx-defs.h | 6962 ++++++++++++ .../mach-octeon/include/mach/cvmx-error.h | 456 + .../mach-octeon/include/mach/cvmx-fpa-defs.h | 1866 ++++ arch/mips/mach-octeon/include/mach/cvmx-fpa.h | 217 + .../mips/mach-octeon/include/mach/cvmx-fpa1.h | 196 + .../mips/mach-octeon/include/mach/cvmx-fpa3.h | 566 + .../include/mach/cvmx-global-resources.h | 213 + arch/mips/mach-octeon/include/mach/cvmx-gmx.h | 16 + .../mach-octeon/include/mach/cvmx-gmxx-defs.h | 6378 +++++++++++ .../include/mach/cvmx-gserx-defs.h | 2191 ++++ .../include/mach/cvmx-helper-agl.h | 68 + .../include/mach/cvmx-helper-bgx.h | 335 + .../include/mach/cvmx-helper-board.h | 558 + .../include/mach/cvmx-helper-cfg.h | 884 ++ .../include/mach/cvmx-helper-errata.h | 50 + .../include/mach/cvmx-helper-fdt.h | 568 + .../include/mach/cvmx-helper-fpa.h | 43 + .../include/mach/cvmx-helper-gpio.h | 427 + .../include/mach/cvmx-helper-ilk.h | 93 + .../include/mach/cvmx-helper-ipd.h | 16 + .../include/mach/cvmx-helper-jtag.h | 84 + .../include/mach/cvmx-helper-loop.h | 37 + .../include/mach/cvmx-helper-npi.h | 42 + .../include/mach/cvmx-helper-pki.h | 319 + .../include/mach/cvmx-helper-pko.h | 51 + .../include/mach/cvmx-helper-pko3.h | 76 + .../include/mach/cvmx-helper-rgmii.h | 99 + .../include/mach/cvmx-helper-sfp.h | 437 + .../include/mach/cvmx-helper-sgmii.h | 81 + .../include/mach/cvmx-helper-spi.h | 73 + .../include/mach/cvmx-helper-srio.h | 72 + .../include/mach/cvmx-helper-util.h | 412 + .../include/mach/cvmx-helper-xaui.h | 108 + .../mach-octeon/include/mach/cvmx-helper.h | 565 + .../mach-octeon/include/mach/cvmx-hwfau.h | 606 ++ .../mach-octeon/include/mach/cvmx-hwpko.h | 570 + arch/mips/mach-octeon/include/mach/cvmx-ilk.h | 154 + .../mach-octeon/include/mach/cvmx-ipd-defs.h | 1925 ++++ arch/mips/mach-octeon/include/mach/cvmx-ipd.h | 233 + .../mach-octeon/include/mach/cvmx-l2c-defs.h | 172 + .../include/mach/{cvmx => }/cvmx-lmcx-defs.h | 0 .../mach-octeon/include/mach/cvmx-mio-defs.h | 353 + .../mach-octeon/include/mach/cvmx-npi-defs.h | 1953 ++++ .../mach-octeon/include/mach/cvmx-packet.h | 40 + .../mips/mach-octeon/include/mach/cvmx-pcie.h | 279 + .../include/mach/cvmx-pcieepx-defs.h | 6848 ++++++++++++ .../include/mach/cvmx-pciercx-defs.h | 5586 ++++++++++ .../mach-octeon/include/mach/cvmx-pcsx-defs.h | 1005 ++ .../mach-octeon/include/mach/cvmx-pemx-defs.h | 2028 ++++ .../mach-octeon/include/mach/cvmx-pexp-defs.h | 1382 +++ .../mach-octeon/include/mach/cvmx-pip-defs.h | 3040 ++++++ arch/mips/mach-octeon/include/mach/cvmx-pip.h | 1080 ++ .../mach-octeon/include/mach/cvmx-pki-defs.h | 2353 +++++ .../include/mach/cvmx-pki-resources.h | 157 + arch/mips/mach-octeon/include/mach/cvmx-pki.h | 970 ++ .../mach-octeon/include/mach/cvmx-pko-defs.h | 9388 +++++++++++++++++ .../mach/cvmx-pko-internal-ports-range.h | 43 + .../include/mach/cvmx-pko3-queue.h | 175 + .../mach-octeon/include/mach/cvmx-pow-defs.h | 1135 ++ arch/mips/mach-octeon/include/mach/cvmx-pow.h | 2991 ++++++ arch/mips/mach-octeon/include/mach/cvmx-qlm.h | 304 + .../mips/mach-octeon/include/mach/cvmx-regs.h | 330 +- .../mach-octeon/include/mach/cvmx-rst-defs.h | 77 + .../mach-octeon/include/mach/cvmx-sata-defs.h | 311 + .../mach-octeon/include/mach/cvmx-scratch.h | 113 + .../mach-octeon/include/mach/cvmx-sli-defs.h | 6548 ++++++++++++ .../mach-octeon/include/mach/cvmx-smix-defs.h | 360 + .../include/mach/cvmx-sriomaintx-defs.h | 61 + .../include/mach/cvmx-sriox-defs.h | 44 + .../mach-octeon/include/mach/cvmx-sso-defs.h | 2904 +++++ arch/mips/mach-octeon/include/mach/cvmx-wqe.h | 1462 +++ .../mach-octeon/include/mach/octeon-feature.h | 2 + .../mach-octeon/include/mach/octeon-model.h | 2 + .../mach-octeon/include/mach/octeon_ddr.h | 189 +- arch/mips/mach-octeon/octeon_fdt.c | 1040 ++ arch/mips/mach-octeon/octeon_qlm.c | 5853 ++++++++++ board/Marvell/octeon_ebb7304/board.c | 732 +- configs/octeon_ebb7304_defconfig | 5 +- drivers/pci/Kconfig | 6 + drivers/pci/Makefile | 1 + drivers/pci/pcie_octeon.c | 159 + drivers/ram/octeon/octeon3_lmc.c | 28 +- drivers/ram/octeon/octeon_ddr.c | 22 +- 107 files changed, 118724 insertions(+), 240 deletions(-) create mode 100644 arch/mips/mach-octeon/cvmx-helper-cfg.c create mode 100644 arch/mips/mach-octeon/cvmx-helper-fdt.c create mode 100644 arch/mips/mach-octeon/cvmx-helper-jtag.c create mode 100644 arch/mips/mach-octeon/cvmx-helper-util.c create mode 100644 arch/mips/mach-octeon/cvmx-helper.c create mode 100644 arch/mips/mach-octeon/cvmx-pcie.c create mode 100644 arch/mips/mach-octeon/cvmx-qlm.c create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-address.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-agl-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-asxx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-bgxx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ciu-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-cmd-queue.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-csr-enums.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-csr.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-dbg-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-dpi-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-dtx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-error.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa1.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa3.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-global-resources.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-gmx.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-gmxx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-gserx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-agl.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-bgx.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-board.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-cfg.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-errata.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-fdt.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-fpa.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-gpio.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-ilk.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-ipd.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-jtag.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-loop.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-npi.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-pko.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-pko3.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-rgmii.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-sfp.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-sgmii.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-spi.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-srio.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-util.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-xaui.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-hwfau.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-hwpko.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ilk.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ipd-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ipd.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-l2c-defs.h rename arch/mips/mach-octeon/include/mach/{cvmx => }/cvmx-lmcx-defs.h (100%) create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-mio-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-npi-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-packet.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pcie.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pcieepx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pciercx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pcsx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pemx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pexp-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pip-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pip.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pki-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pki-resources.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pki.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pko-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pko-internal-ports-range.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pko3-queue.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pow-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pow.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-qlm.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sata-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-scratch.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sli-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-smix-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sriomaintx-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sriox-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sso-defs.h create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-wqe.h create mode 100644 arch/mips/mach-octeon/octeon_fdt.c create mode 100644 arch/mips/mach-octeon/octeon_qlm.c create mode 100644 drivers/pci/pcie_octeon.c -- 2.29.2

2 56

[PATCH] mips: octeon: octeon_ebb7304_defconfig: Enable USB storage support
by Stefan Roese 22 Apr '21

22 Apr '21

This patch enables USB storage support with the necessary partition support on the MIPS Octeon EBB7304. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Aaron Williams <awilliams(a)marvell.com> Cc: Chandrakala Chavva <cchavva(a)marvell.com> --- configs/octeon_ebb7304_defconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig index a98d73a268..b8670c9165 100644 --- a/configs/octeon_ebb7304_defconfig +++ b/configs/octeon_ebb7304_defconfig @@ -24,7 +24,9 @@ CONFIG_CMD_TIME=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y -# CONFIG_DOS_PARTITION is not set +CONFIG_AMIGA_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x1FBFE000 CONFIG_BLK=y @@ -59,6 +61,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y -- 2.30.1

2 1

[PATCH] mips: mt7628: fix ddr_type for MT7688KN
by Weijie Gao 22 Apr '21

22 Apr '21

The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type from bootstrap register must be ignored, and always be assumed as DDR1. This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed with a wrong ddr_type in MT7688KN. Signed-off-by: Weijie Gao <weijie.gao(a)mediatek.com> --- arch/mips/mach-mtmips/mt7628/ddr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/mach-mtmips/mt7628/ddr.c b/arch/mips/mach-mtmips/mt7628/ddr.c index b091f2ecff..4e72459906 100644 --- a/arch/mips/mach-mtmips/mt7628/ddr.c +++ b/arch/mips/mach-mtmips/mt7628/ddr.c @@ -140,6 +140,9 @@ void mt7628_ddr_init(void) lspd = readl(sysc + SYSCTL_CLKCFG0_REG) & (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL); + if (pkg_type == PKG_ID_KN) + ddr_type = DRAM_DDR1; + mt7628_memc_reset(1); __udelay(200); @@ -152,9 +155,6 @@ void mt7628_ddr_init(void) param.memsize = 0; param.bus_width = 0; - if (pkg_type == PKG_ID_KN) - ddr_type = DRAM_DDR1; - if (ddr_type == DRAM_DDR1) { if (lspd) param.cfgs = ddr1_cfgs_160mhz; -- 2.17.1

3 3

[PATCH v3 00/28] dm: Change the way sequence numbers are implemented
by Simon Glass 21 Apr '21

21 Apr '21

At present each device has two sequence numbers, with 'req_seq' being set up at bind time and 'seq' at probe time. The idea is that devices can 'request' a sequence number and then the conflicts are resolved when the device is probed. This makes things complicated in a few cases, since we don't really know (at bind time) what the sequence number will end up being. We want to honour the bind-time requests if at all possible, but in fact the only source of these at present is the devicetree aliases. Apart from the obvious need for sequence numbers to supports U-Boot's numbering on devices on the command line, the current scheme was designed to: - avoid calculating the sequence number until it is needed, to save execution time - allow multiple devices to obtain a particular sequence number as they are probed and removed - retain a record of the 'requested' sequence number even if it turns out that a device could not get it (to allow debugging and retrying) After some years using the current scheme it seems on balance that these goals don't have as much merit as first thought. The first point would be persuasive except that we end up reading the devicetree aliases at bind-time anyway. So the work of resolving the sequence numbers during probing is not that great. The second point hasn't really been an issue, as there is typically no contention for sequence numbers (boards tend to allocate them statically in the devicetree). Re the third point, we can often figure out what was requested by looking at aliases, and in the cases where we can't, it doesn't seem to matter much. Since we have the devicetree available at bind time, we may as well just use it, in the hope that the required processing will turn out to be useful later (i.e. the device actually gets used). In addition, it is simpler to use a single sequence number, since it avoids confusion and some extra code. This series moves U-Boot to use a single, bind-time sequence number. All uclasses assign sequence numbers to their devices, so that as soon as a device is bound, it has a sequence number. If the uclass flag DM_UC_FLAG_SEQ_ALIAS is enabled (as well as the CONFIG option), a devicetree alias provides the number. Otherwise, the next available number (after the last alias and avoiding existing devices) is used. Note that it is still possible to have the uclass manually allocate sequence numbers, using the DM_UC_FLAG_NO_SEQ flag. This is used by PCI, due to its special requirements. Apart from the simplicity gains, overall these changes seem to reduce the number of tweaks and workarounds needed to get the desired behaviour. However there will certainly be some problems created, so board maintainers should test this out. This series is available at u-boot-dm/seq-working Changes in v3: - Update PCI to use manual sequence numbering - Add new patch to test DM_UC_FLAG_NO_AUTO_SEQ Changes in v2: - Give all devices a sequence number - Drop uclass_alloc_all_seqs() and GD_FLG_DM_NO_SEQ flag - Drop the GD_FLG_DM_NO_SEQ flag - Drop special numbering in the i2c uclass - Add new patch to allow manual sequence numbering - Use the sequence number directly instead of max bus - Adjust the tests to handle the new allocation scheme - Drop the networking changes which are no-longer needed - Update for new logic - Adjust commit message - Drop pointless check for max == -1 - Adjust the tests to handle the new allocation scheme - Simplify the logic so auto_seq is positive - Update the docs to indicate all devices get a sequence number - Update the docs to explain how aliases reserve sequence numbers - Drop commit changing efi_uc_destroy() Simon Glass (28): linker_lists: Fix alignment issue dm: Avoid accessing seq directly dm: core: Update uclass_find_next_free_req_seq() args dm: core: Add a new sequence number for devices dm: test: Check all devices have a sequence numbers dm: core: Switch binding to use new sequence numbers dm: Fix return value in dev_read_alias_seq() dm: test: Drop assumptions of no sequence numbers octeon: Don't attempt to set the sequence number i2c: Update for new sequence numbers net: Update to use new sequence numbers dm: core: Allow manual sequence numbering pci: Update to use new sequence numbers spi: Update for new sequence numbers usb: ehci-mx6: Drop assignment of sequence number usb: Update for new sequence numbers x86: Drop unnecessary mp_init logic x86: Simplify acpi_device_infer_name() gpio: Update for new sequence numbers pinctrl: Update for new sequence numbers dm: Switch over to use new sequence number for dev_seq() dm: test: Add a test for DM_UC_FLAG_NO_AUTO_SEQ dm: Drop uclass_resolve_seq() dm: Drop the unused arg in uclass_find_device_by_seq() dm: core: Update uclass_find_next_free_req_seq() for new scheme cmd: Drop use of old sequence numbers in commands dm: core: Drop seq and req_seq dm: Update documentation for new sequence numbers arch/Kconfig | 11 ++ arch/arm/include/asm/mach-imx/mxc_i2c.h | 2 +- arch/arm/mach-k3/am6_init.c | 2 +- arch/arm/mach-k3/j721e_init.c | 2 +- arch/arm/mach-k3/sysfw-loader.c | 2 +- arch/sandbox/dts/test.dts | 15 +- arch/x86/cpu/apollolake/cpu.c | 2 +- arch/x86/cpu/broadwell/cpu_full.c | 2 +- arch/x86/cpu/ivybridge/model_206ax.c | 2 +- arch/x86/cpu/mp_init.c | 23 +--- arch/x86/include/asm/mp.h | 2 +- board/xilinx/versal/board.c | 12 +- board/xilinx/zynqmp/zynqmp.c | 12 +- cmd/axi.c | 6 +- cmd/cpu.c | 2 +- cmd/i2c.c | 6 +- cmd/misc.c | 2 +- cmd/osd.c | 6 +- cmd/pci.c | 7 +- cmd/pmic.c | 4 +- cmd/remoteproc.c | 2 +- cmd/w1.c | 4 +- doc/api/linker_lists.rst | 59 ++++++++ doc/driver-model/design.rst | 59 ++++---- drivers/core/device-remove.c | 1 - drivers/core/device.c | 50 ++----- drivers/core/dump.c | 4 +- drivers/core/read.c | 4 +- drivers/core/root.c | 8 +- drivers/core/uclass.c | 86 +++--------- drivers/gpio/imx_rgpio2p.c | 2 +- drivers/gpio/iproc_gpio.c | 2 +- drivers/gpio/mvebu_gpio.c | 2 +- drivers/gpio/mxc_gpio.c | 2 +- drivers/gpio/octeon_gpio.c | 2 +- drivers/gpio/vybrid_gpio.c | 2 +- drivers/i2c/ast_i2c.c | 4 +- drivers/i2c/davinci_i2c.c | 2 +- drivers/i2c/designware_i2c_pci.c | 16 +-- drivers/i2c/exynos_hs_i2c.c | 2 +- drivers/i2c/i2c-gpio.c | 2 +- drivers/i2c/i2c-uclass.c | 39 +----- drivers/i2c/i2c-versatile.c | 5 - drivers/i2c/imx_lpi2c.c | 12 +- drivers/i2c/intel_i2c.c | 12 +- drivers/i2c/lpc32xx_i2c.c | 6 +- drivers/i2c/muxes/i2c-mux-uclass.c | 4 +- drivers/i2c/mvtwsi.c | 6 +- drivers/i2c/mxc_i2c.c | 10 +- drivers/i2c/nx_i2c.c | 2 +- drivers/i2c/octeon_i2c.c | 3 +- drivers/i2c/s3c24x0_i2c.c | 2 +- drivers/i2c/tegra_i2c.c | 5 +- drivers/mmc/fsl_esdhc_imx.c | 4 +- drivers/mmc/octeontx_hsmmc.c | 2 - drivers/mtd/spi/sandbox.c | 4 +- drivers/net/dwc_eth_qos.c | 2 +- drivers/net/fec_mxc.c | 7 +- drivers/net/fsl-mc/mc.c | 2 +- drivers/net/fsl_mcdmafec.c | 2 +- drivers/net/ftgmac100.c | 2 +- drivers/net/higmacv300.c | 2 +- drivers/net/mcffec.c | 2 +- drivers/net/octeontx/nicvf_main.c | 9 +- drivers/net/octeontx/smi.c | 3 +- drivers/net/octeontx2/nix.c | 2 +- drivers/net/octeontx2/rvu_pf.c | 6 +- drivers/net/xilinx_axi_emac.c | 2 +- drivers/net/xilinx_emaclite.c | 2 +- drivers/net/zynq_gem.c | 2 +- drivers/pci/pci-aardvark.c | 2 +- drivers/pci/pci-uclass.c | 77 ++++++----- drivers/pci/pci_auto.c | 16 +-- drivers/pci/pcie_dw_mvebu.c | 6 +- drivers/pci/pcie_dw_ti.c | 6 +- drivers/pci/pcie_ecam_generic.c | 2 +- drivers/pci/pcie_fsl.c | 16 +-- drivers/pci/pcie_intel_fpga.c | 2 +- drivers/pci/pcie_layerscape_fixup.c | 4 +- drivers/pci/pcie_layerscape_gen4.c | 10 +- drivers/pci/pcie_layerscape_gen4_fixup.c | 2 +- drivers/pci/pcie_layerscape_rc.c | 12 +- drivers/pci/pcie_mediatek.c | 2 +- drivers/pci/pcie_rockchip.c | 6 +- drivers/pinctrl/exynos/pinctrl-exynos.c | 2 +- drivers/serial/serial_mcf.c | 2 +- drivers/serial/serial_s5p.c | 2 +- drivers/spi/altera_spi.c | 2 +- drivers/spi/cf_spi.c | 12 +- drivers/spi/fsl_dspi.c | 8 +- drivers/spi/fsl_espi.c | 2 +- drivers/spi/octeon_spi.c | 2 +- drivers/spi/pic32_spi.c | 4 +- drivers/spi/rk_spi.c | 1 - drivers/spi/sandbox_spi.c | 2 +- drivers/spi/spi-uclass.c | 4 +- drivers/spi/tegra114_spi.c | 2 +- drivers/spi/tegra20_sflash.c | 2 +- drivers/spi/tegra20_slink.c | 2 +- drivers/spi/tegra210_qspi.c | 2 +- drivers/spi/xilinx_spi.c | 2 +- drivers/spi/zynq_qspi.c | 2 +- drivers/spi/zynq_spi.c | 2 +- drivers/usb/gadget/max3420_udc.c | 2 +- drivers/usb/host/ehci-mx5.c | 2 +- drivers/usb/host/ehci-mx6.c | 14 +- drivers/usb/host/ehci-omap.c | 2 +- drivers/usb/host/ehci-vf.c | 8 +- drivers/usb/host/usb-sandbox.c | 2 +- drivers/usb/host/usb-uclass.c | 6 +- drivers/video/vidconsole-uclass.c | 4 +- drivers/virtio/virtio-uclass.c | 2 +- drivers/watchdog/ast_wdt.c | 2 +- drivers/watchdog/at91sam9_wdt.c | 2 +- drivers/watchdog/cdns_wdt.c | 2 +- drivers/watchdog/omap_wdt.c | 2 +- drivers/watchdog/orion_wdt.c | 2 +- drivers/watchdog/sbsa_gwdt.c | 2 +- drivers/watchdog/sp805_wdt.c | 2 +- drivers/watchdog/tangier_wdt.c | 2 +- drivers/watchdog/xilinx_tb_wdt.c | 2 +- drivers/watchdog/xilinx_wwdt.c | 2 +- include/dm/device.h | 32 ++--- include/dm/uclass-id.h | 1 + include/dm/uclass-internal.h | 37 +++-- include/dm/uclass.h | 18 +-- include/linker_lists.h | 3 +- include/pci.h | 2 +- include/spi.h | 2 +- lib/acpi/acpi_device.c | 27 +--- lib/efi_loader/efi_device_path.c | 4 +- net/eth-uclass.c | 24 ++-- test/dm/acpi.c | 6 +- test/dm/blk.c | 3 - test/dm/bus.c | 15 +- test/dm/core.c | 19 +++ test/dm/i2c.c | 3 - test/dm/spi.c | 3 - test/dm/test-fdt.c | 168 +++++++++++++++++------ 139 files changed, 634 insertions(+), 613 deletions(-) -- 2.29.2.684.gfbc64c5ab5-goog

6 66

[PATCH] Fix IDE commands issued, fix endian issues, fix non MMIO
by Reinoud Zandijk 20 Apr '21

20 Apr '21

Fixes IDE issues found on the Malta board under Qemu: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. Tested malta_defconfig and maltael_defconfig to work again in Qemu. Signed-off-by: Reinoud Zandijk <reinoud(a)NetBSD.org> --- drivers/block/ide.c | 152 +++++++++++++------------------------------- include/ata.h | 2 +- 2 files changed, 44 insertions(+), 110 deletions(-) diff --git a/drivers/block/ide.c b/drivers/block/ide.c index 43a0776099..862a85bc87 100644 --- a/drivers/block/ide.c +++ b/drivers/block/ide.c @@ -130,56 +130,38 @@ OUT: * ATAPI Support */ -#if defined(CONFIG_IDE_SWAP_IO) /* since ATAPI may use commands with not 4 bytes alligned length * we have our own transfer functions, 2 bytes alligned */ __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) { + uintptr_t paddr = (ATA_CURR_BASE(dev) + ATA_DATA_REG); ushort *dbuf; - volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG); dbuf = (ushort *)sect_buf; - debug("in output data shorts base for read is %lx\n", - (unsigned long) pbuf); + debug("in output data shorts base for read is %p\n", (void *)paddr); while (shorts--) { EIEIO; - *pbuf = *dbuf++; + outw(cpu_to_le16(*dbuf++), paddr); } } __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) { + uintptr_t paddr = (ATA_CURR_BASE(dev) + ATA_DATA_REG); ushort *dbuf; - volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG); dbuf = (ushort *)sect_buf; - debug("in input data shorts base for read is %lx\n", - (unsigned long) pbuf); + debug("in input data shorts base for read is %p\n", (void *)paddr); while (shorts--) { EIEIO; - *dbuf++ = *pbuf; + *dbuf++ = le16_to_cpu(inw(paddr)); } } -#else /* ! CONFIG_IDE_SWAP_IO */ -__weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts) -{ - outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); -} - -__weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts) -{ - insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts); -} - -#endif /* CONFIG_IDE_SWAP_IO */ - /* * Wait until (Status & mask) == res, or timeout (in ms) * Return last status @@ -636,19 +618,6 @@ static void ide_ident(struct blk_desc *dev_desc) sizeof(dev_desc->vendor)); ident_cpy((unsigned char *)dev_desc->product, iop.serial_no, sizeof(dev_desc->product)); -#ifdef __LITTLE_ENDIAN - /* - * firmware revision, model, and serial number have Big Endian Byte - * order in Word. Convert all three to little endian. - * - * See CF+ and CompactFlash Specification Revision 2.0: - * 6.2.1.6: Identify Drive, Table 39 for more details - */ - - strswab(dev_desc->revision); - strswab(dev_desc->vendor); - strswab(dev_desc->product); -#endif /* __LITTLE_ENDIAN */ if ((iop.config & 0x0080) == 0x0080) dev_desc->removable = 1; @@ -662,26 +631,22 @@ static void ide_ident(struct blk_desc *dev_desc) } #endif /* CONFIG_ATAPI */ -#ifdef __BIG_ENDIAN - /* swap shorts */ - dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16); -#else /* ! __BIG_ENDIAN */ - /* - * do not swap shorts on little endian - * - * See CF+ and CompactFlash Specification Revision 2.0: - * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details. - */ - dev_desc->lba = iop.lba_capacity; -#endif /* __BIG_ENDIAN */ + iop.lba_capacity[0] = be16_to_cpu(iop.lba_capacity[0]); + iop.lba_capacity[1] = be16_to_cpu(iop.lba_capacity[1]); + dev_desc->lba = + ((unsigned long)iop.lba_capacity[0]) | + ((unsigned long)iop.lba_capacity[1] << 16); #ifdef CONFIG_LBA48 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */ dev_desc->lba48 = 1; - dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] | - ((unsigned long long) iop.lba48_capacity[1] << 16) | - ((unsigned long long) iop.lba48_capacity[2] << 32) | - ((unsigned long long) iop.lba48_capacity[3] << 48); + for (int i = 0; i < 4; i++) + iop.lba48_capacity[i] = be16_to_cpu(iop.lba48_capacity[i]); + dev_desc->lba = + ((unsigned long long)iop.lba48_capacity[0] | + ((unsigned long long)iop.lba48_capacity[1] << 16) | + ((unsigned long long)iop.lba48_capacity[2] << 32) | + ((unsigned long long)iop.lba48_capacity[3] << 48)); } else { dev_desc->lba48 = 0; } @@ -846,90 +811,59 @@ void ide_init(void) #endif } -/* We only need to swap data if we are running on a big endian cpu. */ -#if defined(__LITTLE_ENDIAN) __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words) { - ide_input_data(dev, sect_buf, words); -} -#else -__weak void ide_input_swap_data(int dev, ulong *sect_buf, int words) -{ - volatile ushort *pbuf = - (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG); + uintptr_t paddr = (ATA_CURR_BASE(dev) + ATA_DATA_REG); ushort *dbuf = (ushort *)sect_buf; - debug("in input swap data base for read is %lx\n", - (unsigned long) pbuf); + debug("in input swap data base for read is %p\n", (void *)paddr); while (words--) { -#ifdef __MIPS__ - *dbuf++ = swab16p((u16 *)pbuf); - *dbuf++ = swab16p((u16 *)pbuf); -#else - *dbuf++ = ld_le16(pbuf); - *dbuf++ = ld_le16(pbuf); -#endif /* !MIPS */ + EIEIO; + *dbuf++ = be16_to_cpu(inw(paddr)); + EIEIO; + *dbuf++ = be16_to_cpu(inw(paddr)); } } -#endif /* __LITTLE_ENDIAN */ - -#if defined(CONFIG_IDE_SWAP_IO) __weak void ide_output_data(int dev, const ulong *sect_buf, int words) { +#if defined(CONFIG_IDE_AHB) + ide_write_data(dev, sect_buf, words); +#else + uintptr_t paddr = (ATA_CURR_BASE(dev) + ATA_DATA_REG); ushort *dbuf; - volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG); dbuf = (ushort *)sect_buf; while (words--) { EIEIO; - *pbuf = *dbuf++; + outw(cpu_to_le16(*dbuf++), paddr); EIEIO; - *pbuf = *dbuf++; + outw(cpu_to_le16(*dbuf++), paddr); } +#endif /* CONFIG_IDE_AHB */ } -#else /* ! CONFIG_IDE_SWAP_IO */ -__weak void ide_output_data(int dev, const ulong *sect_buf, int words) -{ -#if defined(CONFIG_IDE_AHB) - ide_write_data(dev, sect_buf, words); -#else - outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1); -#endif -} -#endif /* CONFIG_IDE_SWAP_IO */ -#if defined(CONFIG_IDE_SWAP_IO) __weak void ide_input_data(int dev, ulong *sect_buf, int words) { +#if defined(CONFIG_IDE_AHB) + ide_read_data(dev, sect_buf, words); +#else + uintptr_t paddr = (ATA_CURR_BASE(dev) + ATA_DATA_REG); ushort *dbuf; - volatile ushort *pbuf; - pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG); dbuf = (ushort *)sect_buf; - debug("in input data base for read is %lx\n", (unsigned long) pbuf); + debug("in input data base for read is %p\n", (void *)paddr); while (words--) { EIEIO; - *dbuf++ = *pbuf; + *dbuf++ = le16_to_cpu(inw(paddr)); EIEIO; - *dbuf++ = *pbuf; + *dbuf++ = le16_to_cpu(inw(paddr)); } +#endif /* CONFIG_IDE_AHB */ } -#else /* ! CONFIG_IDE_SWAP_IO */ -__weak void ide_input_data(int dev, ulong *sect_buf, int words) -{ -#if defined(CONFIG_IDE_AHB) - ide_read_data(dev, sect_buf, words); -#else - insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1); -#endif -} - -#endif /* CONFIG_IDE_SWAP_IO */ #ifdef CONFIG_BLK ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt, @@ -1019,14 +953,14 @@ ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt, if (lba48) { ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT); + ide_outb(device, ATA_COMMAND, ATA_CMD_PIO_READ_EXT); } else #endif { ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) | ((blknr >> 24) & 0xF)); - ide_outb(device, ATA_COMMAND, ATA_CMD_READ); + ide_outb(device, ATA_COMMAND, ATA_CMD_PIO_READ); } udelay(50); @@ -1116,14 +1050,14 @@ ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt, if (lba48) { ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device)); - ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT); + ide_outb(device, ATA_COMMAND, ATA_CMD_PIO_WRITE_EXT); } else #endif { ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) | ((blknr >> 24) & 0xF)); - ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE); + ide_outb(device, ATA_COMMAND, ATA_CMD_PIO_WRITE); } udelay(50); diff --git a/include/ata.h b/include/ata.h index 3d870c973f..32ad5f6427 100644 --- a/include/ata.h +++ b/include/ata.h @@ -134,7 +134,7 @@ typedef struct hd_driveid { unsigned short cur_capacity1; /* (2 words, misaligned int) */ unsigned char multsect; /* current multiple sector count */ unsigned char multsect_valid; /* when (bit0==1) multsect is ok */ - unsigned int lba_capacity; /* total number of sectors */ + unsigned short lba_capacity[2];/* two words containing total number of sectors */ unsigned short dma_1word; /* single-word dma info */ unsigned short dma_mword; /* multiple-word dma info */ unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */ -- 2.29.2

3 7

[PATCH] env/fat.c: support redund environment
by Brandon Maier 19 Apr '21

19 Apr '21

Signed-off-by: Brandon Maier <brandon.maier(a)rockwellcollins.com> CC: Joe Hershberger <joe.hershberger(a)ni.com> CC: Wolfgang Denk <wd(a)denx.de> --- env/Kconfig | 13 +++++++++++-- env/fat.c | 41 +++++++++++++++++++++++++++++++++-------- 2 files changed, 44 insertions(+), 10 deletions(-) diff --git a/env/Kconfig b/env/Kconfig index 67ce93061b..a940ddce95 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -411,8 +411,9 @@ config ENV_IS_IN_UBI config SYS_REDUNDAND_ENVIRONMENT bool "Enable redundant environment support" - depends on ENV_IS_IN_EEPROM || ENV_IS_IN_FLASH || ENV_IS_IN_MMC || \ - ENV_IS_IN_NAND || ENV_IS_IN_SPI_FLASH || ENV_IS_IN_UBI + depends on ENV_IS_IN_EEPROM || ENV_IS_IN_FAT || ENV_IS_IN_FLASH || \ + ENV_IS_IN_MMC || ENV_IS_IN_NAND || ENV_IS_IN_SPI_FLASH || \ + ENV_IS_IN_UBI help Normally, the environemt is stored in a single location. By selecting this option, you can then define where to hold a redundant @@ -461,6 +462,14 @@ config ENV_FAT_FILE It's a string of the FAT file name. This file use to store the environment. +config ENV_FAT_FILE_REDUND + string "Name of the FAT file to use for the environment" + depends on ENV_IS_IN_FAT && SYS_REDUNDAND_ENVIRONMENT + default "uboot-redund.env" + help + It's a string of the FAT file name. This file use to store the + redundant environment. + config ENV_EXT4_INTERFACE string "Name of the block device for the environment" depends on ENV_IS_IN_EXT4 diff --git a/env/fat.c b/env/fat.c index 653a38fd93..e4cd5970b4 100644 --- a/env/fat.c +++ b/env/fat.c @@ -29,6 +29,10 @@ # define LOADENV #endif +#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT +DECLARE_GLOBAL_DATA_PTR; +#endif + static char *env_fat_device_and_part(void) { #ifdef CONFIG_MMC @@ -53,6 +57,7 @@ static int env_fat_save(void) env_t __aligned(ARCH_DMA_MINALIGN) env_new; struct blk_desc *dev_desc = NULL; struct disk_partition info; + const char *file = CONFIG_ENV_FAT_FILE; int dev, part; int err; loff_t size; @@ -78,29 +83,41 @@ static int env_fat_save(void) return 1; } - err = file_fat_write(CONFIG_ENV_FAT_FILE, (void *)&env_new, 0, sizeof(env_t), - &size); +#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT + if (gd->env_valid == ENV_VALID) + file = CONFIG_ENV_FAT_FILE_REDUND; +#endif + + err = file_fat_write(file, (void *)&env_new, 0, sizeof(env_t), &size); if (err == -1) { /* * This printf is embedded in the messages from env_save that * will calling it. The missing \n is intentional. */ printf("Unable to write \"%s\" from %s%d:%d... ", - CONFIG_ENV_FAT_FILE, CONFIG_ENV_FAT_INTERFACE, dev, part); + file, CONFIG_ENV_FAT_INTERFACE, dev, part); return 1; } +#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT + gd->env_valid = (gd->env_valid == ENV_REDUND) ? ENV_VALID : ENV_REDUND; +#endif + return 0; } #ifdef LOADENV static int env_fat_load(void) { - ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE); + ALLOC_CACHE_ALIGN_BUFFER(char, buf1, CONFIG_ENV_SIZE); +#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT + ALLOC_CACHE_ALIGN_BUFFER(char, buf2, CONFIG_ENV_SIZE); + int err2; +#endif struct blk_desc *dev_desc = NULL; struct disk_partition info; int dev, part; - int err; + int err1; #ifdef CONFIG_MMC if (!strcmp(CONFIG_ENV_FAT_INTERFACE, "mmc")) @@ -124,8 +141,15 @@ static int env_fat_load(void) goto err_env_relocate; } - err = file_fat_read(CONFIG_ENV_FAT_FILE, buf, CONFIG_ENV_SIZE); - if (err == -1) { + err1 = file_fat_read(CONFIG_ENV_FAT_FILE, buf1, CONFIG_ENV_SIZE); +#ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT + err2 = file_fat_read(CONFIG_ENV_FAT_FILE_REDUND, buf2, CONFIG_ENV_SIZE); + + err1 = (err1 >= 0) ? 0 : -1; + err2 = (err2 >= 0) ? 0 : -1; + return env_import_redund(buf1, err1, buf2, err2, H_EXTERNAL); +#else + if (err1 < 0) { /* * This printf is embedded in the messages from env_save that * will calling it. The missing \n is intentional. @@ -135,7 +159,8 @@ static int env_fat_load(void) goto err_env_relocate; } - return env_import(buf, 1, H_EXTERNAL); + return env_import(buf1, 1, H_EXTERNAL); +#endif err_env_relocate: env_set_default(NULL, 0); -- 2.29.1

3 2

[RFC PATCH 0/2] env: sf: remove the static env_flash variable
by Patrick Delaunay 18 Apr '21

18 Apr '21

Proposal to cleanup the SPI device support in env/sf.c, after the question of mail [1]. Release the SPI flash after each ENV request, so U-Boot can't have conflict of other SPI user. This serie can be applied on top on previous serie [2]. Drawback: possible performance issue as SPI device is probed/release for each ENV access when several ENV opts are called. [1] Mail "Question about env_flash variable in env/sf.c" Dec 17, 2020; 6:33pm http://u-boot.10912.n7.nabble.com/Question-about-env-flash-variable-in-env-… [2] env: sf: add support of command env erase http://patchwork.ozlabs.org/project/uboot/list/?series=228696&state=* Patrick Patrick Delaunay (2): env: sf: add missing spi_flash_free env: sf: remove the static env_flash variable env/sf.c | 44 ++++++++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 20 deletions(-) -- 2.17.1

2 4

[PATCH 0/3] env: sf: add support of command env erase
by Patrick Delaunay 18 Apr '21

18 Apr '21

Hi, I add support of env erase command for SPI flash backend (sf). To erase the environment, this patch only invalidate the content at CONFIG_ENV_OFFSET and at CONFIG_ENV_OFFSET_REDUND (force a bad CRC). The 2 first patchs of the serie are preliminary and clenaup steps. Patrick Patrick Delaunay (3): env: add ENV_ERASE_PTR macro env: sf: update the use of macro ENV_SAVE_PTR env: sf: add support of command env erase env/ext4.c | 3 +-- env/mmc.c | 6 +----- env/sf.c | 36 +++++++++++++++++++++++++++++++++++- include/env_internal.h | 1 + 4 files changed, 38 insertions(+), 8 deletions(-) -- 2.17.1

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[PATCH V3] env: Fix invalid env handling in env_init()
by Marek Vasut 18 Apr '21

18 Apr '21

This fixes the case where there are multiple environment drivers, one of them is the default environment one, and it is followed by an environment driver which does not implement .init() callback. The default environment driver sets gd->env_valid to ENV_INVALID and returns 0 from its .init() callback implementation, which is valid behavior for default environment. Since the subsequent environment driver does not implement .init(), it also does not modify the $ret variable in the loop. Therefore, the loop is exited with gd->env_valid=ENV_INVALID and ret=0, which means that the code further down in env_init() will not reset the environment to the default one, which is incorrect. This patch sets the $ret variable back to -ENOENT in case the env_valid is set to ENV_INVALID by an environment driver, so that the environment would be correctly reset back to default one, unless a subsequent driver loads a valid environment. Signed-off-by: Marek Vasut <marex(a)denx.de> --- V2: Reword commit message V3: Rebase --- env/env.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/env/env.c b/env/env.c index 37b4b54cb75..7faa7ab661b 100644 --- a/env/env.c +++ b/env/env.c @@ -334,6 +334,9 @@ int env_init(void) debug("%s: Environment %s init done (ret=%d)\n", __func__, drv->name, ret); + + if (gd->env_valid == ENV_INVALID) + ret = -ENOENT; } if (!prio) -- 2.29.2

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