February 2021 - U-Boot

[PATCH] configs: meson64: add fdtoverlay_addr_r
by Neil Armstrong 24 Feb '21

24 Feb '21

In order to support loading FTD Overlays when booting with the pxe command (or extlinux.conf), supported with [1], add the missing fdtoverlay_addr_r used to load the overlay before applying it to the FDT loaded at fdt_addr_r. [1] https://patchwork.ozlabs.org/project/uboot/patch/20210120085453.2783678-1-n… Signed-off-by: Neil Armstrong <narmstrong(a)baylibre.com> --- include/configs/meson64.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 52cc01f73d..7e97f89052 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -80,6 +80,7 @@ "scriptaddr=0x08000000\0" \ "kernel_addr_r=0x08080000\0" \ "pxefile_addr_r=0x01080000\0" \ + "fdtoverlay_addr_r=0x01000000\0" \ "ramdisk_addr_r=0x13000000\0" \ "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ BOOTENV -- 2.25.1

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[PATCH 0/2] odroid-go2: two small config changes
by Roger Pau Monné 24 Feb '21

24 Feb '21

Hello, The following series contain two config changes for odroid go2 board. Roger Pau Monné (2): odroid-go2: do not disable EFI odroid-go2: fix default FDT file path configs/odroid-go2_defconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.30.1

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[PATCH] Makefile: Add target to generate hex output for combined spl and dtb
by Siew Chin Lim 24 Feb '21

24 Feb '21

From: Dalon Westergreen <dalon.westergreen(a)intel.com> Some architectures, Stratix10/Agilex, require a hex formatted spl that combines the spl image and dtb. This adds a target to create said hex file with and offset of SPL_TEXT_BASE. Signed-off-by: Dalon Westergreen <dalon.westergreen(a)intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim(a)intel.com> --- Makefile | 11 ++++++----- include/configs/socfpga_soc64_common.h | 2 +- scripts/Makefile.spl | 8 ++++++++ 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/Makefile b/Makefile index 4da46dea39..f1adc9aa23 100644 --- a/Makefile +++ b/Makefile @@ -1263,11 +1263,6 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \ $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec) -OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex) - -spl/u-boot-spl.hex: spl/u-boot-spl FORCE - $(call if_changed,objcopy) - binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ map_size=$(shell cat u-boot.map | \ @@ -1935,6 +1930,12 @@ spl/u-boot-spl.bin: spl/u-boot-spl @: $(SPL_SIZE_CHECK) +spl/u-boot-spl-dtb.bin: spl/u-boot-spl + @: + +spl/u-boot-spl-dtb.hex: spl/u-boot-spl + @: + spl/u-boot-spl: tools prepare \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index fdcd7d3e9a..1af359466c 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -200,7 +200,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ -#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" +#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index ea4e045769..625e06d0d9 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -229,6 +229,9 @@ ifneq ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),) INPUTS-y += $(obj)/$(SPL_BIN).sfp endif +INPUTS-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += $(obj)/u-boot-spl-dtb.hex +INPUTS-$(CONFIG_TARGET_SOCFPGA_AGILEX) += $(obj)/u-boot-spl-dtb.hex + ifdef CONFIG_ARCH_SUNXI INPUTS-y += $(obj)/sunxi-spl.bin @@ -389,6 +392,11 @@ $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE MKIMAGEFLAGS_sunxi-spl.bin = -T sunxi_egon \ -n $(CONFIG_DEFAULT_DEVICE_TREE) +OBJCOPYFLAGS_u-boot-spl-dtb.hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE) + +$(obj)/u-boot-spl-dtb.hex: $(obj)/u-boot-spl-dtb.bin FORCE + $(call if_changed,objcopy) + $(obj)/sunxi-spl.bin: $(obj)/$(SPL_BIN).bin FORCE $(call if_changed,mkimage) -- 2.13.0

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[GIT PULL] xilinx patches for v2021.04-rc3
by Michal Simek 24 Feb '21

24 Feb '21

Hi Tom, please pull these changes to your tree. The major part were clock issues we found for ZynqMP and Versal in some PM cases where u-boot didn't ask for enabling clocks. And that's why drivers are shared we also had to add clock enable function for Zynq to pass. There are some other fixes especially ZynqMP one for DTB selection. I can't see any issue from gitlab CI. Thanks, Michal The following changes since commit fdcb93e1709ab1a2ebb562455621617c29e2099c: Merge branch '2021-02-01-assorted-fixes' (2021-02-02 09:24:10 -0500) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-microblaze.git tags/xilinx-for-v2021.04-rc3 for you to fetch changes up to d9aa19efa8a6c20d51b7884de0a7f8dae3f835d2: spi: zynqmp_gqspi: fix set_speed bug on multiple runs (2021-02-23 14:56:59 +0100) ---------------------------------------------------------------- Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name ---------------------------------------------------------------- Brandon Maier (2): spi: zynqmp_gqspi: support dual and quad mode spi: zynqmp_gqspi: fix set_speed bug on multiple runs Michael Walle (2): net: gem: unregister mdio bus if probe fails fpga: zynqpl: fix buffer alignment Michal Simek (6): xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP xilinx: Show silicon version in SPL arm64: zynqmp: Do not clear reset reason clk: zynq: Add dummy clock enable function net: gem: Fix error path in zynq_gem_probe arm64: zynqmp: Rename zc1275/zcu1275 to be aligned with DT name T Karthik Reddy (4): clk: zynqmp: Add support to enable clocks clk: versal: Add support to enable clocks i2c: i2c_cdns: Enable i2c clock net: gem: Enable ethernet rx clock for versal arch/arm/mach-zynqmp/include/mach/hardware.h | 4 +-- board/xilinx/common/board.c | 2 +- board/xilinx/zynq/board.c | 3 ++ board/xilinx/zynqmp/{zynqmp-zc1275-revA => zynqmp-zcu1275-revA} | 0 board/xilinx/zynqmp/{zynqmp-zc1275-revB => zynqmp-zcu1275-revB}/psu_init_gpl.c | 0 board/xilinx/zynqmp/zynqmp.c | 7 ++--- drivers/clk/clk_versal.c | 11 ++++++++ drivers/clk/clk_zynq.c | 10 +++++++ drivers/clk/clk_zynqmp.c | 49 ++++++++++++++++++++++++++++++++ drivers/fpga/zynqpl.c | 2 +- drivers/i2c/i2c-cdns.c | 7 +++++ drivers/mmc/zynq_sdhci.c | 2 +- drivers/net/zynq_gem.c | 47 +++++++++++++++++++++++-------- drivers/serial/serial_zynq.c | 2 +- drivers/spi/zynq_qspi.c | 2 +- drivers/spi/zynq_spi.c | 2 +- drivers/spi/zynqmp_gqspi.c | 189 ++++++++++++++++++++++++++++++++++++++++++++++++++++++---------------------------------------------------------------------- drivers/watchdog/xilinx_wwdt.c | 3 +- 18 files changed, 208 insertions(+), 134 deletions(-) rename board/xilinx/zynqmp/{zynqmp-zc1275-revA => zynqmp-zcu1275-revA} (100%) rename board/xilinx/zynqmp/{zynqmp-zc1275-revB => zynqmp-zcu1275-revB}/psu_init_gpl.c (100%) -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

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[PATCH v3 0/4] Move qfw to DM, add Arm support
by Asherah Connor 24 Feb '21

24 Feb '21

Version 3 of this series moves the QFW driver into a uclass, UCLASS_QFW, and splits the driver into qfw_pio and qfw_mmio. The ugly arch-specific ifdefs are now gone, since regular Makefile conditional compilation of each driver takes care of it for us. As before, on x86 a U_BOOT_DRVINFO is used to configure the qfw_pio driver, otherwise we configure qfw_mmio from device tree if present. I continue to test this on arm64 and x86_64 qemu. A sandbox driver is also included, and a DM unit test for it. A test that runs in the qemu platform is still yet to come -- I wanted to submit this ahead of that for more feedback. One question: how much should I roll these patches together? The first introduces a few changes that are immediately superceded by the second, but maybe it's helpful for review? To view the changes online, see: https://git.src.kameliya.ee/~kameliya/u-boot/log/qfw-priv Changes in v3: - ARCH_QEMU now implies CMD_QFW, not QFW - rename qemu_fwcfg_read_entry_pio to ..._io Asherah Connor (4): arm: x86: qemu: move qfw to DM, include Arm support arm: x86: qemu: add UCLASS_QFW, split driver into _pio and _mmio arm: x86: qemu: unify qfw driver functions as qfw_ qemu: add sandbox driver and tests arch/arm/Kconfig | 1 + arch/sandbox/dts/sandbox.dtsi | 4 + arch/sandbox/dts/test.dts | 4 + arch/x86/cpu/qemu/cpu.c | 7 +- arch/x86/cpu/qemu/qemu.c | 52 ++------ arch/x86/cpu/qfw_cpu.c | 11 +- cmd/qfw.c | 56 ++++---- common/Makefile | 2 + common/qfw.c | 111 ++++++++++++++++ drivers/misc/Makefile | 7 +- drivers/misc/qfw.c | 239 ++++++++++++---------------------- drivers/misc/qfw_mmio.c | 101 ++++++++++++++ drivers/misc/qfw_pio.c | 66 ++++++++++ drivers/misc/qfw_sandbox.c | 129 ++++++++++++++++++ include/dm/uclass-id.h | 1 + include/qfw.h | 90 +++++++++---- test/dm/Makefile | 1 + test/dm/qfw.c | 42 ++++++ 18 files changed, 665 insertions(+), 259 deletions(-) create mode 100644 common/qfw.c create mode 100644 drivers/misc/qfw_mmio.c create mode 100644 drivers/misc/qfw_pio.c create mode 100644 drivers/misc/qfw_sandbox.c create mode 100644 test/dm/qfw.c -- 2.20.1

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[PATCH 0/2] Fix MIPS/Malta target and its IDE work
by Reinoud Zandijk 23 Feb '21

23 Feb '21

Patch 0001 re-enables FDT inclusion into the u-boot binary to make them boot again. The code might not have adjusted well enough in the past to handle the separate one. Patch 0002 fixes IDE issues found on the Malta board: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. With the fixes, malta_defconfig and maltael_defconfig work again in Qemu. Reinoud Zandijk (2): Re-embed the FDTs for the Malta targets. Fix IDE commands issued, fix endian issues, fix non MMIO configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + drivers/block/ide.c | 143 ++++++++++-------------------------- include/ata.h | 3 +- 6 files changed, 46 insertions(+), 104 deletions(-) Signed-off-by: Reinoud Zandijk <reinoud(a)NetBSD.org> -- 2.29.2

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[PATCH 1/1] efi_loader: limit output length for VenHw, VenMedia
by Heinrich Schuchardt 23 Feb '21

23 Feb '21

VenHw and VenMedia device path nodes may carry vendor defined data of arbitrary length. When converting a device path node to text ensure that we do not overrun our internal buffer. In our implementation of EFI_DEVICE_PATH_TO_TEXT_PROTOCOL.ConvertDevicePathToText() we could first determine the output length and then allocate buffers but that would nearly double the code size. Therefore keep the preallocated buffers and truncate excessive device paths instead. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_device_path_to_text.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c index 81b8ac23ba..ba1ad33459 100644 --- a/lib/efi_loader/efi_device_path_to_text.c +++ b/lib/efi_loader/efi_device_path_to_text.c @@ -67,7 +67,8 @@ static char *dp_hardware(char *s, struct efi_device_path *dp) s += sprintf(s, "VenHw(%pUl", &vdp->guid); n = (int)vdp->dp.length - sizeof(struct efi_device_path_vendor); - if (n > 0) { + /* Node must fit into MAX_NODE_LEN) */ + if (n > 0 && n < MAX_NODE_LEN / 2 - 22) { s += sprintf(s, ","); for (i = 0; i < n; ++i) s += sprintf(s, "%02x", vdp->vendor_data[i]); @@ -251,7 +252,8 @@ static char *dp_media(char *s, struct efi_device_path *dp) s += sprintf(s, "VenMedia(%pUl", &vdp->guid); n = (int)vdp->dp.length - sizeof(struct efi_device_path_vendor); - if (n > 0) { + /* Node must fit into MAX_NODE_LEN) */ + if (n > 0 && n < MAX_NODE_LEN / 2 - 24) { s += sprintf(s, ","); for (i = 0; i < n; ++i) s += sprintf(s, "%02x", vdp->vendor_data[i]); -- 2.30.0

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[RFC PATCH 0/2] net: dsa: various fixes
by Michael Walle 23 Feb '21

23 Feb '21

Before a DSA port is probed, the master port needs to be probed first. For now this worked, because the probing order was correct. But it already falls short if you use the enetc6 port on the LS1028A SoC: Device tree snippet: &enetc6 { status = "okay"; }; &mscc_felix_port5 { ethernet = <&enetc6>; status = "okay"; }; NB. keep enetc2 enabled, otherwise you will trigger an access violation. Michael Walle (2): net: dsa: return early if there is no master net: dsa: probe master device net/dsa-uclass.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) -- 2.20.1

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[scan-admin@coverity.com: New Defects reported by Coverity Scan for Das U-Boot]
by Tom Rini 23 Feb '21

23 Feb '21

----- Forwarded message from scan-admin(a)coverity.com ----- Date: Mon, 22 Feb 2021 16:03:35 +0000 (UTC) From: scan-admin(a)coverity.com To: tom.rini(a)gmail.com Subject: New Defects reported by Coverity Scan for Das U-Boot Hi, Please find the latest report on new defect(s) introduced to Das U-Boot found with Coverity Scan. 3 new defect(s) introduced to Das U-Boot found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 3 of 3 defect(s) ** CID 320541: (UNREACHABLE) /common/fdt_support.c: 1403 in fdt_get_dma_range() /common/fdt_support.c: 1394 in fdt_get_dma_range() ________________________________________________________________________________________________________ *** CID 320541: (UNREACHABLE) /common/fdt_support.c: 1403 in fdt_get_dma_range() 1397 bus_node = of_match_bus(blob, parent); 1398 bus_node->count_cells(blob, parent, &pna, &pns); 1399 if (!OF_CHECK_COUNTS(pna, pns)) { 1400 printf("%s: Bad cell count for %s\n", __FUNCTION__, 1401 fdt_get_name(blob, parent, NULL)); 1402 return -EINVAL; >>> CID 320541: (UNREACHABLE) >>> This code cannot be reached: "goto out;". 1403 goto out; 1404 } 1405 1406 *bus = fdt_read_number(ranges, na); 1407 *cpu = fdt_translate_dma_address(blob, node, ranges + na); 1408 *size = fdt_read_number(ranges + na + pna, ns); /common/fdt_support.c: 1394 in fdt_get_dma_range() 1388 bus_node = of_match_bus(blob, node); 1389 bus_node->count_cells(blob, node, &na, &ns); 1390 if (!OF_CHECK_COUNTS(na, ns)) { 1391 printf("%s: Bad cell count for %s\n", __FUNCTION__, 1392 fdt_get_name(blob, node, NULL)); 1393 return -EINVAL; >>> CID 320541: (UNREACHABLE) >>> This code cannot be reached: "goto out;". 1394 goto out; 1395 } 1396 1397 bus_node = of_match_bus(blob, parent); 1398 bus_node->count_cells(blob, parent, &pna, &pns); 1399 if (!OF_CHECK_COUNTS(pna, pns)) { ** CID 320540: Null pointer dereferences (REVERSE_INULL) /lib/efi_loader/efi_device_path_to_text.c: 372 in efi_convert_device_path_to_text() ________________________________________________________________________________________________________ *** CID 320540: Null pointer dereferences (REVERSE_INULL) /lib/efi_loader/efi_device_path_to_text.c: 372 in efi_convert_device_path_to_text() 366 char *str = buffer; 367 368 EFI_ENTRY("%p, %d, %d", device_path, display_only, allow_shortcuts); 369 370 if (!device_path) 371 goto out; >>> CID 320540: Null pointer dereferences (REVERSE_INULL) >>> Null-checking "device_path" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. 372 while (device_path && str + MAX_NODE_LEN < buffer + MAX_PATH_LEN) { 373 if (device_path->type == DEVICE_PATH_TYPE_END) { 374 if (device_path->sub_type != 375 DEVICE_PATH_SUB_TYPE_INSTANCE_END) 376 break; 377 *str++ = ','; ** CID 320539: (UNREACHABLE) /drivers/core/of_addr.c: 376 in of_get_dma_range() /drivers/core/of_addr.c: 384 in of_get_dma_range() ________________________________________________________________________________________________________ *** CID 320539: (UNREACHABLE) /drivers/core/of_addr.c: 376 in of_get_dma_range() 370 /* Get the address sizes both for the bus and its parent */ 371 bus_node = of_match_bus((struct device_node*)dev); 372 bus_node->count_cells(dev, &na, &ns); 373 if (!OF_CHECK_COUNTS(na, ns)) { 374 printf("Bad cell count for %s\n", of_node_full_name(dev)); 375 return -EINVAL; >>> CID 320539: (UNREACHABLE) >>> This code cannot be reached: "goto out_parent;". 376 goto out_parent; 377 } 378 379 bus_node = of_match_bus(parent); 380 bus_node->count_cells(parent, &pna, &pns); 381 if (!OF_CHECK_COUNTS(pna, pns)) { /drivers/core/of_addr.c: 384 in of_get_dma_range() 378 379 bus_node = of_match_bus(parent); 380 bus_node->count_cells(parent, &pna, &pns); 381 if (!OF_CHECK_COUNTS(pna, pns)) { 382 printf("Bad cell count for %s\n", of_node_full_name(parent)); 383 return -EINVAL; >>> CID 320539: (UNREACHABLE) >>> This code cannot be reached: "goto out_parent;". 384 goto out_parent; 385 } 386 387 *bus = of_read_number(ranges, na); 388 *cpu = of_translate_dma_address(dev, ranges + na); 389 *size = of_read_number(ranges + na + pna, ns); ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… To manage Coverity Scan email notifications for "tom.rini(a)gmail.com", click https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P… ----- End forwarded message ----- -- Tom

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[PATCH v2 0/2] Fix MIPS/Malta target and its IDE work
by Reinoud Zandijk 23 Feb '21

23 Feb '21

Patch 0001 re-enables FDT inclusion into the u-boot binary to make them boot again. The code might not have adjusted well enough in the past to handle the separate one. It could also be a toolchain dependency. Patch 0002 fixes IDE issues found on the Malta board: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. With the fixes, malta_defconfig and maltael_defconfig work again in Qemu. Signed-off-by: Reinoud Zandijk <reinoud(a)NetBSD.org> Reinoud Zandijk (2): Re-embed the FDTs for the Malta targets. Fix IDE commands issued, fix endian issues, fix non MMIO configs/malta64_defconfig | 1 + configs/malta64el_defconfig | 1 + configs/malta_defconfig | 1 + configs/maltael_defconfig | 1 + drivers/block/ide.c | 149 +++++++++++------------------------- include/ata.h | 2 +- 6 files changed, 48 insertions(+), 107 deletions(-) -- 2.29.2

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