December 2021 - U-Boot

[PATCH v2] console: usb: kbd: Limit poll frequency to improve performance
by Thomas Watson 09 Feb '22

09 Feb '22

Using the XHCI driver, the function `usb_kbd_poll_for_event` takes 30-40ms to run. The exact time is dependent on the polling interval the keyboard requests in its descriptor, and likely cannot be significantly reduced without major rework to the XHCI driver. The U-Boot EFI console service sets a timer to poll the keyboard every 5 microseconds, and this timer is checked every time a block is read off disk. The net effect is that, on my system, loading a ~40MiB kernel and initrd takes about 62 seconds with a slower keyboard and 53 seconds with a faster one, with the vast majority of the time spent polling the keyboard. To solve this problem, this patch adds a 20ms delay between consecutive calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the total loading time to under half a second for both keyboards, and does not impact the perceived keystroke latency. Signed-off-by: Thomas Watson <twatson52(a)icloud.com> --- This revision wraps the comment at 80 characters and also should not have been corrupted by my e-mail client. common/usb_kbd.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/common/usb_kbd.c b/common/usb_kbd.c index afad260d3d..5408c821b4 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -118,7 +118,7 @@ struct usb_kbd_pdata { extern int __maybe_unused net_busy_flag; /* The period of time between two calls of usb_kbd_testc(). */ -static unsigned long __maybe_unused kbd_testc_tms; +static unsigned long kbd_testc_tms; /* Puts character in the queue and sets up the in and out pointer. */ static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c) @@ -394,21 +394,31 @@ static int usb_kbd_testc(struct stdio_dev *sdev) struct usb_device *usb_kbd_dev; struct usb_kbd_pdata *data; + /* + * Polling the keyboard for an event can take dozens of milliseconds. + * Add a delay between polls to avoid blocking activity which polls + * rapidly, like the UEFI console timer. + */ + unsigned long poll_delay = CONFIG_SYS_HZ / 50; + #ifdef CONFIG_CMD_NET /* * If net_busy_flag is 1, NET transfer is running, * then we check key-pressed every second (first check may be * less than 1 second) to improve TFTP booting performance. */ - if (net_busy_flag && (get_timer(kbd_testc_tms) < CONFIG_SYS_HZ)) - return 0; - kbd_testc_tms = get_timer(0); + if (net_busy_flag) + poll_delay = CONFIG_SYS_HZ; #endif + dev = stdio_get_by_name(sdev->name); usb_kbd_dev = (struct usb_device *)dev->priv; data = usb_kbd_dev->privptr; - usb_kbd_poll_for_event(usb_kbd_dev); + if (get_timer(kbd_testc_tms) >= poll_delay) { + usb_kbd_poll_for_event(usb_kbd_dev); + kbd_testc_tms = get_timer(0); + } return !(data->usb_in_pointer == data->usb_out_pointer); } -- 2.31.1

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FIT image: load secure FPGA
by Jorge Ramirez-Ortiz, Foundries 09 Feb '22

09 Feb '22

Hello, We are enabling secure boot on Zynqmp with SPL. The issue however is that during secure boot, the bootrom not only validates the first loader (SPL and PMUFW combo) but it will also expect a signed bitstream during load(FPGA). Since currently the SPL load of an FPGA image from FIT does not support loading images for authentication (fpga_loads), I'd like to discuss how to best implement such support. A pretty standard file.its description of the FPGA loadable looks like this: fpga { description = "FPGA binary"; data = /incbin/("${DEPLOY_DIR_IMAGE}/${SPL_FPGA_BINARY}"); type = "fpga"; arch = "${UBOOT_ARCH}"; compression = "none"; load = <${fpgaloadaddr}>; hash-1 { algo = "${FIT_HASH_ALG}"; }; }; We could extend imagetool.h struct image_tool_params to add more params or perhpas just define different 'types' of fpga? Something like: "fpga" "fpga-auth" : authenticated "fpga-enc" : encrypted "fpga-sec" : encrypted and authenticated Then it would be a matter of modifying https://github.com/u-boot/u-boot/blob/master/common/spl/spl_fit.c#L572 any thoughts? TIA Jorge

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[PATCH] crypto/fsl: Fallback to SW sha1/256 is misaligned buffers
by Christian Sørensen 08 Feb '22

08 Feb '22

Problem: With U-Boot 2021.10, we currently cannot load a fitImage on our imx7d board, due to misaligned buffers. Reason: Commit 92055e138f28 ("image: Drop if/elseif hash selection in calculate_hash()") changed the way the FIT were verified. Previously, SW sha1/256 were always used. Due to that commit, that can now be done in hardware. caam_hash requires both the input, pbuf, and output buffer, pout, to be aligned. E.g. for the kernel data, pbuf will be the data start address for the kernel. The data start address is dependent on how the FIT is constructed and what address the FIT is loaded to. I.e.; it is fairly likely that we have a case of pbuf to not be aligned. pout is even more likely to not be aligned since it is simply a stack variable declared in fit_image_check_hash in common/image-fit.c. So to rely upon both of these buffers to be aligned, makes errors fairly likely. Solution: I wont propose copying the entire input buffer due to its size, so instead just fallback to use the sw sha1/sha256 if buffers is misaligned. Signed-off-by: Christian Sørensen <yocto(a)bsorensen.net> --- drivers/crypto/fsl/fsl_hash.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c index 8b5c26db07..48dd10883e 100644 --- a/drivers/crypto/fsl/fsl_hash.c +++ b/drivers/crypto/fsl/fsl_hash.c @@ -16,6 +16,9 @@ #include <hw_sha.h> #include <asm/cache.h> #include <linux/errno.h> +#include <u-boot/sha1.h> +#include <u-boot/sha256.h> +#include <image.h> #define CRYPTO_MAX_ALG_NAME 80 #define SHA1_DIGEST_SIZE 20 @@ -176,8 +179,12 @@ int caam_hash(const unsigned char *pbuf, unsigned int buf_len, if (!IS_ALIGNED((uintptr_t)pbuf, ARCH_DMA_MINALIGN) || !IS_ALIGNED((uintptr_t)pout, ARCH_DMA_MINALIGN)) { - puts("Error: Address arguments are not aligned\n"); - return -EINVAL; + printf("Fallback to SW hash due to misaligned buffers\n"); + if (algo == SHA1) + sha1_csum_wd(pbuf, buf_len, pout, CHUNKSZ_SHA1); + else + sha256_csum_wd(pbuf, buf_len, pout, CHUNKSZ_SHA256); + return 0; } size = ALIGN(buf_len, ARCH_DMA_MINALIGN); -- 2.25.1

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[PATCH 0/1] Introduce new sign binman's option
by Ivan Mikhaylov 07 Feb '22

07 Feb '22

From: Ivan Mikhaylov <ivan.mikhaylov(a)siemens.com> This patch introduces prototype of new sign binman's option. It doesn't looks good for now but it shows how sign process can be done. Just enhancing sign procedure, as example from: mkimage -G privateky -r -o sha256,rsa4096 -F fit(a)0x280000.fit binman replace -i flash.bin -f fit(a)0x280000.fit fit@0x280000 into: binman sign -i flash.bin -k privatekey -a sha256,rsa4096 -f fit(a)0x280000.fit fit@0x280000 1. Is it needed at all? I think, it improves the way of signing, maybe there is some other opinions on this spot? 2. I hope, that `mkimage sign` can be replaced with python code instead of tools.Run. 3. And what things/cases should be covered in case of approval of such option? Tests? 4. Also this option may cover cases like for TI's K3 architectures, it may replace things like tools/k3_gen_x509_cert.sh with binman sign option. Also this patch refers on https://lists.denx.de/pipermail/u-boot/2021-November/468282.html with algo option for mkimage. Ivan Mikhaylov (1): binman: add sign option for binman tools/binman/cmdline.py | 13 +++++++++++++ tools/binman/control.py | 27 ++++++++++++++++++++++++++- 2 files changed, 39 insertions(+), 1 deletion(-) --

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[PATCH v4 0/2] Add support of the FXL6408 GPIO expander
by Oleksandr Suvorov 07 Feb '22

07 Feb '22

Add support of the Fairchild's FXL6408 i2c gpio expander and enable this driver for Toradex Colibri iMX8QXP SoM. Changes in v4: - fix misuse of MF_ID_x instead of FW_REV_x in fxl6408_probe(). - fix kernel doc formatting. - sort headers. - fix hex numbers style. - explicitly claim values of enum io_direction. - simplify fxl6408_get_function(). - make variable naming better in fxl6408_probe(). Changes in v3: - fix a warning: "drivers/gpio/gpio-fxl6408.c:348:15: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 3 has type ‘int’ [-Wformat=]" - add Tested-by record. Changes in v2: - Kconfig: add better description for the config option. - gpio-fxl6408.c: -- improve registers' naming. -- fix code style (comments, etc.). -- reimplement fxl6408_read() reducing number of parameters. -- change return value of fxl6408_is_output() to bool. -- replace IS_ERR_VALUE() macros with simple x < 0 where it's possible. -- fxl6408_set_direction(): fix type of parameter "dir". -- fix return error codes to avoid using the predefined in the driver model ones. -- removed extra debug code. -- expand TODO list. Oleksandr Suvorov (2): GPIO: fxl6408: Add support for FXL6408 GPIO expander colibri-imx8x: add on-module gpio expander fxl6408 arch/arm/dts/fsl-imx8qxp-colibri.dts | 27 ++ configs/colibri-imx8x_defconfig | 1 + drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-fxl6408.c | 380 +++++++++++++++++++++++++++ 5 files changed, 416 insertions(+) create mode 100644 drivers/gpio/gpio-fxl6408.c -- 2.33.1

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[PATCH v4] apalis/colibri_imx6: move setting bootcmd to defconfig
by Oleksandr Suvorov 07 Feb '22

07 Feb '22

Move setting the default boot command to the apalis/colibri_imx6_defconfig. It allows replacing the command without code modification. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov(a)foundries.io> Reviewed-by: Peng Fan <peng.fan(a)nxp.com> Reviewed-by: Igor Opaniuk <igor.opaniuk(a)foundries.io> Acked-by: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> --- Changes in v4: - add an acked-by record. Changes in v3: - fix Peng Fan's e-mail address. Changes in v2: - fix spaces after semicolon. - add reviewed-by records. configs/apalis_imx6_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + include/configs/apalis_imx6.h | 4 ---- include/configs/colibri_imx6.h | 4 ---- 4 files changed, 2 insertions(+), 8 deletions(-) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index a0e85ba23a4..f64b1ca4378 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -23,6 +23,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 +CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 47b1cfb1917..373d6476ddc 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -22,6 +22,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 +CONFIG_BOOTCOMMAND="run distro_bootcmd; usb start; setenv stdout serial,vidconsole; setenv stdin serial,usbkbd" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 12de0105c6c..ade479cb943 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -133,10 +133,6 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run distro_bootcmd ; " \ - "usb start ; " \ - "setenv stdout serial,vidconsole; " \ - "setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off vmalloc=400M\0" \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 804a144a03e..f91d6b49ea8 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -115,10 +115,6 @@ #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run distro_bootcmd; " \ - "usb start ; " \ - "setenv stdout serial,vidconsole; " \ - "setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ "console=ttymxc0\0" \ "defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \ -- 2.31.1

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[PATCH 00/20] i.MX8ULP misc update
by Peng Fan (OSS) 05 Feb '22

05 Feb '22

From: Peng Fan <peng.fan(a)nxp.com> This is to upstream NXP downstream i.MX8ULP patches including ADC/DRAM/LPAV/FUSE/ENET update/fix Alice Guo (3): imx8ulp: clock: Support to enable/disable the ADC1 clock imx8ulp: measure die temperature using PMC Temperature Sensor imx8ulp: implement to obtain the SoC current temperature Jacky Bai (1): imx8ulp:ddr: saving the dram config timing data into sram Peng Fan (1): imx8ulp: assign PXP/HIFI4/EPDC to APD domain Ye Li (15): imx8ulp: soc: Check the DBD_EN fuse before setting RDC arm: imx8ulp: Allocate LPAV resources to AP domain imx8ulp: clock: Support LPAV clocks in cgc and pcc imx8ulp: clock: Add MIPI DSI clock and DCNano clock imx8ulp: rdc: allow A35 access flexspi0 mem imx8ulp_evk: Control LPI2C0 PCA6416 and TPM0 for display imx8ulp: Set DCNANO read QoS on NIC_LPAV to highest imx8ulp: Fix DCNANO QoS setting imx8ulp: Remove freescale name from CPU revision imx8ulp: Workaround LPOSC_TRIM fuse load issue imx8ulp: clock: Reset DDR controller before clock enable imx8ulp: clock: Support to reset DCNano and MIPI DSI imx8ulp: Update ethernet mac to get from fuse imx8ulp: clock: Handle the DDRLOCKED when setting DDR clock imx8ulp: ddr: Fix DDR frequency request issue arch/arm/include/asm/arch-imx8ulp/cgc.h | 37 +- arch/arm/include/asm/arch-imx8ulp/clock.h | 4 + arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 63 +++- .../include/asm/arch-imx8ulp/imx8ulp-pins.h | 4 + arch/arm/include/asm/arch-imx8ulp/pcc.h | 70 +++- arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 2 + arch/arm/mach-imx/imx8ulp/cgc.c | 325 +++++++++++++++--- arch/arm/mach-imx/imx8ulp/clock.c | 156 ++++++++- arch/arm/mach-imx/imx8ulp/pcc.c | 158 ++++++++- arch/arm/mach-imx/imx8ulp/soc.c | 117 ++++++- board/freescale/imx8ulp_evk/imx8ulp_evk.c | 56 +++ board/freescale/imx8ulp_evk/spl.c | 9 + drivers/ddr/imx/imx8ulp/Kconfig | 7 + drivers/ddr/imx/imx8ulp/ddr_init.c | 55 ++- drivers/thermal/Kconfig | 7 + drivers/thermal/Makefile | 1 + drivers/thermal/imx_pmc_temperature.c | 174 ++++++++++ 17 files changed, 1148 insertions(+), 97 deletions(-) create mode 100644 drivers/thermal/imx_pmc_temperature.c -- 2.30.0

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[PATCH] ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board
by Marek Vasut 05 Feb '22

05 Feb '22

From: Christoph Niedermaier <cniedermaier(a)dh-electronics.com> The PDK2 board is capable of running both 100M and 1G ethernet. However, the i.MX6 has only one ethernet MAC, so it is possible to configure either 100M or 1G Ethernet. In case of 100M option, the PHY is on the SoM and the signals are routed to a RJ45 port. For 1G the PHY is on the PDK2 board with another RJ45 port. 100M and 1G ethernet use different signal pins from the i.MX6, but share the MDIO bus. This SoM board combination is used to demonstrate how to enable 1G ethernet configuration. Signed-off-by: Christoph Niedermaier <cniedermaier(a)dh-electronics.com> Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Christoph Niedermaier <cniedermaier(a)dh-electronics.com> Cc: Stefano Babic <sbabic(a)denx.de> --- NOTE: Adapted from Linux 298591bf725a ("ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board") --- arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi | 2 +- arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi | 50 +++++++++++++++++++-- include/configs/dh_imx6.h | 4 +- 3 files changed, 50 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi b/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi index 32128d4d2ab..a1ffb1d6fc5 100644 --- a/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi @@ -15,7 +15,7 @@ }; &fec { - phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; phy-reset-duration = <1>; phy-reset-post-delay = <10>; diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi index af4719aaeba..d8772a98966 100644 --- a/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi +++ b/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi @@ -38,6 +38,45 @@ status = "okay"; }; +/* 1G ethernet */ +/delete-node/ &ethphy0; +&fec { + phy-mode = "rgmii"; + phy-handle = <&ethphy7>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet_1G>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy7: ethernet-phy@7 { /* KSZ 9021 */ + compatible = "ethernet-phy-ieee802.3-c22"; + interrupt-parent = <&gpio1>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&pinctrl_ethphy7>; + pinctrl-names = "default"; + reg = <7>; + reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + rxc-skew-ps = <3000>; + rxd0-skew-ps = <0>; + rxd1-skew-ps = <0>; + rxd2-skew-ps = <0>; + rxd3-skew-ps = <0>; + txc-skew-ps = <3000>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; + rxdv-skew-ps = <0>; + txen-skew-ps = <0>; + }; + }; +}; + &hdmi { ddc-i2c-bus = <&i2c2>; status = "okay"; @@ -113,9 +152,14 @@ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b0 - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x000b1 - MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x000b1 + >; + }; + + pinctrl_ethphy7: ethphy7-grp { + fsl,pins = < + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */ + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */ + MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */ >; }; diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 8183e7debd4..3cf0578b5e1 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -32,9 +32,9 @@ /* FEC ethernet */ #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_FEC_MXC_PHYADDR 7 #define CONFIG_ARP_TIMEOUT 200UL /* MMC Configs */ -- 2.33.0

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[PATCH v1 0/2] board: toradex: improve env badblock management for NAND variant boards
by Francesco Dolcini 05 Feb '22

05 Feb '22

Use the complete 512kb (4 blocks) nand partition reserved for u-boot environment instead of just the first block, this allows the module to have a working environment even if 3 blocks are bad. Francesco Dolcini (2): colibri-imx6ull: improve env badblock management colibri-imx7: improve env badblock management include/configs/colibri-imx6ull.h | 5 +++++ include/configs/colibri_imx7.h | 5 +++++ 2 files changed, 10 insertions(+) -- 2.25.1

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[PATCH 0/1] imx8mm-cl-iot-gate-optee: add CONFIG_SPL_MMC and CONFIG_SPL_SERIAL
by Ying-Chun Liu 05 Feb '22

05 Feb '22

From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org> Previously these two options are called CONFIG_SPL_MMC_SUPPORT and CONFIG_SPL_SERIAL_SUPPORT. During the transition they are removed by accident. Thus adding them back. This patch is a re-work of previously posted on mailing list. [PATCH] imx8mm-cl-iot-gate-optee: remove _SUPPORT from CONFIG_SPL_{MMC, SERIAL} Ying-Chun Liu (PaulLiu) (1): imx8mm-cl-iot-gate-optee: add CONFIG_SPL_MMC and CONFIG_SPL_SERIAL configs/imx8mm-cl-iot-gate-optee_defconfig | 2 ++ 1 file changed, 2 insertions(+) -- 2.33.0

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