November 2021 - U-Boot

[PATCH] doc: rockchip: puma: update build and flash instructions
by Quentin Schulz 23 Dec '21

23 Dec '21

Long gone is the time a custom TF-A was needed for Puma, upstream TF-A works just fine now. The flashing instructions are updated to match how newer rkdeveloptool and rkbin work. Finally, rkbin provides a way to flash SPI via USB OTG interface so let's document that. Cc: Quentin Schulz <foss+u-boot(a)0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz(a)theobroma-systems.com> --- board/theobroma-systems/puma_rk3399/README | 66 ++++++++++------------ doc/README.rockchip | 27 +++------ 2 files changed, 38 insertions(+), 55 deletions(-) diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README index 9b31b0b379..254c3bbe96 100644 --- a/board/theobroma-systems/puma_rk3399/README +++ b/board/theobroma-systems/puma_rk3399/README @@ -26,25 +26,17 @@ RK3399-Q7 features: Here is the step-by-step to boot to U-Boot on rk3399. -Get the Source and build ATF/Cortex-M0 binaries -=============================================== +Get the Source and build ATF binary +=================================== - > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git - > git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git + > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git Compile the ATF =============== - > cd arm-trusted-firmware + > cd trusted-firmware-a > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 - > cp build/rk3399/release/bl31.bin ../u-boot/bl31-rk3399.bin - -Compile the M0 firmware -======================= - - > cd ../rk3399-cortex-m0 - > make CROSS_COMPILE=arm-cortex_m0-eabi- - > cp rk3399m0.bin ../u-boot + > cp build/rk3399/release/bl31/bl31.elf ../u-boot/bl31.elf Compile the U-Boot ================== @@ -55,23 +47,22 @@ Compile the U-Boot Package the image ================= -Creating a SPL image for SD-Card/eMMC - > tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl.bin spl_mmc.img -Creating a SPL image for SPI-NOR - > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin spl_nor.img -Create the FIT image containing U-Boot proper, ATF, M0 Firmware, devicetree - > make CROSS_COMPILE=aarch64-linux-gnu- +The SPL image for SD-Card/eMMC is readily available in idbloader.img at the +root of U-Boot after compilation. + +Creating an SPL image for SPI-NOR: + > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin idbloader-spi.img Flash the image =============== Copy the SPL to offset 32k for SD/eMMC, offset 0 for NOR-Flash and the FIT -image to offset 256k card. +image to offset 256k. SD-Card ------- - > dd if=spl_mmc.img of=/dev/sdb seek=64 + > dd if=idbloader.img of=/dev/sdb seek=64 > dd if=u-boot.itb of=/dev/sdb seek=512 eMMC @@ -84,24 +75,27 @@ help of the Rockchip loader binary. > cd rkdeveloptool > autoreconf -i && ./configure && make > git clone https://github.com/rockchip-linux/rkbin.git - > ./rkdeveloptool db rkbin/rk33/rk3399_loader_v1.08.106.bin - > ./rkdeveloptool wl 64 ../spl_mmc.img + > cd rkbin + > ./tools/boot_merger RKBOOT/RK3399MINIALL.ini + > cd .. + > ./rkdeveloptool db rkbin/rk3399_loader_v1.25.126.bin + > ./rkdeveloptool wl 64 ../idbloader.img > ./rkdeveloptool wl 512 ../u-boot.itb NOR-Flash --------- -Writing the SPI NOR Flash requires a running U-Boot. For the sake of simplicity -we assume you have a SD-Card with a partition containing the required files -ready. - - > load mmc 1:1 ${kernel_addr_r} spl_nor.img - > sf probe - > sf erase 0 +$filesize - > sf write $kernel_addr_r 0 ${filesize} - > load mmc 1:1 ${kernel_addr_r} u-boot.itb - > sf erase 0x40000 +$filesize - > sf write $kernel_addr_r 0x40000 ${filesize} - +rkdeveloptool allows to flash the on-board SPI via the USB OTG interface with +help of the Rockchip loader binary. -Reboot the system and you should see a U-Boot console on UART0 (115200n8). + > git clone https://github.com/rockchip-linux/rkdeveloptool + > cd rkdeveloptool + > autoreconf -i && ./configure && make + > git clone https://github.com/rockchip-linux/rkbin.git + > cd rkbin + > ./tools/boot_merger RKBOOT/RK3399MINIALL_SPINOR.ini + > cd .. + > ./rkdeveloptool db rkbin/rk3399_loader_spinor_v1.25.114.bin + > ./rkdeveloptool ef + > ./rkdeveloptool wl 0 ../idbloader-spi.img + > ./rkdeveloptool wl 512 ../u-boot.itb diff --git a/doc/README.rockchip b/doc/README.rockchip index 154166ec78..52b5140eca 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -81,30 +81,19 @@ Building - Compile ATF - For Puma board. + => git clone https://github.com/ARM-software/arm-trusted-firmware.git + => cd arm-trusted-firmware - => git clone git://git.theobroma-systems.com/arm-trusted-firmware.git - => cd arm-trusted-firmware - => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 + (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-) + => make realclean + => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 - (export bl31.bin) - => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.bin - - For rest of rk3399 boards. - - => git clone https://github.com/ARM-software/arm-trusted-firmware.git - => cd arm-trusted-firmware - - (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-) - => make realclean - => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 - - (export bl31.elf) - => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf + (export bl31.elf) + => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf - Compile PMU M0 firmware - This is optional for most of the rk3399 boards and required only for Puma board. + This is optional for most of the rk3399 boards. => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git => cd rk3399-cortex-m0 -- 2.33.1

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[PATCH 1/2] fsl-layerscape: add dtb overlay feature
by Sahil Malhotra 23 Dec '21

23 Dec '21

From: Sahil Malhotra <sahil.malhotra(a)nxp.com> This patch enables the DTB overlay feature for LS platforms. Signed-off-by: Sahil Malhotra <sahil.malhotra(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 1 + arch/arm/cpu/armv8/fsl-layerscape/dt_optee.c | 39 +++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/dt_optee.h | 10 +++++ arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 12 ++++++ .../cpu/armv8/fsl-layerscape/lowlevel_init.S | 25 ++++++++++++ 5 files changed, 87 insertions(+) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/dt_optee.c create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/dt_optee.h create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/lowlevel_init.S diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index 598c36ee66..97f1f291dd 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -7,6 +7,7 @@ obj-y += lowlevel.o obj-y += soc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_MP) += mp.o spintable.o +obj-$(CONFIG_OF_LIBFDT_OVERLAY) += lowlevel_init.o dt_optee.o obj-$(CONFIG_OF_LIBFDT) += fdt.o endif obj-$(CONFIG_SPL) += spl.o diff --git a/arch/arm/cpu/armv8/fsl-layerscape/dt_optee.c b/arch/arm/cpu/armv8/fsl-layerscape/dt_optee.c new file mode 100644 index 0000000000..2418ad09c7 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/dt_optee.c @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + */ +#include <common.h> +#include <errno.h> +#include <fdt_support.h> +#include <linux/sizes.h> +#include "dt_optee.h" + +int ft_add_optee_overlay(void *fdt, struct bd_info *bd) +{ + int ret = 0; + + /* + * No BL32_BASE passed means no TEE running, so no + * need to add optee node in dts + */ + if (!rom_pointer[0]) { + debug("No BL32_BASE passed means no TEE running\n"); + return ret; + } + + if (rom_pointer[2]) { + debug("OP-TEE: applying overlay on 0x%lx\n", rom_pointer[2]); + ret = fdt_check_header((void *)rom_pointer[2]); + if (ret == 0) { + /* Copy the fdt overlay to next 1M and use copied overlay */ + memcpy((void *)(rom_pointer[2] + SZ_1M), (void *)rom_pointer[2], + fdt_totalsize((void *)rom_pointer[2])); + ret = fdt_overlay_apply_verbose(fdt, (void *)(rom_pointer[2] + SZ_1M)); + if (ret == 0) { + debug("Overlay applied with success"); + fdt_pack(fdt); + } + } + } + return ret; +} diff --git a/arch/arm/cpu/armv8/fsl-layerscape/dt_optee.h b/arch/arm/cpu/armv8/fsl-layerscape/dt_optee.h new file mode 100644 index 0000000000..d1ff25d531 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/dt_optee.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 NXP + */ +#ifndef __DT_OPTEE_H__ +#define __DT_OPTEE_H__ + +extern unsigned long rom_pointer[]; +int ft_add_optee_overlay(void *fdt, struct bd_info *bd); +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index f1624ff30a..0824c62264 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -31,6 +31,7 @@ #endif #include <asm/arch/speed.h> #include <fsl_qbman.h> +#include "dt_optee.h" int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { @@ -698,3 +699,14 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) fdt_fixup_ecam(blob); #endif } + +#ifdef CONFIG_OF_SYSTEM_SETUP +int ft_system_setup(void *blob, struct bd_info *bd) +{ +#ifdef CONFIG_OF_LIBFDT_OVERLAY + return ft_add_optee_overlay(blob, bd); +#else + return 0; +#endif +} +#endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel_init.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel_init.S new file mode 100644 index 0000000000..1d6a2d85fa --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel_init.S @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2021 NXP + */ + +#include <config.h> + +.align 8 +.global rom_pointer +rom_pointer: + .space 32 + +/* + * Routine: save_boot_params (called after reset from start.S) + */ + +.global save_boot_params +save_boot_params: + /* The firmware provided FDT address can be found in r2/x0 */ + adr x0, rom_pointer + stp x1, x2, [x0], #16 + stp x3, x4, [x0], #16 + + ldr x1, =save_boot_params_ret + br x1 -- 2.17.1

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[PATCH u-boot-marvell 00/10] PCI mvebu and aardvark changes
by Marek Behún 21 Dec '21

21 Dec '21

From: Marek Behún <marek.behun(a)nic.cz> Hello Stefan, we have some more fixes for PCI (mvebu and aardvark), and one patch for Turris MOX board code. Marek Marek Behún (2): pci: pci_mvebu, pci_aardvark: Fix size of configuration cache arm: mvebu: turris_mox: Remove extra newline after module topology Pali Rohár (8): pci: pci_mvebu: Wait 100ms for Link Up in mvebu_pcie_probe() arm: mvebu: a38x: serdes: Move non-serdes PCIe code to pci_mvebu.c pci: pci_mvebu: Move setup for BAR[0] where other BARs are setup pci: pci_mvebu: Replace MBUS_PCI_*_SIZE by resource_size() pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge pci: pci_mvebu: Fix PCIe MEM and IO resources assignment and mbus mapping pci: pci_mvebu: Remove unused DECLARE_GLOBAL_DATA_PTR arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge arch/arm/mach-mvebu/include/mach/cpu.h | 4 +- arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h | 4 - .../serdes/a38x/high_speed_env_spec.c | 15 -- board/CZ.NIC/turris_mox/turris_mox.c | 3 - drivers/pci/pci-aardvark.c | 54 +++-- drivers/pci/pci_mvebu.c | 205 ++++++++++++------ 6 files changed, 175 insertions(+), 110 deletions(-) -- 2.32.0

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[PATCH] i2c: mvtwsi: Swab the register address if its size is > 1
by Stefan Roese 20 Dec '21

20 Dec '21

Testing on Armada XP with an EEPROM using register address with size of 2 has shown, that the register address bytes are sent to the I2C EEPROM in the incorrect order. This patch swabs the address bytes so that the correct address is transferred to the I2C device. BTW: This worked without any issues before migrating Armada XP to DM I2C. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Samuel Holland <samuel(a)sholland.org> Cc: Baruch Siach <baruch(a)tkos.co.il> Cc: Pali Rohár <pali(a)kernel.org> Cc: Marek Behún <marek.behun(a)nic.cz> --- It would be good if other users of this I2C driver could test this change with e.g. I2C EEPROM devices using 2 bytes (or more) for addressing. drivers/i2c/mvtwsi.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c index 236bfb8d8e7f..ff21e3c52b58 100644 --- a/drivers/i2c/mvtwsi.c +++ b/drivers/i2c/mvtwsi.c @@ -860,6 +860,9 @@ static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) { struct mvtwsi_i2c_dev *dev = dev_get_priv(bus); struct i2c_msg *dmsg, *omsg, dummy; + u8 *addr_buf_ptr; + u8 addr_buf[4]; + int i; memset(&dummy, 0, sizeof(struct i2c_msg)); @@ -873,12 +876,17 @@ static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs) omsg = nmsgs == 1 ? &dummy : msg; dmsg = nmsgs == 1 ? msg : msg + 1; + /* We need to swap the register address if its size is > 1 */ + addr_buf_ptr = &addr_buf[0]; + for (i = omsg->len; i > 0; i--) + *addr_buf_ptr++ = omsg->buf[i - 1]; + if (dmsg->flags & I2C_M_RD) - return __twsi_i2c_read(dev->base, dmsg->addr, omsg->buf, + return __twsi_i2c_read(dev->base, dmsg->addr, addr_buf, omsg->len, dmsg->buf, dmsg->len, dev->tick); else - return __twsi_i2c_write(dev->base, dmsg->addr, omsg->buf, + return __twsi_i2c_write(dev->base, dmsg->addr, addr_buf, omsg->len, dmsg->buf, dmsg->len, dev->tick); } -- 2.34.0

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[PATCH 1/3] bootstage: Update SPL support Kconfig description
by Marek Vasut 20 Dec '21

20 Dec '21

Add "in SPL" suffix to the Kconfig description, to make it differ from the "proper" U-Boot entry. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> --- common/Kconfig.boot | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/Kconfig.boot b/common/Kconfig.boot index a8d4be23a97..d3a12be2281 100644 --- a/common/Kconfig.boot +++ b/common/Kconfig.boot @@ -704,7 +704,7 @@ config SHOW_BOOT_PROGRESS 151 common/cmd_nand.c FIT image format OK config SPL_SHOW_BOOT_PROGRESS - bool "Show boot progress in a board-specific manner" + bool "Show boot progress in a board-specific manner in SPL" depends on SPL help Defining this option allows to add some board-specific code (calling -- 2.33.0

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[PATCH u-boot-marvell RESEND 00/11] Some mvebu comphy + mox + fdt_support changes
by Marek Behún 18 Dec '21

18 Dec '21

From: Marek Behún <marek.behun(a)nic.cz> Hello Stefan, as requested I am resending this series with board maintainers added in Ccs. Original message: Pali prepared patches that convert A3720 comphy driver to use Linux' DT bindings. (Yes, I have patches that convert the whole driver into using SMC calls into ATF, but haven't found time yet to rebase them since last year, and Pali has done this in the meantime :-D Maybe I'll look into my old patches sometimes, but this is now usable.) These patches needed some changes in Turris MOX board code, and I added some more changes to handling device-tree fixups, and this lead to adding some code into fdt_support, which can hopefully be used by other people as well. Marek Marek Behún (8): treewide: Use fdt_create_phandle() where appropriate fdt_support: Remove fdt_alloc_phandle() in favor of fdt_generate_phandle() fdt_support: Remove FDT_STATUS_FAIL_ERROR_CODE fdt_support: Fix comment for fdt_create_phandle() fdt_support: Add some useful functions arm: mvebu: turris_mox: Find DT nodes by compatible or alias instead of path arm: mvebu: turris_mox: Fix unstable board topology reading fdt_support: Add fdt_delete_disabled_nodes() and use in Turris MOX Pali Rohár (3): include/linux/byteorder: Fix compilation of __constant_cpu_to_be32() arm: mvebu: turris_mox: Enable eth1 in U-Boot if a network module is present phy: marvell: a3700: Convert to official DT bindings in COMPHY driver arch/arm/cpu/armv7/ls102xa/fdt.c | 6 +- arch/arm/dts/armada-3720-espressobin.dts | 21 +-- arch/arm/dts/armada-3720-turris-mox.dts | 25 +-- arch/arm/dts/armada-3720-uDPU.dts | 23 +-- arch/arm/dts/armada-37xx.dtsi | 20 +- board/CZ.NIC/turris_mox/turris_mox.c | 223 ++++++++--------------- board/Marvell/octeon_ebb7304/board.c | 5 +- board/freescale/lx2160a/eth_lx2160aqds.c | 8 +- board/freescale/lx2160a/eth_lx2162aqds.c | 8 +- board/gateworks/gw_ventana/common.c | 3 +- board/kontron/sl28/sl28.c | 2 +- common/fdt_support.c | 174 +++++++++++++++--- drivers/misc/fsl_portals.c | 10 +- drivers/pci/pcie_layerscape_fixup.c | 8 +- drivers/pci/pcie_layerscape_gen4_fixup.c | 8 +- drivers/phy/marvell/comphy_a3700.c | 133 ++++++++++++++ drivers/phy/marvell/comphy_core.c | 59 +----- drivers/phy/marvell/comphy_core.h | 23 +++ drivers/phy/marvell/comphy_cp110.c | 58 ++++++ include/fdt_support.h | 51 ++++-- include/linux/byteorder/swab.h | 4 + 21 files changed, 551 insertions(+), 321 deletions(-) -- 2.32.0

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[PATCH 1/9] arm: mvebu: theadorable_debug_defconfig: Enable DM_I2C
by Stefan Roese 18 Dec '21

18 Dec '21

Move to the DM I2C version, so that this board will not get dropped from mainline. Signed-off-by: Stefan Roese <sr(a)denx.de> --- configs/theadorable_debug_defconfig | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 556c91fe3ed0..cfa1bac707c9 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -58,10 +58,8 @@ CONFIG_SATA_MV=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_FPGA_ALTERA=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y -CONFIG_SYS_I2C_SLAVE=0x0 # CONFIG_MMC is not set CONFIG_SF_DEFAULT_SPEED=27777777 CONFIG_SPI_FLASH_MACRONIX=y -- 2.34.0

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Re: Broken arc toolchain
by Alexey Brodkin 18 Dec '21

18 Dec '21

Hi Tom and Simon, So there're a couple of things involved indeed. 1. As Tom correctly mentioned we used to use SNSP pre-built tools for ARC in TravisCI previously. And frankly the reason was we needed something GCC 8.x based while on some other arches such a new GCC triggered extra problems, see https://lists.denx.de/pipermail/u-boot/2018-May/329577.html. So I updated ARC pre-built versions and we kept using it. 2. Now, that particular "mcpu" was never added into upstream GCC because we wanted to re-implement it a bit nicer, thus any up-to-date vanilla GCC won't accept it as opposed to tools built from SNPS' GCC port [which has it https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/commit/84a3ee38…]. 3. IIRC "-mcpu=hs4x_rel31" is basically an umbrella option for some options combination based on generic "-mcpu=hs4x" so we may probably update HSDK-4xD flags to be buildable by vanialla GGC. But anyways the simples short-term solution is to use our pre-built tools, latest of which are avaialble here https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/…. And for U-Boot elf32 version is what I would suggest to use, so please use https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/…. Moreover since by default for ARC we use U-Boot built-in libgcc the same one little-endian toolchain might be safely used for building our big-endian configs equally well. If more info or actions needed, please let me know. -Alexey ________________________________ From: Tom Rini Sent: Saturday, July 10, 2021 11:22 PM To: Simon Glass Cc: U-Boot Mailing List; Alexey Brodkin; Eugeniy Paltsev Subject: Re: Broken arc toolchain On Sat, Jul 10, 2021 at 02:11:30PM -0600, Simon Glass wrote: > Hi, > > I see this: > > $ buildman --fetch-arch arc > > Downloading toolchain for arch 'arc' > Checking: https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/9.2.0/ > Downloading: https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/9.2.0/x86_64-gc… > Unpacking to: /home/sglass/.buildman-toolchains > Testing > - looking in > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/.' > - looking in > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/bin' > - found > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/bin/arc-linux-gcc' > - looking in > '/home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/usr/bin' > Tool chain test: OK, arch='arc', priority 5 > > $ buildman -A hsdk_4xd > /home/sglass/.buildman-toolchains/gcc-9.2.0-nolibc/arc-linux/bin/arc-linux- > $ buildman hsdk_4xd > ... > arc-linux-gcc: error: unrecognized argument in option '-mcpu=hs4x_rel31 > > > Do you have any thoughts on what is wrong, please? There's two parts. The first part is I keep forgetting to update buildman to fetch the latest toolchains from kernel.org, it should be grabbing 11.1.0 now, not 9.2.0. The second part is that arc, nds32 and xtensa have non-standard toolchain locations, see tools/docker/Dockerfile for where to fetch. -- Tom

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[PATCH v5 00/29] image: Reduce #ifdefs and ad-hoc defines in image code (Part B)
by Simon Glass 17 Dec '21

17 Dec '21

Much of the image-handling code predates the introduction of Kconfig and has quite a few #ifdefs in it. It also uses its own IMAGE_... defines to help reduce the #ifdefs, which is unnecessary now that we can use IS_ENABLED() et al. The image code is also where quite a bit of code is shared with the host tools. At present this uses a lot of checks of USE_HOSTCC. This series introduces more 'tools' Kconfig options and a way to use CONFIG_IS_ENABLED() to check them. This works in a similar way to SPL, so CONFIG_IS_ENABLED(FIT) will evaluate to true on the host build (USE_HOSTCC) if CONFIG_TOOLS_FIT is enabled. This allows quite a bit of clean-up of the image.h header file and many of the image C files. The 'tools' Kconfig options should help to solve a more general problem in that we mostly want the host tools to build with all features enabled, no matter which features the 'target' build actually uses. This is a pain to arrange at present, but with 'host' Kconfigs, we can just define them all to y. There are cases where the host tools do not have features which are present on the target, for example environment and physical addressing. To help with this, some of the core image code is split out into image-board.c and image-host.c files. Even with these changes, some #ifdefs remain (down from about 100 to about 40 in common/image*). But the code is somewhat easier to follow and there are fewer build paths. Note: The original version of this series met with resistance and resulted in another series that went in first. That did make some improvements but the fundamental problem of sharing code with tools remains. It seems like a good time to get this one in, before further refactoring happens. It was a significant effort to rebase this series on -next and I hope not to do it again. This series is available at u-boot-dm/host-working Changes in v5: - Add a new patch to rename host_build() to tools_build() - Add new patch to bring back SPL_ versions of SHA - Avoid preprocessor in a few more places - Drop I_WANT_MD5 - Drop changes to tools/Makefile since they already use TOOLS_ Kconfigs - Drop rd_load since it is not used - Fix up tools/Makefile to have the correct condition - Rebase to next - Update commit message - Update commit message to indicate that the code is in a separate file - Use TOOLS_ instead of HOST_ Changes in v2: - Add SPL_ Kconfigs also, since otherwise hashing algorithms drop from SPL - All patches rebased to -next - Consider selecting a raw FDT to be success - Correct comment about USE_HOSTCC being undefined in CONFIG_VAL() - Correct logic for the non-FIT case - Drop unnecessary setting of rd_len, etc. - Fix up comment to put an underscore after every CONFIG Simon Glass (29): compiler: Rename host_build() to tools_build() kconfig: Add tools support to CONFIG_IS_ENABLED() image: Add Kconfig options for FIT in the tools build spl: cypto: Bring back SPL_ versions of SHA hash: Use Kconfig to enable hashing in host tools and SPL hash: Drop some #ifdefs in hash.c image: Drop IMAGE_ENABLE_FIT image: Drop IMAGE_ENABLE_OF_LIBFDT image: Use Kconfig to enable CONFIG_FIT_VERBOSE on host image: Use Kconfig to enable FIT_RSASSA_PSS on host image: Use the correct checks for CRC32 image: Drop IMAGE_BOOT_GET_CMDLINE image: Drop IMAGE_OF_BOARD_SETUP image: Drop IMAGE_OF_SYSTEM_SETUP image: Drop IMAGE_ENABLE_IGNORE efi: Correct dependency on FIT_SIGNATURE image: Drop IMAGE_ENABLE_SIGN/VERIFY defines image: Drop IMAGE_ENABLE_EN/DECRYPT defines image: Tidy up fit_unsupported_reset() image: Drop unnecessary #ifdefs from image.h image: Drop #ifdefs for fit_print_contents() image: Drop most #ifdefs in image-board.c image: Reduce variable scope in boot_get_ramdisk() image: Split up boot_get_ramdisk() image: Remove #ifdefs from select_ramdisk() image: Remove some #ifdefs from image-fit and image-fit-sig image: Reduce variable scope in boot_get_fdt() image: Split up boot_get_fdt() image: Remove #ifdefs from select_fdt() arch/arc/lib/bootm.c | 2 +- arch/arm/lib/bootm.c | 4 +- arch/arm/mach-imx/hab.c | 2 +- arch/microblaze/lib/bootm.c | 2 +- arch/nds32/lib/bootm.c | 4 +- arch/riscv/lib/bootm.c | 4 +- board/synopsys/hsdk/hsdk.c | 2 +- common/Kconfig.boot | 10 + common/bootm.c | 14 +- common/bootm_os.c | 8 + common/hash.c | 108 +++++----- common/image-board.c | 359 +++++++++++++++++---------------- common/image-cipher.c | 6 +- common/image-fdt.c | 275 +++++++++++++------------ common/image-fit-sig.c | 7 +- common/image-fit.c | 36 ++-- common/image.c | 14 +- common/spl/Kconfig | 13 +- include/compiler.h | 5 +- include/fdt_support.h | 2 +- include/image.h | 127 ++---------- include/linux/kconfig.h | 13 +- include/u-boot/aes.h | 8 +- include/u-boot/hash-checksum.h | 5 +- include/u-boot/rsa.h | 2 - lib/Kconfig | 66 +++++- lib/Makefile | 4 +- lib/efi_loader/Kconfig | 2 +- lib/hash-checksum.c | 2 +- lib/lmb.c | 2 +- lib/rsa/rsa-sign.c | 5 +- lib/rsa/rsa-verify.c | 16 +- tools/Kconfig | 92 +++++++++ tools/Makefile | 2 +- tools/image-host.c | 6 +- 35 files changed, 675 insertions(+), 554 deletions(-) -- 2.33.0.685.g46640cef36-goog

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[PATCH v2 0/4] mtd: spi-nor: Fix software reset; add mx66lm1g45g
by Tudor Ambarus 17 Dec '21

17 Dec '21

Add support for mx66lm1g45g: - Introduce SPI_NOR_SOFT_RESET flash_info flag -> the flash does not define the SFDP tables and can't determine its reset sequence on its own. - Fix the opcode extension for the software reset sequence -> it was hardcoded. Changes in v2: revert soft reset on boot. Tudor Ambarus (4): mtd: spi-nor-core: Introduce SPI_NOR_SOFT_RESET flash_info flag mtd: spi-nor-core: macronix: Add support for mx66lm1g45g Revert "mtd: spi-nor-core: Perform a Soft Reset on boot" mtd: spi-nor-core: Fix the opcode extension for the software reset sequence drivers/mtd/spi/Kconfig | 17 +++-- drivers/mtd/spi/sf_internal.h | 5 ++ drivers/mtd/spi/spi-nor-core.c | 116 +++++++++++++++++++++++---------- drivers/mtd/spi/spi-nor-ids.c | 6 ++ include/linux/mtd/spi-nor.h | 8 +++ 5 files changed, 107 insertions(+), 45 deletions(-) -- 2.25.1

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