November 2021 - U-Boot

[PATCH] drivers: spi-nor: Add JEDEC id for W25Q16JV
by Angus Ainslie 13 Jan '22

13 Jan '22

Add a JEDEC id for the Winbond W25Q16JV 16M-BIT serial flash memory with DUAL/QUAD SPI Signed-off-by: Angus Ainslie <angus(a)akkea.ca> --- drivers/mtd/spi/spi-nor-ids.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 3ae7bb1ed7e..f20b21e0d06 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -314,6 +314,11 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q16jv", 0xef7015, 0, 64 * 1024, 32, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q32jv", 0xef7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | -- 2.25.1

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[PATCH 00/31] passage: Define a standard for firmware data flow
by Simon Glass 13 Jan '22

13 Jan '22

This series adds a standard way of passing information between different firmware phases. This already exists in U-Boot at a very basic level, in the form of a bloblist containing an spl_handoff structure, but the intent here is to define something useful across projects. The need for this is growing as firmware fragments into multiple binaries each with its own purpose. Without any run-time connection, we must rely on build-time settings which are brittle and painful to keep in sync. This feature is named 'standard passage' since the name is more unique than many others that could be chosen, it is a passage in the sense that information is flowing from one place to another and it is standard, because that is what we want to create. The implementation is simply a pointer to a bloblist in a register, with an extra register to point to a devicetree, for more complex data, if one is present in the bloblist. This should cover all cases (small memory footprint as well as complex data flow) and be easy enough to implement on all architectures. The core bloblist code is relicensed to BSD-3-Clause in case it is useful in non-GPL projects but there is no requirement to use the same code. This series includes tweaks to the bloblist implementation in U-Boot to make it more suitable for the task, including: - Allocate tags explicitly in the enum - Put the magic number first - Define a process for adding tags The emphasis is on enabling open communcation between binaries, not enabling passage of secret, undocumented data, although this is possible in a private environment. This series is built on the OF_BOARD series It is available at u-boot-dm/pass-working or: https://source.denx.de/u-boot/custodians/u-boot-dm/-/commit/073b5c156f222c6… Simon Glass (31): Makefile: Correct TPL rule for OF_REAL kconfig: Add support for conditional values dm: core: Allow getting some basic stats stddef: Avoid warning with clang with offsetof() fdt: Drop SPL_BUILD macro bloblist: Put the magic number first bloblist: Rename the SPL tag bloblist: Drop unused tags bloblist: Use explicit numbering for the tags bloblist: Support allocating the bloblist bloblist: Use LOG_CATEGORY to simply logging bloblist: Use 'phase' consistently for bloblists bloblist: Refactor Kconfig to support alloc or fixed arm: qemu: Add an SPL build bloblist: Add functions to obtain base address and size passage: Support an incoming passage passage: Support a control devicetree passage: arm: Accept a passage from the previous phase passage: spl: Support adding the dtb to the passage bloblist passage: spl: Support passing the passage to U-Boot passage: Record where the devicetree came from passage: Report the devicetree source passage: Add a qemu test for ARM bloblist: doc: Bring in the API documentation bloblist: Relicense to allow BSD-3-Clause sandbox: Add a way of checking structs for standard passage passage: Add documentation passage: Add docs for spl_handoff x86: Move Intel GNVS file into the common include directory passage: Add checks for pre-existing blobs WIP: RFC: Add a gitlab test .gitlab-ci.yml | 6 + MAINTAINERS | 10 + Makefile | 2 +- arch/arm/cpu/armv7/start.S | 7 +- arch/arm/dts/qemu-arm-u-boot.dtsi | 22 ++ arch/arm/lib/crt0.S | 4 + arch/arm/mach-qemu/Kconfig | 9 + arch/sandbox/cpu/spl.c | 2 +- arch/x86/cpu/apollolake/acpi.c | 2 +- arch/x86/cpu/broadwell/cpu_from_spl.c | 4 +- arch/x86/cpu/intel_common/acpi.c | 2 +- .../include/asm/arch-apollolake/global_nvs.h | 2 +- arch/x86/lib/spl.c | 2 +- arch/x86/lib/tpl.c | 2 +- board/emulation/qemu-arm/Kconfig | 23 +- board/emulation/qemu-arm/MAINTAINERS | 1 + board/emulation/qemu-arm/Makefile | 1 + board/emulation/qemu-arm/spl.c | 27 ++ board/google/chromebook_coral/coral.c | 2 +- board/sandbox/Makefile | 3 +- board/sandbox/stdpass_check.c | 107 ++++++ cmd/bdinfo.c | 2 + common/Kconfig | 161 ++++++++- common/bloblist.c | 124 +++++-- common/board_f.c | 48 ++- common/board_r.c | 18 + common/spl/spl.c | 74 +++- configs/qemu_arm_spl_defconfig | 78 +++++ doc/board/emulation/qemu-arm.rst | 38 +++ doc/develop/bloblist.rst | 28 +- doc/develop/index.rst | 1 + doc/develop/std_passage.rst | 319 ++++++++++++++++++ drivers/core/device.c | 11 + drivers/core/root.c | 7 + drivers/core/uclass.c | 13 + drivers/serial/serial-uclass.c | 3 +- dts/Kconfig | 12 + include/asm-generic/global_data.h | 35 ++ include/bloblist.h | 175 +++++++--- include/dm/device.h | 11 +- include/dm/root.h | 8 + include/dm/uclass-internal.h | 7 + include/fdtdec.h | 40 ++- include/handoff.h | 8 +- .../x86/include/asm => include}/intel_gnvs.h | 0 include/linux/kconfig.h | 18 + include/linux/stddef.h | 8 +- include/spl.h | 15 + include/stdpass/README | 4 + include/stdpass/tpm2_eventlog.h | 42 +++ include/stdpass/vboot_ctx.h | 267 +++++++++++++++ lib/asm-offsets.c | 5 + lib/fdtdec.c | 65 +++- scripts/config_whitelist.txt | 1 + test/bloblist.c | 21 +- test/dm/core.c | 41 +++ test/py/tests/test_passage.py | 11 + 57 files changed, 1798 insertions(+), 161 deletions(-) create mode 100644 arch/arm/dts/qemu-arm-u-boot.dtsi create mode 100644 board/emulation/qemu-arm/spl.c create mode 100644 board/sandbox/stdpass_check.c create mode 100644 configs/qemu_arm_spl_defconfig create mode 100644 doc/develop/std_passage.rst rename {arch/x86/include/asm => include}/intel_gnvs.h (100%) create mode 100644 include/stdpass/README create mode 100644 include/stdpass/tpm2_eventlog.h create mode 100644 include/stdpass/vboot_ctx.h create mode 100644 test/py/tests/test_passage.py -- 2.33.1.1089.g2158813163f-goog

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[PATCH] LynxOS is no longer supported
by Thomas Huth 13 Jan '22

13 Jan '22

LynxOS needed the do_bootm_lynxkdi() function that got removed in 7e713067ee ("Remove LYNX KDI remainders") - and that function needed a lynxkdi_boot() function, where the last implementation had been removed in 98f705c9ce ("powerpc: remove 4xx support") already. Looks like this OS is definitely not supported anymore, so remove it from the corresponding lists. Signed-off-by: Thomas Huth <thuth(a)redhat.com> --- README | 3 +-- boot/image.c | 3 --- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/README b/README index 9606a8b3ac..064e781d45 100644 --- a/README +++ b/README @@ -3359,8 +3359,7 @@ details; basically, the header defines the following image properties: * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD, 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks, LynxOS, pSOS, QNX, RTEMS, INTEGRITY; - Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS, - INTEGRITY). + Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY). * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86, IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC). diff --git a/boot/image.c b/boot/image.c index 992e72991d..6ab827b2d4 100644 --- a/boot/image.c +++ b/boot/image.c @@ -106,9 +106,6 @@ static const table_entry_t uimage_os[] = { { IH_OS_INVALID, "invalid", "Invalid OS", }, { IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware" }, { IH_OS_LINUX, "linux", "Linux", }, -#if defined(USE_HOSTCC) - { IH_OS_LYNXOS, "lynxos", "LynxOS", }, -#endif { IH_OS_NETBSD, "netbsd", "NetBSD", }, { IH_OS_OSE, "ose", "Enea OSE", }, { IH_OS_PLAN9, "plan9", "Plan 9", }, -- 2.27.0

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[PATCH u-boot-next 00/12] Common U-Boot macros for PCI Configuration Mechanism #1
by Pali Rohár 13 Jan '22

13 Jan '22

This patch series add new U-Boot macros for composing Config Address for PCI Configuration Mechanism #1 as defined in PCI Local Bus Specification, including extended variant (which do not have any formal specification) and then use these new macros (PCI_CONF1_ADDRESS and PCI_CONF1_EXT_ADDRESS) in all PCI drivers that use Config Address according to PCI Configuration Mechanism #1. PCI Configuration Mechanism #1 was originally specified for x86 platforms and it is still supported on x86 together with PCIe ECAM. Nowadays lot of non-ECAM-compliant ARM PCIe controllers use only extended variant of this address construction and some of them requires cleared Enable bit. Extended variant is also supported by x86 AMD Barcelona (and new) CPUs, but U-Boot code does not provide this support yet. Note that it exists also PCI Configuration Mechanism #2, but this one was removed from PCI Local Bus Specification revision 3.0 and seems that it is not used by any PCI driver in U-Boot. So I have not added macros for this mechanism in this patch series. Because lot of hardware still use this (rather old) mechanism, relevant U-Boot PCI and PCIe drivers have own ad-hoc code address construction, which is repeated and written in different ways. This patch series is code cleanup of these PCIe drivers to use common U-Boot macros for PCI Configuration Mechanism #1. The last change is fixing construction of Config Address in PCI driver sh7751. Construction with this change matches Linux kernel code and also U-Boot code prior commit mentioned in commit message. I have tested this patch series only for PCI mvebu driver on A385 board and it is working fine. So Please properly review all other changes. Ideally test them. I have run CI tests with these changes on github and everything passed: https://github.com/u-boot/u-boot/pull/101 Please let me know what do you think about this change. Pali Rohár (12): pci: Add standard PCI Config Address macros pci: gt64120: Use PCI_CONF1_ADDRESS() macro pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macro pci: msc01: Use PCI_CONF1_ADDRESS() macro pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macro pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macro pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macro pci: mediatek: Use PCI_CONF1_EXT_ADDRESS() macro pci: sh7780: Use PCI_CONF1_ADDRESS() macro x86: pci: Use PCI_CONF1_ADDRESS() macro m68k: mcf5445x: pci: Use PCI_CONF1_ADDRESS() macro pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macro arch/m68k/cpu/mcf5445x/pci.c | 7 +++--- arch/x86/cpu/pci.c | 4 ++-- drivers/pci/pci_gt64120.c | 7 ++---- drivers/pci/pci_mpc85xx.c | 4 ++-- drivers/pci/pci_msc01.c | 7 ++---- drivers/pci/pci_mvebu.c | 17 ++++---------- drivers/pci/pci_sh7751.c | 29 ++--------------------- drivers/pci/pci_sh7780.c | 8 +++---- drivers/pci/pci_tegra.c | 11 +++------ drivers/pci/pcie_fsl.c | 10 ++++---- drivers/pci/pcie_mediatek.c | 17 +++++++------- include/gt64120.h | 12 ---------- include/msc01.h | 9 -------- include/pci.h | 45 ++++++++++++++++++++++++++++++++++++ 14 files changed, 83 insertions(+), 104 deletions(-) -- 2.20.1

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[PATCH] pci: When disabling pref MEM set all base bits
by Pali Rohár 13 Jan '22

13 Jan '22

It is common to set all base address bits to one and all limit address bits to zero for disabling address forwarding. Forwarding is disabled when base address is higher than limit address, so this change should not have any effect. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/pci/pci_auto.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 6e5ed194f247..c0acf331398d 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -243,7 +243,7 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) cmdstat |= PCI_COMMAND_MEMORY; } else { /* We don't support prefetchable memory for now, so disable */ - dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, 0x1000 | + dm_pci_write_config16(dev, PCI_PREF_MEMORY_BASE, 0xfff0 | prefechable_64); dm_pci_write_config16(dev, PCI_PREF_MEMORY_LIMIT, 0x0 | prefechable_64); -- 2.20.1

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[PATCH] pci: Disable I/O forwarding during autoconfiguration if unsupported
by Pali Rohár 13 Jan '22

13 Jan '22

If U-Boot does not have any I/O resource for assignment then disable I/O forwarding in PCI bridge autoconfiguration code. Default initial state of PCI bridge IO registers is unspecified, therefore they can be in enabled if U-Boot does not touch them. Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/pci/pci_auto.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 7e6ee54be087..6e5ed194f247 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -265,6 +265,14 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) (pci_io->bus_lower & 0xffff0000) >> 16); cmdstat |= PCI_COMMAND_IO; + } else { + /* Disable I/O if unsupported */ + dm_pci_write_config8(dev, PCI_IO_BASE, 0xf0 | io_32); + dm_pci_write_config8(dev, PCI_IO_LIMIT, 0x0 | io_32); + if (io_32 == PCI_IO_RANGE_TYPE_32) { + dm_pci_write_config16(dev, PCI_IO_BASE_UPPER16, 0x0); + dm_pci_write_config16(dev, PCI_IO_LIMIT_UPPER16, 0x0); + } } /* Enable memory and I/O accesses, enable bus master */ -- 2.20.1

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[PATCH] pci: Fix register for determining type of IO base address
by Pali Rohár 13 Jan '22

13 Jan '22

Function dm_pciauto_prescan_setup_bridge() configures base address registers, therefore it should read type of IO from base address registers (and not from limit address registers). Note that base and limit address registers should have same type, so this change is just usage correction and has no functional change on correctly working hardware. Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges") Signed-off-by: Pali Rohár <pali(a)kernel.org> --- drivers/pci/pci_auto.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 5af4ee6e56df..7e6ee54be087 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -197,7 +197,7 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, int sub_bus) dm_pci_read_config16(dev, PCI_COMMAND, &cmdstat); dm_pci_read_config16(dev, PCI_PREF_MEMORY_BASE, &prefechable_64); prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK; - dm_pci_read_config8(dev, PCI_IO_LIMIT, &io_32); + dm_pci_read_config8(dev, PCI_IO_BASE, &io_32); io_32 &= PCI_IO_RANGE_TYPE_MASK; /* Configure bus number registers */ -- 2.20.1

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[PATCH u-boot-next 0/4] pci: Use PCIE_ECAM_OFFSET() macro
by Pali Rohár 13 Jan '22

13 Jan '22

This patch series replace usage of custom driver functions and macros by PCIE_ECAM_OFFSET() macro provided by U-Boot pci.h header file. Please properly review these patches as I do not have hardware with these drivers for testing. Support for PCIE_ECAM_OFFSET() macro is in U-Boot next branch. Pali Rohár (4): vexpress64: Remove unused macro XR3PCI_ECAM_OFFSET pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macro pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macro pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macro board/armltd/vexpress64/pcie.c | 4 --- drivers/pci/pci_octeontx.c | 61 +++++++++++----------------------- drivers/pci/pcie_brcmstb.c | 7 +--- drivers/pci/pcie_iproc.c | 17 ++-------- 4 files changed, 24 insertions(+), 65 deletions(-) -- 2.20.1

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[PATCH 0/4] Apple M1 watchdog timer
by Mark Kettenis 12 Jan '22

12 Jan '22

This series adds a driver for the watchdog timer found on Apple's M1 SoC and replaces the reset_cpu() function in the board file with sysreset. The driver is based on the Linux binding proposed in [1]. [1] https://patchwork.ozlabs.org/project/devicetree-bindings/patch/202111130947… Mark Kettenis (3): watchdog: Add a driver for the Apple watchdog arm: dts: apple: Add watchdog timer node arm: apple: Use watchdog timer for system reset Tom Rini (1): configs: Resync with savedefconfig arch/arm/Kconfig | 3 + arch/arm/dts/t8103.dtsi | 13 +- arch/arm/mach-apple/board.c | 24 ---- configs/T1024RDB_NAND_defconfig | 3 +- configs/T1024RDB_SDCARD_defconfig | 2 +- configs/T1024RDB_SPIFLASH_defconfig | 2 +- configs/T1024RDB_defconfig | 2 +- configs/T1042D4RDB_NAND_defconfig | 2 +- configs/T1042D4RDB_SDCARD_defconfig | 1 - configs/T1042D4RDB_SPIFLASH_defconfig | 2 +- configs/T1042D4RDB_defconfig | 2 +- configs/T2080RDB_defconfig | 1 - configs/kmcent2_defconfig | 2 +- configs/kmtegr1_defconfig | 2 +- configs/kontron_sl28_defconfig | 1 - configs/ls1021aiot_qspi_defconfig | 1 - configs/ls1021aiot_sdcard_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 2 +- configs/ls1021aqds_nand_defconfig | 1 - configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 2 +- configs/ls1021aqds_nor_defconfig | 2 +- configs/ls1021aqds_nor_lpuart_defconfig | 2 +- configs/ls1021aqds_qspi_defconfig | 1 - configs/ls1021aqds_sdcard_ifc_defconfig | 1 - configs/ls1021aqds_sdcard_qspi_defconfig | 1 - configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 2 +- configs/ls1021atwr_nor_defconfig | 2 +- configs/ls1021atwr_nor_lpuart_defconfig | 2 +- configs/ls1021atwr_qspi_defconfig | 1 - ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 +- configs/ls1021atwr_sdcard_ifc_defconfig | 1 - configs/ls1021atwr_sdcard_qspi_defconfig | 1 - configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 - configs/ls1028aqds_tfa_defconfig | 1 - configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 - configs/ls1028ardb_tfa_defconfig | 1 - configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 2 +- configs/ls1043aqds_nor_ddr3_defconfig | 2 +- configs/ls1043aqds_sdcard_ifc_defconfig | 2 +- configs/ls1043aqds_sdcard_qspi_defconfig | 2 +- configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043aqds_tfa_defconfig | 2 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_defconfig | 2 +- .../ls1043ardb_sdcard_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_sdcard_defconfig | 2 +- configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 2 +- configs/ls1043ardb_tfa_defconfig | 2 +- .../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 - configs/pg_wcom_expu1_defconfig | 2 +- configs/pg_wcom_seli8_defconfig | 2 +- configs/stm32mp15_dhcom_basic_defconfig | 2 +- configs/stm32mp15_dhcor_basic_defconfig | 2 +- configs/vinco_defconfig | 2 +- drivers/watchdog/Kconfig | 9 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/apple_wdt.c | 111 ++++++++++++++++++ scripts/config_whitelist.txt | 1 - 60 files changed, 169 insertions(+), 84 deletions(-) create mode 100644 drivers/watchdog/apple_wdt.c -- 2.33.1

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[PATCH v3 00/12] fsl_esdhc_imx: port several patches from fsl_esdhc
by Sean Anderson 11 Jan '22

11 Jan '22

This series ports some of the patches from fsl_esdhc to fsl_esdhc_imx. Because these drivers share a common lineage, many of these patches apply with minor changes. For each one, I have noted the originating commit in the style of linux stable backports. Where I have had to modify patches, I have noted the changes I have made before my SoB. In fa33d20749 ("mmc: split fsl_esdhc driver for i.MX"), Yangbo says > For the two series processors, the eSDHCs are becoming more and more > different However, these drivers are still extremely similar; the differences between them are not major. NXP has not done a good job of porting patches which apply to both drivers. This causes the fsl_esdhc_imx driver to rot, as the fsl_esdhc gets more general fixes. For this reason, I think that the fsl_esdhc_imx driver should be removed unless NXP can commit to creating series like this which port patches which apply to both drivers. Changes in v3: - Drop Kconfig BLK dependency - Fix build error caused by unconverted OF_PLATDATA code - Replace more #ifdefs by if Changes in v2: - Use a switch statement instead of ifs for max_bus_width - Only default to 8 bit width when max_bus_width is not set Sean Anderson (12): mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC mmc: fsl_esdhc_imx: remove redundant DM_MMC checking mmc: fsl_esdhc_imx: fix voltage validation mmc: fsl_esdhc_imx: clean up bus width configuration code mmc: fsl_esdhc_imx: drop redundant code for non-removable feature mmc: fsl_esdhc_imx: fix mmc->clock with actual clock mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfers mmc: fsl_esdhc_imx: use dma-mapping API mmc: fsl_esdhc_imx: simplify esdhc_setup_data() mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED() mmc: fsl_esdhc_imx: Replace more #ifdefs by if mmc: fsl_esdhc_imx: set sysctl register for clock initialization drivers/mmc/fsl_esdhc_imx.c | 643 ++++++++++++++---------------------- include/fsl_esdhc_imx.h | 14 +- 2 files changed, 263 insertions(+), 394 deletions(-) -- 2.25.1

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