September 2020 - U-Boot

[PATCH] PCI: mediatek: Release the resource when PCIe enable port fail
by Chuanjia Liu 10 Sep '20

10 Sep '20

On the mt7623 platform, if one port enable fail and other port enable succeed. It will hang on when using pci enum because the resource was not released correctly. Signed-off-by: Chuanjia Liu <Chuanjia.Liu(a)mediatek.com> Tested-by: Frank Wunderlich <frank-w(a)public-files.de> --- drivers/pci/pcie_mediatek.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c index ad34f7c597..55b6a40f25 100644 --- a/drivers/pci/pcie_mediatek.c +++ b/drivers/pci/pcie_mediatek.c @@ -443,29 +443,36 @@ static void mtk_pcie_enable_port(struct mtk_pcie_port *port) err = clk_enable(&port->sys_ck); if (err) - goto exit; + goto err_sys_clk; err = reset_assert(&port->reset); if (err) - goto exit; + goto err_reset; err = reset_deassert(&port->reset); if (err) - goto exit; + goto err_reset; err = generic_phy_init(&port->phy); if (err) - goto exit; + goto err_phy_init; err = generic_phy_power_on(&port->phy); if (err) - goto exit; + goto err_phy_on; if (!mtk_pcie_startup_port(port)) return; pr_err("Port%d link down\n", port->slot); -exit: + + generic_phy_power_off(&port->phy); +err_phy_on: + generic_phy_exit(&port->phy); +err_phy_init: +err_reset: + clk_disable(&port->sys_ck); +err_sys_clk: mtk_pcie_port_free(port); } -- 2.18.0

3 5

[PATCH v2] arm: dts: fix ast2500-evb inclusion for the correct soc family
by Thirupathaiah Annapureddy 10 Sep '20

10 Sep '20

Include ast2500-evb.dtb for CONFIG_ASPEED_AST2500 instead of for all aspeed targets. ast2400 is based on ARM926EJ-S processor (ARMv5-architecture). ast2500 is based on ARM1176JZS processor (ARMv6-architecture). ast2600 is based on Cortex A7 processor (ARMv7-A architecture). Each of the above SOC is using a different ARM CPU(s) with different ARM architecture revision. It is not possible to support all 3 of these families in a single binary. So there is no need to build ast2500-evb.dtb for other SOC families. Signed-off-by: Thirupathaiah Annapureddy <thiruan(a)linux.microsoft.com> --- Changes in v2: - Incorporated the feedback from Tom Rini and Ryan Chen. arch/arm/dts/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7e29b9096b..33d40a05f9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -938,7 +938,7 @@ dtb-$(CONFIG_ARCH_BCM6858) += \ dtb-$(CONFIG_TARGET_BCMNS3) += ns3-board.dtb -dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb +dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb -- 2.25.2

3 2

[PATCH 0/3] Rename ASPEED SoC clock name
by Ryan Chen 10 Sep '20

10 Sep '20

This patch series refactor the exiting ASPEED clock name define sync with Linux kernel. And also add SPDX-License Ryan Chen (3): cosmetic: aspeed: ast2500: Rename clock header aspeed:clock: Sync with Linux kernel clock header define cosmetic: aspeed: Modify for SPDX-License arch/arm/dts/ast2500-u-boot.dtsi | 23 ++++++----- arch/arm/mach-aspeed/ast2500/sdram_ast2500.c | 2 +- drivers/clk/aspeed/clk_ast2500.c | 40 +++++++++---------- include/dt-bindings/clock/aspeed-clock.h | 42 ++++++++++++++++++++ include/dt-bindings/clock/ast2500-scu.h | 30 -------------- 5 files changed, 74 insertions(+), 63 deletions(-) create mode 100644 include/dt-bindings/clock/aspeed-clock.h delete mode 100644 include/dt-bindings/clock/ast2500-scu.h -- 2.17.1

4 19

[PATCH v2 1/1] board: ns3: check bnxt chimp handshake status
by Rayagonda Kokatanur 10 Sep '20

10 Sep '20

Chimp is a core in Broadcom netxtream controller (bnxt). Add support to check bnxt's chimp component status. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur(a)broadcom.com> --- Changes from V1: -Address review comments from Simon, Add comment about chimp failure. board/broadcom/bcmns3/ns3.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 0357cd0e32..10ae344a06 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -12,6 +12,7 @@ #include <asm/armv8/mmu.h> #include <asm/arch-bcmns3/bl33_info.h> #include <dt-bindings/memory/bcm-ns3-mc.h> +#include <broadcom/chimp.h> /* Default reset-level = 3 and strap-val = 0 */ #define L3_RESET 30 @@ -210,8 +211,24 @@ void reset_cpu(ulong level) #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *fdt, struct bd_info *bd) { + u32 chimp_hs = CHIMP_HANDSHAKE_WAIT_TIMEOUT; + gic_lpi_tables_init(); + /* + * Check for chimp handshake status. + * Zero timeout value will actually fall to default timeout. + * + * System boot is independent of chimp handshake. + * chimp handshake failure is not a catastrophic error. + * Hence continue booting if chimp handshake fails. + */ + chimp_handshake_status_optee(0, &chimp_hs); + if (chimp_hs == CHIMP_HANDSHAKE_SUCCESS) + printf("ChiMP handshake successful\n"); + else + printf("ERROR: ChiMP handshake status 0x%x\n", chimp_hs); + return mem_info_parse_fixup(fdt); } #endif /* CONFIG_OF_BOARD_SETUP */ -- 2.17.1

3 2

[PATCH v2 0/5] add custome commands for broadcom NS3 soc
by Rayagonda Kokatanur 10 Sep '20

10 Sep '20

This patch set adds commands specific to broadcom NS3 soc. Changes from V1: -Address review comments from Simon, Update commit message. Rearrange header files. Add comments to macros. Use lower case hex. Rename struct name from nitro_img_header to img_header. Drop unnecessary type cast. Check returun value for env_set_hex(). Remove use of typedef. Command description correction. Bharat Kumar Reddy Gooty (1): cmd: broadcom: add command for chimp handshake Rayagonda Kokatanur (1): MAINTAINERS: update maintainers file for new files Trac Hoang (1): cmd: broadcom: add bnxt boot command Vikas Gupta (1): cmd: broadcom: add cmd to update bnxt image env variables Vladimir Olovyannikov (1): board: ns3: kconfig: extend board kconfig with specific commands MAINTAINERS | 4 + board/broadcom/bcmns3/Kconfig | 7 ++ cmd/Makefile | 2 + cmd/broadcom/Makefile | 6 ++ cmd/broadcom/chimp_boot.c | 37 ++++++++++ cmd/broadcom/chimp_handshake.c | 33 +++++++++ cmd/broadcom/nitro_image_load.c | 125 ++++++++++++++++++++++++++++++++ include/broadcom/chimp.h | 12 +++ 8 files changed, 226 insertions(+) create mode 100644 cmd/broadcom/Makefile create mode 100644 cmd/broadcom/chimp_boot.c create mode 100644 cmd/broadcom/chimp_handshake.c create mode 100644 cmd/broadcom/nitro_image_load.c -- 2.17.1

3 13

[PULL u-boot] Please pull u-boot-amlogic-20200910
by Neil Armstrong 10 Sep '20

10 Sep '20

Hi Tom, This PR enables/fixes HDMI output & USB keyboard on Odroid-N2 & Odroid-C4. The CI job is at https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic/pipelines/4642 Thanks, Neil The following changes since commit a34746b86ecb650679500e0c596fdae38665939f: Merge tag 'u-boot-stm32-20200909' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm (2020-09-09 12:59:02 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic.git tags/u-boot-amlogic-20200910 for you to fetch changes up to 92f10e61351ddddd730c49c00cdbbd195c838140: configs: odroid-c4: update for HDMI output background & USB keyboard (2020-09-10 10:51:36 +0200) ---------------------------------------------------------------- - enables HDMI output & USB keyboard for Odroid-N2 - setups HDMI output background & enables USB keyboard ---------------------------------------------------------------- Anand Moon (2): configs: odroid-n2: update for HDMI output & USB keyboard configs: odroid-c4: update for HDMI output background & USB keyboard configs/odroid-c4_defconfig | 4 ++++ configs/odroid-n2_defconfig | 9 +++++++++ 2 files changed, 13 insertions(+)

2 1

[PATCH v2 0/9] IPQ40xx: Improve support
by Robert Marko 10 Sep '20

10 Sep '20

This patch series builds on the previously merged basic Qualcomm IPQ40xx series support. Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> Cc: Luka Perkov <luka.perkov(a)sartura.hr> Robert Marko (9): dt-bindings: clock: import Qualcomm IPQ4019 bindings IPQ40xx: clk: Use dt-bindings instead of hardcoding IPQ40xx: Add SMEM support reset: Add IPQ40xx reset controller driver IPQ40xx: Add reset controller support phy: add driver for Qualcomm IPQ40xx USB PHY usb: dwc3: Make PHY functions depend on CONFIG_USB_DWC3 usb: xhci: Add Qualcomm DWC3 xHCI driver IPQ40xx: Add USB nodes MAINTAINERS | 6 + arch/arm/Kconfig | 3 + arch/arm/dts/qcom-ipq4019.dtsi | 67 ++++++- arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 +- .../usb/qcom-dwc3-ipq.txt | 34 ++++ drivers/phy/Kconfig | 6 + drivers/phy/Makefile | 1 + drivers/phy/phy-qcom-ipq4019-usb.c | 145 +++++++++++++++ drivers/reset/Kconfig | 8 + drivers/reset/Makefile | 1 + drivers/reset/reset-ipq4019.c | 173 ++++++++++++++++++ drivers/smem/Kconfig | 2 +- drivers/usb/host/Kconfig | 6 + drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-ipq.c | 117 ++++++++++++ include/dt-bindings/clock/qcom,ipq4019-gcc.h | 96 ++++++++++ .../dt-bindings/reset/qcom,ipq4019-reset.h | 92 ++++++++++ include/dwc3-uboot.h | 2 +- 18 files changed, 760 insertions(+), 4 deletions(-) create mode 100644 doc/device-tree-bindings/usb/qcom-dwc3-ipq.txt create mode 100644 drivers/phy/phy-qcom-ipq4019-usb.c create mode 100644 drivers/reset/reset-ipq4019.c create mode 100644 drivers/usb/host/xhci-ipq.c create mode 100644 include/dt-bindings/clock/qcom,ipq4019-gcc.h create mode 100644 include/dt-bindings/reset/qcom,ipq4019-reset.h -- 2.26.2

3 14

[PATCH v2 0/8] IPQ40xx: Improve support
by Robert Marko 10 Sep '20

10 Sep '20

This patch series builds on the previously merged basic Qualcomm IPQ40xx series support. v2 series drops custom USB driver and instead uses existing DWC3 generic driver. Signed-off-by: Robert Marko <robert.marko(a)sartura.hr> Cc: Luka Perkov <luka.perkov(a)sartura.hr> Robert Marko (8): dt-bindings: clock: import Qualcomm IPQ4019 bindings IPQ40xx: clk: Use dt-bindings instead of hardcoding IPQ40xx: Add SMEM support reset: Add IPQ40xx reset controller driver IPQ40xx: Add reset controller support phy: add driver for Qualcomm IPQ40xx USB PHY usb: dwc3: Add Qualcomm DWC3 compatible string IPQ40xx: Add USB nodes MAINTAINERS | 4 + arch/arm/Kconfig | 3 + arch/arm/dts/qcom-ipq4019.dtsi | 93 +++++++++- arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 +- drivers/phy/Kconfig | 6 + drivers/phy/Makefile | 1 + drivers/phy/phy-qcom-ipq4019-usb.c | 145 +++++++++++++++ drivers/reset/Kconfig | 8 + drivers/reset/Makefile | 1 + drivers/reset/reset-ipq4019.c | 173 ++++++++++++++++++ drivers/smem/Kconfig | 2 +- drivers/usb/dwc3/dwc3-generic.c | 1 + include/dt-bindings/clock/qcom,ipq4019-gcc.h | 96 ++++++++++ .../dt-bindings/reset/qcom,ipq4019-reset.h | 92 ++++++++++ 14 files changed, 626 insertions(+), 3 deletions(-) create mode 100644 drivers/phy/phy-qcom-ipq4019-usb.c create mode 100644 drivers/reset/reset-ipq4019.c create mode 100644 include/dt-bindings/clock/qcom,ipq4019-gcc.h create mode 100644 include/dt-bindings/reset/qcom,ipq4019-reset.h -- 2.26.2

2 10

[PATCH] ARM: zynq: Add Z-turn board V5
by agriveaux＠deutnet.info 10 Sep '20

10 Sep '20

From: Alexandre GRIVEAUX <agriveaux(a)deutnet.info> Adding Z-turn board V5 to resolve the change between: "Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035 "Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel KSZ9031 At this time the S25FL128SAGNFI003 doesn't work because of bug: *** Warning - spi_flash_probe_bus_cs() failed, using default environment Signed-off-by: Alexandre GRIVEAUX <agriveaux(a)deutnet.info> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-zturn-v5.dts | 121 ++++++++ .../xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c | 273 ++++++++++++++++++ configs/xilinx_zynq_virt_defconfig | 4 +- 4 files changed, 398 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/zynq-zturn-v5.dts create mode 100644 board/xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f8f529435b..0f8973b1c8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -277,6 +277,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zc770-xm013.dtb \ zynq-zed.dtb \ zynq-zturn.dtb \ + zynq-zturn-v5.dtb \ zynq-zybo.dtb \ zynq-zybo-z7.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ diff --git a/arch/arm/dts/zynq-zturn-v5.dts b/arch/arm/dts/zynq-zturn-v5.dts new file mode 100644 index 0000000000..eebeec800f --- /dev/null +++ b/arch/arm/dts/zynq-zturn-v5.dts @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Alexandre Griveaux <alex(a)deutnet.info> + * + * Based on zynq-zturn.dts which is: + * Copyright (C) 2015 Andrea Merello <adnrea.merello(a)gmail.com> + * Copyright (C) 2017 Alexander Graf <agraf(a)suse.de> + * + */ + +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + model = "Zynq Z-Turn MYIR Board V5"; + compatible = "myir,zynq-zturn", "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart1; + serial1 = &uart0; + mmc0 = &sdhci0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + usr-led1 { + label = "usr-led1"; + gpios = <&gpio0 0x0 0x1>; + default-state = "off"; + }; + + usr-led2 { + label = "usr-led2"; + gpios = <&gpio0 0x9 0x1>; + default-state = "off"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + K1 { + label = "K1"; + gpios = <&gpio0 0x32 0x1>; + linux,code = <0x66>; + wakeup-source; + autorepeat; + }; + }; +}; + +&clkc { + ps-clk-frequency = <33333333>; +}; + +&qspi { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&ethernet_phy>; + + ethernet_phy: ethernet-phy@0 { + reg = <0x3>; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; + +&can0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + stlm75@49 { + status = "okay"; + compatible = "lm75"; + reg = <0x49>; + }; + + accelerometer@53 { + compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x"; + reg = <0x53>; + interrupt-parent = <&intc>; + interrupts = <0x0 0x1e 0x4>; + }; +}; diff --git a/board/xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c new file mode 100644 index 0000000000..5d573868cb --- /dev/null +++ b/board/xilinx/zynq/zynq-zturn-v5/ps7_init_gpl.c @@ -0,0 +1,273 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) Xilinx, Inc. + */ + +#include <asm/arch/ps7_init_gpl.h> + +static unsigned long ps7_pll_init_data[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), + EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000001U), + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), + EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), + EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), + EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000002U), + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), + EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), + EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), + EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), + EMIT_MASKPOLL(0xF800010C, 0x00000004U), + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_clock_init_data[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), + EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U), + EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U), + EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U), + EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A03U), + EMIT_MASKWRITE(0xF800015C, 0x03F03F33U, 0x00200501U), + EMIT_MASKWRITE(0xF8000160, 0x007F007FU, 0x00000000U), + EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), + EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00200500U), + EMIT_MASKWRITE(0xF8000180, 0x03F03F30U, 0x00400500U), + EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01FD044DU), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_ddr_init_data[] = { + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), + EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001082U), + EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), + EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), + EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), + EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004285BU), + EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D3U), + EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x7282BCE5U), + EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x270872D0U), + EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U), + EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), + EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), + EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040B30U), + EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), + EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U), + EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), + EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), + EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U), + EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U), + EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), + EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U), + EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), + EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), + EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), + EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), + EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), + EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U), + EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U), + EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), + EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), + EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), + EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), + EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U), + EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), + EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), + EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), + EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), + EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), + EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U), + EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x0002A81FU), + EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00029822U), + EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C10U), + EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00026013U), + EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), + EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000009FU), + EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x000000A2U), + EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x00000090U), + EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000093U), + EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000FFU), + EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000FBU), + EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U), + EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000EDU), + EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000DFU), + EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000E2U), + EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000D0U), + EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000D3U), + EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U), + EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), + EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), + EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U), + EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), + EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), + EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), + EMIT_MASKPOLL(0xF8000B74, 0x00002000U), + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), + EMIT_MASKPOLL(0xF8006054, 0x00000007U), + EMIT_EXIT(), +}; + +static unsigned long ps7_mio_init_data[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), + EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), + EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), + EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), + EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C61CU), + EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F9861CU), + EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F9861CU), + EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F9861CU), + EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U), + EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U), + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), + EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U), + EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U), + EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U), + EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00000600U), + EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x000016E1U), + EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x000016E0U), + EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001640U), + EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001640U), + EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001621U), + EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001620U), + EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001202U), + EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001203U), + EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001205U), + EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001205U), + EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001205U), + EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001204U), + EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007B8, 0x00003F01U, 0x00000201U), + EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00000201U), + EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U), + EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U), + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00000200U), + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00000200U), + EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U), + EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002E002FU), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +static unsigned long ps7_peripherals_init_data[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), + EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), + EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), + EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00080000U), + EMIT_MASKWRITE(0xE000A00C, 0x003F003FU, 0x00370008U), + EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00080000U), + EMIT_MASKWRITE(0xE000A00C, 0x003F003FU, 0x00370000U), + EMIT_MASKDELAY(0xF8F00200, 1), + EMIT_MASKWRITE(0xE000A00C, 0x003F003FU, 0x00370008U), + EMIT_EXIT(), +}; + +static unsigned long ps7_post_config_0[] = { + EMIT_WRITE(0xF8000008, 0x0000DF0DU), + EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), + EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), + EMIT_WRITE(0xF8000004, 0x0000767BU), + EMIT_EXIT(), +}; + +int ps7_post_config(void) +{ + return ps7_config(ps7_post_config_0); +} + +int ps7_init(void) +{ + int ret; + + ret = ps7_config(ps7_mio_init_data); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_pll_init_data); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_clock_init_data); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_ddr_init_data); + if (ret != PS7_INIT_SUCCESS) + return ret; + + ret = ps7_config(ps7_peripherals_init_data); + if (ret != PS7_INIT_SUCCESS) + return ret; + return PS7_INIT_SUCCESS; +} diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 8acdab25b7..afbc81afd1 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -49,7 +49,7 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_MTDPARTS_SPREAD=y CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y CONFIG_CMD_UBI=y -CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0" +CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zturn-v5 zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0" CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -90,6 +90,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MARVELL=y CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_ZYNQ_GEM=y CONFIG_ARM_DCC=y -- 2.20.1

2 1

[PATCH] clk: Add more information to debug messages
by Sean Anderson 10 Sep '20

10 Sep '20

Some of the debug messages in the clock subsystem can be made more informative by adding the clock name or adding the explicit error. Signed-off-by: Sean Anderson <seanga2(a)gmail.com> --- drivers/clk/clk-uclass.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index 71878474eb..d44df05680 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -237,8 +237,8 @@ static int clk_set_default_parents(struct udevice *dev, int stage) continue; if (ret < 0) { - debug("%s: failed to reparent clock %d for %s\n", - __func__, index, dev_read_name(dev)); + debug("%s: failed to reparent clock %d for %s (err = %d)\n", + __func__, index, dev_read_name(dev), ret); return ret; } } @@ -295,8 +295,8 @@ static int clk_set_default_rates(struct udevice *dev, int stage) ret = clk_set_rate(&clk, rates[index]); if (ret < 0) { - debug("%s: failed to set rate on clock index %d (%ld) for %s\n", - __func__, index, clk.id, dev_read_name(dev)); + debug("%s: failed to set rate on clock index %d (%ld) for %s (err = %d)\n", + __func__, index, clk.id, dev_read_name(dev), ret); break; } } @@ -436,7 +436,7 @@ ulong clk_get_rate(struct clk *clk) { const struct clk_ops *ops; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); @@ -452,7 +452,7 @@ struct clk *clk_get_parent(struct clk *clk) struct udevice *pdev; struct clk *pclk; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p) \"%s\"\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return NULL; @@ -469,7 +469,7 @@ long long clk_get_parent_rate(struct clk *clk) const struct clk_ops *ops; struct clk *pclk; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return 0; @@ -492,7 +492,8 @@ ulong clk_set_rate(struct clk *clk, ulong rate) { const struct clk_ops *ops; - debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); + debug("%s(clk=%p \"%s\", rate=%lu)\n", __func__, clk, clk->dev->name, + rate); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); @@ -507,7 +508,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent) { const struct clk_ops *ops; - debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent); + debug("%s(clk=%p \"%s\", parent=%p \"%s\")\n", __func__, clk, + clk->dev->name, parent, parent->dev->name); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); @@ -524,7 +526,7 @@ int clk_enable(struct clk *clk) struct clk *clkp = NULL; int ret; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p \"%s\")\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); @@ -584,7 +586,7 @@ int clk_disable(struct clk *clk) struct clk *clkp = NULL; int ret; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p) \"%s\"\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); -- 2.25.1

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